Commit Graph

50 Commits

Author SHA1 Message Date
Dylan Noblesmith 085fc4d6c6 TableGen: unique_ptr-ify RecordKeeper
llvm-svn: 216350
2014-08-24 19:10:57 +00:00
Dylan Noblesmith aa9b74c544 TableGen: delete no-op code
This does nothing but remove the Record from the map, and
then re-add it, without actually changing it in between.

The Record's Name used to be changed before re-adding it
when the code was first committed in r137232, but the
name-changing lines were removed in r142510, and since
then this code seems to do nothing.

This was also the only caller of removeClass or removeDef,
so now RecordKeeper owns its Records unconditionally,
and could be unique_ptr-ified.

llvm-svn: 216349
2014-08-24 19:10:53 +00:00
Dylan Noblesmith 80f0e432ee TableGen: use auto and for-range
llvm-svn: 216348
2014-08-24 19:10:49 +00:00
Pete Cooper 94891ddf0d Update BitRecTy::convertValue to allow if expressions with bit values on both sides of the if
llvm-svn: 215087
2014-08-07 05:47:10 +00:00
Pete Cooper 99ad2a3b67 TableGen: Change { } to only accept bits<n> entries when n == 1.
Prior to this change, it was legal to do something like

  bits<2> opc = { 0, 1 };
  bits<2> opc2 = { 1, 0 };
  bits<2> a = { opc, opc2 };

This involved silently dropping bits from opc and opc2 which is very hard to debug.

Now the above test would be an error.  Having tested with an assert, none of LLVM/clang was relying on this behaviour.

Thanks to Adam Nemet for the above test.

llvm-svn: 215083
2014-08-07 05:46:57 +00:00
Joerg Sonnenberger 6b41a9900a Allow binary and for tblgen math.
llvm-svn: 214851
2014-08-05 09:43:25 +00:00
Adam Nemet 017fca0272 [TableGen] Allow shift operators to take bits<n>
Convert the operand to int if possible, i.e. if the value is properly
initialized.  (I suppose there is further room for improvement here to also
peform the shift if the uninitialized bits are shifted out.)

With this little change we can now compute the scaling factor for compressed
displacement with pure tablegen code in the X86 backend.  This is useful
because both the X86-disassembler-specific part of tablegen and the assembler
need this and TD is the natural sharing place.

The patch also adds the missing documentation for the shift and add operator.

llvm-svn: 213277
2014-07-17 17:04:27 +00:00
Craig Topper 35b2f75733 Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert.
llvm-svn: 211254
2014-06-19 06:10:58 +00:00
Daniel Sanders 2b6b3d1c5d Use a vector of unique_ptrs to fix a memory leak introduced in r208179.
Also removed an inaccurate comment that stated that a DenseMap was used as
storage for the ListInit*'s. It's currently using a FoldingSet.

I expect there's a better way to fix this but I haven't found it yet. FoldingSet
is incompatible with the Pool template and I'm not sure if FoldingSet can be
safely replaced with a DenseMap of computed FoldingSetID's to ListInit*'s.

llvm-svn: 208293
2014-05-08 09:29:28 +00:00
Daniel Sanders 314e80e5f8 [tablegen] Add !listconcat operator with the similar semantics as !strconcat
Summary:
It concatenates two or more lists. In addition to the !strconcat semantics
the lists must have the same element type.

My overall aim is to make it easy to append to Instruction.Predicates
rather than override it. This can be done by concatenating lists passed as
arguments, or by concatenating lists passed in additional fields.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D3506

llvm-svn: 208183
2014-05-07 10:13:19 +00:00
Craig Topper 011817a0bf [C++11] Make use of 'nullptr' in TableGen library.
llvm-svn: 205830
2014-04-09 04:50:04 +00:00
Benjamin Kramer 48e7e85d29 tblgen: Twinify PrintFatalError.
No functionality change.

llvm-svn: 205110
2014-03-29 17:17:15 +00:00
Craig Topper 64d94320f3 Fix odd indentation.
llvm-svn: 202342
2014-02-27 03:11:13 +00:00
Rafael Espindola 8fb73c8778 Fix most memory leaks in tablegen.
Found by the valgrind bot.

llvm-svn: 193736
2013-10-31 04:07:41 +00:00
Benjamin Kramer 6ecb1e78a9 Make helpers static. Add missing include so LLVMInitializeObjCARCOpts gets C linkage.
llvm-svn: 175264
2013-02-15 12:30:38 +00:00
Hal Finkel c7d4dc13a4 Add an addition operator to TableGen
This adds an !add(a, b) operator to tablegen; this will be used
to cleanup the PPC register definitions.

llvm-svn: 173445
2013-01-25 14:49:08 +00:00
Sean Silva 93be7d59d2 Simplify TableGen type-compatibility checks.
Patch by Elior Malul!

llvm-svn: 171684
2013-01-07 02:30:19 +00:00
Chandler Carruth ed0881b2a6 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Joerg Sonnenberger 635debe85b Remove exception handling usage from tblgen.
Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set. 

llvm-svn: 166712
2012-10-25 20:33:17 +00:00
Sean Silva 88eb8dd4ed tblgen: Use semantically correct RTTI functions.
Also, some minor cleanup.

llvm-svn: 165647
2012-10-10 20:24:47 +00:00
Sean Silva fb509ed156 tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.
Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>.
That will happen in a future patch.

There are also two dyn_cast_or_null<>'s slipped in instead of
dyn_cast<>'s, since they were causing crashes with just dyn_cast<>.

llvm-svn: 165646
2012-10-10 20:24:43 +00:00
Sean Silva a475e4338b tblgen: Use appropriate LLVM-style RTTI functions.
Use isa<> or cast<> when semantically that is what is happening. Also
some trivial "style" cleanups at fix sites.

llvm-svn: 165292
2012-10-05 03:32:00 +00:00
Sean Silva 98c61711c6 tblgen: Replace uses of dynamic_cast<XXXRecTy> with dyn_cast<>.
This is a mechanical change of dynamic_cast<> to dyn_cast<>. A number of
these uses are actually more like isa<> or cast<>, and will be changed
to the semanticaly appropriate one in a future patch.

llvm-svn: 165291
2012-10-05 03:31:58 +00:00
Sean Silva 8f43c6f0d5 De-nest if's and fix mix-up
Two deeply nested if's obscured that the sense of the conditions was
mixed up. Amazingly, TableGen's output is exactly the same even with the
sense of the tests fixed; it seems that all of TableGen's conversions
are symmetric so that the inverted sense was nonetheless correct "by
accident". As such, I couldn't come up with a test case.

If there does in fact exist a non-symmetric conversion in TableGen's
type system, then a test case should be prepared.

Despite the symmetry, both if's are left in place for robustness in the
face of future changes.

Review by Jakob.

llvm-svn: 164195
2012-09-19 02:14:59 +00:00
Michael Liao 026f833368 Re-work bit/bits value resolving in tblgen
- This patch is inspired by the failure of the following code snippet
  which is used to convert enumerable values into encoding bits to
  improve the readability of td files.

  class S<int s> {
    bits<2> V = !if(!eq(s, 8),  {0, 0},
                !if(!eq(s, 16), {0, 1},
                !if(!eq(s, 32), {1, 0},
                !if(!eq(s, 64), {1, 1}, {?, ?}))));
  }

  Later, PR8330 is found to report not exactly the same bug relevant
  issue to bit/bits values.

- Instead of resolving bit/bits values separately through
  resolveBitReference(), this patch adds getBit() for all Inits and
  resolves bit value by resolving plus getting the specified bit. This
  unifies the resolving of bit with other values and removes redundant
  logic for resolving bit only. In addition,
  BitsInit::resolveReferences() is optimized to take advantage of this
  origanization by resolving VarBitInit's variable reference first and
  then getting bits from it.

- The type interference in '!if' operator is revised to support possible
  combinations of int and bits/bit in MHS and RHS.

- As there may be illegal assignments from integer value to bit, says
  assign 2 to a bit, but we only check this during instantiation in some
  cases, e.g.

  bit V = !if(!eq(x, 17), 0, 2);

  Verbose diagnostic message is generated when invalid value is
  resolveed to help locating the error.

- PR8330 is fixed as well.

llvm-svn: 163360
2012-09-06 23:32:48 +00:00