Commit Graph

290 Commits

Author SHA1 Message Date
Eric Christopher d913448b38 Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

llvm-svn: 214781
2014-08-04 21:25:23 +00:00
Chandler Carruth 1b9dde087e [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE
define below all header includes in the lib/CodeGen/... tree. While the
current modules implementation doesn't check for this kind of ODR
violation yet, it is likely to grow support for it in the future. It
also removes one layer of macro pollution across all the included
headers.

Other sub-trees will follow.

llvm-svn: 206837
2014-04-22 02:02:50 +00:00
Craig Topper c0196b1b40 [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
llvm-svn: 206142
2014-04-14 00:51:57 +00:00
Owen Anderson b36376efcb Switch a number of loops in lib/CodeGen over to range-based for-loops, now that
the MachineRegisterInfo iterators are compatible with it.

llvm-svn: 204075
2014-03-17 19:36:09 +00:00
Owen Anderson 16c6bf49b7 Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing
operator* on the by-operand iterators to return a MachineOperand& rather than
a MachineInstr&.  At this point they almost behave like normal iterators!

Again, this requires making some existing loops more verbose, but should pave
the way for the big range-based for-loop cleanups in the future.

llvm-svn: 203865
2014-03-13 23:12:04 +00:00
Craig Topper 4584cd54e3 [C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203220
2014-03-07 09:26:03 +00:00
Benjamin Kramer b6d0bd48bd [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
Remove the old functions.

llvm-svn: 202636
2014-03-02 12:27:27 +00:00
Andrew Trick e339828b90 Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies.
Without this, MachineCSE is powerless to handle redundant operations with truncated source operands.

This required fixing the 2-addr pass to handle tied subregisters. It isn't clear what combinations of subregisters can legally be tied, but the simple case of truncated source operands is now safely handled:

     %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1
     %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2
     %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def>

Test case: cse-add-with-overflow.ll.

This exposed an existing bug in
PPCInstrInfo::commuteInstruction. Thanks to Rafael for the test case:
PowerPC/crash.ll.

llvm-svn: 197465
2013-12-17 04:50:45 +00:00
Rafael Espindola f152836788 Revert "Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies."
This reverts commit r197414.

It broke the ppc64 bootstrap. I will post a testcase in a sec.

llvm-svn: 197424
2013-12-16 20:57:09 +00:00
Andrew Trick 88bd8629b2 Allow MachineCSE to coalesce trivial subregister copies the same way
that it coalesces normal copies.

Without this, MachineCSE is powerless to handle redundant operations
with truncated source operands.

This required fixing the 2-addr pass to handle tied subregisters. It
isn't clear what combinations of subregisters can legally be tied, but
the simple case of truncated source operands is now safely handled:

     %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1
     %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2
     %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def>

llvm-svn: 197414
2013-12-16 19:36:21 +00:00
Matthias Braun 13ddb7cd65 Rename LiveRange to LiveInterval::Segment
The Segment struct contains a single interval; multiple instances of this struct
are used to construct a live range, but the struct is not a live range by
itself.

llvm-svn: 192392
2013-10-10 21:28:43 +00:00
Craig Topper b94011fd28 Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
llvm-svn: 186274
2013-07-14 04:42:23 +00:00
Evan Cheng f85a76f477 TiedTo flag can now be placed on implicit operands. isTwoAddrUse() should look
at all of the operands. Previously it was skipping over implicit operands which
cause infinite looping when the two-address pass try to reschedule a
two-address instruction below the kill of tied operand.

I'm unable to come up with a reasonably sized test case.
rdar://13747577

llvm-svn: 180906
2013-05-02 02:07:32 +00:00
Andrew Trick 608a698cdf Register Coalescing: add a flag to disable rescheduling.
When MachineScheduler is enabled, this functionality can be
removed. Until then, provide a way to disable it for test cases and
designing MachineScheduler heuristics.

llvm-svn: 180192
2013-04-24 15:54:39 +00:00
Bill Wendling a69d0aaa71 Remove unused #includes.
llvm-svn: 176467
2013-03-05 01:00:45 +00:00
Cameron Zwarich 1b4c64c23b Add a use of an otherwise unused variable to remove a warning in non-Asserts
builds.

llvm-svn: 175981
2013-02-24 01:26:05 +00:00
Cameron Zwarich 6868f386c7 TwoAddressInstructionPass::tryInstructionTransform() only potentially returns
true when shouldOnlyCommute is false, so we can remove code that checks
otherwise.

llvm-svn: 175980
2013-02-24 00:27:29 +00:00
Cameron Zwarich f05c0cbb20 TwoAddrInstructionPass::tryInstructionTransform() has a case where it calls
itself recursively with a new instruction that has not been finalized, in order
to determine whether to keep the instruction. On 'make check' and test-suite the
only cases where the recursive invocation made any transformations were simple
instruction commutations, so I am restricting the recursive invocation to do
only this.

The other cases wouldn't work correctly when updating LiveIntervals, since the
new instructions don't have slot indices and LiveIntervals hasn't yet been
updated. If the other transformations were actually triggering in any test case
it would be possible to support it with a lot of effort, but since they don't
it's not worth it.

llvm-svn: 175979
2013-02-24 00:27:26 +00:00
Cameron Zwarich e6907bc0e6 TargetInstrInfo::commuteInstruction() doesn't actually return a new instruction
unless it was requested to with an optional parameter that defaults to false, so
we don't need to handle that case in TwoAddressInstructionPass.

llvm-svn: 175974
2013-02-23 23:13:28 +00:00
Cameron Zwarich 4e80d9e853 Fix a bug with the LiveIntervals updating in the two-address pass found by
running ASCI_Purple/SMG2000 in the test-suite.

llvm-svn: 175957
2013-02-23 04:49:22 +00:00
Cameron Zwarich 35c3050e7a Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware.
llvm-svn: 175956
2013-02-23 04:49:20 +00:00
Cameron Zwarich 7d13fb4d5a Make rescheduleMIBelowKill() and rescheduleKillAboveMI() LiveIntervals-aware in
TwoAddressInstructionPass. The code in rescheduleMIBelowKill() is a bit tricky,
since multiple instructions need to be moved down, one-at-a-time, in reverse
order.

llvm-svn: 175955
2013-02-23 04:49:13 +00:00
Cameron Zwarich 384026b3d4 Stop relying on physical register kill flags in isKilled() in the two-address
pass. One of the callers of isKilled() can cope with overapproximation of kills
and the other can't, so I added a flag to indicate this.

In theory this could pessimize code slightly, but in practice most physical
register uses are kills, and most important kills of physical registers are the
only uses of that register prior to register allocation, so we can recognize
them as kills even without kill flags.

This is relevant because LiveIntervals gets rid of all kill flags.

llvm-svn: 175821
2013-02-21 22:58:42 +00:00
Cameron Zwarich 9e722aed4a Make another kill check LiveIntervals-aware.
This brings the number of remaining failures in 'make check' without
LiveVariables down to 39, with 1 unexpectedly passing test.

llvm-svn: 175727
2013-02-21 07:02:30 +00:00
Cameron Zwarich c896478f0d Split part of isKilled() into a separate function for use elsewhere.
llvm-svn: 175726
2013-02-21 07:02:28 +00:00