Add Nuvoton numaker series flash memory controller(FMC) with erase,
read & write features of soc-flash. Also update Nuvoton manifest
to include zephyrproject-rtos/hal_nuvoton#6.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
This CL attempts to implement npcx's flash driver instead of the
original one (npcx spi driver plus spi_nor flash driver).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
- Added initial version of Infineon CAT1 Flash driver
- Added binding file for infineon,cat1-flash-controller.yaml
- Added overlays for subsys/nvs and drivers/flash_shell
to support cy8cproto_063_ble, cy8cproto_062_4343w boards
- Defined erase-block-size in PSoC6 MPN dtsi.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Add the ability for the flash simulator to store its contents in a
memory region.
This allows filesystems on the flash simulator to survive a reboot.
And allows subsystems (e.g. coredump) to store their info on ram while
using the (existing) flash partition backend.
Add a example (for nucleo_f411re) that shows how to configure the flash
simulator for hardware (cfg discussion #54166).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
This patch makes possible to choose custom byte which should be used
to enable non-permanent readout protection (RDP1). Actually, any byte
except 0xAA and 0xCC (which are used by RDP0 and RDP2 respectively)
can be used to enable RDP1 but in multi-image environment, some other
image could check if RDP1 is enabled by comparing it to some hardcoded
value.
If property is not defined, 0x55 will be used to enable RDP1. The
default value comes from STM32 HAL.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
No sfdp-table property given by the DTS but received from
the octoflash Node rely on the issued by the read sfdp command.
Note that the size of the mx25lm51245 flash controller
is expressed in bits (ie 512Mbits or 64 Mbytes).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
DTS property attributes are (by default) not required.
Explicitly specifying `required: false` is redundant.
Perhaps a warning to that effect would be useful.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
If the flash is used in 4-byte addressing, reading SFDP will fail after
a system reset if the flash isn't power cycled or hardware reset, since
Zephyr will try to use 3-byte addressing while the flash (still) expects
4-byte addressing.
This commit adds the ability to send a reset command to the flash as part
of initialization, which complements the existing reset-gpio
functionality, and is useful on low-pincount flashes which do not have a
hardware reset.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
There are three types GD32 FMC.
GD32 FMC v1: its flash memory has 1 bank, page size is equal in the
bank, flash size is smaller than 512KB.
GD32 FMC v2: its flash memory has 2 banks. Page size equal within the
same bank but different between banks. Flash size can be up to 3072KB.
FMC v2 has two registers to control bank0 and bank1 separately.
GD32 FMC v3: its flash memory has 2 banks, use sector size as the
minimum operating unit, the sector size is not equal.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
This patch is to add Cadence QSPI NOR flash device tree element
for the Cadence QSPI NOR flash driver bringup
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
This adds flash driver for Renesas SmartBond(tm) family.
This technically uses QSPI controller but since default and most
commonly used configuration is to boot from external QSPI flash (DA1469x
do not have built-in flash) and that flash is mapped into memory space,
it can be represented as internal flash.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Despite being used in GD32 dts files, the compatible did not exist. Note
that there is no GD32 flash driver yet.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The binding 'nxp,lpc-iap' is no longer used, which is confirmed
by running:
$ find ${ZEPHYR_BASE}/dts/arm/nxp -type f | egrep -e '\.dts(i)*$' | \
xargs grep -nH nxp,lpc-iap
Changes in this commit:
- remove DT_HAS_NXP_LPC... in drivers/flash/Kconfig.mcux
- remove schema file for nxp,lpc-iap
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
The binding 'nxp,iap-lpc' is used for different flash controllers,
preventing clarity. This commit introduces bindings for each version of
the flash controller, as they appear with NXP lpc device families:
nxp,iap-fmc11: for the flash controler used on the lpc11u6x family
nxp,iap-fmc54: for the flash controler used on the lpc54xx family
nxp,iap-fmc55: for the flash controler used on the lpc55xx family,
except lpc553x
nxp,iap-fmc553: for the flash controler used on the lpc553x family
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add dts bindings for the NIOS2 QSPI controller and flash device and
add nodes to the dts files for these devices as well.
Signed-off-by: Kumar Gala <galak@kernel.org>
The current atmel sam flash driver was develop based on the cortex-m7
version of smart arm microcontroller. The driver support write
protection and cache functions which is not supported by other cortex-m
variants. This fixes current driver implementation and devicetree
entries for all sam variants.
Notes:
* The cortex-m3 doesn't have support erase pages flash command and
because of that the driver still not not compatible. Keep it disabled
until a patch be send. The hwinfo driver is not affected by this
restriction.
* The sam4l variation requires a specific driver because uses another
flash controller (flashcalw). Added another compatible to
differentiate and keeped node disabled until a driver be available.
Fixes#48516
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
All in tree device drivers use some form of DEVICE_DT_GET
so we no longer need to require label properties.
Signed-off-by: Kumar Gala <galak@kernel.org>
