Krystian Hebel e688ed4c1a development/verilog_modules.md: update FPGA utilization numbers ...

Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>

2024-03-14 18:39:13 +01:00

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index.md

add license, making reuse 3.0 compliant

2024-01-16 23:31:56 +01:00

soc_fpga_communication.md

development/soc_fpga_communication.md: document op_type=0 as error

2024-03-14 15:59:28 +01:00

testing.md

development/testing.md: add test results from VP6670 with SPI TPM

2024-03-14 17:28:57 +01:00

verilog_modules.md

development/verilog_modules.md: update FPGA utilization numbers

2024-03-14 18:39:13 +01:00