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Subash Lakkimsetti
a3fa16511c
AVX(G9) and SSE4(W7) is added to IPP crypto lib. PcdCryptoShaOptEnabled is added to enable optimzations in IPP SHA256 and SHA384. Default is set to V8 (SSE3) for SHA256. ENABLE_CRYPTO_SHA_OPT has to be configured in Platform board config files for optimizations to be enabled. Signed-off-by: Subash Lakkimsetti <subashx.lakkimsetti@intel.com>
237 lines
16 KiB
Plaintext
237 lines
16 KiB
Plaintext
## @file
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# Provides bootloader driver related package definitions.
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#
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# Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = BootloaderCommonPkg
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PACKAGE_GUID = c65f7789-add1-40a6-af90-dab7c27bfb33
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PACKAGE_VERSION = 0.1
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[Includes]
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Include
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[Guids]
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gPlatformCommonLibTokenSpaceGuid = { 0x373657df, 0x5dc0, 0x4cbb, { 0x87, 0xad, 0x50, 0x1e, 0xb8, 0x89, 0xbf, 0x89 } }
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gLoaderFspInfoGuid = { 0xbd42bc23, 0x1efe, 0x4b2b, { 0xa5, 0x8e, 0x08, 0x8b, 0x5b, 0xa2, 0xf5, 0xb0 } }
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gPayloadKeyHashGuid = { 0xbf16846f, 0xfde9, 0x487a, { 0xb6, 0x9d, 0xac, 0xad, 0x39, 0x79, 0x5c, 0x4e } }
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gOsBootOptionGuid = { 0xa9e97fe1, 0xe2e0, 0x4550, { 0x86, 0xb3, 0x8d, 0x93, 0x66, 0x5e, 0x6f, 0x6d } }
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gLoaderMemoryMapInfoGuid = { 0xa1ff7424, 0x7a1a, 0x478e, { 0xa9, 0xe4, 0x92, 0xf3, 0x57, 0xd1, 0x28, 0x32 } }
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gLoaderSerialPortInfoGuid = { 0x6c6872fe, 0x56a9, 0x4403, { 0xbb, 0x98, 0x95, 0x8d, 0x62, 0xde, 0x87, 0xf1 } }
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gLoaderPerformanceInfoGuid = { 0x868204be, 0x23d0, 0x4ff9, { 0xac, 0x34, 0xb9, 0x95, 0xac, 0x04, 0xb1, 0xb9 } }
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gLoaderSystemTableInfoGuid = { 0x16c8a6d0, 0xfe8a, 0x4082, { 0xa2, 0x08, 0xcf, 0x89, 0xc4, 0x29, 0x04, 0x33 } }
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gLoaderPlatformDeviceInfoGuid = { 0x74f136fd, 0x518f, 0x4884, { 0x83, 0x90, 0x4a, 0xcd, 0x50, 0x28, 0x11, 0xb6 } }
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gLoaderPlatformDataGuid = { 0x559265da, 0x0982, 0x46ca, { 0x92, 0x48, 0xa4, 0x36, 0x74, 0x34, 0x07, 0x78 } }
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gPeiFirmwarePerformanceGuid = { 0x55765e8f, 0x021a, 0x41f9, { 0x93, 0x2d, 0x4c, 0x49, 0xc5, 0xb7, 0xef, 0x5d } }
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gLoaderLibraryDataGuid = { 0xb803281e, 0xe5aa, 0x42a6, { 0xa7, 0x90, 0x8b, 0x23, 0x52, 0x31, 0x6a, 0xe6 } }
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gBootLoaderServiceGuid = { 0x5ce78dbc, 0xe342, 0x4108, { 0x8f, 0xbf, 0x37, 0xa9, 0x3b, 0x10, 0xf2, 0xf9 } }
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gBootLoaderVersionGuid = { 0x6897f304, 0x45db, 0x4048, { 0xb0, 0xda, 0x04, 0x4d, 0x76, 0x2f, 0x70, 0x1d } }
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gOsConfigDataGuid = { 0x84a0b43c, 0xbdb3, 0x43e3, { 0xa6, 0x39, 0xe8, 0x9c, 0x8e, 0x86, 0xd3, 0xef } }
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gFlashMapInfoGuid = { 0xaf7f452c, 0x5b00, 0x4598, { 0xb4, 0x8c, 0xbf, 0x57, 0xa2, 0x08, 0x71, 0xa1 } }
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gLoaderPlatformInfoGuid = { 0x7b6bad42, 0xd3ab, 0x4947, { 0xa2, 0x6e, 0xd6, 0xf9, 0xa9, 0xac, 0x4a, 0x2a } }
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gSeedListInfoHobGuid = { 0x5e9f5b2f, 0xfeeb, 0x4344, { 0xb3, 0x0e, 0x4e, 0xf2, 0x17, 0xa3, 0x91, 0xcc } }
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gBootLoaderVersionFileGuid = { 0x3473a022, 0xc3c2, 0x4964, { 0xb3, 0x09, 0x22, 0xb3, 0xdf, 0xb0, 0xb6, 0xca } }
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gEfiDebugAgentGuid = { 0x865a5a9b, 0xb85d, 0x474c, { 0x84, 0x55, 0x65, 0xd1, 0xbe, 0x84, 0x4b, 0xe2 } }
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gDeviceTableHobGuid = { 0xd21fc32c, 0x7fd2, 0x435b, { 0xb8, 0xef, 0xc0, 0x42, 0x66, 0xa8, 0xf4, 0xf5 } }
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gSmmInformationGuid = { 0x2d939d66, 0xceec, 0x4244, { 0x94, 0x97, 0x6e, 0x1c, 0x6f, 0x92, 0x54, 0x2c } }
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gEsrtSystemFirmwareGuid = { 0xbfbaf62d, 0x0a27, 0x4390, { 0x99, 0xf6, 0x8a, 0xe1, 0xca, 0x62, 0x62, 0x77 } }
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gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d } }
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gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }
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gEfiSystemNvDataFvGuid = { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 } }
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gEfiVariableIndexTableGuid = { 0x8cfdb8c8, 0xd6b2, 0x40f3, { 0x8e, 0x97, 0x02, 0x30, 0x7c, 0xc9, 0x8b, 0x7c } }
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gEdkiiWorkingBlockSignatureGuid = { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 } }
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[PcdsFixedAtBuild]
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gPlatformCommonLibTokenSpaceGuid.PcdMaxLibraryDataEntry | 8 | UINT32 | 0x20000100
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gPlatformCommonLibTokenSpaceGuid.PcdPcdLibId | 0 | UINT8 | 0x20000101
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gPlatformCommonLibTokenSpaceGuid.PcdVariableLibId | 1 | UINT8 | 0x20000102
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gPlatformCommonLibTokenSpaceGuid.PcdSpiFlashLibId | 2 | UINT8 | 0x20000103
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gPlatformCommonLibTokenSpaceGuid.PcdEmmcBlockDeviceLibId | 3 | UINT8 | 0x20000104
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gPlatformCommonLibTokenSpaceGuid.PcdTpmLibId | 4 | UINT8 | 0x20000105
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gPlatformCommonLibTokenSpaceGuid.PcdHeciLibId | 5 | UINT8 | 0x20000106
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gPlatformCommonLibTokenSpaceGuid.PcdMmcTuningLibId | 6 | UINT8 | 0x20000107
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gPlatformCommonLibTokenSpaceGuid.PcdUefiVariableLibId | 7 | UINT8 | 0x20000108
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gPlatformCommonLibTokenSpaceGuid.PcdContainerMaxNumber | 8 | UINT32 | 0x20000120
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gPlatformCommonLibTokenSpaceGuid.PcdCpuLocalApicBaseAddress| 0xFEE00000 | UINT32 | 0x20000186
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gPlatformCommonLibTokenSpaceGuid.PcdSupportedMediaTypeMask | 0xFFFFFFFF | UINT32 | 0x20000187
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gPlatformCommonLibTokenSpaceGuid.PcdMmcTuningLba | 0x00000040 | UINT32 | 0x20000188
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gPlatformCommonLibTokenSpaceGuid.PcdSupportedFileSystemMask| 0x00000003 | UINT32 | 0x20000189
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## This PCD indicates the IA32 optimizations enabled in IPP Crypto library
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# Based on the value set, required algorithm hash API would be enabled
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# Using an single PCD to all supported optimizations for SHA256 and SHA384
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# 0x0001 - V8 Method SHA Extensions optimized implementation of a SHA-256 update.<BR>
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# 0x0002 - Ni Method SHA Extensions optimized implementation of a SHA-256 update.<BR>
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# 0x0004 - W7 Method SHA Extensions optimized implementation of a SHA-384 update.<BR>
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# 0x0008 - G9 Method SHA Extensions optimized implementation of a SHA-384 update.<BR>
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gPlatformCommonLibTokenSpaceGuid.PcdCryptoShaOptMask | 0x0 | UINT32 | 0x20000200
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gPlatformCommonLibTokenSpaceGuid.PcdSeedListEnabled | FALSE | BOOLEAN | 0x20000203
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gPlatformCommonLibTokenSpaceGuid.PcdConsoleInDeviceMask | 0x00000001 | UINT32 | 0x20000300
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gPlatformCommonLibTokenSpaceGuid.PcdConsoleOutDeviceMask | 0x00000001 | UINT32 | 0x20000301
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## The data buffer size used by debug port in debug communication library instances.
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# Its value is not suggested to be changed in platform DSC file.
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# @Prompt Assign debug port buffer size.
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gPlatformCommonLibTokenSpaceGuid.PcdDebugPortHandleBufferSize | 0x0 | UINT16 | 0x20000401
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gPlatformCommonLibTokenSpaceGuid.PcdTransferProtocolRevision | 0x00000004 | UINT32 | 0x20000402
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gPlatformCommonLibTokenSpaceGuid.PcdExceptionsIgnoredByDebugger | 0x00000000 | UINT32 | 0x20000403
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gPlatformCommonLibTokenSpaceGuid.PcdDebugLoadImageMethod | 0x2 | UINT8 | 0x20000404
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# USB keyboard polling timeout in milliseconds
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gPlatformCommonLibTokenSpaceGuid.PcdUsbKeyboardPollingTimeout | 0x00000001 | UINT32 | 0x20000440
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# Options to limit framebuffer console size (it will be centered if smaller than screen resolution)
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gPlatformCommonLibTokenSpaceGuid.PcdFrameBufferMaxConsoleWidth | 0xFFFFFFFF | UINT32 | 0x20000501
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gPlatformCommonLibTokenSpaceGuid.PcdFrameBufferMaxConsoleHeight | 0xFFFFFFFF | UINT32 | 0x20000502
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gPlatformCommonLibTokenSpaceGuid.PcdLowestSupportedFwVer | 0x00000000 | UINT32 | 0x20000601
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## This PCD indicates the HASH algorithm to be included by IPP Crypto library
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# Based on the value set, the required algorithm hash API would be enabled
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# 0x0001 - SHA1.<BR>
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# 0x0002 - SHA2_256.<BR>
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# 0x0004 - SHA2_384.<BR>
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# 0x0008 - SHA2_512.<BR>
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# 0x0010 - SM3_256.<BR>
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gPlatformCommonLibTokenSpaceGuid.PcdIppHashLibSupportedMask | 0x02| UINT16 | 0x20000701
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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# For patchable PCDs, try to set the default as none-zero
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# It is to prevent it from being put into BSS section, thus cause patching issue
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gPlatformCommonLibTokenSpaceGuid.PcdAcpiPmTimerBase | 0x0408 | UINT16 | 0x20000180
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gPlatformCommonLibTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds| 100 | UINT32 | 0x20000182
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## This PCD specifies the PCI-based UFS host controller mmio base address.
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# Define the mmio base address of the pci-based UFS host controller. If there are multiple UFS
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# host controllers, their mmio base addresses are calculated one by one from this base address.
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# @Prompt Mmio base address of pci-based UFS host controller.
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gPlatformCommonLibTokenSpaceGuid.PcdUfsPciHostControllerMmioBase|0xd0000000|UINT32|0x20000185
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## These PCDs specify the details of the SPI flash region used to store IAS images.
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# This includes the type of the flash region, the base address and size for IAS image 1 & 2
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gPlatformCommonLibTokenSpaceGuid.PcdSpiIasImageRegionType |0x00000000|UINT32|0x2000018C
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gPlatformCommonLibTokenSpaceGuid.PcdSpiIasImage1RegionBase |0x00000000|UINT32|0x20000190
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gPlatformCommonLibTokenSpaceGuid.PcdSpiIasImage1RegionSize |0x00000000|UINT32|0x20000194
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gPlatformCommonLibTokenSpaceGuid.PcdSpiIasImage2RegionBase |0x00000000|UINT32|0x20000198
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gPlatformCommonLibTokenSpaceGuid.PcdSpiIasImage2RegionSize |0x00000000|UINT32|0x2000019C
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## This PCD controls enabled debug output devcie
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gPlatformCommonLibTokenSpaceGuid.PcdDebugOutputDeviceMask |0x00000003|UINT32|0x20000400
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## This PCD controls debug port number
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# MMIO Serial device: 0 - Serial UART0, 1 - Serial UART1, 2 - Serial UART2,
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# IO ISA UART : 0xFF - IO base 0x3F8, 0xFE - IO base 0x2F8
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gPlatformCommonLibTokenSpaceGuid.PcdDebugPortNumber |0x02|UINT8|0x20000410
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## Indicates the 16550 serial port registers are in MMIO space, or in I/O space. Default is I/O space.<BR><BR>
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# TRUE - 16550 serial port registers are in MMIO space.<BR>
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# FALSE - 16550 serial port registers are in I/O space.<BR>
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# @Prompt Serial port registers use MMIO.
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gPlatformCommonLibTokenSpaceGuid.PcdSerialUseMmio|FALSE|BOOLEAN|0x00020000
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## Indicates if the 16550 serial port hardware flow control will be enabled. Default is FALSE.<BR><BR>
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# TRUE - 16550 serial port hardware flow control will be enabled.<BR>
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# FALSE - 16550 serial port hardware flow control will be disabled.<BR>
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# @Prompt Enable serial port hardware flow control.
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gPlatformCommonLibTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE|BOOLEAN|0x00020001
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## Indicates if the 16550 serial Tx operations will be blocked if DSR is not asserted (no cable). Default is FALSE.
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# This PCD is ignored if PcdSerialUseHardwareFlowControl is FALSE.<BR><BR>
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# TRUE - 16550 serial Tx operations will be blocked if DSR is not asserted.<BR>
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# FALSE - 16550 serial Tx operations will not be blocked if DSR is not asserted.<BR>
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# @Prompt Enable serial port cable detetion.
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gPlatformCommonLibTokenSpaceGuid.PcdSerialDetectCable|FALSE|BOOLEAN|0x00020006
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## Base address of 16550 serial port registers in MMIO or I/O space. Default is 0x3F8.
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# @Prompt Base address of serial port registers.
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gPlatformCommonLibTokenSpaceGuid.PcdSerialRegisterBase|0x03F8|UINT64|0x00020002
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## Baud rate for the 16550 serial port. Default is 115200 baud.
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# @Prompt Baud rate for serial port.
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# @ValidList 0x80000001 | 921600, 460800, 230400, 115200, 57600, 38400, 19200, 9600, 7200, 4800, 3600, 2400, 2000, 1800, 1200, 600, 300, 150, 134, 110, 75, 50
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gPlatformCommonLibTokenSpaceGuid.PcdSerialBaudRate|115200|UINT32|0x00020003
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## Line Control Register (LCR) for the 16550 serial port. This encodes data bits, parity, and stop bits.<BR><BR>
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# BIT1..BIT0 - Data bits. 00b = 5 bits, 01b = 6 bits, 10b = 7 bits, 11b = 8 bits<BR>
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# BIT2 - Stop Bits. 0 = 1 stop bit. 1 = 1.5 stop bits if 5 data bits selected, otherwise 2 stop bits.<BR>
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# BIT5..BIT3 - Parity. xx0b = No Parity, 001b = Odd Parity, 011b = Even Parity, 101b = Mark Parity, 111b=Stick Parity<BR>
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# BIT7..BIT6 - Reserved. Must be 0.<BR>
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#
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# Default is No Parity, 8 Data Bits, 1 Stop Bit.<BR>
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# @Prompt Serial port Line Control settings.
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# @Expression 0x80000002 | (gPayloadTokenSpaceGuid.PcdSerialLineControl & 0xC0) == 0
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gPlatformCommonLibTokenSpaceGuid.PcdSerialLineControl|0x03|UINT8|0x00020004
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## FIFO Control Register (FCR) for the 16550 serial port.<BR><BR>
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# BIT0 - FIFO Enable. 0 = Disable FIFOs. 1 = Enable FIFOs.<BR>
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# BIT1 - Clear receive FIFO. 1 = Clear FIFO.<BR>
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# BIT2 - Clear transmit FIFO. 1 = Clear FIFO.<BR>
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# BIT4..BIT3 - Reserved. Must be 0.<BR>
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# BIT5 - Enable 64-byte FIFO. 0 = Disable 64-byte FIFO. 1 = Enable 64-byte FIFO<BR>
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# BIT7..BIT6 - Reserved. Must be 0.<BR>
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#
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# Default is to enable and clear all FIFOs.<BR>
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# @Prompt Serial port FIFO Control settings.
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# @Expression 0x80000002 | (gPayloadTokenSpaceGuid.PcdSerialFifoControl & 0xD8) == 0
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gPlatformCommonLibTokenSpaceGuid.PcdSerialFifoControl|0x07|UINT8|0x00020005
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## UART clock frequency is for the baud rate configuration.
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# @Prompt Serial Port Clock Rate.
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gPlatformCommonLibTokenSpaceGuid.PcdSerialClockRate|1843200|UINT32|0x00010066
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## PCI Serial Device Info. It is an array of Device, Function, and Power Management
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# information that describes the path that contains zero or more PCI to PCI briges
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# followed by a PCI serial device. Each array entry is 4-bytes in length. The
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# first byte is the PCI Device Number, then second byte is the PCI Function Number,
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# and the last two bytes are the offset to the PCI power management capabilities
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# register used to manage the D0-D3 states. If a PCI power management capabilities
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# register is not present, then the last two bytes in the offset is set to 0. The
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# array is terminated by an array entry with a PCI Device Number of 0xFF. For a
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# non-PCI fixed address serial device, such as an ISA serial device, the value is 0xFF.
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# @Prompt Pci Serial Device Info
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gPlatformCommonLibTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF}|VOID*|0x00010067
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## Serial Port Extended Transmit FIFO Size. The default is 64 bytes.
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# @Prompt Serial Port Extended Transmit FIFO Size in Bytes
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gPlatformCommonLibTokenSpaceGuid.PcdSerialExtendedTxFifoSize|64|UINT32|0x00010068
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## The number of bytes between registers in serial device. The default is 1 byte.
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# @Prompt Serial Port Register Stride in Bytes
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gPlatformCommonLibTokenSpaceGuid.PcdSerialRegisterStride|1|UINT32|0x0001006d
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## The maximal block number supported eMMC device in single read/write command.
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# @Prompt Maximal Read/Write Block Number For eMMC Device
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gPlatformCommonLibTokenSpaceGuid.PcdEmmcMaxRwBlockNumber|0xFFFF|UINT16|0x00010070
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## This PCD indicates TPM base address.
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# @Prompt TPM device address.
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gPlatformCommonLibTokenSpaceGuid.PcdTpmBaseAddress|0xFED40000|UINT64|0x00010080
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## This PCD defines minimum length(in bytes) of the system preboot TCG event log area(LAML).
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# For PC Client Implementation spec up to and including 1.2 the minimum log size is 64KB.
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# @Prompt Minimum length(in bytes) of the system preboot TCG event log area(LAML).
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gPlatformCommonLibTokenSpaceGuid.PcdTcgLogAreaMinLen|0x10000|UINT32|0x00010081
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[PcdsFeatureFlag]
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gPlatformCommonLibTokenSpaceGuid.PcdMinDecompression | FALSE | BOOLEAN | 0x20000201
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gPlatformCommonLibTokenSpaceGuid.PcdVerifiedBootEnabled | FALSE | BOOLEAN | 0x20000210
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gPlatformCommonLibTokenSpaceGuid.PcdMeasuredBootEnabled | FALSE | BOOLEAN | 0x20000211
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gPlatformCommonLibTokenSpaceGuid.PcdSourceDebugEnabled | FALSE | BOOLEAN | 0x20000212
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gPlatformCommonLibTokenSpaceGuid.PcdContainerBootEnabled | FALSE | BOOLEAN | 0x20000213
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gPlatformCommonLibTokenSpaceGuid.PcdEmmcHs400SupportEnabled | TRUE | BOOLEAN | 0x20000214
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# Determine if the Pre-OS checker should be executed or not.
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gPlatformCommonLibTokenSpaceGuid.PcdPreOsCheckerEnabled | FALSE | BOOLEAN | 0x20000215
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# This PCD will force to initialize SerialPort regardless of its initialized state
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gPlatformCommonLibTokenSpaceGuid.PcdForceToInitSerialPort | FALSE | BOOLEAN | 0x20000216
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