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When firmware update is processing BIOS payload, it will locate Stage1A FV and get SBL version file for verification. The files in FV are expected to be located at 8-byte aligned offset. There is chance to break the alignment when a payload of variable size, e.g. CMDI file, is packed in front of BIOS payload. So this patch adjusts the starting offset of BIOS payload to be 8-byte aligned with 0xFF paddings. Signed-off-by: Vincent Chen <vincent.chen@intel.com>