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Bejean Mosher
e69378bc2d
Some silicon requires longer than provided for all APs to enter the wakeup routine. This change makes this platform configurable. The default wait time is none and can be increased for platforms with higher core count Si. Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
67 lines
1.5 KiB
INI
Executable File
67 lines
1.5 KiB
INI
Executable File
## @file
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#
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# Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = MpInitLib
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FILE_GUID = 9C33ED3D-923B-40b4-B3AA-3F24FE7DD1C8
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = MpInitLib
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64 IPF
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#
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[Sources]
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MpInitLibInternal.h
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MpInitLib.c
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Common/MpEqu.inc
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Common/MpCommon.nasm
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[Sources.Ia32]
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Ia32/MpFuncs.nasm
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[Sources.X64]
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X64/MpFuncs.nasm
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[Packages]
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MdePkg/MdePkg.dec
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IntelFsp2Pkg/IntelFsp2Pkg.dec
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BootloaderCorePkg/BootloaderCorePkg.dec
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BootloaderCommonPkg/BootloaderCommonPkg.dec
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[LibraryClasses]
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BaseLib
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DebugLib
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S3SaveRestoreLib
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[LibraryClasses.IA32, LibraryClasses.X64]
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LocalApicLib
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SynchronizationLib
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SortLib
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ExtraBaseLib
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MtrrLib
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[Guids]
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[FixedPcd]
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gPlatformModuleTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
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gPlatformModuleTokenSpaceGuid.PcdCpuSortMethod
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gPlatformModuleTokenSpaceGuid.PcdCpuApInitWaitInMicroSeconds
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[Pcd]
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gPlatformModuleTokenSpaceGuid.PcdSmramTsegBase
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gPlatformModuleTokenSpaceGuid.PcdSmramTsegSize
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gPlatformModuleTokenSpaceGuid.PcdSmmRebaseMode
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gPlatformModuleTokenSpaceGuid.PcdFuncCpuInitHook
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gPlatformCommonLibTokenSpaceGuid.PcdCpuX2ApicEnabled
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gPlatformCommonLibTokenSpaceGuid.PcdBuildSmmHobs
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