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Convert the line endings stored for all text files in the repository to LF. The majority previously used DOS-style CRLF line endings. Add a .gitattributes file to enforce this and treat certain extensions as never being text files. Update PatchCheck.py to insist on LF line endings rather than CRLF. However, its other checks fail on this commit due to lots of pre-existing complaints that it only notices because the line endings have changed. Silicon/QemuSocPkg/FspBin/Patches/0001-Build-QEMU-FSP-2.0-binaries.patch needs to be treated as binary since it contains a mixture of line endings. This change has implications depending on the client platform you are using the repository from: * Windows The usual configuration for Git on Windows means that text files will be checked out to the work tree with DOS-style CRLF line endings. If that's not the case then you can configure Git to do so for the entire machine with: git config --global core.autocrlf true or for just the repository with: git config core.autocrlf true Line endings will be normalised to LF when they are committed to the repository. If you commit a text file with only LF line endings then it will be converted to CRLF line endings in your work tree. * Linux, MacOS and other Unices The usual configuration for Git on such platforms is to check files out of the repository with LF line endings. This is probably the right thing for you. In the unlikely even that you are using Git on Unix but editing or compiling on Windows for some reason then you may need to tweak your configuration to force the use of CRLF line endings as described above. * General For more information see https://docs.github.com/en/get-started/getting-started-with-git/configuring-git-to-handle-line-endings . Fixes: https://github.com/slimbootloader/slimbootloader/issues/1400 Signed-off-by: Mike Crowe <mac@mcrowe.com>
599 lines
22 KiB
Python
599 lines
22 KiB
Python
#!/usr/bin/env python
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## @ Dsc2Yaml.py
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# This script convert SBL DSC based CFGDATA format into YAML format
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#
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# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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import sys
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import os
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import re
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import argparse
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from datetime import date
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from collections import OrderedDict
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from GenCfgDataDsc import CGenCfgData
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__copyright_tmp__ = """## @file
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#
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# Slim Bootloader CFGDATA %s File.
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#
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# Copyright (c) %4d, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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"""
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class dsc_to_yaml ():
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def __init__ (self):
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self._Hdr_key_list = ['EMBED', 'STRUCT']
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self._Bsf_key_list = ['NAME','HELP','TYPE','PAGE', 'PAGES', 'OPTION','CONDITION','ORDER', 'MARKER', 'SUBT', 'FIELD']
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self.gen_cfg_data = None
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self.cfg_reg_exp = re.compile("^([_a-zA-Z0-9$\(\)]+)\s*\|\s*(0x[0-9A-F]+|\*)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)")
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self.bsf_reg_exp = re.compile("(%s):{(.+?)}(?:$|\s+)" % '|'.join(self._Bsf_key_list))
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self.hdr_reg_exp = re.compile("(%s):{(.+?)}" % '|'.join(self._Hdr_key_list))
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self.prefix = ''
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self.unused_idx = 0
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self.offset = 0
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def load_config_data_from_dsc (self, file_name):
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"""
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Load and parse a DSC CFGDATA file.
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"""
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gen_cfg_data = CGenCfgData()
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if file_name.endswith('.dsc'):
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if gen_cfg_data.ParseDscFile(file_name) != 0:
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raise Exception('DSC file parsing error !')
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if gen_cfg_data.CreateVarDict() != 0:
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raise Exception('DSC variable creation error !')
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else:
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raise Exception('Unsupported file "%s" !' % file_name)
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gen_cfg_data.UpdateDefaultValue()
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self.gen_cfg_data = gen_cfg_data
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def print_dsc_line (self):
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"""
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Debug function to print all DSC lines.
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"""
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for line in self.gen_cfg_data._DscLines:
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print (line)
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def format_value (self, field, text, indent = ''):
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"""
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Format a CFGDATA item into YAML format.
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"""
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if (not text.startswith('!expand')) and (': ' in text):
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tgt = ':' if field == 'option' else '- '
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text = text.replace(': ', tgt)
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lines = text.splitlines()
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if len(lines) == 1 and field != 'help':
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return text
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else:
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return '>\n ' + '\n '.join ([indent + i.lstrip() for i in lines])
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def parse_dsc_line (self, dsc_line, config_dict, init_dict, include):
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"""
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Parse a line in DSC and update the config dictionary accordingly.
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"""
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init_dict.clear ()
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if dsc_line.startswith('gCfgData') or dsc_line.startswith('gPlatformFspPkgTokenSpaceGuid'):
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if dsc_line[8] == '.':
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start = 9
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elif dsc_line[29] == '.':
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start = 30
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else:
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raise Exception ("Unexpected format for dsc line '%s' !" % dsc_line)
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match = self.cfg_reg_exp.match(dsc_line[start:])
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if not match:
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return False
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config_dict['cname'] = self.prefix + match.group(1)
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value = match.group(4).strip()
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length = match.group(3).strip()
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config_dict['length'] = length
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config_dict['value'] = value
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if match.group(2) == '*':
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self.offset += int (length, 0)
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else:
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offset = int (match.group(2), 0)
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if self.offset != offset:
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if offset > self.offset:
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init_dict['padding'] = offset - self.offset
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else:
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raise Exception ('Offset cannot go backwards at %s !' % config_dict['cname'] )
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self.offset = offset + int (length, 0)
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return True
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match = re.match("^\s*#\s+!([<>])\s+include\s+(.+)", dsc_line)
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if match and len(config_dict) == 0:
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# !include should not be inside a config field
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# if so, do not convert include into YAML
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init_dict = dict(config_dict)
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config_dict.clear()
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config_dict['cname'] = '$ACTION'
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if match.group(1) == '<':
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config_dict['include'] = match.group(2)
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else:
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config_dict['include'] = ''
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return True
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match = re.match("^\s*#\s+(!BSF|!HDR)\s+(.+)", dsc_line)
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if not match:
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return False
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remaining = match.group(2)
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if match.group(1) == '!BSF':
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result = self.bsf_reg_exp.findall (remaining)
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if not result:
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return False
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for each in result:
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key = each[0].lower()
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val = each[1]
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if key == 'field':
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name = each[1]
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if ':' not in name:
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raise Exception ('Incorrect bit field format !')
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parts = name.split(':')
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config_dict['length'] = parts[1]
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config_dict['cname'] = '@' + parts[0]
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return True
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elif key == 'pages' or key == 'page':
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init_dict = dict(config_dict)
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config_dict.clear()
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config_dict['cname'] = '$ACTION'
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config_dict['page'] = val
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return True
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elif key == 'subt':
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config_dict.clear()
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parts = each[1].split(':')
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tmp_name = parts[0][:-5]
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skey = parts[0].lower()
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if tmp_name == 'CFGHDR':
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cfg_tag = '_$FFF_'
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sval = '!expand { %s_TMPL : [ ' % tmp_name + '%s, %s, ' % (parts[1], cfg_tag) + ', '.join (parts[2:]) + ' ] }'
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else:
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sval = '!expand { %s_TMPL : [ ' % tmp_name + ', '.join (parts[1:]) + ' ] }'
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config_dict.clear()
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config_dict['cname'] = tmp_name
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config_dict['expand'] = sval
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return True
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else:
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if key in ['name', 'help', 'option'] and val.startswith('+'):
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val = config_dict[key] + '\n' + val[1:]
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if val.strip() == '':
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val = "''"
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config_dict[key] = val
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else:
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match = self.hdr_reg_exp.match(remaining)
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if not match:
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return False
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key = match.group(1)
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remaining = match.group(2)
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if key == 'EMBED':
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parts = remaining.split(':')
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names = parts[0].split(',')
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if parts[-1] == 'END':
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prefix = '>'
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else:
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prefix = '<'
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skip = False
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if parts[1].startswith('TAG_'):
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tag_txt = '%s:%s' % (names[0], parts[1])
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else:
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tag_txt = names[0]
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if parts[2] in ['START', 'END']:
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if names[0] == 'PCIE_RP_PIN_CTRL[]':
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skip = True
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else:
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tag_txt = '%s:%s' % (names[0], parts[1])
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if not skip:
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config_dict.clear()
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config_dict['cname'] = prefix + tag_txt
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return True
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if key == 'STRUCT':
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text = remaining.strip()
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config_dict[key.lower()] = text
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return False
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def process_template_lines (self, lines):
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"""
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Process a line in DSC template section.
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"""
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template_name = ''
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bsf_temp_dict = OrderedDict()
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temp_file_dict = OrderedDict()
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include_file = ['.']
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for line in lines:
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match = re.match("^\s*#\s+!([<>])\s+include\s+(.+)", line)
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if match:
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if match.group(1) == '<':
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include_file.append(match.group(2))
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else:
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include_file.pop()
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match = re.match("^\s*#\s+(!BSF)\s+DEFT:{(.+?):(START|END)}", line)
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if match:
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if match.group(3) == 'START' and not template_name:
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template_name = match.group(2).strip()
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temp_file_dict[template_name] = list(include_file)
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bsf_temp_dict[template_name] = []
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if match.group(3) == 'END' and (template_name == match.group(2).strip()) and template_name:
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template_name = ''
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else:
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if template_name:
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bsf_temp_dict[template_name].append(line)
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return bsf_temp_dict, temp_file_dict
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def process_option_lines (self, lines):
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"""
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Process a line in DSC config section.
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"""
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cfgs = []
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config_dict = dict()
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init_dict = dict()
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include = ['']
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for line in lines:
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ret = self.parse_dsc_line (line, config_dict, init_dict, include)
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if ret:
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if 'padding' in init_dict:
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num = init_dict['padding']
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init_dict.clear()
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padding_dict = {}
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cfgs.append (padding_dict)
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padding_dict['cname'] = 'UnusedUpdSpace%d' % self.unused_idx
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padding_dict['length'] = '0x%x' % num
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padding_dict['value'] = '{ 0 }'
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self.unused_idx += 1
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if cfgs and cfgs[-1]['cname'][0] != '@' and config_dict['cname'][0] == '@':
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# it is a bit field, mark the previous one as virtual
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cname = cfgs[-1]['cname']
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new_cfg = dict(cfgs[-1])
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new_cfg['cname'] = '@$STRUCT'
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cfgs[-1].clear ()
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cfgs[-1]['cname'] = cname
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cfgs.append(new_cfg)
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if cfgs and cfgs[-1]['cname'] == 'CFGHDR' and config_dict['cname'][0] == '<':
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# swap CfgHeader and the CFG_DATA order
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if ':' in config_dict['cname']:
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# replace the real TAG for CFG_DATA
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cfgs[-1]['expand'] = cfgs[-1]['expand'].replace('_$FFF_', '0x%s' % config_dict['cname'].split(':')[1][4:])
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cfgs.insert (-1, config_dict)
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else:
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cfgs.append (config_dict)
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config_dict = dict(init_dict)
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return cfgs
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def get_fixup_dict (self):
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"""
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Return a dictonary for fix up.
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"""
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fix_dict = {
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'$Pcie' : '$PCIE_RP_CFG_DATA.Pcie',
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'$Hda' : '$HDA_CFG_DATA.Hda',
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'$Dsp' : '$HDA_CFG_DATA.Dsp',
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'$PlatformId' : '$PLATFORMID_CFG_DATA.PlatformId',
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'$$(1).Enable' : '$PID_GPIO_CFG_DATA.$(1).Enable',
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'$$(1)_Half0' : '$GPIO_CFG_DATA.$(1)_Half0',
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'$EnableSgx' : '$SGX_CFG_DATA.EnableSgx',
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'$EpochUpdate' : '$SGX_CFG_DATA.EpochUpdate',
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'$GpioPinConfig1_$(1)' : '$GPIO_CFG_DATA.GpioPinConfig1_$(1)',
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'$Gpio' : '$GPIO_CFG_DATA.Gpio',
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'$ImageType_$(1)' : '$BOOT_OPTION_CFG_DATA_$(1).ImageType_$(1)',
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'$PayloadSelGpio' : '$PLATFORM_CFG_DATA.PayloadSelGpio',
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'$PlatformId' : '$PLATFORMID_CFG_DATA.PlatformId',
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'$RpFeatures$(1)' : '$PCIE_CFG_DATA.RpFeatures$(1)',
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}
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return fix_dict
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def variable_fixup (self, each):
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"""
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Fix up some variable definitions for SBL.
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"""
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fix_dict = self.get_fixup_dict()
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key = each
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val = self.gen_cfg_data._MacroDict[each]
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for each in fix_dict:
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val = val.replace (each, fix_dict[each])
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return key, val
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def template_fixup (self, tmp_name, tmp_list):
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"""
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Fix up some special config templates for SBL
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"""
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if tmp_name in ['CFGHDR_TMPL']:
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# handle CFGHDR template specially
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find = '((_LENGTH_$(1)_+8)/4):10b, $(2):4b, $(3):4b, _TAG_$(1)_:12b'
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for each in tmp_list:
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if each['cname'] == 'CfgHeader':
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each['value'] = each['value'].replace(find, '((_LENGTH_$(1)_)/4):10b, $(3):4b, $(4):4b, $(2):12b')
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else:
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fix_dict = self.get_fixup_dict()
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for each in tmp_list:
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if 'condition' in each:
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for find in fix_dict:
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each['condition'] = each['condition'].replace(find, fix_dict[find])
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return
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def config_fixup (self, cfg_list):
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"""
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Fix up some special config items for SBL.
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"""
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fix_dict = self.get_fixup_dict()
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swap_idx = []
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for idx, cfg in enumerate(cfg_list):
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# For QEMU
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if cfg['cname'] in ['GpioItemSize', 'GpioItemCount']:
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# Adjust GPIO item size
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cfg['value'] = cfg['value'].replace('(_OFFSET_GPIO_DATA_GPP_A1_ - _OFFSET_GPIO_DATA_GPP_A0_)', '8')
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if cfg['cname'] in ['GpioItemCount']:
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cfg['value'] = cfg['value'].replace('_LENGTH_GPIO_CFG_HDR_', '_LENGTH_GPIO_CFG_HDR_ - 8')
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if 'value' in cfg:
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# Try to find the unit length automatically
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value_str = cfg['value']
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if value_str[0] == '{' and value_str[-1] == '}' and ',' in value_str:
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if (':' not in value_str) and ("'" not in value_str) and ('"' not in value_str):
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parts = value_str[1:-1].split(',')
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blen = int (cfg['length'], 0)
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if len(parts) != blen:
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if len(parts) * 2 == blen:
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unit = 'W'
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elif len(parts) * 4 == blen:
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unit = 'D'
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elif len(parts) * 8 == blen:
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unit = 'Q'
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else:
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unit = ''
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if unit:
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cfg['value'] = '{0:0%s, ' % unit + cfg['value'][1:]
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if 'condition' in cfg and cfg['condition'] != 0:
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val = cfg['condition']
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for each in fix_dict:
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val = val.replace (each, fix_dict[each])
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cfg['condition'] = val
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if re.match('<GPIO_CFG_HDR(:*)?', cfg['cname']):
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swap_idx.append (idx)
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for idx in swap_idx:
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cfg_list[idx], cfg_list[idx + 1] = cfg_list[idx + 1], cfg_list[idx]
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return
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def get_section_range (self, section_name):
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"""
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Extract line number range from config file for a given section name.
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"""
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start = -1
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end = -1
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for idx, line in enumerate (self.gen_cfg_data._DscLines):
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if start <0 and line.startswith('[%s]' % section_name):
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start = idx
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elif start >= 0 and line.startswith('['):
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end = idx
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break
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if start == -1:
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start = 0
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if end == -1:
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end = len(self.gen_cfg_data._DscLines)
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return start, end
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def normalize_file_name (self, file, is_temp = False):
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"""
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Normalize file name convention so that it is consistent.
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"""
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if file.endswith('.dsc'):
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file = file[:-4] + '.yaml'
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dir_name = os.path.dirname (file)
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base_name = os.path.basename (file)
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if is_temp:
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if 'Template_' not in file:
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base_name = base_name.replace ('Template', 'Template_')
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else:
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if 'CfgData_' not in file:
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base_name = base_name.replace ('CfgData', 'CfgData_')
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if dir_name:
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path = dir_name + '/' + base_name
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else:
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path = base_name
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return path
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def output_variable (self):
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"""
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Output variable block into a line list.
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"""
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lines = []
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for each in self.gen_cfg_data._MacroDict:
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key, value = self.variable_fixup (each)
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lines.append ('%-30s : %s' % (key, value))
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return lines
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def output_template (self):
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"""
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Output template block into a line list.
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"""
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self.offset = 0
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start, end = self.get_section_range ('PcdsDynamicVpd.Tmp')
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bsf_temp_dict, temp_file_dict = self.process_template_lines (self.gen_cfg_data._DscLines[start:end])
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template_dict = dict()
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lines = []
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file_lines = {}
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last_file = '.'
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file_lines[last_file] = []
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for tmp_name in temp_file_dict:
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temp_file_dict[tmp_name][-1] = self.normalize_file_name(temp_file_dict[tmp_name][-1], True)
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if len(temp_file_dict[tmp_name]) > 1:
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temp_file_dict[tmp_name][-2] = self.normalize_file_name(temp_file_dict[tmp_name][-2], True)
|
|
|
|
for tmp_name in bsf_temp_dict:
|
|
file = temp_file_dict[tmp_name][-1]
|
|
if last_file != file and len(temp_file_dict[tmp_name]) > 1:
|
|
inc_file = temp_file_dict[tmp_name][-2]
|
|
file_lines[inc_file].extend (['', '- !include %s' % temp_file_dict[tmp_name][-1], ''])
|
|
last_file = file
|
|
if file not in file_lines:
|
|
file_lines[file] = []
|
|
lines = file_lines[file]
|
|
text = bsf_temp_dict[tmp_name]
|
|
tmp_list = self.process_option_lines (text)
|
|
self.template_fixup (tmp_name, tmp_list)
|
|
template_dict[tmp_name] = tmp_list
|
|
lines.append ('%s: >' % tmp_name)
|
|
lines.extend (self.output_dict (tmp_list, False)['.'])
|
|
lines.append ('\n')
|
|
return file_lines
|
|
|
|
|
|
def output_config (self):
|
|
"""
|
|
Output config block into a line list.
|
|
"""
|
|
self.offset = 0
|
|
start, end = self.get_section_range ('PcdsDynamicVpd.Upd')
|
|
cfgs = self.process_option_lines (self.gen_cfg_data._DscLines[start:end])
|
|
self.config_fixup (cfgs)
|
|
file_lines = self.output_dict (cfgs, True)
|
|
return file_lines
|
|
|
|
|
|
def output_dict (self, cfgs, is_configs ):
|
|
"""
|
|
Output one config item into a line list.
|
|
"""
|
|
file_lines = {}
|
|
level = 0
|
|
file = '.'
|
|
for each in cfgs:
|
|
if 'include' in each:
|
|
if each['include']:
|
|
each['include'] = self.normalize_file_name(each['include'])
|
|
file_lines[file].extend (['', '- !include %s' % each['include'], ''])
|
|
file = each['include']
|
|
else:
|
|
file = '.'
|
|
continue
|
|
|
|
if file not in file_lines:
|
|
file_lines[file] = []
|
|
|
|
lines = file_lines[file]
|
|
name = each['cname']
|
|
|
|
prefix = name[0]
|
|
if prefix == '<':
|
|
level += 1
|
|
|
|
padding = ' ' * level
|
|
if prefix not in '<>@':
|
|
padding += ' '
|
|
else:
|
|
name = name[1:]
|
|
if prefix == '@':
|
|
padding += ' '
|
|
|
|
if ':' in name:
|
|
parts = name.split(':')
|
|
name = parts[0]
|
|
|
|
padding = padding[2:] if is_configs else padding
|
|
|
|
if prefix != '>':
|
|
if 'expand' in each:
|
|
lines.append ('%s- %s' % (padding, each['expand']))
|
|
else:
|
|
lines.append ('%s- %-12s :' % (padding , name))
|
|
|
|
for field in each:
|
|
if field in ['cname', 'expand', 'include']:
|
|
continue
|
|
value_str = self.format_value (field, each[field], padding + ' ' * 16)
|
|
full_line = ' %s %-12s : %s' % (padding, field, value_str)
|
|
lines.extend(full_line.splitlines())
|
|
|
|
if prefix == '>':
|
|
level -= 1
|
|
if level == 0:
|
|
lines.append ('')
|
|
|
|
return file_lines
|
|
|
|
def main():
|
|
parser = argparse.ArgumentParser()
|
|
|
|
parser.add_argument('-i', dest='dsc_file', type=str, required=True, help='SBL DSC config file path')
|
|
parser.add_argument('-o', dest='out_dir', type=str, default = '.', help='Output directory for generated files')
|
|
parser.add_argument('-a', dest='all', action="store_true", help='Output all config data including common and platform config')
|
|
|
|
args = parser.parse_args()
|
|
|
|
dsc_file = args.dsc_file
|
|
out_dir = args.out_dir
|
|
gen_all = args.all
|
|
|
|
dsc2yaml = dsc_to_yaml ()
|
|
dsc2yaml.load_config_data_from_dsc (dsc_file)
|
|
|
|
cfgs = {}
|
|
for cfg in ['Template', 'Option']:
|
|
if cfg == 'Template':
|
|
file_lines = dsc2yaml.output_template ()
|
|
else:
|
|
file_lines = dsc2yaml.output_config ()
|
|
for file in file_lines:
|
|
lines = file_lines[file]
|
|
if file == '.':
|
|
cfgs[cfg] = lines
|
|
else:
|
|
if ('/' in file or '\\' in file) and not gen_all:
|
|
continue
|
|
file = os.path.basename(file)
|
|
fo = open(os.path.join(out_dir, file), 'w')
|
|
fo.write (__copyright_tmp__ % (cfg, date.today().year) + '\n\n')
|
|
for line in lines:
|
|
fo.write(line + '\n')
|
|
fo.close()
|
|
|
|
variables = dsc2yaml.output_variable ()
|
|
fo = open(os.path.join(out_dir, 'CfgDataDef.yaml'), 'w')
|
|
fo.write (__copyright_tmp__ % ('Default', date.today().year))
|
|
if len(variables) > 0:
|
|
fo.write ('\n\nvariable:\n')
|
|
for line in variables:
|
|
fo.write(' ' + line + '\n')
|
|
|
|
fo.write ('\n\ntemplate:\n')
|
|
for line in cfgs['Template']:
|
|
fo.write(' ' + line + '\n')
|
|
|
|
fo.write ('\n\nconfigs:\n')
|
|
for line in cfgs['Option']:
|
|
fo.write(' ' + line + '\n')
|
|
|
|
fo.close()
|
|
|
|
return 0
|
|
|
|
|
|
if __name__ == '__main__':
|
|
main ()
|
|
|
|
|