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slimbootloader/BootloaderCorePkg/BootloaderCorePkg.dec
Guo Dong 317c43386c Update SMM rebase support 
Currently SBL supports SMM REBASE based on configuration.
1) When payload doesn't support SMM, SBL need enable SMM rebase.
   So SBL will rebase SMM to SMRAM and set SMRR to prevent SMRAM
   access out of SMM and prevent payload SMM driver dispatch.
2) When payload support SMM, SBL need disable SMM rebase.
   In this case SBL do nothing for SMM. Payload will do SMM
   rebase.

In new UEFI payload (after stable branch 202311), SMM relocation
was removed CPU SMM driver. To work with new UEFI payload, SMM
relocation is expected in SBL, but SMRR should not be set so that
SMM drivers in UEFI payload could be dispatched into SMRAM.

This patch adds a new SMM rebase configuration that it rebase SMM
but it doesn't set SMRR.
Currently SBL supports rebase AUTO setting based on payload. This
patch also add auto support.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2025-04-14 21:36:08 -07:00

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## @file
# Provides bootloader driver related package definitions.
#
# Copyright (c) 2016 - 2024, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
DEC_SPECIFICATION = 0x00010005
PACKAGE_NAME = BootloaderCorePkg
PACKAGE_GUID = d6c054b2-84cd-4bff-9033-2ce3d47f02ee
PACKAGE_VERSION = 0.1
[Includes]
Include
[Includes.Common.Private]
IncludePrivate
[Guids]
gPlatformModuleTokenSpaceGuid = { 0x69d13bf0, 0xaf91, 0x4d96, { 0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0 } }
[PcdsFixedAtBuild]
# These will be patched in the FDF file.
gPlatformModuleTokenSpaceGuid.PcdFSPTBase | 0x00000000 | UINT32 | 0x20000000
gPlatformModuleTokenSpaceGuid.PcdFSPTSize | 0x00000000 | UINT32 | 0x20000001
gPlatformModuleTokenSpaceGuid.PcdFSPTUpdSize | 0x00000000 | UINT32 | 0x20000002
gPlatformModuleTokenSpaceGuid.PcdFSPMBase | 0x00000000 | UINT32 | 0x20000003
gPlatformModuleTokenSpaceGuid.PcdFSPMUpdSize | 0x00000000 | UINT32 | 0x20000004
gPlatformModuleTokenSpaceGuid.PcdFSPMSize | 0x00000000 | UINT32 | 0x20000005
#gPlatformModuleTokenSpaceGuid.PcdFSPSBase
gPlatformModuleTokenSpaceGuid.PcdFSPSSize | 0x00000000 | UINT32 | 0x20000007
gPlatformModuleTokenSpaceGuid.PcdFSPSUpdSize | 0x00000000 | UINT32 | 0x20000008
gPlatformModuleTokenSpaceGuid.PcdPciMmcfgBase | 0x00000000 | UINT32 | 0x20000009
gPlatformModuleTokenSpaceGuid.PcdFlashBaseAddress | 0x00000000 | UINT32 | 0x20000010
gPlatformModuleTokenSpaceGuid.PcdFlashSize | 0x00000000 | UINT32 | 0x20000011
gPlatformModuleTokenSpaceGuid.PcdFlashBlockSize | 0x00001000 | UINT32 | 0x20000012
gPlatformModuleTokenSpaceGuid.PcdFSPT64Bit | FALSE | BOOLEAN | 0x20000013
gPlatformModuleTokenSpaceGuid.PcdFSPM64Bit | FALSE | BOOLEAN | 0x20000014
gPlatformModuleTokenSpaceGuid.PcdFSPS64Bit | FALSE | BOOLEAN | 0x20000015
# PcdStageBase: Flash address to the stage binary (Could be compressed binary)
# PcdStageSize: Flash size occupied by the stage binary (Could be compressed binary)
# PcdStageLoadBase: Memory address to load the stage binary (Could be compressed binary)
# PcdStageFdBase: FD base address, must be FD file format
# PcdStageFdSize: FD size
# PcdStageFvSize: FV size
gPlatformModuleTokenSpaceGuid.PcdStage1ABase | 0x00000000 | UINT32 | 0x20000020
gPlatformModuleTokenSpaceGuid.PcdStage1ASize | 0x00000000 | UINT32 | 0x20000021
gPlatformModuleTokenSpaceGuid.PcdStage1ALoadBase | 0x00000000 | UINT32 | 0x20000022
gPlatformModuleTokenSpaceGuid.PcdStage1AFdBase | 0x00000000 | UINT32 | 0x20000023
gPlatformModuleTokenSpaceGuid.PcdStage1AFdSize | 0x00000000 | UINT32 | 0x20000024
gPlatformModuleTokenSpaceGuid.PcdStage1AFvSize | 0x00000000 | UINT32 | 0x20000025
gPlatformModuleTokenSpaceGuid.PcdStage1BBase | 0x00000000 | UINT32 | 0x20000030
gPlatformModuleTokenSpaceGuid.PcdStage1BSize | 0x00000000 | UINT32 | 0x20000031
gPlatformModuleTokenSpaceGuid.PcdStage1BLoadBase | 0x00000000 | UINT32 | 0x20000032
gPlatformModuleTokenSpaceGuid.PcdStage1BFdBase | 0x00000000 | UINT32 | 0x20000033
gPlatformModuleTokenSpaceGuid.PcdStage1BFdSize | 0x00000000 | UINT32 | 0x20000034
gPlatformModuleTokenSpaceGuid.PcdStage1BFvSize | 0x00000000 | UINT32 | 0x20000035
gPlatformModuleTokenSpaceGuid.PcdStage2Base | 0x00000000 | UINT32 | 0x20000050
gPlatformModuleTokenSpaceGuid.PcdStage2Size | 0x00000000 | UINT32 | 0x20000051
gPlatformModuleTokenSpaceGuid.PcdStage2LoadBase | 0x00000000 | UINT32 | 0x20000052
gPlatformModuleTokenSpaceGuid.PcdStage2FdBase | 0x00000000 | UINT32 | 0x20000053
gPlatformModuleTokenSpaceGuid.PcdStage2FdSize | 0x00000000 | UINT32 | 0x20000054
gPlatformModuleTokenSpaceGuid.PcdStage2FvSize | 0x00000000 | UINT32 | 0x20000055
gPlatformModuleTokenSpaceGuid.PcdStage1StackSize | 0x00000000 | UINT32 | 0x20000060
gPlatformModuleTokenSpaceGuid.PcdStage1DataSize | 0x00000000 | UINT32 | 0x20000061
gPlatformModuleTokenSpaceGuid.PcdStage1StackBaseOffset | 0x00000000 | UINT32 | 0x20000062
gPlatformModuleTokenSpaceGuid.PcdCfgDatabaseSize | 0x00000000 | UINT32 | 0x20000063
gPlatformModuleTokenSpaceGuid.PcdStage2LoadHigh | FALSE | BOOLEAN| 0x20000068
gPlatformModuleTokenSpaceGuid.PcdPayloadLoadHigh | FALSE | BOOLEAN| 0x20000069
gPlatformModuleTokenSpaceGuid.PcdPayloadBase | 0x00000000 | UINT32 | 0x20000080
gPlatformModuleTokenSpaceGuid.PcdPayloadSize | 0x00000000 | UINT32 | 0x20000081
gPlatformModuleTokenSpaceGuid.PcdPayloadLoadBase | 0x00000000 | UINT32 | 0x20000082
gPlatformModuleTokenSpaceGuid.PcdPayloadExeBase | 0x00000000 | UINT32 | 0x20000083
gPlatformModuleTokenSpaceGuid.PcdFwuPayloadSize | 0x00000000 | UINT32 | 0x20000084
gPlatformModuleTokenSpaceGuid.PcdFwuPayloadBase | 0x00000000 | UINT32 | 0x20000085
gPlatformModuleTokenSpaceGuid.PcdFwuPayloadLoadBase | 0x00000000 | UINT32 | 0x20000086
gPlatformModuleTokenSpaceGuid.PcdCfgDataBase | 0x00000000 | UINT32 | 0x20000088
gPlatformModuleTokenSpaceGuid.PcdCfgDataSize | 0x00000000 | UINT32 | 0x20000089
gPlatformModuleTokenSpaceGuid.PcdMrcDataBase | 0x00000000 | UINT32 | 0x2000008A
gPlatformModuleTokenSpaceGuid.PcdMrcDataSize | 0x00000000 | UINT32 | 0x2000008B
gPlatformModuleTokenSpaceGuid.PcdUcodeBase | 0x00000000 | UINT32 | 0x2000008C
gPlatformModuleTokenSpaceGuid.PcdUcodeSize | 0x00000000 | UINT32 | 0x2000008D
gPlatformModuleTokenSpaceGuid.PcdUcodeSlotSize | 0x00000000 | UINT32 | 0x2000008E
gPlatformModuleTokenSpaceGuid.PcdVariableRegionBase | 0x00000000 | UINT32 | 0x2000008F
gPlatformModuleTokenSpaceGuid.PcdVariableRegionSize | 0x00000000 | UINT32 | 0x20000090
gPlatformModuleTokenSpaceGuid.PcdActmBase | 0x00000000 | UINT32 | 0x20000091
gPlatformModuleTokenSpaceGuid.PcdActmSize | 0x00000000 | UINT32 | 0x20000092
gPlatformModuleTokenSpaceGuid.PcdMemoryMapEntryNumber | 0x00000000 | UINT32 | 0x200000A2
gPlatformModuleTokenSpaceGuid.PcdOsBootOptionNumber | 0x00000008 | UINT32 | 0x200000A3
gPlatformModuleTokenSpaceGuid.PcdServiceNumber | 0x00000004 | UINT32 | 0x200000A4
# typedef struct {
# UINT16 Io32 : 1; // default:1
# UINT16 Mem64 : 1; // default:1
# UINT16 PMem64 : 1; // default:1
# UINT16 Bus0 : 1; // default:1, Downgrade all Io32/Mem64/PMem64 for all Bus-0 devices
# UINT16 Reserved : 12; // 0 initialized
# } PCI_RES_DOWNGRADE;
#
# typedef struct {
# UINT16 AllocPmemFirst : 1; // default:0 (Mem32->Pmem32->Mem64->Pmem64), 1 (Pmem64->Mem64->Pmem32->Mem32)
# UINT16 Reserved : 15; // 0 initialized
# } PCI_ENUM_FLAG;
#
# typedef struct {
# PCI_RES_DOWNGRADE Downgrade;
# PCI_ENUM_FLAG Flag;
# UINT8 BusScanType; // default:0 (0: list, 1: range)
# UINT8 NumOfBus; // the number of BusScanItems
# UINT8 BusScanItems[0];
# } PCI_ENUM_POLICY_INFO;
#
# Update BoardConfig.py if necessary
# self._PCI_ENUM_DOWNGRADE_IO32 = 0
# self._PCI_ENUM_DOWNGRADE_MEM64 = 0
# self._PCI_ENUM_DOWNGRADE_PMEM64 = 0
# self._PCI_ENUM_DOWNGRADE_BUS0 = 0
# self._PCI_ENUM_FLAG_ALLOC_PMEM_FIRST = 1
# self._PCI_ENUM_BUS_SCAN_TYPE = 1
# self._PCI_ENUM_BUS_SCAN_ITEMS = '0,0xff'
gPlatformModuleTokenSpaceGuid.PcdPciEnumPolicyInfo | {0x00} | VOID* | 0x200000A5
gPlatformModuleTokenSpaceGuid.PcdLoaderHobStackSize | 0x00040000 | UINT32 | 0x200000B0
gPlatformModuleTokenSpaceGuid.PcdEarlyLogBufferSize | 0x00000400 | UINT32 | 0x200000B1
gPlatformModuleTokenSpaceGuid.PcdLogBufferSize | 0x00008000 | UINT32 | 0x200000B2
gPlatformModuleTokenSpaceGuid.PcdLoaderReservedMemSize | 0x0038C000 | UINT32 | 0x200000B8
gPlatformModuleTokenSpaceGuid.PcdLoaderAcpiNvsSize | 0x00008000 | UINT32 | 0x200000B9
gPlatformModuleTokenSpaceGuid.PcdLoaderAcpiReclaimSize | 0x00068000 | UINT32 | 0x200000BA
gPlatformModuleTokenSpaceGuid.PcdTopSwapRegionSize | 0x00000000 | UINT32 | 0x200000C0
gPlatformModuleTokenSpaceGuid.PcdRedundantRegionSize | 0x00000000 | UINT32 | 0x200000C1
gPlatformModuleTokenSpaceGuid.PcdVerifiedBootStage1B | FALSE | BOOLEAN| 0x200000D0
# ACPI processor ID base value
gPlatformModuleTokenSpaceGuid.PcdAcpiProcessorIdBase | 1 | UINT32 | 0x200000D8
gPlatformModuleTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber | 16 | UINT32 | 0x200000E0
gPlatformModuleTokenSpaceGuid.PcdMaxServiceNumber | 8 | UINT32 | 0x200000E1
gPlatformModuleTokenSpaceGuid.PcdSeedListBufferSize | 0x00000400 | UINT32 | 0x200000E2
gPlatformModuleTokenSpaceGuid.PcdSmbiosTablesSize | 0x1000 | UINT16 | 0x200000E3
# 0: Sort the CPU according to their thread distances
# 1: Sort the CPU based on CPU APIC ID in ascending order
# 2: Sort the CPU based on CPU APIC ID in descending order
gPlatformModuleTokenSpaceGuid.PcdCpuSortMethod | 0 | UINT32 | 0x200000E4
# Time to wait for AP Wakeup in MicroSeconds. Usually only needed for high core count SoCs
gPlatformModuleTokenSpaceGuid.PcdCpuApInitWaitInMicroSeconds | 0 | UINT32 | 0x200001A4
# Size of the Hash store allocated in bootloader
gPlatformModuleTokenSpaceGuid.PcdHashStoreSize | 0x00000200 | UINT32 | 0x200000F1
# Use this PCD for the potential code change related with boot performance
# NOTE: some features might be disabled when ENABLE_FAST_BOOT is set.
gPlatformModuleTokenSpaceGuid.PcdFastBootEnabled | FALSE | BOOLEAN| 0x200000F2
# If we want to recover from boot failure
gPlatformModuleTokenSpaceGuid.PcdSblResiliencyEnabled | FALSE | BOOLEAN | 0x200000F3
# If we built the top swap regions to look exactly the same
# (no SG1B rebasing or boot partition set in flash map)
gPlatformModuleTokenSpaceGuid.PcdIdenticalTopSwapsBuilt | FALSE | BOOLEAN | 0x200000F4
# Number of boots to try before switching to other partition
gPlatformModuleTokenSpaceGuid.PcdBootFailureThreshold | 3 | UINT8 | 0x200000F5
# The number of 0.6s ticks to wait before assuming boot failure and forcing a reboot
gPlatformModuleTokenSpaceGuid.PcdTcoTimeout | 100 | UINT16 | 0x200000F6
gPlatformModuleTokenSpaceGuid.PcdFusaSupport | FALSE | BOOLEAN | 0x20000223
[PcdsFixedAtBuild, PcdsPatchableInModule]
#
# For module patchable PCDs, if it is required to do static patching during the build
# process using PatchFv.py script, then they should be set to non-zero default values.
# It is to prevent it from being put into BSS section, thus cause issue during pacting
# because the PCD symbol won't be available in MAP file.
# If static patching is not required, zero default value can be used with no issue.
#
gPlatformModuleTokenSpaceGuid.PcdFSPSBase | 0xFF000000 | UINT32 | 0x20000100
# Switch FSP-M stack top to new value.
# 0: do not switch, 0xffffffff: switch to default, others: switch to specific value
gPlatformModuleTokenSpaceGuid.PcdFSPMStackTop | 0x00000000 | UINT32 | 0x20000101
gPlatformModuleTokenSpaceGuid.PcdAcpiTablesMaxEntry | 32 | UINT32 | 0x2000000C
gPlatformModuleTokenSpaceGuid.PcdAcpiTablesRsdp | 0x00000000 | UINT32 | 0x2000000D
gPlatformModuleTokenSpaceGuid.PcdAcpiTablesAddress | 0xFF000000 | UINT32 | 0x20000110
gPlatformModuleTokenSpaceGuid.PcdAcpiGnvsAddress | 0xFF000000 | UINT32 | 0x20000112
gPlatformModuleTokenSpaceGuid.PcdGraphicsVbtAddress | 0xFF000000 | UINT32 | 0x20000113
gPlatformModuleTokenSpaceGuid.PcdIgdOpRegionAddress | 0xFF000000 | UINT32 | 0x20000114
gPlatformModuleTokenSpaceGuid.PcdSmramTsegBase | 0xFF000000 | UINT32 | 0x20000120
gPlatformModuleTokenSpaceGuid.PcdSmramTsegSize | 0x00000000 | UINT32 | 0x20000121
gPlatformModuleTokenSpaceGuid.PcdHashStoreBase | 0xFF000000 | UINT32 | 0x20000181
gPlatformModuleTokenSpaceGuid.PcdCfgDataIntBase | 0xFF000000 | UINT32 | 0x20000182
gPlatformModuleTokenSpaceGuid.PcdDeviceTreeBase | 0xFF000000 | UINT32 | 0x20000183
gPlatformModuleTokenSpaceGuid.PcdSplashLogoAddress | 0xFF000000 | UINT32 | 0x20000184
gPlatformModuleTokenSpaceGuid.PcdSplashLogoSize | 0xFFFFFFFF | UINT32 | 0x20000185
gPlatformModuleTokenSpaceGuid.PcdFileDataBase | 0xFF000000 | UINT32 | 0x20000186
gPlatformModuleTokenSpaceGuid.PcdVerInfoBase | 0xFF000000 | UINT32 | 0x20000190
gPlatformModuleTokenSpaceGuid.PcdCfgDataLoadSource | 0x00000002 | UINT32 | 0x20000194
gPlatformModuleTokenSpaceGuid.PcdPayloadReservedMemSize | 0x00004000 | UINT32 | 0x20000195
# 0: Disable 1: Enable 2: Auto (disable for UEFI payload, enable for others)
# 3: Enable SMM rebase without setting SMRR 4:Auto without Setting SMRR
gPlatformModuleTokenSpaceGuid.PcdSmmRebaseMode | 0x00000000 | UINT8 | 0x20000196
gPlatformModuleTokenSpaceGuid.PcdSmbiosTablesBase | 0x00000000 | UINT32 | 0x20000197
gPlatformModuleTokenSpaceGuid.PcdSmbiosStringsPtr | 0x00000000 | UINT32 | 0x20000198
gPlatformModuleTokenSpaceGuid.PcdSmbiosStringsCnt | 0x0000 | UINT16 | 0x20000199
gPlatformModuleTokenSpaceGuid.PcdFuncCpuInitHook | 0x00000000 | UINT32 | 0x2000019A
gPlatformModuleTokenSpaceGuid.PcdFspsUpdPtr | 0x00000000 | UINT32 | 0x2000019B
gPlatformModuleTokenSpaceGuid.PcdAcpiTableTemplatePtr | 0x00000000 | UINT32 | 0x2000019C
gPlatformModuleTokenSpaceGuid.PcdPciEnumHookProc | 0x00000000 | UINT32 | 0x2000019D
gPlatformModuleTokenSpaceGuid.PcdPciResAllocTableBase | 0x00000000 | UINT32 | 0x200001A0
gPlatformModuleTokenSpaceGuid.PcdPciResourceIoBase | 0x00000000 | UINT32 | 0x200001A1
gPlatformModuleTokenSpaceGuid.PcdPciResourceMem32Base | 0x00000000 | UINT32 | 0x200001A2
gPlatformModuleTokenSpaceGuid.PcdPciResourceMem64Base | 0x0000000000000000 | UINT64 | 0x200001A3
[PcdsFeatureFlag]
# Determine if the Intel GFX device should be enabled or not in system
gPlatformModuleTokenSpaceGuid.PcdIntelGfxEnabled | TRUE | BOOLEAN | 0x20000200
# Determine if the GFX framebuffer should be initialized or not.
gPlatformModuleTokenSpaceGuid.PcdFramebufferInitEnabled | FALSE | BOOLEAN | 0x20000201
# Determine if the splash screen should be displayed or not.
gPlatformModuleTokenSpaceGuid.PcdSplashEnabled | FALSE | BOOLEAN | 0x20000202
gPlatformModuleTokenSpaceGuid.PcdAcpiEnabled | TRUE | BOOLEAN | 0x20000204
gPlatformModuleTokenSpaceGuid.PcdSmpEnabled | TRUE | BOOLEAN | 0x20000205
gPlatformModuleTokenSpaceGuid.PcdPciEnumEnabled | TRUE | BOOLEAN | 0x20000206
gPlatformModuleTokenSpaceGuid.PcdStage1BXip | TRUE | BOOLEAN | 0x20000207
gPlatformModuleTokenSpaceGuid.PcdStage1AXip | TRUE | BOOLEAN | 0x20000208
gPlatformModuleTokenSpaceGuid.PcdRemapStage1B | FALSE | BOOLEAN | 0x20000226
gPlatformModuleTokenSpaceGuid.PcdLoadImageUseFsp | FALSE | BOOLEAN | 0x20000209
gPlatformModuleTokenSpaceGuid.PcdVtdEnabled | FALSE | BOOLEAN | 0x2000020B
gPlatformModuleTokenSpaceGuid.PcdS3DebugEnabled | FALSE | BOOLEAN | 0x2000020D
gPlatformModuleTokenSpaceGuid.PcdPsdBiosEnabled | FALSE | BOOLEAN | 0x2000020E
gPlatformModuleTokenSpaceGuid.PcdSmbiosEnabled | FALSE | BOOLEAN | 0x2000020F
gPlatformModuleTokenSpaceGuid.PcdLinuxPayloadEnabled | FALSE | BOOLEAN | 0x20000210
gPlatformModuleTokenSpaceGuid.PcdAriSupport | FALSE | BOOLEAN | 0x20000211
gPlatformModuleTokenSpaceGuid.PcdSrIovSupport | FALSE | BOOLEAN | 0x20000212
gPlatformModuleTokenSpaceGuid.PcdEnableSetup | FALSE | BOOLEAN | 0x20000213
gPlatformModuleTokenSpaceGuid.PcdLegacyEfSegmentEnabled | TRUE | BOOLEAN | 0x20000214
gPlatformModuleTokenSpaceGuid.PcdEnableDts | FALSE | BOOLEAN | 0x20000215
gPlatformModuleTokenSpaceGuid.PcdResizableBarSupport | FALSE | BOOLEAN | 0x20000216
gPlatformModuleTokenSpaceGuid.PcdEnablePciePm | FALSE | BOOLEAN | 0x20000222
gPlatformModuleTokenSpaceGuid.PcdEnableFwuNotify | FALSE | BOOLEAN | 0x20000225
[PcdsDynamic]
gPlatformModuleTokenSpaceGuid.PcdFspResetStatus | 0 | UINT64 | 0x20000224
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