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Convert the line endings stored for all text files in the repository to LF. The majority previously used DOS-style CRLF line endings. Add a .gitattributes file to enforce this and treat certain extensions as never being text files. Update PatchCheck.py to insist on LF line endings rather than CRLF. However, its other checks fail on this commit due to lots of pre-existing complaints that it only notices because the line endings have changed. Silicon/QemuSocPkg/FspBin/Patches/0001-Build-QEMU-FSP-2.0-binaries.patch needs to be treated as binary since it contains a mixture of line endings. This change has implications depending on the client platform you are using the repository from: * Windows The usual configuration for Git on Windows means that text files will be checked out to the work tree with DOS-style CRLF line endings. If that's not the case then you can configure Git to do so for the entire machine with: git config --global core.autocrlf true or for just the repository with: git config core.autocrlf true Line endings will be normalised to LF when they are committed to the repository. If you commit a text file with only LF line endings then it will be converted to CRLF line endings in your work tree. * Linux, MacOS and other Unices The usual configuration for Git on such platforms is to check files out of the repository with LF line endings. This is probably the right thing for you. In the unlikely even that you are using Git on Unix but editing or compiling on Windows for some reason then you may need to tweak your configuration to force the use of CRLF line endings as described above. * General For more information see https://docs.github.com/en/get-started/getting-started-with-git/configuring-git-to-handle-line-endings . Fixes: https://github.com/slimbootloader/slimbootloader/issues/1400 Signed-off-by: Mike Crowe <mac@mcrowe.com>
203 lines
5.3 KiB
C
203 lines
5.3 KiB
C
/** @file
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Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiPei.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PagingLib.h>
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#define PDE_PG_LVL 2
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#define PDP_PG_LVL 3
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/**
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Get shift bit number from address to page index
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@param[in] Level Page level.
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@retval Bit to shift to get specific page level index.
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**/
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UINT32
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GetPageShiftBits (
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IN UINT8 Level
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)
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{
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if (Level == PDE_PG_LVL) {
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return IsLongModeEnabled() ? 21 : 22;
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} else {
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return IsLongModeEnabled() ? 30 : 31;
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}
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}
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/**
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Map a memory range from the current paging table.
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@param[in] Ranges Memory range info to map.
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@param[in] PageBuffer Page table root pointer.
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@retval EFI_SUCCESS Map completed successfully.
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@retval EFI_INVALID_PARAMETER Invalid PageBuffer or Ranges.
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**/
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EFI_STATUS
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EFIAPI
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MapMemoryRange (
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IN MAP_RANGE Ranges[1],
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IN VOID *PageBuffer
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)
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{
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UINTN Idx;
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UINTN End;
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UINTN EntryNum;
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UINTN *PageTable1G;
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UINTN *PageTable2M;
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UINTN *PageTable4K;
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UINTN PageBase;
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UINT32 Attribute;
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UINTN Address;
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UINT32 PteOffset;
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UINT32 PdeOffset;
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UINT32 PdpOffset;
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UINTN Alignment;
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UINT32 PageBits;
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Attribute = IA32_PG_P | IA32_PG_RW | IA32_PG_AC;
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Alignment = Ranges[0].PageSize - 1;
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// Check for Start and Limit PageSize alignment
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if (((Ranges[0].Start & Alignment) != 0) || ((Ranges[0].Limit & Alignment) != Alignment)) {
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return EFI_INVALID_PARAMETER;
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}
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// Check for Mapping PageSize alignment
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if ( (Ranges[0].Mapping & Alignment) != 0) {
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return EFI_INVALID_PARAMETER;
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}
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switch (Ranges[0].PageSize) {
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case SIZE_4KB:
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PageBits = GetPageShiftBits (PDE_PG_LVL);
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if (PageBits == 21) {
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// 64 bit mode
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PteOffset = 6 * EFI_PAGE_SIZE;
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PdeOffset = 2 * EFI_PAGE_SIZE;
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EntryNum = 512;
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} else {
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// 32 bit mode
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PteOffset = 1 * EFI_PAGE_SIZE;
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PdeOffset = 0;
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EntryNum = 1024;
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}
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PageTable4K = (UINTN *)((UINTN)PageBuffer + PteOffset);
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PageTable2M = (UINTN *)((UINTN)PageBuffer + PdeOffset);
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Alignment = (UINTN) LShiftU64 (1, PageBits) - 1;
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PageBase = Ranges[0].Start & ~Alignment;
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// Check if the limit is in the same page
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if ((Ranges[0].Limit & ~Alignment) != PageBase) {
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return EFI_INVALID_PARAMETER;
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}
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Address = PageBase;
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// Create 4KB pages and remap the CAR region into a different memory location
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for (Idx = 0; Idx < EntryNum; Idx++) {
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if ((Address >= Ranges[0].Start) && (Address <= Ranges[0].Limit)) {
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PageTable4K[Idx] = Ranges[0].Mapping + (Attribute | IA32_PG_PD);
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Ranges[0].Mapping += SIZE_4KB;
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} else {
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PageTable4K[Idx] = Address + (Attribute | IA32_PG_PD);
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}
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Address += SIZE_4KB;
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}
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// Split the 2MB page containing the CAR region into 4KB pages
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Idx = (UINT32) RShiftU64 (PageBase, PageBits);
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PageTable2M[Idx] = (UINTN)PageTable4K + Attribute;
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break;
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case SIZE_1GB:
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ASSERT (Ranges[0].Limit < SIZE_512GB);
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PageBits = GetPageShiftBits (PDP_PG_LVL);
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PdpOffset = 1 * EFI_PAGE_SIZE;
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EntryNum = 512;
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PageTable1G = (UINTN *)((UINTN)PageBuffer + PdpOffset);
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Alignment = (UINTN) LShiftU64 (1, PageBits) - 1;
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PageBase = Ranges[0].Start & ~Alignment;
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// Get the start and ending index into 1G table and add 1G entries
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Address = Ranges[0].Mapping;
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Idx = (UINT32) RShiftU64 (PageBase, PageBits);
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End = (UINT32) RShiftU64 (Ranges[0].Limit + 1, PageBits);
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for (; Idx < End; Idx++) {
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PageTable1G[Idx] = Address + (Attribute | IA32_PG_PD);
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Address += SIZE_1GB;
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}
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break;
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default:
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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/**
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Unmap a memory range from the current paging table.
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@param[in] Ranges Memory range info to un map.
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@param[in] PageBuffer Page table root pointer.
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@retval EFI_SUCCESS Unmap completed successfully.
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@retval EFI_INVALID_PARAMETER Invalid PageBuffer or Ranges.
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**/
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EFI_STATUS
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EFIAPI
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UnmapMemoryRange (
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IN MAP_RANGE Ranges[1],
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IN VOID *PageBuffer
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)
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{
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UINTN *PageTable;
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UINTN Idx;
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UINTN Start;
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UINTN End;
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UINT32 PageBits;
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UINT32 PdeOffset;
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UINT32 Attribute;
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if (PageBuffer == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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// Check if range is 4KB page aligned
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if (((Ranges[0].Start & 0xFFF) != 0) || ((Ranges[0].Limit & 0xFFF) != 0xFFF)) {
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return EFI_INVALID_PARAMETER;
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}
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Attribute = IA32_PG_P | IA32_PG_RW | IA32_PG_AC;
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// Remove 4KB pages from PDE
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PageBits = GetPageShiftBits (PDE_PG_LVL);
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if (PageBits == 21) {
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// 64 bit mode
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PdeOffset = 2 * EFI_PAGE_SIZE;
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} else {
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// 32 bit mode
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PdeOffset = 0;
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}
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PageTable = (UINTN *)((UINTN)PageBuffer + PdeOffset);
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Start = (UINTN) RShiftU64 (Ranges[0].Start, PageBits);
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End = (UINTN) RShiftU64 (Ranges[0].Limit, PageBits);
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for (Idx = Start; Idx < End + 1; Idx++) {
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PageTable[Idx] = (UINTN)LShiftU64 (Idx, PageBits) | Attribute | IA32_PG_PD;
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}
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return EFI_SUCCESS;
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}
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