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Mike Crowe
990e3e81e6
Convert the line endings stored for all text files in the repository to LF. The majority previously used DOS-style CRLF line endings. Add a .gitattributes file to enforce this and treat certain extensions as never being text files. Update PatchCheck.py to insist on LF line endings rather than CRLF. However, its other checks fail on this commit due to lots of pre-existing complaints that it only notices because the line endings have changed. Silicon/QemuSocPkg/FspBin/Patches/0001-Build-QEMU-FSP-2.0-binaries.patch needs to be treated as binary since it contains a mixture of line endings. This change has implications depending on the client platform you are using the repository from: * Windows The usual configuration for Git on Windows means that text files will be checked out to the work tree with DOS-style CRLF line endings. If that's not the case then you can configure Git to do so for the entire machine with: git config --global core.autocrlf true or for just the repository with: git config core.autocrlf true Line endings will be normalised to LF when they are committed to the repository. If you commit a text file with only LF line endings then it will be converted to CRLF line endings in your work tree. * Linux, MacOS and other Unices The usual configuration for Git on such platforms is to check files out of the repository with LF line endings. This is probably the right thing for you. In the unlikely even that you are using Git on Unix but editing or compiling on Windows for some reason then you may need to tweak your configuration to force the use of CRLF line endings as described above. * General For more information see https://docs.github.com/en/get-started/getting-started-with-git/configuring-git-to-handle-line-endings . Fixes: https://github.com/slimbootloader/slimbootloader/issues/1400 Signed-off-by: Mike Crowe <mac@mcrowe.com>
259 lines
7.5 KiB
NASM
259 lines
7.5 KiB
NASM
;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; MpCommon.nasm
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;
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; Abstract:
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;
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; This is the common funcitons for Multiple Processor support
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;
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;-------------------------------------------------------------------------------
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%include "Nasm.inc"
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%include "MpEqu.inc"
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global ASM_PFX(RendezvousFunnelProcStart)
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ASM_PFX(RendezvousFunnelProcStart):
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RendezvousFunnelProc:
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; At this point CS = 0x(vv00) and ip= 0x0.
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BITS 16
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mov eax, cr2
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or eax, eax
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; For SMM rebase flow, CR2 will be pre-filled with SMBASE
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; The same stub code will be shared for SMM rebasing and start IPI.
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jz StartIpi
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; The ASM code needs to use same 0x3800 segment as start IPI.
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; At initial SMM entry the segment is 0x3000, so force a long jump.
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jmp 0x3800:(StartIpi - RendezvousFunnelProc)
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StartIpi:
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mov ax, cs
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mov ds, ax
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mov es, ax
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mov ss, ax
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xor ax, ax
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mov fs, ax
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mov gs, ax
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mov si, AP_DATA_STRUCT_FIELD (BufferStart)
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mov edx, [si] ; EDX is keeping the start address of wakeup buffer
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mov si, AP_DATA_STRUCT_FIELD (Gdtr)
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o32 lgdt [si]
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mov si, AP_DATA_STRUCT_FIELD (Idtr)
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o32 lidt [si]
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; Switch to protected mode
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mov eax, cr0 ; Get control register 0
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or eax, 000000003h ; Set PE bit (bit #0) & MP
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mov cr0, eax
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; Switch to 32-bit code in executable memory (>1MB)
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db 66h, 67h, 0EAh ; far jump
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dd 0x38000 + ProtModeStart - RendezvousFunnelProc; 32-bit offset
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dw 0x10 ; 16-bit selector
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BITS 32
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SmmRebase:
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mov edi, 0x3fefc ; SMBASE revision
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mov cl, [edi]
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mov edi, 0x3fef8
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cmp cl, 0x64
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jnz SmmEm64t
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mov edi, 0x3ff00 ; AMD64, required by QEMU
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mov ecx, [edi]
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cmp ecx, 0x30000 ; Should contain default SMBASE
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jz SmmEm64t
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mov edi, 0x3fef8 ; Fallback to support SIMICS QSP model
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SmmEm64t:
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mov [edi], eax ; change to new SMBASE
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mov eax, [esi + AP_DATA_STRUCT_FIELD (SmrrMask)]
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cmp eax, 0
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jz SkipSmrrProg
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xchg eax, ebx
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mov eax, [esi + AP_DATA_STRUCT_FIELD (SmrrBase)]
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xor edx, edx
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mov ecx, 0x1f2 ; MSR_IA32_SMRR_PHYSBASE
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wrmsr
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inc ecx
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xchg eax, ebx
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wrmsr
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SkipSmrrProg:
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rsm
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jmp $
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ProtModeStart: ; protected mode entry point
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; Since CS and DS base is set to 0, we need to add the buffer start to use the offset
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mov esi, edx ; EDX is keeping the start address of wakeup buffer
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mov ax, word [cs:esi + AP_DATA_STRUCT_FIELD (DSSelector)]
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mov ds, ax
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mov ax, word [cs:esi + AP_DATA_STRUCT_FIELD (ESSelector)]
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mov es, ax
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mov ax, word [cs:esi + AP_DATA_STRUCT_FIELD (FSSelector)]
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mov fs, ax
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mov ax, word [cs:esi + AP_DATA_STRUCT_FIELD (GSSelector)]
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mov gs, ax
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mov ax, word [cs:esi + AP_DATA_STRUCT_FIELD (SSSelector)]
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mov ss, ax
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cli
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mov eax, cr2 ; CR2 will be set to the new SMBASE before SMI IPI is generated
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or eax, eax
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jnz SmmRebase
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mov eax, cr0 ; Enable cache
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and eax, 09fffffffh
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mov cr0, eax
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mov eax, cr4 ; ENABLE_SSE
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or eax, 00000600h
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mov cr4, eax
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CallApFunc:
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; Acquire Lock
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mov eax, SPIN_LOCK_RELEASED
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mov edx, SPIN_LOCK_ACQUIRED
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lock cmpxchg [esi + AP_DATA_STRUCT_FIELD (SpinLock)], edx
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jnz CallApFunc
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; Calculate stack
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inc dword [esi + AP_DATA_STRUCT_FIELD (ApCounter)]
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mov eax, [esi + AP_DATA_STRUCT_FIELD (ApCounter)]
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mov ebx, eax
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; Program AP stack for each thread
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mov ecx, [esi + AP_DATA_STRUCT_FIELD (ApStackSize)]
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shl eax, cl
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add eax, [esi + AP_DATA_STRUCT_FIELD (StackStart)]
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lea esp, [eax - 0x10]
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; Release Lock
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mov eax, SPIN_LOCK_RELEASED
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mov [esi + AP_DATA_STRUCT_FIELD (SpinLock)], eax
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mov eax, [esi + AP_DATA_STRUCT_FIELD (CpuArch)]
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cmp eax, 0
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jnz SwitchToLongMode
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; Call C Function
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mov eax, [esi + AP_DATA_STRUCT_FIELD (CProcedure)]
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test eax, eax
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jz GoToSleep
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mov eax, [esi + AP_DATA_STRUCT_FIELD (MpDataStruct)]
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push eax
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push ebx
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mov eax, [esi + AP_DATA_STRUCT_FIELD (CProcedure)]
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call eax
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add esp, 8
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wbinvd
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GoToSleep:
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cli
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hlt
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jmp $-2
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SwitchToLongMode:
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; Prepare stack for RETF
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xor eax, eax
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mov ax, word [esi + AP_DATA_STRUCT_FIELD (CSSelector)]
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push eax
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lea eax, [LongModeStart - RendezvousFunnelProc]
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add eax, esi
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push eax
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; Enable PAE
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mov eax, cr4
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bts eax, 5
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mov cr4, eax
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; Load page table
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mov eax, [esi + AP_DATA_STRUCT_FIELD (Cr3)]
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mov cr3, eax ; Load CR3
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; Enable long mode
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mov ecx, 0c0000080h ; EFER MSR number
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rdmsr ; Read EFER
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bts eax, 8 ; Set LME=1
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wrmsr ; Write EFER
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; Enable paging
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mov eax, cr0 ; Read CR0
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bts eax, 31 ; Set PG=1
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mov cr0, eax ; Write CR0
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;
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; Change to long mode
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;
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retf
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BITS 64
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LongModeStart:
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; Call C Function
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mov eax, [esi + AP_DATA_STRUCT_FIELD (CProcedure)]
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test eax, eax
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jz GoToSleep
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mov eax, [esi + AP_DATA_STRUCT_FIELD (CProcedure)]
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mov edx, [esi + AP_DATA_STRUCT_FIELD (MpDataStruct)]
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mov ecx, ebx
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call rax
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wbinvd
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GoToSleep64:
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cli
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hlt
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jmp $-2
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BITS 16
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global ASM_PFX(mDefaultSmiHandlerStart)
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global ASM_PFX(mDefaultSmiHandlerRet)
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global ASM_PFX(mDefaultSmiHandlerEnd)
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ASM_PFX(mDefaultSmiHandlerStart):
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; Enable valid bit in SMRR mask
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mov ecx, 01f3h
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rdmsr
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cmp eax, 0
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jz ASM_PFX(mDefaultSmiHandlerRet)
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bts eax, 11
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jc ASM_PFX(mDefaultSmiHandlerRet)
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wrmsr
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ASM_PFX(mDefaultSmiHandlerRet):
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rsm
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ASM_PFX(mDefaultSmiHandlerEnd):
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jmp $
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align 16
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global ASM_PFX(RendezvousFunnelProcEnd)
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ASM_PFX(RendezvousFunnelProcEnd):
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MpDataAreaStart:
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buffer times AP_DATA_STRUCT_FIELD(Terminator) db 0
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MpDataAreaEnd:
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%if AP_DATA_STRUCT_OFFSET > 0x8000 ;AP_BUFFER_SIZE
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%error "MP waking up stub combined code & data size should be less than 32KB !"
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%endif
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