- Added GetHashToExtend to bootloader common API to
retrive digest to extend
- Hash calculations for stage component and config date updated
to use bootloader common API
- Added functionality to extend KeyHashManifest digest
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
LoadComponentCallback is extended to perfom TPM extend
for firmware component stages. Component callback would be
invoked after authentication.
TpmExtendStageHash would extend hash based on hash validity.
TpmExtendConfigData is added to handle the Config data blob extend.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This patch allows to setup Stage1 stack/data in any CAR range.
By default, the stack base offset is 0 from CarBase.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch did some of the following clean up:
- Rename *_HOB to *_PARAM for Stage1A/Stage1B/Stage2.
This is to avoid confusion between real HOB and the parameter
data block passed through stages.
- Rename BistVal to CpuBist.
This is to make it more clear.
- Add BUF_INFO definition.
BUF_INFO will be used as a general structure.
- Remove CarBase/Top in Stage1B HOB
They are not used at all.
- Clean memory allocation in Stage1A
Restructured the buffer allocations for Stage1A global
data so that it is easier to read and maintain.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Hash and RSA signing parameters were hardcoded in
Crypto wrappers and secure boot libraries. This patch
address support for multiple hash and key sizes.
Signed-off-by: Subash Lakkimsetti <subashx.lakkimsetti@intel.com>
This will fully support PatchCheck.py.
- Remove all trailing whitespace
- Convert LF to CRLF by default
- Update EFI_D_* to DEBUG_*
- Re-enable CRLF check in PatchCheck.py
Signed-off-by: Aiden Park <aiden.park@intel.com>
- Add BistVal in STAGE1A_ASM_HOB structure
- Use MM0 register to preserve the BIST value
- Push BistVal while setup HOB in stack
- Add check for CPU BIST failure and halt the system when failed
Signed-off-by: Himanshu Sahdev aka CunningLearner sahdev.himan@gmail.com
This patch added a ContainerLib to support load and location a
component from a specified container. It copies the component
from flash to memory, authenticate it, and then decompress it if
required. It can also be used to support load component from flash
map in SBL stage2 or payload, such as payload or e-payload.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Restore the register information saved during the
normal boot, on S3 resume path for UEFI payload only.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Add ACPI_ENABLED() to align with MEASURED_BOOT_ENABLED().
Update MEASURED_BOOT_ENABLED() by checking PcdMeasuredBootEnabled
firstly.
Update PlatformFeaturesInit () in stage1b to fix potential inconsistent.
Update other code for changes above.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Smm bases for all the procs need to be relocated on the
S3 resume path (as payload is not run) for Windows boot.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Current SBL can only support on VBT file. However, different board
might need different VBT table. It is better to have the capability
to embed multiple VBT table into the image. This patch implemented
this feature and enabled it on QEMU. By default, it will take the
original behavior. if _MULTI_VBT_FILE in BoardConfig.py is specified,
multiple VBT files can be used.
If multiple VBT table support is required, list them as:
{VbtImageId1 :VbtFileName1, VbtImageId2 : VbtFileName2, ...}
VbtImageId is ID to identify a VBT image. It is a UINT32 number to
match the ImageId field in the VBT container.
VbtFileName is the VBT file name. It needs to be located under platform
VbtBin folder.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current code refers hash store as "key store". It is confusing
since there is no key stored in the image at all. Instead, the
public key hash is stored. The patch renames the KeyStore
to HashStore.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Hardware Breakpoints must be used during CAR execution until
memory has been initiailzed for APL platform.
In order to use Hareware Breakpoints in UDK debugger, add
FlashRange in UDK config file and force to cover CAR area.
In SoftDebugger.ini of Windows UDK Debugger
Or In /etc/udkdebugger.conf of Linux UDK Debugger
[Target System]
FlashRange = 0xFEF00000:0x1100000
Additionally,
added Stage1BBase in STAGE1A_HOB
fixed Stage1A module base report
Change-Id: I717f87bf141168de0b0987eb309fd4c5d48d3c14
Signed-off-by: Aiden Park <aiden.park@intel.com>