Re-scanning PCI devices to find NVME controllers was adding an additional
~20ms to the end of Stage 2. Moving this to the existing PCI scan that
is part of PCI enumeration saves this time. However, this
EfiPciBeforeResourceCollection phase was not actually getting called and
needed to be added.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Silicon Reset Lib needs to know the FSP reset request status since some
FSPs will utilize Reset values besides warm/cold.
Added support for ADl/RPL global reset request from FSP.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
When SG02 is failing on both partitions, a shutdown is supposed
to occur after trying to boot from each partition 3 times. However,
it was noticed that this was not occurring as the shutdown function
was left empty. This caused dead loops and further ACM active timer
expirations.
This change resolves this issue by moving the TCO timer check and start
until after the ACM active timer has been stopped. This change also converts
the shutdown to a CPU halt for further clarity.
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
There is no way to recover from failure in the following scenarios:
1) Both BP0 and BP1 are corrupted
2) The configured PLD is not found
A CPU halt does not prevent the TCO timer from rebooting.
This change makes it so that the SUT shuts down whenever a
unrecoverable failure occurs, so that it does not incorrectly enter
the recovert loop.
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
It was discovered that the ACM active timer monitors
boot progress across all of SG1A and the beginning of
SG1B (through FSP-M), flipping the TS if it times out.
This change makes it so that the 2 timers have less
overlap.
This change also consolidates the set and start TCO timer
APIs as well as renames the TCO status check API.
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
Code are shared for AlderLake and RaptorLake.
Just update the SMBIOS strings to reflect it.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Signed-off-by: Guo Dong <guo.dong@intel.com>
Before this change, whenever SG02 is corrupted
in both BP0 and BP1, SBL will continuously loop
trying to recover BP0 via BP1 and vice versa
This change makes it so that, if a failure is
detected on a recovery flow, the CPU halts
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
library
Migrates FW resiliency APIs of Stage1B.c to
FirmwareResiliencyLib
Migrates FW update status types from FirmwareUpdateLib.h and
BootloaderCommonLib.h to FirmwareUpdateStatus.h
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
- Increase PlatformMemorySize to get rid of FSP error caused
during Tcc SRAM init.
- Sort the CPUs in ascending order for Tcc validation purpose.
Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
Different use case might want to have a different CPU order.
e.g. P-core first or E-core first.
This patch adds an option to help user sort CPU.
platform could add "self.CPU_SORT_METHOD = value" to
BoardConfig.py to override the default value.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Current SBL PCI enumeration does not allocate resource for PCI ROM
bar because SBL does not deal with option ROM at all. However, the
Linux kernel might expect the ROM bar resource to be allocated.
This patch introduces a static build configuration to allow support
PCI resource allocation for PCI ROM bar.
To enable this feature, please add following into the project
BoardConfig.py file:
self._PCI_ENUM_FLAG_ALLOC_ROM_BAR = 1
By default, it will be disabled to keep the same behavior as before.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
EDK2 stable tag 202111 changed some field name in SMBIOS structure.
This patch matched the changes to fix the build issue for SBL. It
also added new library class in DSC.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When we die due to a fatal exception, we get a debug message that
looks like this:
Exception #6 from 0x0010:0x000728E9 !!!
This message by itself is not incredibly useful for figuring out
which code caused the exception.
This patch borrows an idea from the Linux kernel, and extends the
exception information with a dump of the opcode bytes around the
instruction pointer, which means that the exception debug message
will now look like this:
Exception #6 from 0x0010:0x000728E9 !!!
000728C9: 07 00 6A 40 E8 E0 E8 FF-FF 83 C4 0C 68 00 00 07 [...]
000728D9: 00 68 DA 3A 07 00 6A 40-E8 CC E8 FF FF 83 C4 10 [...]
000728E9: 0F 0B E8 8E F2 FF FF 8D-55 98 80 78 0E 01 8D 45 [...]
000728F9: 94 75 06 52 50 6A 01 EB-04 52 50 6A 00 68 53 47 [...]
Tested by inserting a UD2 instruction into Stage1A and verifying on
qemu ia32 and on qemu x64 that the right information is printed.
Signed-off-by: Lennert Buytenhek <buytenh@arista.com>
This patch does the following updates to SmBiosInitLib:
1. Provide AddSmbiosType() to add a SmBios Type header.
2. Provide AddSmbiosString() to append strings to Type header.
3. Move Finalize() to after 'PrePayloadLoading' board init phase.
All Smbios related calls need to be done before this.
4. Modified TGL project to adjust to these changes.
Signed-off-by: Sai T <sai.kiran.talamudupula@intel.com>
Convert the line endings stored for all text files in the repository to
LF. The majority previously used DOS-style CRLF line endings. Add a
.gitattributes file to enforce this and treat certain extensions as
never being text files.
Update PatchCheck.py to insist on LF line endings rather than CRLF.
However, its other checks fail on this commit due to lots of
pre-existing complaints that it only notices because the line endings
have changed.
Silicon/QemuSocPkg/FspBin/Patches/0001-Build-QEMU-FSP-2.0-binaries.patch
needs to be treated as binary since it contains a mixture of line
endings.
This change has implications depending on the client platform you are
using the repository from:
* Windows
The usual configuration for Git on Windows means that text files will
be checked out to the work tree with DOS-style CRLF line endings. If
that's not the case then you can configure Git to do so for the entire
machine with:
git config --global core.autocrlf true
or for just the repository with:
git config core.autocrlf true
Line endings will be normalised to LF when they are committed to the
repository. If you commit a text file with only LF line endings then it
will be converted to CRLF line endings in your work tree.
* Linux, MacOS and other Unices
The usual configuration for Git on such platforms is to check files out
of the repository with LF line endings. This is probably the right thing
for you. In the unlikely even that you are using Git on Unix but editing
or compiling on Windows for some reason then you may need to tweak your
configuration to force the use of CRLF line endings as described above.
* General
For more information see
https://docs.github.com/en/get-started/getting-started-with-git/configuring-git-to-handle-line-endings .
Fixes: https://github.com/slimbootloader/slimbootloader/issues/1400
Signed-off-by: Mike Crowe <mac@mcrowe.com>
SBL might change MTRR to enable framebuffer cache. Current code
only handles BSP MTRR programming, and it is necessary to sync
up the MTRR programming for all APs as well. This patch added
a function to sync up MTRRs for all APs.
Please note, this MTRR sync up is a simplified version for SBL
case since SBL will only add new MTRRs for GFX framebuffer.
To do a full generic MTRRs sync up, it is required to flush cache,
reload TLB, etc. And it will come with some performance impacts.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
UEFI payload built from open sourced EDK2 supports SMM variable now.
So build the required HOBs to work with EDK2.
This patch just changed the common SBL code, so there is no platform
change required.
This patch also added a PCD PcdBuildSmmHobs for old SMM HOBs and new
SMM HOBs. Late old SMM HOBs might be dropped.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch moved SBL core private data strctures and definitions
into a private header file so that other packages cannot refer
to the private structures.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added API to Get/SetSocSku. In current code, SBL always
read the PCI register to determine the SKU. It is not efficient.
Since it is used a lot, it is better to have software API to get
this info through a software only method.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
koktong-ong
Bejean Mosher
bejeanmo
Sean McGinn
Guo Dong
Sindhura Grandhi
Aiman Rosli
Guo Dong
Maurice Ma
Lennert Buytenhek
Sai T
Mike Crowe
Raghava Gudla