Commit Graph

9 Commits

Author SHA1 Message Date
Maurice Ma df15627dd7 Enable updatable hash store component KEYH
Current SBL hash store has many limitations:
- Only support fixed hash size
- Only support 1:1 public key and usage mapping
- Only support build time key enrollment

This patch addressed this issue by introducing:
- Add a updatable KEYH component to hold extra key hash
- Allow append new hash entries from KEYH
- Use variable length entry for hash
- Introduce "Usage" bit mask for a key usage

This will allow using a single key to sign multiple components, or
using multiple keys to sign a single component. The built-in hash
store will only contain hash for STAGE1B, STAGE2, PAYLOAD,
PAYLOAD_FWU and MASTER public key hash. Master key hash will be used
to verify the KEYH component loaded at runtime in Stage1B. Once KEYH
is loaded, it will be appended into global hash store. The combined
hash store will be used to verify other components on the boot flow.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-12-10 19:19:04 -08:00
Maurice Ma b6724f6b10 Merge some APIs into BootloaderCommonLib
This patch moved some library APIs into BootloaderCommonLib, including
GetComponentInfo() and GetComponentHash().

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-12-10 11:41:57 -08:00
Aiden Park 72262b4722 Misc Klocwork scanning fixes (#484)
This patch fixes klocwork scanning reports in qemu, apl and cfl builds.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2019-12-04 15:17:04 -08:00
Aiden Park b24fd2759c Cosmetic: Convert LF to CRLF
This will fully support PatchCheck.py.
- Remove all trailing whitespace
- Convert LF to CRLF by default
- Update EFI_D_* to DEBUG_*
- Re-enable CRLF check in PatchCheck.py

Signed-off-by: Aiden Park <aiden.park@intel.com>
2019-12-02 16:21:19 -08:00
Maurice Ma 896937483c [WHL] Fix boot performance issue for BP1
On WHL, if using Boot Guard profile 0, booting from BP1 will be
significantly slower than BP0. It is because some code region in BP1
is not covered by MTRR cache settings. This patch adjusted MTRR
settings during PostTempRamInit notification to cover full flash
code region if Boot Guard profile 0 is used.

It fixed #188.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-06-13 15:02:36 -07:00
Guo Dong 5e10bd1e07 Update BSD license to BSD+Patent license
To align with EDK2, update file license
to use BSD+Patent license

Signed-off-by: Guo Dong <guo.dong@intel.com>
2019-06-13 10:46:49 -07:00
Aiden Park aabfe786a6 Fix gcc compile errors (#43)
There are 'uninitialized' errors and size exceed error in PAYLOAD
with old gcc versions. This change has been verified with gcc-4.8,
gcc-5, gcc-7 and gcc-8 on Ubuntu 18.04 LTS.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2018-11-15 09:39:16 -08:00
Guo Dong cd9edfdd8b Add Device table
Update core code to support device table.
Updated boot option to consume device table.
Update firmware update to consume device table.
Update shell command on boot option changes.
Add device table for APL and Qemu.
Remove unnecessary code.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2018-11-12 09:38:59 -07:00
Maurice Ma c6999f497a Initial check-in for Slim Bootloader source 2018-09-13 16:11:07 -07:00