This patch enabled Visual Studio 2017 Community 2017 build support.
The following were done:
- Added new method to detect VS2017 installation path and version
- Droped VS2005, VS2008, VS2010 and VS2012 build support. Only
VS2013 and VS2015 are supported.
- Fixed build issue in FspApiLib due to new compiler optimizations
- Synced the build support for QEMU FSP patch
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
CSME driver is not a component rather it is a driver to
update CSME binary, so it is not required to update status
of the driver to FWST ACPI table.
As part of the above change, gCsmeFWUDriverImageFileGuid is
moved from PayloadPkg.dec to bootloadercommonpkg.dec
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This patch did some of the following clean up:
- Rename *_HOB to *_PARAM for Stage1A/Stage1B/Stage2.
This is to avoid confusion between real HOB and the parameter
data block passed through stages.
- Rename BistVal to CpuBist.
This is to make it more clear.
- Add BUF_INFO definition.
BUF_INFO will be used as a general structure.
- Remove CarBase/Top in Stage1B HOB
They are not used at all.
- Clean memory allocation in Stage1A
Restructured the buffer allocations for Stage1A global
data so that it is easier to read and maintain.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch moved some library APIs into BootloaderCommonLib, including
GetComponentInfo() and GetComponentHash().
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
HASH_STORE_TABLE is updated and HASH_STORE_DATA is added
to provide info with variable length sizes. Usage bits would
notify for multiple component/key using the same hash.
These data structure would optimize the hash store size
in storage.
PcdHashStoreSize would define the size of Hash store
to allocate in bios bootup.
Signed-off-by: Subash Lakkimsetti <subashx.lakkimsetti@intel.com>
Component Hash is passed with TpmExtendHash if available.
Hash Store is getting optimized on storage and this would avoid
setting component hash in hash table. SetComponent Hash API is
removed in bootloaderlib.
Added HashAlg param to TpmExtendHash for future purposes
where TPM PCR bank would be selected based on HashAlg.
Signed-off-by: Subash Lakkimsetti <subashx.lakkimsetti@intel.com>
This will fully support PatchCheck.py.
- Remove all trailing whitespace
- Convert LF to CRLF by default
- Update EFI_D_* to DEBUG_*
- Re-enable CRLF check in PatchCheck.py
Signed-off-by: Aiden Park <aiden.park@intel.com>
Current SBL does not check the FSP Notify API return status. As a
result, if reset is requested, it is ignored by SBL. This patch
added FSP reset request check for FspMemoryInit, FspSiliconInit and
FspNotifyPhase.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This provides basic insertion sort API for Linked List. As part of change,
this insertion sort is used for PCI BAR calculation by its alignment
and for shell commands list by its name.
Signed-off-by: Aiden Park <aiden.park@intel.com>
There are multiple instances of sorting use case in SBL. For example,
memory map sorting and CPU APIC ID sorting. This patch added a generic
quick sort library to provide common sort API. As part of the change,
the quick sort API will be used for memory map and CPU APIC ID sorting.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch sorts the CPU info entry according to their thread distances.
It is required to list CPU thread with furthest distance first in MADT
so as to better utilize CPU resources.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL depends on flash map to locate all component info. It is
mandatory to keep flash map. HAVE_FLASH_MAP config option should
be removed. This patch removed this config option and the related
PcdFlashMapEnabled PCD.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
If FPDT->Length is just the size of FIRMWARE_PERFORMANCE_TABLE,
BOOT_PERFORMANCE_TABLE and S3_PERFORMANCE_TABLE are overwritten
by the next Table in ACPI init. Therefore, make the size in the
header as sizeof(INTERNAL_FIRMWARE_PERFORMANCE_TABLE) so that
the next table starts after INTERNAL_FIRMWARE_PERFORMANCE_TABLE.
Otherwise, S3 Perf Table can't be located on S3 resume path.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Error: conversion from 'UINT32' to 'UINT8', possible loss of data
MADT ProcessorId and ApicId has the size of UINT8. Cast the size from UINT32 to UINT8.
Change-Id: I3f46b2015b0d21c2b3e2f9389ecb8d5364ed5a5e
Signed-off-by: Aiden Park <aiden.park@intel.com>
Currently, the common hook UpdateMadt() was updating fixed size of
ProcessorLocalApic entries.
This allows the hook to append ProcessorLocalApic entries with the number
of detected CPUs in runtime.
Signed-off-by: Aiden Park <aiden.park@intel.com>
To make PlatformUpdateAcpiTable() hook its contents and length easily,
allocate a memory from low to high and appends each tables to higher direction
Signed-off-by: Aiden Park <aiden.park@intel.com>
By design, BootloaderCommonPkg should not refer to
BootloaderCorePkg. Hence removed those references in
the .inf files in Common pkg.
Moving SmbiosInitLib to Core pkg as it is a core feature.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Since HASH_INDEX_* is a 1:1 mapping with
COMP_TYPE_* we can remove HASH_INDEX_* and
replace with COMP_TYPE_*.
Also fix some misspellings.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
This patch added a ContainerLib to support load and location a
component from a specified container. It copies the component
from flash to memory, authenticate it, and then decompress it if
required. It can also be used to support load component from flash
map in SBL stage2 or payload, such as payload or e-payload.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Maurice Ma
Raghava Gudla
Subash Lakkimsetti
Aiden Park
Ravi Rangarajan
Sai Talamudupula
James Gutbub