Recent Android support cleanup patch introduced a regression with
OsLoader. Kernel panic was seen while booting Ubuntu using
container. This was because, earlier the function used to return
after adding OS Mender boot info parameter for non-Android OS.
With the Android support removed, the dead code (for non-Android
cases) started getting executed causing regression. This patch
removes this code which never got executed earlier in non-Android
cases and fixes this regression.
Signed-off-by: Sachin Kamat <sachin.kamat@intel.com>
Previous patch used GCC extension "attribute__((packed))" which
caused windows build failure. This patch fixes it by using
#pragma pack().
Signed-off-by: Guo Dong <guo.dong@intel.com>
When building HelloWorld, it would build failure since SBL core
package is missing in PayloadPkg.dsc since
In general, the payload should not depend on BootloaderCorePkg.
Currently PcdAcpiEnabled is used in the payload entry module and
it is defined in the BootloaderCorePkg. This patch updates the
code to remove the dependency.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Signed-off-by: Atharva Lele <atharva.lele@intel.com>
This patch fixes the issue that OS Loader appends an unwanted
mender setting (i.e., root=PARTLABEL=primary/secondary) to Linux
kernel command line when the mender setting already exists.
With the patch, the mender setting is appended to kernel command line
only if BOOT_FLAGS_MENDER AND no existing mender setting.
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Universal Payload defined new HOBs for serial port information.
This patch switched to use the new hob instead of the old one to
retrieve serial port information.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch adds a MpServiceLib for payload so that a payload
can utilize this library to run tasks on specified processor.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Convert the line endings stored for all text files in the repository to
LF. The majority previously used DOS-style CRLF line endings. Add a
.gitattributes file to enforce this and treat certain extensions as
never being text files.
Update PatchCheck.py to insist on LF line endings rather than CRLF.
However, its other checks fail on this commit due to lots of
pre-existing complaints that it only notices because the line endings
have changed.
Silicon/QemuSocPkg/FspBin/Patches/0001-Build-QEMU-FSP-2.0-binaries.patch
needs to be treated as binary since it contains a mixture of line
endings.
This change has implications depending on the client platform you are
using the repository from:
* Windows
The usual configuration for Git on Windows means that text files will
be checked out to the work tree with DOS-style CRLF line endings. If
that's not the case then you can configure Git to do so for the entire
machine with:
git config --global core.autocrlf true
or for just the repository with:
git config core.autocrlf true
Line endings will be normalised to LF when they are committed to the
repository. If you commit a text file with only LF line endings then it
will be converted to CRLF line endings in your work tree.
* Linux, MacOS and other Unices
The usual configuration for Git on such platforms is to check files out
of the repository with LF line endings. This is probably the right thing
for you. In the unlikely even that you are using Git on Unix but editing
or compiling on Windows for some reason then you may need to tweak your
configuration to force the use of CRLF line endings as described above.
* General
For more information see
https://docs.github.com/en/get-started/getting-started-with-git/configuring-git-to-handle-line-endings .
Fixes: https://github.com/slimbootloader/slimbootloader/issues/1400
Signed-off-by: Mike Crowe <mac@mcrowe.com>
When UART bar is alloaced to 64 bit address, the current SBL API
GetSerialPortBase() only returns the lower 32 bit address, which will
cause problem for UART access. This patch fixed this issue.
Please note the patch did not change the payload HOB interface for
UART info. That needs to be updated to 64bit base address too. But this
patch does not cover that.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL will build full address paging table supported by CPU
only at the beginning of the OsLoader. It is better to move it to
Stage2 so that all payloads can have the full range address support
in x64 mode. It also allows Stage2 platform code to access 64bit
PCI resource. This patch addressed this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This will fix invalid PDP/PDE generation with PAE 2MB Pages,
and high bit calculation at PayloadEntry additionally.
Signed-off-by: Aiden Park <aiden.park@intel.com>
In 32 bit SBL, when PCI PMEM64 exists, the OsLoader will hang
during boot in CreateIdentityMappingPageTables(). The function
is inteneded to be used in X64 mode only, and cannot handle
32bit well. So OsLoader should not call it for 32 bit build.
This patch also zeroed the allcated memory to ensure the unused
entries are all 0.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
A device in boot options can have a BAR greater than 4GB depending on PCI
64Mem/PMem resource policy.
This will allow Payload to build a paging table to cover high MMIO area.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch added an example on how to build a HelloWorld payload
from separate DSC file.
To build a standalone HelloWorld payload, use the following command:
BuildLoader.py build_dsc -p PayloadPkg\PayloadPkg.dsc
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Visual Studio reports more pointer type cast errors with 64-bit build.
This will cover the issue on the existing targets.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch allows both 32/64-bit addressing properly.
- Pointer type cast with UINTN
- Add missing EFIAPI for APIs
Signed-off-by: Aiden Park <aiden.park@intel.com>
As part of the DMA memory protection, it needs API to enable/disable
DMA protection. This patch simplified the API to do that using
SetDmaProtection().
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added DMA memory type into memory allocation pool for payloads.
This DMA memory buffer with PcdDmaBufferSize is located at address
aligned at PcdDmaBufferAlignment after Payload reserved memory. Memory
type EfiRuntimeServicesData is used to indicate DMA memory type.
Stage1B calculates the DMA memory location using fixed PCDs so that
platform can set up DMA protection as early as possible after memory is
ready. In Stage1B or Stage2 platform code should use platform VTd
information to setup PMR to protect all low memory except for the DMA
buffer range. DMA memory will be added into memory pool at the entry
point of the payload. Before transfering to OS, the DMA memory protection
can be disabled, and the DMA memory pool can be reclaimed for OS usage.
Currently only boot media device will utilize the DMA buffer range for
block access operations. So it should only be required by payloads. GFX,
when enabled, will also use DMA. It will be targeted to the system stolen
memory which is not protected by PMR.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL AddMemoryResourceRange() API interface is not scalable.
If more memory type needs to be added, the interface does not allow
to do that. This patch changed the interface to use array and entry
count as parameter so that more ranges can be passed in using the
standard interfaces.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
