mirror of
https://github.com/Dasharo/skiboot.git
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Stewart Smith
49496485fe
SPDX makes it a simpler diff. I have audited the commit history of each file to ensure that they are exclusively authored by IBM and thus we have the right to relicense. The motivation behind this is twofold: 1) We want to enable experiments with coreboot, which is GPLv2 licensed 2) An upcoming firmware component wants to incorporate code from skiboot and code from the Linux kernel, which is GPLv2 licensed. I have gone through the IBM internal way of gaining approval for this. The following files are not exclusively authored by IBM, so are *not* included in this update (I will be seeking approval from contributors): core/direct-controls.c core/flash.c core/pcie-slot.c external/common/arch_flash_unknown.c external/common/rules.mk external/gard/Makefile external/gard/rules.mk external/opal-prd/Makefile external/pflash/Makefile external/xscom-utils/Makefile hdata/vpd.c hw/dts.c hw/ipmi/ipmi-watchdog.c hw/phb4.c include/cpu.h include/phb4.h include/platform.h libflash/libffs.c libstb/mbedtls/sha512.c libstb/mbedtls/sha512.h platforms/astbmc/barreleye.c platforms/astbmc/garrison.c platforms/astbmc/mihawk.c platforms/astbmc/nicole.c platforms/astbmc/p8dnu.c platforms/astbmc/p8dtu.c platforms/astbmc/p9dsu.c platforms/astbmc/vesnin.c platforms/rhesus/ec/config.h platforms/rhesus/ec/gpio.h platforms/rhesus/gpio.c platforms/rhesus/rhesus.c platforms/astbmc/talos.c platforms/astbmc/romulus.c Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: fixed up the drift] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
80 lines
2.4 KiB
C
80 lines
2.4 KiB
C
// SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
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/* Copyright 2013-2017 IBM Corp. */
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#ifndef __LIBFLASH_H
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#define __LIBFLASH_H
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#include <stdint.h>
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#include <stdbool.h>
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#include <libflash/blocklevel.h>
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/* API status/return:
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*
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* <0 = flash controller errors passed through,
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* 0 = success
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* >0 = libflash error
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*/
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#include <libflash/errors.h>
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#ifndef MIN
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#endif
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/* Flash chip, opaque */
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struct flash_chip;
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struct spi_flash_ctrl;
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int flash_init(struct spi_flash_ctrl *ctrl, struct blocklevel_device **bl,
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struct flash_chip **flash_chip);
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void flash_exit(struct blocklevel_device *bl);
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/*
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* Function which till call close on the underlying struct spi_flash_ctrl
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*/
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void flash_exit_close(struct blocklevel_device *bl, void (*close)(struct spi_flash_ctrl *ctrl));
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/* libflash sets the 4b mode automatically based on the flash
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* size and controller capabilities but it can be overriden
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*/
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int flash_force_4b_mode(struct flash_chip *c, bool enable_4b);
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/*
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* This provides a wapper around flash_read() on ECCed data. All params are
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* the same as to flash_read(). Not passing true in ecc is akin to calling
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* flash_read() directly.
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*
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* len is length of data without ecc attached therefore this will read beyond
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* pos + len.
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*/
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int flash_read_corrected(struct blocklevel_device *bl, uint32_t pos, void *buf,
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uint32_t len, bool ecc);
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/*
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* This provides a wrapper around flash_write() on ECCed data. All params are
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* the same as to flash_write(). Not passing true in ecc is akin to calling
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* flash_write() directly.
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*
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* size is length of data without ECC attached therefore this will write beyond
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* dst + size.
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*/
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int flash_write_corrected(struct blocklevel_device *bl, uint32_t dst, const void *src,
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uint32_t size, bool verify, bool ecc);
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/*
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* This provides a wrapper around flash_smart_write() on ECCed data. All
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* params are the same as to flash_smart_write(). Not passing true in ecc is
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* akin to calling flash_smart_write() directly.
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*
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* size is length of data without ECC attached therefore this will write beyond
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* dst + size.
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*/
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int flash_smart_write_corrected(struct blocklevel_device *bl, uint32_t dst, const void *src,
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uint32_t size, bool ecc);
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/* chip erase may not be supported by all chips/controllers, get ready
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* for FLASH_ERR_CHIP_ER_NOT_SUPPORTED
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*/
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int flash_erase_chip(struct flash_chip *c);
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#endif /* __LIBFLASH_H */
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