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Oliver O'Halloran
9b612fff55
Currently we assume any xscom_read / write targeted at a chipid with 0x8 as the top four bits is intended to be a centaur SCOM. On non-P8 platforms there is no reason to assume this so covert it to use the new struct scom_controller infrastructure. Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
39 lines
825 B
C
39 lines
825 B
C
// SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
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/* Copyright 2013-2016 IBM Corp. */
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#ifndef __CENTAUR_H
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#define __CENTAUR_H
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#include <stdint.h>
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#include <lock.h>
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#include <ccan/list/list.h>
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struct centaur_chip {
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bool valid;
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bool online;
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uint8_t ec_level;
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uint32_t part_id;
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uint32_t fsi_master_chip_id;
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uint32_t fsi_master_port;
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uint32_t fsi_master_engine;
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uint32_t scache_disable_count;
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bool scache_was_enabled;
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uint32_t error_count;
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struct lock lock;
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struct scom_controller scom;
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/* Used by hw/p8-i2c.c */
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struct list_head i2cms;
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};
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extern int64_t centaur_disable_sensor_cache(uint32_t part_id);
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extern int64_t centaur_enable_sensor_cache(uint32_t part_id);
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extern void centaur_init(void);
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extern struct centaur_chip *get_centaur(uint32_t part_id);
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#endif /* __CENTAUR_H */
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