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Joel Stanley 9c2808f237 xscom: Parse P10 ec revision 
Use a look up table to support the p9, p10dd1 and p10dd2 conversions.

Running on a Rainier:

> [  268.267370706,6] CPU: P10 generation processor (max 4 threads/core)
> [  268.267372501,7] CPU: Boot CPU PIR is 0x0460 PVR is 0x00801200

> [  268.284420384,5] CHIP: Chip ID 0000 type: P10 DD2.02
> [  268.284464084,5] CHIP: Chip ID 0002 type: P10 DD2.02
> [  268.284500468,5] CHIP: Chip ID 0004 type: P10 DD2.02
> [  268.284538166,5] CHIP: Chip ID 0006 type: P10 DD2.02
> [  268.286317879,5] PLAT: Detected Rainier platform

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Dan Horák <dan@danny.cz>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2022-05-23 10:21:04 -05:00
..
ast-bmc
flash: AST BMC endian fixes
2021-10-19 12:08:19 +05:30
fsp
Fix array-bound compilation warnings
2022-02-04 08:35:25 +01:00
ipmi
hw/ipmi: Fix misleading-indentation failures
2021-04-07 12:09:52 +05:30
test
hw/phys-map/p10: Add P10 MMIO map
2021-08-06 12:22:50 +05:30
bt.c
Fix lock error when BT IRQ preempt BT timer
2021-01-14 18:00:43 +05:30
cache-p9.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
capp.c
hw/phb5: Add initial support
2021-08-06 12:25:58 +05:30
centaur.c
hw/centaur: Convert to use the new scom API
2020-04-08 14:38:33 +10:00
chiptod.c
chiptod: properly zero TB SPR when cleaning up for invalid TB
2021-12-23 18:47:26 +01:00
dio-p9.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
dts.c
Initial POWER10 enablement
2021-08-06 11:51:25 +05:30
fake-nvram.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
fake-rtc.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
fsi-master.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
homer.c
Basic P10 stop state support
2021-08-06 11:51:25 +05:30
imc.c
hw/slw: split P8 specific code into its own file
2022-01-03 16:12:45 +01:00
lpc-mbox.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
lpc-port80h.c
hw/lpc: fix compilation error
2021-12-09 11:09:01 +01:00
lpc-rtc.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
lpc-uart.c
uart: Give SIMICS some more time
2021-05-28 17:19:40 +05:30
lpc.c
Initial POWER10 enablement
2021-08-06 11:51:25 +05:30
Makefile.inc
npu: Move npu.o and npu-hw-procedules.o under CONIFG_P8
2022-01-03 16:12:45 +01:00
npu2-common.c
hwprobe: convert PHB, NPU, PAU subsystems to hwprobe
2022-01-03 16:12:45 +01:00
npu2-hw-procedures.c
platform/mihawk: Tune equalization settings for opencapi
2020-05-26 14:30:29 +10:00
npu2-opencapi.c
pau: Add support for OpenCAPI Persistent Memory devices.
2021-10-19 12:26:02 +05:30
npu2.c
dt: Set new property length in dt_resize_property()
2020-06-30 12:07:23 +10:00
npu-hw-procedures.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
npu-opal.c
pau: Add support for OpenCAPI Persistent Memory devices.
2021-10-19 12:26:02 +05:30
npu.c
hwprobe: convert PHB, NPU, PAU subsystems to hwprobe
2022-01-03 16:12:45 +01:00
nx-842.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
nx-compress.c
NX: Set VAS RMA write BAR register on P10
2021-08-06 12:23:35 +05:30
nx-crypto.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
nx-gzip.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
nx-rng.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
nx.c
hwprobe: convert vas_init(), nx_init()
2022-01-03 16:12:45 +01:00
occ-sensor.c
occ: Add POWER10 support
2021-08-06 11:51:26 +05:30
occ.c
occ: Add POWER10 support
2021-08-06 11:51:26 +05:30
ocmb.c
hw/ocmb: Fix log message
2020-12-15 13:18:54 +05:30
p8-i2c.c
hw/p8-i2c: Add POWER10 support
2021-08-06 11:51:25 +05:30
pau-hw-procedures.c
pau: phy init
2021-10-19 12:26:01 +05:30
pau.c
hwprobe: convert PHB, NPU, PAU subsystems to hwprobe
2022-01-03 16:12:45 +01:00
phb3.c
hwprobe: convert PHB, NPU, PAU subsystems to hwprobe
2022-01-03 16:12:45 +01:00
phb4.c
hwprobe: convert PHB, NPU, PAU subsystems to hwprobe
2022-01-03 16:12:45 +01:00
phys-map.c
pau: Add support for OpenCAPI Persistent Memory devices.
2021-10-19 12:26:02 +05:30
prd.c
prd: Add base P10 support
2021-08-06 12:22:28 +05:30
psi.c
hw/psi-p10: Configure interrupt offset before notify addr
2021-08-06 12:28:15 +05:30
sbe-p8.c
SBE: create processor-independent timer APIs
2022-01-03 16:12:45 +01:00
sbe-p9.c
SBE: create processor-independent timer APIs
2022-01-03 16:12:45 +01:00
sbe.c
hw/slw: Move P8 bits behind CONFIG_P8
2022-01-03 16:12:45 +01:00
sfc-ctrl.c
Re-license IBM written files as Apache 2.0 OR GPLv2+
2020-03-12 20:33:18 +11:00
slw-p8.c
hw/slw: split P8 specific code into its own file
2022-01-03 16:12:45 +01:00
slw.c
hw/slw: split P8 specific code into its own file
2022-01-03 16:12:45 +01:00
vas.c
hwprobe: convert vas_init(), nx_init()
2022-01-03 16:12:45 +01:00
xive2.c
hw/slw: split P8 specific code into its own file
2022-01-03 16:12:45 +01:00
xive.c
hw/slw: split P8 specific code into its own file
2022-01-03 16:12:45 +01:00
xscom.c
xscom: Parse P10 ec revision
2022-05-23 10:21:04 -05:00