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synced 2026-03-06 15:25:10 -08:00
MIPS: Replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). remove_irq() has been replaced by free_irq() as well. There were build error's during previous version, couple of which was reported by kbuild test robot <lkp@intel.com> of which one was reported by Thomas Bogendoerfer <tsbogend@alpha.franken.de> as well. There were a few more issues including build errors, those also have been fixed. [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
committed by
Thomas Bogendoerfer
parent
792a402c28
commit
ac8fd122e0
@@ -72,13 +72,6 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = {
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.cpumask = cpu_possible_mask,
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};
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static struct irqaction au1x_rtcmatch2_irqaction = {
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.handler = au1x_rtcmatch2_irq,
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.flags = IRQF_TIMER,
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.name = "timer",
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.dev_id = &au1x_rtcmatch2_clockdev,
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};
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static int __init alchemy_time_init(unsigned int m2int)
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{
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struct clock_event_device *cd = &au1x_rtcmatch2_clockdev;
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@@ -130,7 +123,9 @@ static int __init alchemy_time_init(unsigned int m2int)
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cd->min_delta_ns = clockevent_delta2ns(9, cd);
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cd->min_delta_ticks = 9; /* ~0.28ms */
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clockevents_register_device(cd);
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setup_irq(m2int, &au1x_rtcmatch2_irqaction);
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if (request_irq(m2int, au1x_rtcmatch2_irq, IRQF_TIMER, "timer",
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&au1x_rtcmatch2_clockdev))
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pr_err("Failed to register timer interrupt\n");
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printk(KERN_INFO "Alchemy clocksource installed\n");
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@@ -83,12 +83,6 @@ static struct irq_chip ar7_sec_irq_type = {
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.irq_ack = ar7_ack_sec_irq,
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};
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static struct irqaction ar7_cascade_action = {
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.handler = no_action,
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.name = "AR7 cascade interrupt",
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.flags = IRQF_NO_THREAD,
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};
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static void __init ar7_irq_init(int base)
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{
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int i;
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@@ -116,8 +110,14 @@ static void __init ar7_irq_init(int base)
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handle_level_irq);
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}
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setup_irq(2, &ar7_cascade_action);
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setup_irq(ar7_irq_base, &ar7_cascade_action);
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if (request_irq(2, no_action, IRQF_NO_THREAD, "AR7 cascade interrupt",
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NULL))
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pr_err("Failed to request irq 2 (AR7 cascade interrupt)\n");
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if (request_irq(ar7_irq_base, no_action, IRQF_NO_THREAD,
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"AR7 cascade interrupt", NULL)) {
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pr_err("Failed to request irq %d (AR7 cascade interrupt)\n",
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ar7_irq_base);
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}
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set_c0_status(IE_IRQ0);
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}
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@@ -64,11 +64,6 @@ static irqreturn_t ar2315_ahb_err_handler(int cpl, void *dev_id)
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return IRQ_HANDLED;
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}
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static struct irqaction ar2315_ahb_err_interrupt = {
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.handler = ar2315_ahb_err_handler,
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.name = "ar2315-ahb-error",
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};
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static void ar2315_misc_irq_handler(struct irq_desc *desc)
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{
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u32 pending = ar2315_rst_reg_read(AR2315_ISR) &
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@@ -159,7 +154,9 @@ void __init ar2315_arch_init_irq(void)
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panic("Failed to add IRQ domain");
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irq = irq_create_mapping(domain, AR2315_MISC_IRQ_AHB);
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setup_irq(irq, &ar2315_ahb_err_interrupt);
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if (request_irq(irq, ar2315_ahb_err_handler, 0, "ar2315-ahb-error",
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NULL))
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pr_err("Failed to register ar2315-ahb-error interrupt\n");
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irq_set_chained_handler_and_data(AR2315_IRQ_MISC,
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ar2315_misc_irq_handler, domain);
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@@ -68,11 +68,6 @@ static irqreturn_t ar5312_ahb_err_handler(int cpl, void *dev_id)
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return IRQ_HANDLED;
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}
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static struct irqaction ar5312_ahb_err_interrupt = {
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.handler = ar5312_ahb_err_handler,
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.name = "ar5312-ahb-error",
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};
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static void ar5312_misc_irq_handler(struct irq_desc *desc)
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{
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u32 pending = ar5312_rst_reg_read(AR5312_ISR) &
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@@ -154,7 +149,9 @@ void __init ar5312_arch_init_irq(void)
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panic("Failed to add IRQ domain");
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irq = irq_create_mapping(domain, AR5312_MISC_IRQ_AHB_PROC);
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setup_irq(irq, &ar5312_ahb_err_interrupt);
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if (request_irq(irq, ar5312_ahb_err_handler, 0, "ar5312-ahb-error",
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NULL))
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pr_err("Failed to register ar5312-ahb-error interrupt\n");
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irq_set_chained_handler_and_data(AR5312_IRQ_MISC,
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ar5312_misc_irq_handler, domain);
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@@ -399,26 +399,6 @@ static struct irq_chip bcm63xx_external_irq_chip = {
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.irq_set_type = bcm63xx_external_irq_set_type,
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};
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static struct irqaction cpu_ip2_cascade_action = {
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.handler = no_action,
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.name = "cascade_ip2",
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.flags = IRQF_NO_THREAD,
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};
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#ifdef CONFIG_SMP
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static struct irqaction cpu_ip3_cascade_action = {
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.handler = no_action,
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.name = "cascade_ip3",
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.flags = IRQF_NO_THREAD,
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};
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#endif
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static struct irqaction cpu_ext_cascade_action = {
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.handler = no_action,
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.name = "cascade_extirq",
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.flags = IRQF_NO_THREAD,
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};
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static void bcm63xx_init_irq(void)
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{
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int irq_bits;
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@@ -531,7 +511,7 @@ static void bcm63xx_init_irq(void)
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void __init arch_init_irq(void)
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{
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int i;
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int i, irq;
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bcm63xx_init_irq();
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mips_cpu_irq_init();
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@@ -544,14 +524,25 @@ void __init arch_init_irq(void)
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handle_edge_irq);
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if (!is_ext_irq_cascaded) {
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for (i = 3; i < 3 + ext_irq_count; ++i)
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setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
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for (i = 3; i < 3 + ext_irq_count; ++i) {
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irq = MIPS_CPU_IRQ_BASE + i;
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if (request_irq(irq, no_action, IRQF_NO_THREAD,
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"cascade_extirq", NULL)) {
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pr_err("Failed to request irq %d (cascade_extirq)\n",
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irq);
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}
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}
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}
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setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
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irq = MIPS_CPU_IRQ_BASE + 2;
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if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade_ip2", NULL))
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pr_err("Failed to request irq %d (cascade_ip2)\n", irq);
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#ifdef CONFIG_SMP
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if (is_ext_irq_cascaded) {
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setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
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irq = MIPS_CPU_IRQ_BASE + 3;
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if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade_ip3",
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NULL))
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pr_err("Failed to request irq %d (cascade_ip3)\n", irq);
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bcm63xx_internal_irq_chip.irq_set_affinity =
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bcm63xx_internal_set_affinity;
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@@ -45,18 +45,20 @@ asmlinkage void plat_irq_dispatch(void)
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spurious_interrupt();
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}
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static struct irqaction cascade = {
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.handler = no_action,
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.name = "cascade",
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.flags = IRQF_NO_THREAD,
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};
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void __init arch_init_irq(void)
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{
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mips_cpu_irq_init();
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gt641xx_irq_init();
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init_i8259_irqs();
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setup_irq(GT641XX_CASCADE_IRQ, &cascade);
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setup_irq(I8259_CASCADE_IRQ, &cascade);
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if (request_irq(GT641XX_CASCADE_IRQ, no_action, IRQF_NO_THREAD,
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"cascade", NULL)) {
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pr_err("Failed to request irq %d (cascade)\n",
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GT641XX_CASCADE_IRQ);
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}
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if (request_irq(I8259_CASCADE_IRQ, no_action, IRQF_NO_THREAD,
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"cascade", NULL)) {
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pr_err("Failed to request irq %d (cascade)\n",
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I8259_CASCADE_IRQ);
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}
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}
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@@ -103,28 +103,8 @@ int_ptr asic_mask_nr_tbl[DEC_MAX_ASIC_INTS][2] = {
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int cpu_fpu_mask = DEC_CPU_IRQ_MASK(DEC_CPU_INR_FPU);
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int *fpu_kstat_irq;
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static struct irqaction ioirq = {
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.handler = no_action,
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.name = "cascade",
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.flags = IRQF_NO_THREAD,
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};
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static struct irqaction fpuirq = {
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.handler = no_action,
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.name = "fpu",
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.flags = IRQF_NO_THREAD,
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};
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static struct irqaction busirq = {
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.name = "bus error",
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.flags = IRQF_NO_THREAD,
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};
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static struct irqaction haltirq = {
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.handler = dec_intr_halt,
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.name = "halt",
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.flags = IRQF_NO_THREAD,
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};
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static irq_handler_t busirq_handler;
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static unsigned int busirq_flags = IRQF_NO_THREAD;
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/*
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* Bus error (DBE/IBE exceptions and bus interrupts) handling setup.
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@@ -134,21 +114,21 @@ static void __init dec_be_init(void)
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switch (mips_machtype) {
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case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */
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board_be_handler = dec_kn01_be_handler;
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busirq.handler = dec_kn01_be_interrupt;
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busirq.flags |= IRQF_SHARED;
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busirq_handler = dec_kn01_be_interrupt;
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busirq_flags |= IRQF_SHARED;
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dec_kn01_be_init();
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break;
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case MACH_DS5000_1XX: /* DS5000/1xx 3min */
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case MACH_DS5000_XX: /* DS5000/xx Maxine */
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board_be_handler = dec_kn02xa_be_handler;
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busirq.handler = dec_kn02xa_be_interrupt;
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busirq_handler = dec_kn02xa_be_interrupt;
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dec_kn02xa_be_init();
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break;
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case MACH_DS5000_200: /* DS5000/200 3max */
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case MACH_DS5000_2X0: /* DS5000/240 3max+ */
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case MACH_DS5900: /* DS5900 bigmax */
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board_be_handler = dec_ecc_be_handler;
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busirq.handler = dec_ecc_be_interrupt;
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busirq_handler = dec_ecc_be_interrupt;
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dec_ecc_be_init();
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break;
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}
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@@ -764,20 +744,29 @@ void __init arch_init_irq(void)
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int irq_fpu;
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irq_fpu = dec_interrupt[DEC_IRQ_FPU];
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setup_irq(irq_fpu, &fpuirq);
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if (request_irq(irq_fpu, no_action, IRQF_NO_THREAD, "fpu",
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NULL))
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pr_err("Failed to register fpu interrupt\n");
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desc_fpu = irq_to_desc(irq_fpu);
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fpu_kstat_irq = this_cpu_ptr(desc_fpu->kstat_irqs);
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}
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if (dec_interrupt[DEC_IRQ_CASCADE] >= 0)
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setup_irq(dec_interrupt[DEC_IRQ_CASCADE], &ioirq);
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if (dec_interrupt[DEC_IRQ_CASCADE] >= 0) {
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if (request_irq(dec_interrupt[DEC_IRQ_CASCADE], no_action,
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IRQF_NO_THREAD, "cascade", NULL))
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pr_err("Failed to register cascade interrupt\n");
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}
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/* Register the bus error interrupt. */
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if (dec_interrupt[DEC_IRQ_BUS] >= 0 && busirq.handler)
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setup_irq(dec_interrupt[DEC_IRQ_BUS], &busirq);
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if (dec_interrupt[DEC_IRQ_BUS] >= 0 && busirq_handler) {
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if (request_irq(dec_interrupt[DEC_IRQ_BUS], busirq_handler,
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busirq_flags, "bus error", NULL))
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pr_err("Failed to register bus error interrupt\n");
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}
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/* Register the HALT interrupt. */
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if (dec_interrupt[DEC_IRQ_HALT] >= 0)
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setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq);
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if (dec_interrupt[DEC_IRQ_HALT] >= 0) {
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if (request_irq(dec_interrupt[DEC_IRQ_HALT], dec_intr_halt,
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IRQF_NO_THREAD, "halt", NULL))
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pr_err("Failed to register halt interrupt\n");
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}
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}
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asmlinkage unsigned int dec_irq_dispatch(unsigned int irq)
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@@ -153,14 +153,6 @@ void emma2rh_gpio_irq_init(void)
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handle_edge_irq, "edge");
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}
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static struct irqaction irq_cascade = {
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.handler = no_action,
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.flags = IRQF_NO_THREAD,
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.name = "cascade",
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.dev_id = NULL,
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.next = NULL,
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};
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/*
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* the first level int-handler will jump here if it is a emma2rh irq
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*/
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@@ -236,6 +228,7 @@ void emma2rh_irq_dispatch(void)
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void __init arch_init_irq(void)
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{
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u32 reg;
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int irq;
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/* by default, interrupts are disabled. */
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emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
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@@ -272,9 +265,15 @@ void __init arch_init_irq(void)
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mips_cpu_irq_init();
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/* setup cascade interrupts */
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setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
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setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
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setup_irq(MIPS_CPU_IRQ_BASE + 2, &irq_cascade);
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irq = EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE;
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if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL))
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pr_err("Failed to request irq %d (cascade)\n", irq);
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irq = EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE;
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if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL))
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pr_err("Failed to request irq %d (cascade)\n", irq);
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irq = MIPS_CPU_IRQ_BASE + 2;
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if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL))
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pr_err("Failed to request irq %d (cascade)\n", irq);
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}
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asmlinkage void plat_irq_dispatch(void)
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@@ -11,6 +11,8 @@
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#ifndef __ASM_SNI_H
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#define __ASM_SNI_H
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#include <linux/irqreturn.h>
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extern unsigned int sni_brd_type;
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#define SNI_BRD_10 2
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@@ -239,6 +241,6 @@ static inline int sni_eisa_root_init(void)
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/* common irq stuff */
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extern void (*sni_hwint)(void);
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extern struct irqaction sni_isa_irq;
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extern irqreturn_t sni_isa_irq_handler(int dummy, void *p);
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#endif /* __ASM_SNI_H */
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@@ -125,24 +125,18 @@ static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static struct irqaction r4030_timer_irqaction = {
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.handler = r4030_timer_interrupt,
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.flags = IRQF_TIMER,
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.name = "R4030 timer",
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};
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void __init plat_time_init(void)
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{
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struct clock_event_device *cd = &r4030_clockevent;
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struct irqaction *action = &r4030_timer_irqaction;
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unsigned int cpu = smp_processor_id();
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BUG_ON(HZ != 100);
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cd->cpumask = cpumask_of(cpu);
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clockevents_register_device(cd);
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action->dev_id = cd;
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setup_irq(JAZZ_TIMER_IRQ, action);
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if (request_irq(JAZZ_TIMER_IRQ, r4030_timer_interrupt, IRQF_TIMER,
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"R4030 timer", cd))
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pr_err("Failed to register R4030 timer interrupt\n");
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/*
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* Set clock to 100Hz.
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@@ -91,16 +91,15 @@ static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
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}
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static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent);
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static DEFINE_PER_CPU(struct irqaction, sibyte_hpt_irqaction);
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static DEFINE_PER_CPU(char [18], sibyte_hpt_name);
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void sb1480_clockevent_init(void)
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{
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unsigned int cpu = smp_processor_id();
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unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu;
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struct irqaction *action = &per_cpu(sibyte_hpt_irqaction, cpu);
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struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu);
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unsigned char *name = per_cpu(sibyte_hpt_name, cpu);
|
||||
unsigned long flags = IRQF_PERCPU | IRQF_TIMER;
|
||||
|
||||
BUG_ON(cpu > 3); /* Only have 4 general purpose timers */
|
||||
|
||||
@@ -133,11 +132,7 @@ void sb1480_clockevent_init(void)
|
||||
|
||||
bcm1480_unmask_irq(cpu, irq);
|
||||
|
||||
action->handler = sibyte_counter_handler;
|
||||
action->flags = IRQF_PERCPU | IRQF_TIMER;
|
||||
action->name = name;
|
||||
action->dev_id = cd;
|
||||
|
||||
irq_set_affinity(irq, cpumask_of(cpu));
|
||||
setup_irq(irq, action);
|
||||
if (request_irq(irq, sibyte_counter_handler, flags, name, cd))
|
||||
pr_err("Failed to request irq %d (%s)\n", irq, name);
|
||||
}
|
||||
|
||||
@@ -100,14 +100,9 @@ static irqreturn_t ds1287_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction ds1287_irqaction = {
|
||||
.handler = ds1287_interrupt,
|
||||
.flags = IRQF_PERCPU | IRQF_TIMER,
|
||||
.name = "ds1287",
|
||||
};
|
||||
|
||||
int __init ds1287_clockevent_init(int irq)
|
||||
{
|
||||
unsigned long flags = IRQF_PERCPU | IRQF_TIMER;
|
||||
struct clock_event_device *cd;
|
||||
|
||||
cd = &ds1287_clockevent;
|
||||
@@ -122,5 +117,5 @@ int __init ds1287_clockevent_init(int irq)
|
||||
|
||||
clockevents_register_device(&ds1287_clockevent);
|
||||
|
||||
return setup_irq(irq, &ds1287_irqaction);
|
||||
return request_irq(irq, ds1287_interrupt, flags, "ds1287", NULL);
|
||||
}
|
||||
|
||||
@@ -120,12 +120,6 @@ static irqreturn_t gt641xx_timer0_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction gt641xx_timer0_irqaction = {
|
||||
.handler = gt641xx_timer0_interrupt,
|
||||
.flags = IRQF_PERCPU | IRQF_TIMER,
|
||||
.name = "gt641xx_timer0",
|
||||
};
|
||||
|
||||
static int __init gt641xx_timer0_clockevent_init(void)
|
||||
{
|
||||
struct clock_event_device *cd;
|
||||
@@ -146,6 +140,7 @@ static int __init gt641xx_timer0_clockevent_init(void)
|
||||
|
||||
clockevents_register_device(>641xx_timer0_clockevent);
|
||||
|
||||
return setup_irq(GT641XX_TIMER0_IRQ, >641xx_timer0_irqaction);
|
||||
return request_irq(GT641XX_TIMER0_IRQ, gt641xx_timer0_interrupt,
|
||||
IRQF_PERCPU | IRQF_TIMER, "gt641xx_timer0", NULL);
|
||||
}
|
||||
arch_initcall(gt641xx_timer0_clockevent_init);
|
||||
|
||||
@@ -252,6 +252,7 @@ unsigned int __weak get_c0_compare_int(void)
|
||||
|
||||
int r4k_clockevent_init(void)
|
||||
{
|
||||
unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED;
|
||||
unsigned int cpu = smp_processor_id();
|
||||
struct clock_event_device *cd;
|
||||
unsigned int irq, min_delta;
|
||||
@@ -291,7 +292,8 @@ int r4k_clockevent_init(void)
|
||||
|
||||
cp0_timer_irq_installed = 1;
|
||||
|
||||
setup_irq(irq, &c0_compare_irqaction);
|
||||
if (request_irq(irq, c0_compare_interrupt, flags, "timer", NULL))
|
||||
pr_err("Failed to request irq %d (timer)\n", irq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -90,16 +90,15 @@ static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
|
||||
}
|
||||
|
||||
static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent);
|
||||
static DEFINE_PER_CPU(struct irqaction, sibyte_hpt_irqaction);
|
||||
static DEFINE_PER_CPU(char [18], sibyte_hpt_name);
|
||||
|
||||
void sb1250_clockevent_init(void)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
unsigned int irq = K_INT_TIMER_0 + cpu;
|
||||
struct irqaction *action = &per_cpu(sibyte_hpt_irqaction, cpu);
|
||||
struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu);
|
||||
unsigned char *name = per_cpu(sibyte_hpt_name, cpu);
|
||||
unsigned long flags = IRQF_PERCPU | IRQF_TIMER;
|
||||
|
||||
/* Only have 4 general purpose timers, and we use last one as hpt */
|
||||
BUG_ON(cpu > 2);
|
||||
@@ -133,11 +132,7 @@ void sb1250_clockevent_init(void)
|
||||
|
||||
sb1250_unmask_irq(cpu, irq);
|
||||
|
||||
action->handler = sibyte_counter_handler;
|
||||
action->flags = IRQF_PERCPU | IRQF_TIMER;
|
||||
action->name = name;
|
||||
action->dev_id = cd;
|
||||
|
||||
irq_set_affinity(irq, cpumask_of(cpu));
|
||||
setup_irq(irq, action);
|
||||
if (request_irq(irq, sibyte_counter_handler, flags, name, cd))
|
||||
pr_err("Failed to request irq %d (%s)\n", irq, name);
|
||||
}
|
||||
|
||||
@@ -174,13 +174,6 @@ static irqreturn_t txx9tmr_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction txx9tmr_irq = {
|
||||
.handler = txx9tmr_interrupt,
|
||||
.flags = IRQF_PERCPU | IRQF_TIMER,
|
||||
.name = "txx9tmr",
|
||||
.dev_id = &txx9_clock_event_device,
|
||||
};
|
||||
|
||||
void __init txx9_clockevent_init(unsigned long baseaddr, int irq,
|
||||
unsigned int imbusclk)
|
||||
{
|
||||
@@ -202,7 +195,9 @@ void __init txx9_clockevent_init(unsigned long baseaddr, int irq,
|
||||
cd->irq = irq;
|
||||
cd->cpumask = cpumask_of(0),
|
||||
clockevents_register_device(cd);
|
||||
setup_irq(irq, &txx9tmr_irq);
|
||||
if (request_irq(irq, txx9tmr_interrupt, IRQF_PERCPU | IRQF_TIMER,
|
||||
"txx9tmr", &txx9_clock_event_device))
|
||||
pr_err("Failed to request irq %d (txx9tmr)\n", irq);
|
||||
printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n",
|
||||
baseaddr, irq);
|
||||
}
|
||||
|
||||
@@ -18,16 +18,13 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction irq0 = {
|
||||
.handler = timer_interrupt,
|
||||
.flags = IRQF_NOBALANCING | IRQF_TIMER,
|
||||
.name = "timer"
|
||||
};
|
||||
|
||||
void __init setup_pit_timer(void)
|
||||
{
|
||||
unsigned long flags = IRQF_NOBALANCING | IRQF_TIMER;
|
||||
|
||||
clockevent_i8253_init(true);
|
||||
setup_irq(0, &irq0);
|
||||
if (request_irq(0, timer_interrupt, flags, "timer", NULL))
|
||||
pr_err("Failed to request irq 0 (timer)\n");
|
||||
}
|
||||
|
||||
static int __init init_pit_clocksource(void)
|
||||
|
||||
@@ -51,11 +51,6 @@ static irqreturn_t rtlx_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction rtlx_irq = {
|
||||
.handler = rtlx_interrupt,
|
||||
.name = "RTLX",
|
||||
};
|
||||
|
||||
static int rtlx_irq_num = MIPS_CPU_IRQ_BASE + MIPS_CPU_RTLX_IRQ;
|
||||
|
||||
void _interrupt_sp(void)
|
||||
@@ -124,8 +119,7 @@ int __init rtlx_module_init(void)
|
||||
goto out_class;
|
||||
}
|
||||
|
||||
rtlx_irq.dev_id = rtlx;
|
||||
err = setup_irq(rtlx_irq_num, &rtlx_irq);
|
||||
err = request_irq(rtlx_irq_num, rtlx_interrupt, 0, "RTLX", rtlx);
|
||||
if (err)
|
||||
goto out_class;
|
||||
|
||||
|
||||
@@ -207,25 +207,13 @@ static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction irq_resched = {
|
||||
.handler = ipi_resched_interrupt,
|
||||
.flags = IRQF_PERCPU,
|
||||
.name = "IPI resched"
|
||||
};
|
||||
|
||||
static struct irqaction irq_call = {
|
||||
.handler = ipi_call_interrupt,
|
||||
.flags = IRQF_PERCPU,
|
||||
.name = "IPI call"
|
||||
};
|
||||
|
||||
static void smp_ipi_init_one(unsigned int virq,
|
||||
struct irqaction *action)
|
||||
static void smp_ipi_init_one(unsigned int virq, const char *name,
|
||||
irq_handler_t handler)
|
||||
{
|
||||
int ret;
|
||||
|
||||
irq_set_handler(virq, handle_percpu_irq);
|
||||
ret = setup_irq(virq, action);
|
||||
ret = request_irq(virq, handler, IRQF_PERCPU, name, NULL);
|
||||
BUG_ON(ret);
|
||||
}
|
||||
|
||||
@@ -278,12 +266,15 @@ int mips_smp_ipi_allocate(const struct cpumask *mask)
|
||||
int cpu;
|
||||
|
||||
for_each_cpu(cpu, mask) {
|
||||
smp_ipi_init_one(call_virq + cpu, &irq_call);
|
||||
smp_ipi_init_one(sched_virq + cpu, &irq_resched);
|
||||
smp_ipi_init_one(call_virq + cpu, "IPI call",
|
||||
ipi_call_interrupt);
|
||||
smp_ipi_init_one(sched_virq + cpu, "IPI resched",
|
||||
ipi_resched_interrupt);
|
||||
}
|
||||
} else {
|
||||
smp_ipi_init_one(call_virq, &irq_call);
|
||||
smp_ipi_init_one(sched_virq, &irq_resched);
|
||||
smp_ipi_init_one(call_virq, "IPI call", ipi_call_interrupt);
|
||||
smp_ipi_init_one(sched_virq, "IPI resched",
|
||||
ipi_resched_interrupt);
|
||||
}
|
||||
|
||||
return 0;
|
||||
@@ -311,8 +302,8 @@ int mips_smp_ipi_free(const struct cpumask *mask)
|
||||
int cpu;
|
||||
|
||||
for_each_cpu(cpu, mask) {
|
||||
remove_irq(call_virq + cpu, &irq_call);
|
||||
remove_irq(sched_virq + cpu, &irq_resched);
|
||||
free_irq(call_virq + cpu, NULL);
|
||||
free_irq(sched_virq + cpu, NULL);
|
||||
}
|
||||
}
|
||||
irq_destroy_ipi(call_virq, mask);
|
||||
|
||||
@@ -90,14 +90,9 @@ asmlinkage void plat_irq_dispatch(void)
|
||||
}
|
||||
}
|
||||
|
||||
static struct irqaction cascade = {
|
||||
.handler = no_action,
|
||||
.name = "cascade",
|
||||
.flags = IRQF_NO_THREAD,
|
||||
};
|
||||
|
||||
void __init arch_init_irq(void)
|
||||
{
|
||||
int irq = LASAT_CASCADE_IRQ;
|
||||
int i;
|
||||
|
||||
if (IS_LASAT_200()) {
|
||||
@@ -119,5 +114,6 @@ void __init arch_init_irq(void)
|
||||
for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++)
|
||||
irq_set_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
|
||||
|
||||
setup_irq(LASAT_CASCADE_IRQ, &cascade);
|
||||
if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL))
|
||||
pr_err("Failed to request irq %d (cascade)\n", irq);
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user