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Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (41 commits) PCI: fix pci_ioremap_bar() on s390 PCI: fix AER capability check PCI: use pci_find_ext_capability everywhere PCI: remove #ifdef DEBUG around dev_dbg call PCI hotplug: fix get_##name return value problem PCI: document the pcie_aspm kernel parameter PCI: introduce an pci_ioremap(pdev, barnr) function powerpc/PCI: Add legacy PCI access via sysfs PCI: Add ability to mmap legacy_io on some platforms PCI: probing debug message uniformization PCI: support PCIe ARI capability PCI: centralize the capabilities code in probe.c PCI: centralize the capabilities code in pci-sysfs.c PCI: fix 64-vbit prefetchable memory resource BARs PCI: replace cfg space size (256/4096) by macros. PCI: use resource_size() everywhere. PCI: use same arg names in PCI_VDEVICE comment PCI hotplug: rpaphp: make debug var unique PCI: use %pF instead of print_fn_descriptor_symbol() in quirks.c PCI: fix hotplug get_##name return value problem ...
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@@ -10,7 +10,6 @@
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#if defined(CONFIG_PCIEAER)
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/* pci-e port driver needs this function to enable aer */
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extern int pci_enable_pcie_error_reporting(struct pci_dev *dev);
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extern int pci_find_aer_capability(struct pci_dev *dev);
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extern int pci_disable_pcie_error_reporting(struct pci_dev *dev);
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extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
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#else
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@@ -18,10 +17,6 @@ static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
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{
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return -EINVAL;
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}
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static inline int pci_find_aer_capability(struct pci_dev *dev)
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{
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return 0;
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}
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static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev)
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{
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return -EINVAL;
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@@ -214,6 +214,7 @@ struct pci_dev {
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unsigned int broken_parity_status:1; /* Device generates false positive parity */
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unsigned int msi_enabled:1;
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unsigned int msix_enabled:1;
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unsigned int ari_enabled:1; /* ARI forwarding */
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unsigned int is_managed:1;
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unsigned int is_pcie:1;
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pci_dev_flags_t dev_flags;
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@@ -347,7 +348,6 @@ struct pci_bus_region {
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struct pci_dynids {
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spinlock_t lock; /* protects list, index */
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struct list_head list; /* for IDs added at runtime */
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unsigned int use_driver_data:1; /* pci_device_id->driver_data is used */
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};
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/* ---------------------------------------------------------------- */
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@@ -456,8 +456,8 @@ struct pci_driver {
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/**
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* PCI_VDEVICE - macro used to describe a specific pci device in short form
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* @vend: the vendor name
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* @dev: the 16 bit PCI Device ID
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* @vendor: the vendor name
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* @device: the 16 bit PCI Device ID
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*
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* This macro is used to create a struct pci_device_id that matches a
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* specific PCI device. The subvendor, and subdevice fields will be set
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@@ -645,6 +645,7 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
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bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
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void pci_pme_active(struct pci_dev *dev, bool enable);
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int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
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int pci_wake_from_d3(struct pci_dev *dev, bool enable);
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pci_power_t pci_target_state(struct pci_dev *dev);
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int pci_prepare_to_sleep(struct pci_dev *dev);
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int pci_back_from_sleep(struct pci_dev *dev);
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@@ -1118,5 +1119,20 @@ static inline void pci_mmcfg_early_init(void) { }
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static inline void pci_mmcfg_late_init(void) { }
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#endif
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#ifdef CONFIG_HAS_IOMEM
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static inline void * pci_ioremap_bar(struct pci_dev *pdev, int bar)
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{
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/*
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* Make sure the BAR is actually a memory resource, not an IO resource
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*/
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if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
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WARN_ON(1);
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return NULL;
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}
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return ioremap_nocache(pci_resource_start(pdev, bar),
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pci_resource_len(pdev, bar));
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}
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#endif
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#endif /* __KERNEL__ */
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#endif /* LINUX_PCI_H */
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@@ -2454,9 +2454,9 @@
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#define PCI_DEVICE_ID_INTEL_ICH10_3 0x3a1a
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#define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30
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#define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60
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#define PCI_DEVICE_ID_INTEL_PCH_0 0x3b10
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#define PCI_DEVICE_ID_INTEL_PCH_1 0x3b11
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#define PCI_DEVICE_ID_INTEL_PCH_2 0x3b30
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#define PCI_DEVICE_ID_INTEL_PCH_LPC_MIN 0x3b00
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#define PCI_DEVICE_ID_INTEL_PCH_LPC_MAX 0x3b1f
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#define PCI_DEVICE_ID_INTEL_PCH_SMBUS 0x3b30
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#define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f
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#define PCI_DEVICE_ID_INTEL_5100_16 0x65f0
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#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5
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@@ -419,6 +419,10 @@
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#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
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#define PCI_EXP_RTCAP 30 /* Root Capabilities */
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#define PCI_EXP_RTSTA 32 /* Root Status */
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#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
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#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
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#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
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#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
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/* Extended Capabilities (PCI-X 2.0 and Express) */
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#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
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@@ -429,6 +433,7 @@
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#define PCI_EXT_CAP_ID_VC 2
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#define PCI_EXT_CAP_ID_DSN 3
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#define PCI_EXT_CAP_ID_PWR 4
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#define PCI_EXT_CAP_ID_ARI 14
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/* Advanced Error Reporting */
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#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
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@@ -536,5 +541,14 @@
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#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */
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#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */
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/* Alternative Routing-ID Interpretation */
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#define PCI_ARI_CAP 0x04 /* ARI Capability Register */
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#define PCI_ARI_CAP_MFVC 0x0001 /* MFVC Function Groups Capability */
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#define PCI_ARI_CAP_ACS 0x0002 /* ACS Function Groups Capability */
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#define PCI_ARI_CAP_NFN(x) (((x) >> 8) & 0xff) /* Next Function Number */
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#define PCI_ARI_CTRL 0x06 /* ARI Control Register */
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#define PCI_ARI_CTRL_MFVC 0x0001 /* MFVC Function Groups Enable */
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#define PCI_ARI_CTRL_ACS 0x0002 /* ACS Function Groups Enable */
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#define PCI_ARI_CTRL_FG(x) (((x) >> 4) & 7) /* Function Group */
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#endif /* LINUX_PCI_REGS_H */
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