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Merge tag 'xtensa-20220325' of https://github.com/jcmvbkbc/linux-xtensa

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Pull Xtensa updates from Max Filippov:

 - remove dependency on the compiler's libgcc

 - allow selection of internal kernel ABI via Kconfig

 - enable compiler plugins support for gcc-12 or newer

 - various minor cleanups and fixes

* tag 'xtensa-20220325' of https://github.com/jcmvbkbc/linux-xtensa:
  xtensa: define update_mmu_tlb function
  xtensa: fix xtensa_wsr always writing 0
  xtensa: enable plugin support
  xtensa: clean up kernel exit assembly code
  xtensa: rearrange NMI exit path
  xtensa: merge stack alignment definitions
  xtensa: fix DTC warning unit_address_format
  xtensa: fix stop_machine_cpuslocked call in patch_text
  xtensa: make secondary reset vector support conditional
  xtensa: add kernel ABI selection to Kconfig
  xtensa: don't link with libgcc
  xtensa: add helpers for division, remainder and shifts
  xtensa: add missing XCHAL_HAVE_WINDOWED check
  xtensa: use XCHAL_NUM_AREGS as pt_regs::areg size
  xtensa: rename PT_SIZE to PT_KERNEL_SIZE
  xtensa: Remove unused early_read_config_byte() et al declarations
  xtensa: use strscpy to copy strings
  net: xtensa: use strscpy to copy strings
This commit is contained in:
Linus Torvalds
2022-03-25 09:49:39 -07:00
parent 1f1c153e40 1c4664faa3
commit 744465da70
32 changed files with 676 additions and 114 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/xtensa/include/asm/asmmacro.h
+33 -1
View File
@@ -191,7 +191,39 @@
#endif
.endm
#define XTENSA_STACK_ALIGNMENT 16
.macro do_nsau cnt, val, tmp, a
#if XCHAL_HAVE_NSA
nsau \cnt, \val
#else
mov \a, \val
movi \cnt, 0
extui \tmp, \a, 16, 16
bnez \tmp, 0f
movi \cnt, 16
slli \a, \a, 16
0:
extui \tmp, \a, 24, 8
bnez \tmp, 1f
addi \cnt, \cnt, 8
slli \a, \a, 8
1:
movi \tmp, __nsau_data
extui \a, \a, 24, 8
add \tmp, \tmp, \a
l8ui \tmp, \tmp, 0
add \cnt, \cnt, \tmp
#endif /* !XCHAL_HAVE_NSA */
.endm
.macro do_abs dst, src, tmp
#if XCHAL_HAVE_ABS
abs \dst, \src
#else
neg \tmp, \src
movgez \tmp, \src, \src
mov \dst, \tmp
#endif
.endm
#if defined(__XTENSA_WINDOWED_ABI__)
arch/xtensa/include/asm/core.h
+7
View File
@@ -37,4 +37,11 @@
#endif
#endif
/* Xtensa ABI requires stack alignment to be at least 16 */
#if XCHAL_DATA_WIDTH > 16
#define XTENSA_STACK_ALIGNMENT XCHAL_DATA_WIDTH
#else
#define XTENSA_STACK_ALIGNMENT 16
#endif
#endif
arch/xtensa/include/asm/pci-bridge.h
-9
View File
@@ -73,13 +73,4 @@ static inline void pcibios_init_resource(struct resource *res,
res->child = NULL;
}
/* These are used for config access before all the PCI probing has been done. */
int early_read_config_byte(struct pci_controller*, int, int, int, u8*);
int early_read_config_word(struct pci_controller*, int, int, int, u16*);
int early_read_config_dword(struct pci_controller*, int, int, int, u32*);
int early_write_config_byte(struct pci_controller*, int, int, int, u8);
int early_write_config_word(struct pci_controller*, int, int, int, u16);
int early_write_config_dword(struct pci_controller*, int, int, int, u32);
#endif /* _XTENSA_PCI_BRIDGE_H */
arch/xtensa/include/asm/pgtable.h
+4
View File
@@ -412,6 +412,10 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
typedef pte_t *pte_addr_t;
void update_mmu_tlb(struct vm_area_struct *vma,
unsigned long address, pte_t *ptep);
#define __HAVE_ARCH_UPDATE_MMU_TLB
#endif /* !defined (__ASSEMBLY__) */
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
arch/xtensa/include/asm/processor.h
+3 -7
View File
@@ -18,11 +18,7 @@
#include <asm/types.h>
#include <asm/regs.h>
/* Xtensa ABI requires stack alignment to be at least 16 */
#define STACK_ALIGN (XCHAL_DATA_WIDTH > 16 ? XCHAL_DATA_WIDTH : 16)
#define ARCH_SLAB_MINALIGN STACK_ALIGN
#define ARCH_SLAB_MINALIGN XTENSA_STACK_ALIGNMENT
/*
* User space process size: 1 GB.
@@ -239,8 +235,8 @@ extern unsigned long __get_wchan(struct task_struct *p);
#define xtensa_set_sr(x, sr) \
({ \
unsigned int v = (unsigned int)(x); \
__asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \
__asm__ __volatile__ ("wsr %0, "__stringify(sr) :: \
"a"((unsigned int)(x))); \
})
#define xtensa_get_sr(sr) \
arch/xtensa/include/asm/ptrace.h
+3 -4
View File
@@ -44,6 +44,7 @@
#ifndef __ASSEMBLY__
#include <asm/coprocessor.h>
#include <asm/core.h>
/*
* This struct defines the way the registers are stored on the
@@ -77,14 +78,12 @@ struct pt_regs {
/* current register frame.
* Note: The ESF for kernel exceptions ends after 16 registers!
*/
unsigned long areg[16];
unsigned long areg[XCHAL_NUM_AREGS];
};
#include <asm/core.h>
# define arch_has_single_step() (1)
# define task_pt_regs(tsk) ((struct pt_regs*) \
(task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1)
(task_stack_page(tsk) + KERNEL_STACK_SIZE) - 1)
# define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
# define instruction_pointer(regs) ((regs)->pc)
# define return_pointer(regs) (MAKE_PC_FROM_RA((regs)->areg[0], \