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synced 2026-03-06 15:25:10 -08:00
ide: add struct ide_dma_ops (take 3)
Add struct ide_dma_ops and convert core code + drivers to use it.
While at it:
* Drop "ide_" prefix from ->ide_dma_end and ->ide_dma_test_irq methods.
* Drop "ide_" "infixes" from DMA methods.
* au1xxx-ide.c:
- use auide_dma_{test_irq,end}() directly in auide_dma_timeout()
* pdc202xx_old.c:
- drop "old_" "infixes" from DMA methods
* siimage.c:
- add siimage_dma_test_irq() helper
- print SATA warning in siimage_init_one()
* Remove no longer needed ->init_hwif implementations.
v2:
* Changes based on review from Sergei:
- s/siimage_ide_dma_test_irq/siimage_dma_test_irq/
- s/drive->hwif/hwif/ in idefloppy_pc_intr().
- fix patch description w.r.t. au1xxx-ide changes
- fix au1xxx-ide build
- fix naming for cmd64*_dma_ops
- drop "ide_" and "old_" infixes
- s/hpt3xxx_dma_ops/hpt37x_dma_ops/
- s/hpt370x_dma_ops/hpt370_dma_ops/
- use correct DMA ops for HPT302/N, HPT371/N and HPT374
- s/it821x_smart_dma_ops/it821x_pass_through_dma_ops/
v3:
* Two bugs slipped in v2 (noticed by Sergei):
- use correct DMA ops for HPT374 (for real this time)
- handle HPT370/HPT370A properly
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
@@ -389,17 +389,21 @@ static int icside_dma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
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hwif->dmatable_cpu = NULL;
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hwif->dmatable_dma = 0;
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hwif->dma_host_set = icside_dma_host_set;
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hwif->dma_setup = icside_dma_setup;
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hwif->dma_exec_cmd = icside_dma_exec_cmd;
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hwif->dma_start = icside_dma_start;
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hwif->ide_dma_end = icside_dma_end;
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hwif->ide_dma_test_irq = icside_dma_test_irq;
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hwif->dma_timeout = icside_dma_timeout;
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hwif->dma_lost_irq = icside_dma_lost_irq;
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return 0;
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}
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static struct ide_dma_ops icside_v6_dma_ops = {
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.dma_host_set = icside_dma_host_set,
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.dma_setup = icside_dma_setup,
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.dma_exec_cmd = icside_dma_exec_cmd,
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.dma_start = icside_dma_start,
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.dma_end = icside_dma_end,
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.dma_test_irq = icside_dma_test_irq,
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.dma_timeout = icside_dma_timeout,
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.dma_lost_irq = icside_dma_lost_irq,
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};
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#else
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#define icside_v6_dma_ops NULL
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#endif
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static int icside_dma_off_init(ide_hwif_t *hwif, const struct ide_port_info *d)
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@@ -475,6 +479,7 @@ icside_register_v5(struct icside_state *state, struct expansion_card *ec)
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static const struct ide_port_info icside_v6_port_info __initdata = {
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.init_dma = icside_dma_off_init,
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.port_ops = &icside_v6_no_dma_port_ops,
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.dma_ops = &icside_v6_dma_ops,
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.host_flags = IDE_HFLAG_SERIALIZE |
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IDE_HFLAG_NO_AUTOTUNE,
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.mwdma_mask = ATA_MWDMA2,
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@@ -550,6 +555,7 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
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if (ec->dma != NO_DMA && !request_dma(ec->dma, hwif->name)) {
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d.init_dma = icside_dma_init;
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d.port_ops = &icside_v6_dma_port_ops;
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d.dma_ops = NULL;
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}
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idx[0] = hwif->index;
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@@ -328,7 +328,7 @@ static int __devinit palm_bk3710_init_dma(ide_hwif_t *hwif,
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if (ide_allocate_dma_engine(hwif))
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return -1;
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ide_setup_dma(hwif, base);
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ide_setup_dma(hwif, base, d);
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return 0;
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}
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@@ -673,11 +673,6 @@ cris_ide_inb(unsigned long reg)
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return (unsigned char)cris_ide_inw(reg);
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}
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static int cris_dma_end (ide_drive_t *drive);
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static int cris_dma_setup (ide_drive_t *drive);
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static void cris_dma_exec_cmd (ide_drive_t *drive, u8 command);
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static int cris_dma_test_irq(ide_drive_t *drive);
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static void cris_dma_start(ide_drive_t *drive);
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static void cris_ide_input_data (ide_drive_t *drive, void *, unsigned int);
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static void cris_ide_output_data (ide_drive_t *drive, void *, unsigned int);
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static void cris_atapi_input_bytes(ide_drive_t *drive, void *, unsigned int);
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@@ -787,9 +782,12 @@ static const struct ide_port_ops cris_port_ops = {
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.set_dma_mode = cris_set_dma_mode,
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};
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static struct ide_dma_ops cris_dma_ops;
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static const struct ide_port_info cris_port_info __initdata = {
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.chipset = ide_etrax100,
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.port_ops = &cris_port_ops,
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.dma_ops = &cris_dma_ops,
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.host_flags = IDE_HFLAG_NO_ATAPI_DMA |
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IDE_HFLAG_NO_DMA, /* no SFF-style DMA */
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.pio_mask = ATA_PIO4,
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@@ -820,12 +818,6 @@ static int __init init_e100_ide(void)
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hwif->ata_output_data = &cris_ide_output_data;
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hwif->atapi_input_bytes = &cris_atapi_input_bytes;
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hwif->atapi_output_bytes = &cris_atapi_output_bytes;
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hwif->dma_host_set = &cris_dma_host_set;
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hwif->ide_dma_end = &cris_dma_end;
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hwif->dma_setup = &cris_dma_setup;
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hwif->dma_exec_cmd = &cris_dma_exec_cmd;
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hwif->ide_dma_test_irq = &cris_dma_test_irq;
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hwif->dma_start = &cris_dma_start;
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hwif->OUTB = &cris_ide_outb;
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hwif->OUTW = &cris_ide_outw;
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hwif->OUTBSYNC = &cris_ide_outbsync;
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@@ -1080,6 +1072,15 @@ static void cris_dma_start(ide_drive_t *drive)
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}
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}
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static struct ide_dma_ops cris_dma_ops = {
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.dma_host_set = cris_dma_host_set,
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.dma_setup = cris_dma_setup,
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.dma_exec_cmd = cris_dma_exec_cmd,
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.dma_start = cris_dma_start,
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.dma_end = cris_dma_end,
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.dma_test_irq = cris_dma_test_irq,
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};
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module_init(init_e100_ide);
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MODULE_LICENSE("GPL");
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@@ -539,7 +539,7 @@ static ide_startstop_t cdrom_start_packet_command(ide_drive_t *drive,
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/* FIXME: for Virtual DMA we must check harder */
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if (info->dma)
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info->dma = !hwif->dma_setup(drive);
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info->dma = !hwif->dma_ops->dma_setup(drive);
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/* set up the controller registers */
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ide_pktcmd_tf_load(drive, IDE_TFLAG_OUT_NSECT | IDE_TFLAG_OUT_LBAL |
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@@ -617,7 +617,7 @@ static ide_startstop_t cdrom_transfer_packet_command(ide_drive_t *drive,
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/* start the DMA if need be */
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if (info->dma)
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hwif->dma_start(drive);
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hwif->dma_ops->dma_start(drive);
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return ide_started;
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}
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@@ -929,7 +929,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
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dma = info->dma;
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if (dma) {
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info->dma = 0;
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dma_error = HWIF(drive)->ide_dma_end(drive);
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dma_error = hwif->dma_ops->dma_end(drive);
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if (dma_error) {
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printk(KERN_ERR "%s: DMA %s error\n", drive->name,
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write ? "write" : "read");
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@@ -102,7 +102,7 @@ ide_startstop_t ide_dma_intr (ide_drive_t *drive)
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{
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u8 stat = 0, dma_stat = 0;
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dma_stat = HWIF(drive)->ide_dma_end(drive);
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dma_stat = drive->hwif->dma_ops->dma_end(drive);
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stat = ide_read_status(drive);
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if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
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@@ -394,7 +394,7 @@ void ide_dma_off_quietly(ide_drive_t *drive)
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drive->using_dma = 0;
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ide_toggle_bounce(drive, 0);
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drive->hwif->dma_host_set(drive, 0);
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drive->hwif->dma_ops->dma_host_set(drive, 0);
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}
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EXPORT_SYMBOL(ide_dma_off_quietly);
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@@ -427,7 +427,7 @@ void ide_dma_on(ide_drive_t *drive)
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drive->using_dma = 1;
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ide_toggle_bounce(drive, 1);
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drive->hwif->dma_host_set(drive, 1);
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drive->hwif->dma_ops->dma_host_set(drive, 1);
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}
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#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
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@@ -802,10 +802,10 @@ void ide_dma_timeout (ide_drive_t *drive)
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printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
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if (hwif->ide_dma_test_irq(drive))
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if (hwif->dma_ops->dma_test_irq(drive))
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return;
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hwif->ide_dma_end(drive);
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hwif->dma_ops->dma_end(drive);
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}
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EXPORT_SYMBOL(ide_dma_timeout);
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@@ -839,8 +839,21 @@ int ide_allocate_dma_engine(ide_hwif_t *hwif)
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}
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EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
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void ide_setup_dma(ide_hwif_t *hwif, unsigned long base)
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static struct ide_dma_ops sff_dma_ops = {
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.dma_host_set = ide_dma_host_set,
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.dma_setup = ide_dma_setup,
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.dma_exec_cmd = ide_dma_exec_cmd,
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.dma_start = ide_dma_start,
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.dma_end = __ide_dma_end,
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.dma_test_irq = __ide_dma_test_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_lost_irq = ide_dma_lost_irq,
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};
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void ide_setup_dma(ide_hwif_t *hwif, unsigned long base,
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const struct ide_port_info *d)
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{
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struct ide_dma_ops *dma_ops = d->dma_ops ? d->dma_ops : &sff_dma_ops;
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hwif->dma_base = base;
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if (!hwif->dma_command)
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@@ -854,22 +867,24 @@ void ide_setup_dma(ide_hwif_t *hwif, unsigned long base)
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if (!hwif->dma_prdtable)
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hwif->dma_prdtable = hwif->dma_base + 4;
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if (!hwif->dma_host_set)
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hwif->dma_host_set = &ide_dma_host_set;
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if (!hwif->dma_setup)
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hwif->dma_setup = &ide_dma_setup;
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if (!hwif->dma_exec_cmd)
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hwif->dma_exec_cmd = &ide_dma_exec_cmd;
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if (!hwif->dma_start)
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hwif->dma_start = &ide_dma_start;
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if (!hwif->ide_dma_end)
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hwif->ide_dma_end = &__ide_dma_end;
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if (!hwif->ide_dma_test_irq)
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hwif->ide_dma_test_irq = &__ide_dma_test_irq;
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if (!hwif->dma_timeout)
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hwif->dma_timeout = &ide_dma_timeout;
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if (!hwif->dma_lost_irq)
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hwif->dma_lost_irq = &ide_dma_lost_irq;
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hwif->dma_ops = dma_ops;
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if (dma_ops->dma_host_set == NULL)
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dma_ops->dma_host_set = ide_dma_host_set;
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if (dma_ops->dma_setup == NULL)
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dma_ops->dma_setup = ide_dma_setup;
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if (dma_ops->dma_exec_cmd == NULL)
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dma_ops->dma_exec_cmd = ide_dma_exec_cmd;
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if (dma_ops->dma_start == NULL)
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dma_ops->dma_start = ide_dma_start;
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if (dma_ops->dma_end == NULL)
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dma_ops->dma_end = __ide_dma_end;
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if (dma_ops->dma_test_irq == NULL)
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dma_ops->dma_test_irq = __ide_dma_test_irq;
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if (dma_ops->dma_timeout == NULL)
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dma_ops->dma_timeout = ide_dma_timeout;
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if (dma_ops->dma_lost_irq == NULL)
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dma_ops->dma_lost_irq = ide_dma_lost_irq;
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}
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EXPORT_SYMBOL_GPL(ide_setup_dma);
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@@ -411,7 +411,7 @@ static ide_startstop_t idefloppy_pc_intr(ide_drive_t *drive)
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debug_log("Reached %s interrupt handler\n", __func__);
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if (pc->flags & PC_FLAG_DMA_IN_PROGRESS) {
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dma_error = hwif->ide_dma_end(drive);
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dma_error = hwif->dma_ops->dma_end(drive);
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if (dma_error) {
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printk(KERN_ERR "%s: DMA %s error\n", drive->name,
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rq_data_dir(rq) ? "write" : "read");
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@@ -663,7 +663,7 @@ static ide_startstop_t idefloppy_issue_pc(ide_drive_t *drive,
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dma = 0;
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if ((pc->flags & PC_FLAG_DMA_RECOMMENDED) && drive->using_dma)
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dma = !hwif->dma_setup(drive);
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dma = !hwif->dma_ops->dma_setup(drive);
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ide_pktcmd_tf_load(drive, IDE_TFLAG_NO_SELECT_MASK |
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IDE_TFLAG_OUT_DEVICE, bcount, dma);
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@@ -671,7 +671,7 @@ static ide_startstop_t idefloppy_issue_pc(ide_drive_t *drive,
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if (dma) {
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/* Begin DMA, if necessary */
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pc->flags |= PC_FLAG_DMA_IN_PROGRESS;
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hwif->dma_start(drive);
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hwif->dma_ops->dma_start(drive);
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}
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/* Can we transfer the packet when we get the interrupt or wait? */
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@@ -218,7 +218,7 @@ static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request *
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* we could be smarter and check for current xfer_speed
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* in struct drive etc...
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*/
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if (drive->hwif->dma_host_set == NULL)
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if (drive->hwif->dma_ops == NULL)
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break;
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/*
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* TODO: respect ->using_dma setting
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@@ -1238,12 +1238,12 @@ static ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
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if (error < 0) {
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printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
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(void)HWIF(drive)->ide_dma_end(drive);
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(void)hwif->dma_ops->dma_end(drive);
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ret = ide_error(drive, "dma timeout error",
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ide_read_status(drive));
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} else {
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printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
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hwif->dma_timeout(drive);
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hwif->dma_ops->dma_timeout(drive);
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}
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/*
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@@ -1355,7 +1355,7 @@ void ide_timer_expiry (unsigned long data)
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startstop = handler(drive);
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} else if (drive_is_ready(drive)) {
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if (drive->waiting_for_dma)
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hwgroup->hwif->dma_lost_irq(drive);
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hwif->dma_ops->dma_lost_irq(drive);
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(void)ide_ack_intr(hwif);
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printk(KERN_WARNING "%s: lost interrupt\n", drive->name);
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startstop = handler(drive);
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@@ -432,7 +432,7 @@ int drive_is_ready (ide_drive_t *drive)
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u8 stat = 0;
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if (drive->waiting_for_dma)
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return hwif->ide_dma_test_irq(drive);
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return hwif->dma_ops->dma_test_irq(drive);
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#if 0
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/* need to guarantee 400ns since last command was issued */
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@@ -703,8 +703,8 @@ int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
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// msleep(50);
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#ifdef CONFIG_BLK_DEV_IDEDMA
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if (hwif->dma_host_set) /* check if host supports DMA */
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hwif->dma_host_set(drive, 0);
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if (hwif->dma_ops) /* check if host supports DMA */
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hwif->dma_ops->dma_host_set(drive, 0);
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#endif
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/* Skip setting PIO flow-control modes on pre-EIDE drives */
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@@ -762,8 +762,8 @@ int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
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#ifdef CONFIG_BLK_DEV_IDEDMA
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if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
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drive->using_dma)
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hwif->dma_host_set(drive, 1);
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else if (hwif->dma_host_set) /* check if host supports DMA */
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hwif->dma_ops->dma_host_set(drive, 1);
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else if (hwif->dma_ops) /* check if host supports DMA */
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ide_dma_off_quietly(drive);
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#endif
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@@ -843,7 +843,7 @@ static void ide_port_tune_devices(ide_hwif_t *hwif)
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drive->nice1 = 1;
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if (hwif->dma_host_set)
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if (hwif->dma_ops)
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ide_set_dma(drive);
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}
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}
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@@ -1390,7 +1390,8 @@ static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
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hwif->swdma_mask = 0;
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hwif->mwdma_mask = 0;
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hwif->ultra_mask = 0;
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}
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} else if (d->dma_ops)
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hwif->dma_ops = d->dma_ops;
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}
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if (d->host_flags & IDE_HFLAG_RQSIZE_256)
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@@ -993,7 +993,7 @@ static ide_startstop_t idetape_pc_intr(ide_drive_t *drive)
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stat = ide_read_status(drive);
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if (pc->flags & PC_FLAG_DMA_IN_PROGRESS) {
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if (hwif->ide_dma_end(drive) || (stat & ERR_STAT)) {
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if (hwif->dma_ops->dma_end(drive) || (stat & ERR_STAT)) {
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/*
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* A DMA error is sometimes expected. For example,
|
||||
* if the tape is crossing a filemark during a
|
||||
@@ -1213,7 +1213,7 @@ static ide_startstop_t idetape_transfer_pc(ide_drive_t *drive)
|
||||
#ifdef CONFIG_BLK_DEV_IDEDMA
|
||||
/* Begin DMA, if necessary */
|
||||
if (pc->flags & PC_FLAG_DMA_IN_PROGRESS)
|
||||
hwif->dma_start(drive);
|
||||
hwif->dma_ops->dma_start(drive);
|
||||
#endif
|
||||
/* Send the actual packet */
|
||||
HWIF(drive)->atapi_output_bytes(drive, pc->c, 12);
|
||||
@@ -1279,7 +1279,7 @@ static ide_startstop_t idetape_issue_pc(ide_drive_t *drive,
|
||||
ide_dma_off(drive);
|
||||
}
|
||||
if ((pc->flags & PC_FLAG_DMA_RECOMMENDED) && drive->using_dma)
|
||||
dma_ok = !hwif->dma_setup(drive);
|
||||
dma_ok = !hwif->dma_ops->dma_setup(drive);
|
||||
|
||||
ide_pktcmd_tf_load(drive, IDE_TFLAG_NO_SELECT_MASK |
|
||||
IDE_TFLAG_OUT_DEVICE, bcount, dma_ok);
|
||||
|
||||
@@ -135,6 +135,7 @@ ide_startstop_t do_rw_taskfile (ide_drive_t *drive, ide_task_t *task)
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct ide_taskfile *tf = &task->tf;
|
||||
ide_handler_t *handler = NULL;
|
||||
struct ide_dma_ops *dma_ops = hwif->dma_ops;
|
||||
|
||||
if (task->data_phase == TASKFILE_MULTI_IN ||
|
||||
task->data_phase == TASKFILE_MULTI_OUT) {
|
||||
@@ -178,10 +179,10 @@ ide_startstop_t do_rw_taskfile (ide_drive_t *drive, ide_task_t *task)
|
||||
return ide_started;
|
||||
default:
|
||||
if (task_dma_ok(task) == 0 || drive->using_dma == 0 ||
|
||||
hwif->dma_setup(drive))
|
||||
dma_ops->dma_setup(drive))
|
||||
return ide_stopped;
|
||||
hwif->dma_exec_cmd(drive, tf->command);
|
||||
hwif->dma_start(drive);
|
||||
dma_ops->dma_exec_cmd(drive, tf->command);
|
||||
dma_ops->dma_start(drive);
|
||||
return ide_started;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -469,7 +469,7 @@ int set_using_dma(ide_drive_t *drive, int arg)
|
||||
if (!drive->id || !(drive->id->capability & 1))
|
||||
goto out;
|
||||
|
||||
if (hwif->dma_host_set == NULL)
|
||||
if (hwif->dma_ops == NULL)
|
||||
goto out;
|
||||
|
||||
err = -EBUSY;
|
||||
|
||||
@@ -366,21 +366,31 @@ static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 de
|
||||
dev->dev_devwidth = devwidth;
|
||||
dev->dev_flags = flags;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
|
||||
static void auide_dma_timeout(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
|
||||
printk(KERN_ERR "%s: DMA timeout occurred: ", drive->name);
|
||||
|
||||
if (hwif->ide_dma_test_irq(drive))
|
||||
if (auide_dma_test_irq(drive))
|
||||
return;
|
||||
|
||||
hwif->ide_dma_end(drive);
|
||||
auide_dma_end(drive);
|
||||
}
|
||||
|
||||
static struct ide_dma_ops au1xxx_dma_ops = {
|
||||
.dma_host_set = auide_dma_host_set,
|
||||
.dma_setup = auide_dma_setup,
|
||||
.dma_exec_cmd = auide_dma_exec_cmd,
|
||||
.dma_start = auide_dma_start,
|
||||
.dma_end = auide_dma_end,
|
||||
.dma_test_irq = auide_dma_test_irq,
|
||||
.dma_lost_irq = auide_dma_lost_irq,
|
||||
.dma_timeout = auide_dma_timeout,
|
||||
};
|
||||
|
||||
static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
|
||||
{
|
||||
_auide_hwif *auide = (_auide_hwif *)hwif->hwif_data;
|
||||
@@ -511,6 +521,9 @@ static const struct ide_port_ops au1xxx_port_ops = {
|
||||
static const struct ide_port_info au1xxx_port_info = {
|
||||
.init_dma = auide_ddma_init,
|
||||
.port_ops = &au1xxx_port_ops,
|
||||
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
|
||||
.dma_ops = &au1xxx_dma_ops,
|
||||
#endif
|
||||
.host_flags = IDE_HFLAG_POST_SET_MODE |
|
||||
IDE_HFLAG_NO_IO_32BIT |
|
||||
IDE_HFLAG_UNMASK_IRQS,
|
||||
@@ -588,16 +601,6 @@ static int au_ide_probe(struct device *dev)
|
||||
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA
|
||||
hwif->INSW = auide_insw;
|
||||
hwif->OUTSW = auide_outsw;
|
||||
#endif
|
||||
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
|
||||
hwif->dma_timeout = &auide_dma_timeout;
|
||||
hwif->dma_host_set = &auide_dma_host_set;
|
||||
hwif->dma_exec_cmd = &auide_dma_exec_cmd;
|
||||
hwif->dma_start = &auide_dma_start;
|
||||
hwif->ide_dma_end = &auide_dma_end;
|
||||
hwif->dma_setup = &auide_dma_setup;
|
||||
hwif->ide_dma_test_irq = &auide_dma_test_irq;
|
||||
hwif->dma_lost_irq = &auide_dma_lost_irq;
|
||||
#endif
|
||||
hwif->select_data = 0; /* no chipset-specific code */
|
||||
hwif->config_data = 0; /* no chipset-specific code */
|
||||
|
||||
@@ -652,21 +652,7 @@ static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
|
||||
return cbl;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_hwif_common_ali15x3 - Set up ALI IDE hardware
|
||||
* @hwif: IDE interface
|
||||
*
|
||||
* Initialize the IDE structure side of the ALi 15x3 driver.
|
||||
*/
|
||||
|
||||
static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
|
||||
{
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
|
||||
hwif->dma_setup = &ali15x3_dma_setup;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_SPARC64
|
||||
/**
|
||||
* init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
|
||||
* @hwif: interface to configure
|
||||
@@ -716,9 +702,8 @@ static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
|
||||
if(irq >= 0)
|
||||
hwif->irq = irq;
|
||||
}
|
||||
|
||||
init_hwif_common_ali15x3(hwif);
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* init_dma_ali15x3 - set up DMA on ALi15x3
|
||||
@@ -746,7 +731,7 @@ static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
|
||||
if (ide_allocate_dma_engine(hwif))
|
||||
return -1;
|
||||
|
||||
ide_setup_dma(hwif, base);
|
||||
ide_setup_dma(hwif, base, d);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -758,10 +743,16 @@ static const struct ide_port_ops ali_port_ops = {
|
||||
.cable_detect = ali_cable_detect,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops ali_dma_ops = {
|
||||
.dma_setup = ali15x3_dma_setup,
|
||||
};
|
||||
|
||||
static const struct ide_port_info ali15x3_chipset __devinitdata = {
|
||||
.name = "ALI15X3",
|
||||
.init_chipset = init_chipset_ali15x3,
|
||||
#ifndef CONFIG_SPARC64
|
||||
.init_hwif = init_hwif_ali15x3,
|
||||
#endif
|
||||
.init_dma = init_dma_ali15x3,
|
||||
.port_ops = &ali_port_ops,
|
||||
.pio_mask = ATA_PIO5,
|
||||
@@ -806,6 +797,8 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev
|
||||
d.udma_mask = ATA_UDMA5;
|
||||
else
|
||||
d.udma_mask = ATA_UDMA6;
|
||||
|
||||
d.dma_ops = &ali_dma_ops;
|
||||
} else {
|
||||
d.host_flags |= IDE_HFLAG_NO_DMA;
|
||||
|
||||
@@ -815,9 +808,6 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev
|
||||
if (idx == 0)
|
||||
d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
|
||||
|
||||
#if defined(CONFIG_SPARC64)
|
||||
d.init_hwif = init_hwif_common_ali15x3;
|
||||
#endif /* CONFIG_SPARC64 */
|
||||
return ide_setup_pci_device(dev, &d);
|
||||
}
|
||||
|
||||
|
||||
@@ -223,7 +223,7 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
||||
(void) pci_write_config_byte(dev, pciU, regU);
|
||||
}
|
||||
|
||||
static int cmd648_ide_dma_end (ide_drive_t *drive)
|
||||
static int cmd648_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
unsigned long base = hwif->dma_base - (hwif->channel * 8);
|
||||
@@ -239,7 +239,7 @@ static int cmd648_ide_dma_end (ide_drive_t *drive)
|
||||
return err;
|
||||
}
|
||||
|
||||
static int cmd64x_ide_dma_end (ide_drive_t *drive)
|
||||
static int cmd64x_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
@@ -256,7 +256,7 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive)
|
||||
return err;
|
||||
}
|
||||
|
||||
static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
|
||||
static int cmd648_dma_test_irq(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
unsigned long base = hwif->dma_base - (hwif->channel * 8);
|
||||
@@ -279,7 +279,7 @@ static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
|
||||
static int cmd64x_dma_test_irq(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
@@ -310,7 +310,7 @@ static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
|
||||
* event order for DMA transfers.
|
||||
*/
|
||||
|
||||
static int cmd646_1_ide_dma_end (ide_drive_t *drive)
|
||||
static int cmd646_1_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
u8 dma_stat = 0, dma_cmd = 0;
|
||||
@@ -385,62 +385,33 @@ static u8 __devinit cmd64x_cable_detect(ide_hwif_t *hwif)
|
||||
}
|
||||
}
|
||||
|
||||
static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
/*
|
||||
* UltraDMA only supported on PCI646U and PCI646U2, which
|
||||
* correspond to revisions 0x03, 0x05 and 0x07 respectively.
|
||||
* Actually, although the CMD tech support people won't
|
||||
* tell me the details, the 0x03 revision cannot support
|
||||
* UDMA correctly without hardware modifications, and even
|
||||
* then it only works with Quantum disks due to some
|
||||
* hold time assumptions in the 646U part which are fixed
|
||||
* in the 646U2.
|
||||
*
|
||||
* So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
|
||||
*/
|
||||
if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5)
|
||||
hwif->ultra_mask = 0x00;
|
||||
|
||||
switch (dev->device) {
|
||||
case PCI_DEVICE_ID_CMD_648:
|
||||
case PCI_DEVICE_ID_CMD_649:
|
||||
alt_irq_bits:
|
||||
hwif->ide_dma_end = &cmd648_ide_dma_end;
|
||||
hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq;
|
||||
break;
|
||||
case PCI_DEVICE_ID_CMD_646:
|
||||
if (dev->revision == 0x01) {
|
||||
hwif->ide_dma_end = &cmd646_1_ide_dma_end;
|
||||
break;
|
||||
} else if (dev->revision >= 0x03)
|
||||
goto alt_irq_bits;
|
||||
/* fall thru */
|
||||
default:
|
||||
hwif->ide_dma_end = &cmd64x_ide_dma_end;
|
||||
hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct ide_port_ops cmd64x_port_ops = {
|
||||
.set_pio_mode = cmd64x_set_pio_mode,
|
||||
.set_dma_mode = cmd64x_set_dma_mode,
|
||||
.cable_detect = cmd64x_cable_detect,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops cmd64x_dma_ops = {
|
||||
.dma_end = cmd64x_dma_end,
|
||||
.dma_test_irq = cmd64x_dma_test_irq,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops cmd646_rev1_dma_ops = {
|
||||
.dma_end = cmd646_1_dma_end,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops cmd648_dma_ops = {
|
||||
.dma_end = cmd648_dma_end,
|
||||
.dma_test_irq = cmd648_dma_test_irq,
|
||||
};
|
||||
|
||||
static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
|
||||
{ /* 0 */
|
||||
.name = "CMD643",
|
||||
.init_chipset = init_chipset_cmd64x,
|
||||
.init_hwif = init_hwif_cmd64x,
|
||||
.enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
|
||||
.port_ops = &cmd64x_port_ops,
|
||||
.dma_ops = &cmd64x_dma_ops,
|
||||
.host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
|
||||
IDE_HFLAG_ABUSE_PREFETCH,
|
||||
.pio_mask = ATA_PIO5,
|
||||
@@ -449,10 +420,10 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
|
||||
},{ /* 1 */
|
||||
.name = "CMD646",
|
||||
.init_chipset = init_chipset_cmd64x,
|
||||
.init_hwif = init_hwif_cmd64x,
|
||||
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
|
||||
.chipset = ide_cmd646,
|
||||
.port_ops = &cmd64x_port_ops,
|
||||
.dma_ops = &cmd648_dma_ops,
|
||||
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
|
||||
.pio_mask = ATA_PIO5,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -460,9 +431,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
|
||||
},{ /* 2 */
|
||||
.name = "CMD648",
|
||||
.init_chipset = init_chipset_cmd64x,
|
||||
.init_hwif = init_hwif_cmd64x,
|
||||
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
|
||||
.port_ops = &cmd64x_port_ops,
|
||||
.dma_ops = &cmd648_dma_ops,
|
||||
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
|
||||
.pio_mask = ATA_PIO5,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -470,9 +441,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
|
||||
},{ /* 3 */
|
||||
.name = "CMD649",
|
||||
.init_chipset = init_chipset_cmd64x,
|
||||
.init_hwif = init_hwif_cmd64x,
|
||||
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
|
||||
.port_ops = &cmd64x_port_ops,
|
||||
.dma_ops = &cmd648_dma_ops,
|
||||
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
|
||||
.pio_mask = ATA_PIO5,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -487,12 +458,35 @@ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_devic
|
||||
|
||||
d = cmd64x_chipsets[idx];
|
||||
|
||||
/*
|
||||
* The original PCI0646 didn't have the primary channel enable bit,
|
||||
* it appeared starting with PCI0646U (i.e. revision ID 3).
|
||||
*/
|
||||
if (idx == 1 && dev->revision < 3)
|
||||
d.enablebits[0].reg = 0;
|
||||
if (idx == 1) {
|
||||
/*
|
||||
* UltraDMA only supported on PCI646U and PCI646U2, which
|
||||
* correspond to revisions 0x03, 0x05 and 0x07 respectively.
|
||||
* Actually, although the CMD tech support people won't
|
||||
* tell me the details, the 0x03 revision cannot support
|
||||
* UDMA correctly without hardware modifications, and even
|
||||
* then it only works with Quantum disks due to some
|
||||
* hold time assumptions in the 646U part which are fixed
|
||||
* in the 646U2.
|
||||
*
|
||||
* So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
|
||||
*/
|
||||
if (dev->revision < 5) {
|
||||
d.udma_mask = 0x00;
|
||||
/*
|
||||
* The original PCI0646 didn't have the primary
|
||||
* channel enable bit, it appeared starting with
|
||||
* PCI0646U (i.e. revision ID 3).
|
||||
*/
|
||||
if (dev->revision < 3) {
|
||||
d.enablebits[0].reg = 0;
|
||||
if (dev->revision == 1)
|
||||
d.dma_ops = &cmd646_rev1_dma_ops;
|
||||
else
|
||||
d.dma_ops = &cmd64x_dma_ops;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ide_setup_pci_device(dev, &d);
|
||||
}
|
||||
|
||||
@@ -103,24 +103,20 @@ static void cs5520_dma_host_set(ide_drive_t *drive, int on)
|
||||
ide_dma_host_set(drive, on);
|
||||
}
|
||||
|
||||
static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
|
||||
{
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
|
||||
hwif->dma_host_set = &cs5520_dma_host_set;
|
||||
}
|
||||
|
||||
static const struct ide_port_ops cs5520_port_ops = {
|
||||
.set_pio_mode = cs5520_set_pio_mode,
|
||||
.set_dma_mode = cs5520_set_dma_mode,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops cs5520_dma_ops = {
|
||||
.dma_host_set = cs5520_dma_host_set,
|
||||
};
|
||||
|
||||
#define DECLARE_CS_DEV(name_str) \
|
||||
{ \
|
||||
.name = name_str, \
|
||||
.init_hwif = init_hwif_cs5520, \
|
||||
.port_ops = &cs5520_port_ops, \
|
||||
.dma_ops = &cs5520_dma_ops, \
|
||||
.host_flags = IDE_HFLAG_ISA_PORTS | \
|
||||
IDE_HFLAG_CS5520 | \
|
||||
IDE_HFLAG_VDMA | \
|
||||
|
||||
@@ -808,7 +808,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
|
||||
hpt370_clear_engine(drive);
|
||||
}
|
||||
|
||||
static void hpt370_ide_dma_start(ide_drive_t *drive)
|
||||
static void hpt370_dma_start(ide_drive_t *drive)
|
||||
{
|
||||
#ifdef HPT_RESET_STATE_ENGINE
|
||||
hpt370_clear_engine(drive);
|
||||
@@ -816,7 +816,7 @@ static void hpt370_ide_dma_start(ide_drive_t *drive)
|
||||
ide_dma_start(drive);
|
||||
}
|
||||
|
||||
static int hpt370_ide_dma_end(ide_drive_t *drive)
|
||||
static int hpt370_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
u8 dma_stat = inb(hwif->dma_status);
|
||||
@@ -838,7 +838,7 @@ static void hpt370_dma_timeout(ide_drive_t *drive)
|
||||
}
|
||||
|
||||
/* returns 1 if DMA IRQ issued, 0 otherwise */
|
||||
static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
|
||||
static int hpt374_dma_test_irq(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
@@ -862,7 +862,7 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hpt374_ide_dma_end(ide_drive_t *drive)
|
||||
static int hpt374_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
@@ -1312,19 +1312,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
|
||||
|
||||
if (new_mcr != old_mcr)
|
||||
pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);
|
||||
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
|
||||
if (chip_type >= HPT374) {
|
||||
hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
|
||||
hwif->ide_dma_end = &hpt374_ide_dma_end;
|
||||
} else if (chip_type >= HPT370) {
|
||||
hwif->dma_start = &hpt370_ide_dma_start;
|
||||
hwif->ide_dma_end = &hpt370_ide_dma_end;
|
||||
hwif->dma_timeout = &hpt370_dma_timeout;
|
||||
} else
|
||||
hwif->dma_lost_irq = &hpt366_dma_lost_irq;
|
||||
}
|
||||
|
||||
static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
|
||||
@@ -1360,7 +1347,7 @@ static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
|
||||
if (ide_allocate_dma_engine(hwif))
|
||||
return -1;
|
||||
|
||||
ide_setup_dma(hwif, base);
|
||||
ide_setup_dma(hwif, base, d);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1428,6 +1415,21 @@ static const struct ide_port_ops hpt3xx_port_ops = {
|
||||
.cable_detect = hpt3xx_cable_detect,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops hpt37x_dma_ops = {
|
||||
.dma_end = hpt374_dma_end,
|
||||
.dma_test_irq = hpt374_dma_test_irq,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops hpt370_dma_ops = {
|
||||
.dma_start = hpt370_dma_start,
|
||||
.dma_end = hpt370_dma_end,
|
||||
.dma_timeout = hpt370_dma_timeout,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops hpt36x_dma_ops = {
|
||||
.dma_lost_irq = hpt366_dma_lost_irq,
|
||||
};
|
||||
|
||||
static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
|
||||
{ /* 0 */
|
||||
.name = "HPT36x",
|
||||
@@ -1442,6 +1444,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
|
||||
*/
|
||||
.enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}},
|
||||
.port_ops = &hpt3xx_port_ops,
|
||||
.dma_ops = &hpt36x_dma_ops,
|
||||
.host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE,
|
||||
.pio_mask = ATA_PIO4,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -1452,6 +1455,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
|
||||
.init_dma = init_dma_hpt366,
|
||||
.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
|
||||
.port_ops = &hpt3xx_port_ops,
|
||||
.dma_ops = &hpt37x_dma_ops,
|
||||
.host_flags = IDE_HFLAGS_HPT3XX,
|
||||
.pio_mask = ATA_PIO4,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -1462,6 +1466,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
|
||||
.init_dma = init_dma_hpt366,
|
||||
.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
|
||||
.port_ops = &hpt3xx_port_ops,
|
||||
.dma_ops = &hpt37x_dma_ops,
|
||||
.host_flags = IDE_HFLAGS_HPT3XX,
|
||||
.pio_mask = ATA_PIO4,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -1472,6 +1477,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
|
||||
.init_dma = init_dma_hpt366,
|
||||
.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
|
||||
.port_ops = &hpt3xx_port_ops,
|
||||
.dma_ops = &hpt37x_dma_ops,
|
||||
.host_flags = IDE_HFLAGS_HPT3XX,
|
||||
.pio_mask = ATA_PIO4,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -1483,6 +1489,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
|
||||
.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
|
||||
.udma_mask = ATA_UDMA5,
|
||||
.port_ops = &hpt3xx_port_ops,
|
||||
.dma_ops = &hpt37x_dma_ops,
|
||||
.host_flags = IDE_HFLAGS_HPT3XX,
|
||||
.pio_mask = ATA_PIO4,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -1493,6 +1500,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
|
||||
.init_dma = init_dma_hpt366,
|
||||
.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
|
||||
.port_ops = &hpt3xx_port_ops,
|
||||
.dma_ops = &hpt37x_dma_ops,
|
||||
.host_flags = IDE_HFLAGS_HPT3XX,
|
||||
.pio_mask = ATA_PIO4,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
@@ -1555,6 +1563,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic
|
||||
d.name = info->chip_name;
|
||||
d.udma_mask = info->udma_mask;
|
||||
|
||||
/* fixup ->dma_ops for HPT370/HPT370A */
|
||||
if (info == &hpt370 || info == &hpt370a)
|
||||
d.dma_ops = &hpt370_dma_ops;
|
||||
|
||||
pci_set_drvdata(dev, (void *)info);
|
||||
|
||||
if (info == &hpt36x || info == &hpt374)
|
||||
|
||||
@@ -511,6 +511,11 @@ static void __devinit it821x_quirkproc(ide_drive_t *drive)
|
||||
|
||||
}
|
||||
|
||||
static struct ide_dma_ops it821x_pass_through_dma_ops = {
|
||||
.dma_start = it821x_dma_start,
|
||||
.dma_end = it821x_dma_end,
|
||||
};
|
||||
|
||||
/**
|
||||
* init_hwif_it821x - set up hwif structs
|
||||
* @hwif: interface to set up
|
||||
@@ -562,8 +567,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
|
||||
|
||||
if (idev->smart == 0) {
|
||||
/* MWDMA/PIO clock switching for pass through mode */
|
||||
hwif->dma_start = &it821x_dma_start;
|
||||
hwif->ide_dma_end = &it821x_dma_end;
|
||||
hwif->dma_ops = &it821x_pass_through_dma_ops;
|
||||
} else
|
||||
hwif->host_flags |= IDE_HFLAG_NO_SET_MODE;
|
||||
|
||||
|
||||
@@ -150,7 +150,7 @@ static void ns87415_selectproc (ide_drive_t *drive)
|
||||
ns87415_prepare_drive (drive, drive->using_dma);
|
||||
}
|
||||
|
||||
static int ns87415_ide_dma_end (ide_drive_t *drive)
|
||||
static int ns87415_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
u8 dma_stat = 0, dma_cmd = 0;
|
||||
@@ -170,7 +170,7 @@ static int ns87415_ide_dma_end (ide_drive_t *drive)
|
||||
return (dma_stat & 7) != 4;
|
||||
}
|
||||
|
||||
static int ns87415_ide_dma_setup(ide_drive_t *drive)
|
||||
static int ns87415_dma_setup(ide_drive_t *drive)
|
||||
{
|
||||
/* select DMA xfer */
|
||||
ns87415_prepare_drive(drive, 1);
|
||||
@@ -252,14 +252,17 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
|
||||
return;
|
||||
|
||||
outb(0x60, hwif->dma_status);
|
||||
hwif->dma_setup = &ns87415_ide_dma_setup;
|
||||
hwif->ide_dma_end = &ns87415_ide_dma_end;
|
||||
}
|
||||
|
||||
static const struct ide_port_ops ns87415_port_ops = {
|
||||
.selectproc = ns87415_selectproc,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops ns87415_dma_ops = {
|
||||
.dma_setup = ns87415_dma_setup,
|
||||
.dma_end = ns87415_dma_end,
|
||||
};
|
||||
|
||||
static const struct ide_port_info ns87415_chipset __devinitdata = {
|
||||
.name = "NS87415",
|
||||
#ifdef CONFIG_SUPERIO
|
||||
@@ -267,6 +270,7 @@ static const struct ide_port_info ns87415_chipset __devinitdata = {
|
||||
#endif
|
||||
.init_hwif = init_hwif_ns87415,
|
||||
.port_ops = &ns87415_port_ops,
|
||||
.dma_ops = &ns87415_dma_ops,
|
||||
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
|
||||
IDE_HFLAG_NO_ATAPI_DMA,
|
||||
};
|
||||
|
||||
@@ -163,7 +163,7 @@ static void pdc202xx_quirkproc(ide_drive_t *drive)
|
||||
drive->quirk_list = 0;
|
||||
}
|
||||
|
||||
static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
|
||||
static void pdc202xx_dma_start(ide_drive_t *drive)
|
||||
{
|
||||
if (drive->current_speed > XFER_UDMA_2)
|
||||
pdc_old_enable_66MHz_clock(drive->hwif);
|
||||
@@ -185,7 +185,7 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
|
||||
ide_dma_start(drive);
|
||||
}
|
||||
|
||||
static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
|
||||
static int pdc202xx_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
if (drive->media != ide_disk || drive->addressing == 1) {
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
@@ -202,7 +202,7 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
|
||||
return __ide_dma_end(drive);
|
||||
}
|
||||
|
||||
static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive)
|
||||
static int pdc202xx_dma_test_irq(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
unsigned long high_16 = hwif->extra_base - 16;
|
||||
@@ -263,23 +263,6 @@ static void pdc202xx_dma_timeout(ide_drive_t *drive)
|
||||
ide_dma_timeout(drive);
|
||||
}
|
||||
|
||||
static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
|
||||
hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
|
||||
hwif->dma_timeout = &pdc202xx_dma_timeout;
|
||||
|
||||
if (dev->device != PCI_DEVICE_ID_PROMISE_20246) {
|
||||
hwif->dma_start = &pdc202xx_old_ide_dma_start;
|
||||
hwif->ide_dma_end = &pdc202xx_old_ide_dma_end;
|
||||
}
|
||||
hwif->ide_dma_test_irq = &pdc202xx_old_ide_dma_test_irq;
|
||||
}
|
||||
|
||||
static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
|
||||
const char *name)
|
||||
{
|
||||
@@ -346,12 +329,26 @@ static const struct ide_port_ops pdc2026x_port_ops = {
|
||||
.cable_detect = pdc2026x_cable_detect,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops pdc20246_dma_ops = {
|
||||
.dma_test_irq = pdc202xx_dma_test_irq,
|
||||
.dma_lost_irq = pdc202xx_dma_lost_irq,
|
||||
.dma_timeout = pdc202xx_dma_timeout,
|
||||
};
|
||||
|
||||
static struct ide_dma_ops pdc2026x_dma_ops = {
|
||||
.dma_start = pdc202xx_dma_start,
|
||||
.dma_end = pdc202xx_dma_end,
|
||||
.dma_test_irq = pdc202xx_dma_test_irq,
|
||||
.dma_lost_irq = pdc202xx_dma_lost_irq,
|
||||
.dma_timeout = pdc202xx_dma_timeout,
|
||||
};
|
||||
|
||||
#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \
|
||||
{ \
|
||||
.name = name_str, \
|
||||
.init_chipset = init_chipset_pdc202xx, \
|
||||
.init_hwif = init_hwif_pdc202xx, \
|
||||
.port_ops = &pdc2026x_port_ops, \
|
||||
.dma_ops = &pdc2026x_dma_ops, \
|
||||
.host_flags = IDE_HFLAGS_PDC202XX | extra_flags, \
|
||||
.pio_mask = ATA_PIO4, \
|
||||
.mwdma_mask = ATA_MWDMA2, \
|
||||
@@ -362,8 +359,8 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
|
||||
{ /* 0 */
|
||||
.name = "PDC20246",
|
||||
.init_chipset = init_chipset_pdc202xx,
|
||||
.init_hwif = init_hwif_pdc202xx,
|
||||
.port_ops = &pdc20246_port_ops,
|
||||
.dma_ops = &pdc20246_dma_ops,
|
||||
.host_flags = IDE_HFLAGS_PDC202XX,
|
||||
.pio_mask = ATA_PIO4,
|
||||
.mwdma_mask = ATA_MWDMA2,
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user