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phy: stm32: Add support for STM32MP25 COMBOPHY.

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Addition of the COMBOPHY driver found on STM32MP25 platforms

This single lane PHY is shared (exclusive) between the USB3 and PCIE
controllers.
Supports 5Gbit/s for PCIE gen2 or 2.5Gbit/s for PCIE gen1.

Supports wakeup-source capability to wakeup system using remote-wakeup
capable USB device

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Link: https://lore.kernel.org/r/20240930170847.948779-3-christian.bruel@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Christian Bruel
2024-09-30 19:08:44 +02:00
committed by Vinod Koul
parent 8c7e955fac
commit 47e1bb6b4b
3 changed files with 610 additions and 0 deletions
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11
drivers/phy/st/Kconfig
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@@ -33,6 +33,17 @@ config PHY_STIH407_USB
Enable this support to enable the picoPHY device used by USB2
and USB3 controllers on STMicroelectronics STiH407 SoC families.
config PHY_STM32_COMBOPHY
tristate "STMicroelectronics COMBOPHY driver for STM32MP25"
depends on ARCH_STM32 || COMPILE_TEST
select GENERIC_PHY
help
Enable this to support the COMBOPHY device used by USB3 or PCIe
controllers on STMicroelectronics STM32MP25 SoC.
This driver controls the COMBOPHY block to generate the PCIe 100Mhz
reference clock from either the external clock generator or HSE
internal SoC clock source.
config PHY_STM32_USBPHYC
tristate "STMicroelectronics STM32 USB HS PHY Controller driver"
depends on ARCH_STM32 || COMPILE_TEST

1
drivers/phy/st/Makefile
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@@ -3,4 +3,5 @@ obj-$(CONFIG_PHY_MIPHY28LP) += phy-miphy28lp.o
obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY) += phy-spear1310-miphy.o
obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY) += phy-spear1340-miphy.o
obj-$(CONFIG_PHY_STIH407_USB) += phy-stih407-usb.o
obj-$(CONFIG_PHY_STM32_COMBOPHY) += phy-stm32-combophy.o
obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o

598
drivers/phy/st/phy-stm32-combophy.c Normal file
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