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RDMA: Change all uapi headers to use __aligned_u64 instead of __u64
The new auditing standard for the subsystem will be to only use __aligned_64 in uapi headers to try and prevent 32/64 compat bugs from existing in the future. Changing all existing usage will help ensure new developers copy the right idea. The before/after of this patch was tested using pahole on 32 and 64 bit compiles to confirm it has no change in the structure layout, so this patch is a NOP. Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@@ -79,7 +79,7 @@ struct hfi1_user_info {
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};
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struct hfi1_ctxt_info {
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__u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */
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__aligned_u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */
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__u32 rcvegr_size; /* size of each eager buffer */
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__u16 num_active; /* number of active units */
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__u16 unit; /* unit (chip) assigned to caller */
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@@ -98,9 +98,9 @@ struct hfi1_ctxt_info {
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struct hfi1_tid_info {
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/* virtual address of first page in transfer */
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__u64 vaddr;
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__aligned_u64 vaddr;
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/* pointer to tid array. this array is big enough */
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__u64 tidlist;
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__aligned_u64 tidlist;
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/* number of tids programmed by this request */
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__u32 tidcnt;
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/* length of transfer buffer programmed by this request */
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@@ -131,23 +131,23 @@ struct hfi1_base_info {
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*/
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__u32 bthqp;
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/* PIO credit return address, */
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__u64 sc_credits_addr;
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__aligned_u64 sc_credits_addr;
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/*
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* Base address of write-only pio buffers for this process.
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* Each buffer has sendpio_credits*64 bytes.
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*/
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__u64 pio_bufbase_sop;
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__aligned_u64 pio_bufbase_sop;
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/*
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* Base address of write-only pio buffers for this process.
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* Each buffer has sendpio_credits*64 bytes.
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*/
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__u64 pio_bufbase;
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__aligned_u64 pio_bufbase;
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/* address where receive buffer queue is mapped into */
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__u64 rcvhdr_bufbase;
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__aligned_u64 rcvhdr_bufbase;
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/* base address of Eager receive buffers. */
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__u64 rcvegr_bufbase;
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__aligned_u64 rcvegr_bufbase;
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/* base address of SDMA completion ring */
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__u64 sdma_comp_bufbase;
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__aligned_u64 sdma_comp_bufbase;
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/*
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* User register base for init code, not to be used directly by
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* protocol or applications. Always maps real chip register space.
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@@ -155,20 +155,20 @@ struct hfi1_base_info {
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* ur_rcvhdrhead, ur_rcvhdrtail, ur_rcvegrhead, ur_rcvegrtail,
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* ur_rcvtidflow
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*/
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__u64 user_regbase;
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__aligned_u64 user_regbase;
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/* notification events */
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__u64 events_bufbase;
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__aligned_u64 events_bufbase;
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/* status page */
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__u64 status_bufbase;
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__aligned_u64 status_bufbase;
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/* rcvhdrtail update */
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__u64 rcvhdrtail_base;
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__aligned_u64 rcvhdrtail_base;
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/*
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* shared memory pages for subctxts if ctxt is shared; these cover
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* all the processes in the group sharing a single context.
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* all have enough space for the num_subcontexts value on this job.
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*/
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__u64 subctxt_uregbase;
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__u64 subctxt_rcvegrbuf;
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__u64 subctxt_rcvhdrbuf;
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__aligned_u64 subctxt_uregbase;
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__aligned_u64 subctxt_rcvegrbuf;
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__aligned_u64 subctxt_rcvhdrbuf;
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};
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#endif /* _LINIUX__HFI1_IOCTL_H */
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@@ -177,8 +177,8 @@ struct hfi1_sdma_comp_entry {
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* Device status and notifications from driver to user-space.
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*/
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struct hfi1_status {
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__u64 dev; /* device/hw status bits */
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__u64 port; /* port state and status bits */
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__aligned_u64 dev; /* device/hw status bits */
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__aligned_u64 port; /* port state and status bits */
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char freezemsg[0];
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};
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