iio: dac: ad3552r: add high-speed platform driver

Add High Speed ad3552r platform driver.

The ad3552r DAC is controlled by a custom (fpga-based) DAC IP
through the current AXI backend, or similar alternative IIO backend.

Compared to the existing driver (ad3552r.c), that is a simple SPI
driver, this driver is coupled with a DAC IIO backend that finally
controls the ad3552r by a fpga-based "QSPI+DDR" interface, to reach
maximum transfer rate of 33MUPS using dma stream capabilities.

All commands involving QSPI bus read/write are delegated to the backend
through the provided APIs for bus read/write.

Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20241028-wip-bl-ad3552r-axi-v0-iio-testing-v9-7-f6960b4f9719@kernel-space.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Angelo Dureghello
2024-10-28 22:45:34 +01:00
committed by Jonathan Cameron
parent f665d7d33d
commit 0b4d9fe58b
5 changed files with 574 additions and 1 deletions

View File

@@ -6,9 +6,28 @@
menu "Digital to analog converters"
config AD3552R_HS
tristate "Analog Devices AD3552R DAC High Speed driver"
select AD3552R_LIB
select IIO_BACKEND
help
Say yes here to build support for Analog Devices AD3552R
Digital to Analog Converter High Speed driver.
The driver requires the assistance of an IP core to operate,
since data is streamed into target device via DMA, sent over a
QSPI + DDR (Double Data Rate) bus.
To compile this driver as a module, choose M here: the
module will be called ad3552r-hs.
config AD3552R_LIB
tristate
config AD3552R
tristate "Analog Devices AD3552R DAC driver"
depends on SPI_MASTER
select AD3552R_LIB
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help

View File

@@ -4,7 +4,9 @@
#
# When adding new entries keep the list in alphabetical order
obj-$(CONFIG_AD3552R) += ad3552r.o ad3552r-common.o
obj-$(CONFIG_AD3552R_HS) += ad3552r-hs.o
obj-$(CONFIG_AD3552R_LIB) += ad3552r-common.o
obj-$(CONFIG_AD3552R) += ad3552r.o
obj-$(CONFIG_AD5360) += ad5360.o
obj-$(CONFIG_AD5380) += ad5380.o
obj-$(CONFIG_AD5421) += ad5421.o

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (c) 2024 Analog Devices Inc.
* Copyright (c) 2024 Baylibre, SAS
*/
#ifndef __LINUX_PLATFORM_DATA_AD3552R_HS_H__
#define __LINUX_PLATFORM_DATA_AD3552R_HS_H__
struct iio_backend;
struct ad3552r_hs_platform_data {
int (*bus_reg_read)(struct iio_backend *back, u32 reg, u32 *val,
size_t data_size);
int (*bus_reg_write)(struct iio_backend *back, u32 reg, u32 val,
size_t data_size);
u32 bus_sample_data_clock_hz;
};
#endif /* __LINUX_PLATFORM_DATA_AD3552R_HS_H__ */

View File

@@ -127,8 +127,12 @@
#define AD3552R_GAIN_SCALE 1000
#define AD3552R_LDAC_PULSE_US 100
#define AD3552R_CH0_ACTIVE BIT(0)
#define AD3552R_CH1_ACTIVE BIT(1)
#define AD3552R_MAX_RANGES 5
#define AD3542R_MAX_RANGES 6
#define AD3552R_QUAD_SPI 2
extern const s32 ad3552r_ch_ranges[AD3552R_MAX_RANGES][2];
extern const s32 ad3542r_ch_ranges[AD3542R_MAX_RANGES][2];