For NVC laptops it is required to issue KBEN command only to get
the keyboard working on coldboot paths with Windows. This commmit
will be squashed with previous commits once it is verified to work
on MSI desktops.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
After the minimal KBC initialization is done on fast boot path, we still
need to issue KBEN command. This is a workaround for NVC EC implementation
of KBC which enables keyboard scanning on KBEN command. It has been
verified that Windows does not issue this command, os it is required to get
the keyboard working on cold boot paths on NovaCustom laptops. Verfied that
this command did not need to be issued on MSI desktops.
TEST=Boot NovaCustom V560TNX after shutdown from Windows without AC
connected and confirm the internal keyboard still works.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
One seconds seems a bit too excessive to detect the keyboard. Lower the
detection timeout to half a second.
TEST=Verify PS/2 keyboard is initialized properly on MSI Z690-A DDR4 with
Media-Tech MT122K PS/2 keyboard and NovaCustom V540TND.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
On fast boot path the i8042 controller was not being initialized at all if
Windows was being booted. This resulted in the keyboard not working after
shutdown and even after reset from Windows. It only worked when the keyboard
was initialized earlier properly and no shutdown occurred. On Linux boot
path, GRUB was calling ReadKeyStroke which triggered connecting consoles and
performing a full PS/2 initialization.
On fast boot path, add minimal i8042 controller initialization without
actual keyboard initialization and extended verification. It is sufficient
for both Linux and Windows to set up the PS/2 keyboard properly.
Also move setting the FastPs2Detection PCD to the Ps2KeyboardDxe, as it
caused most of the i8042 controller initialization to be skipped. Once the
controller is initialized on module start, the extra initialization may be
skipped later on fast boot path.
TEST=PS/2 keyboard works in both Ubuntu Linux and Windows after shutdown and
restart on NovaCustom V540TND.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
There is an assumption in `IsPciDeviceRejected()` (at least for I/O)
that a BAR with all read-write bits set is invalid. However, this is not
the case: when a resource is size-aligned down from the top, this may
also be the case.
This code causes the rejection of the iGPU (and therefore, display) in
some cases with the DasharoPayloadPkg, when the coreboot
ESOURCE_ALLOCATION_TOP_DOWN config is enabled. It remains to be seen
whether this code addresses some other issue.
Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
MdeModulePkg:
* add defines
* add PcdDetectPs2KbOnCmdAck
DasharoPayloadPkg:
* detect PS/2 keyboard by sending it an "echo" command if
Dasharo/Ps2Controller is enabled or doesn't exist
* remove PS/2 from ConIn if the variable exists and the keyboard is not
connected or is disabled
The Option ROM scanner can't work as enumeration was done by the
first stage bootloader. Running it will disable the ability of the
PCIPlatform code to scan for ROMs.
Required for the following patch that enables custom Option ROM
scanning using gPciPlatformProtocol.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Unlike DXE USB enumeration that enumerates all changed ports on timer
interrupt, PEI USB Enumeration runs once at the driver entry point.
USB3.x devices initially appear in USB2.0 ports. When the USB2.0 port is
reset, the USB3.x device disappears from the USB2.0 port and appears on the
USB3.0 port. The USB3.x device won't be enumerated if the USB2.0 port
number is greater than the USB3.0 port number. Re-enumerate USB to make
sure USB3.x devices in this case.
Signed-off-by: Phil Noh <Phil.Noh@amd.com>
NvmExpressMediaSanitize.c: In function 'NvmExpressMediaClear':
NvmExpressMediaSanitize.c:337:29: error: 'Status' may be used uninitialized
in this function [-Werror=maybe-uninitialized]
EFI_STATUS Status;
^~~~~~
cc1: all warnings being treated as errors
Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
For bootup of VMs with multiple accelerators, these logging instructions
flood the logs for a good 30 seconds.
Originally found by Gary Zibrat.
Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
UEFI 2.10A Specification has added a new error case to
EFI_ATA_PASS_THRU_PROTOCOL.GetNextDevice API which handles
port multiplier not being connected to the Port.
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Remove duplicate private header files and reference UFS spec definitions
from the IndustryStandard folder.
Signed-off-by: Christopher Zurcher <christopher.zurcher@microsoft.com>
The issue with locating the expected interface and endpoint descriptors
arises because `configDesc` (USB_CONFIG_DESCRIPTOR) and `IfDesc`
(USB_INTERFACE_DESCRIPTOR) are incremented by structure size rather than
by actual descriptor length.
Specifically:
- `configDesc` should be incremented by its actual length.
- `IfDesc` should be incremented by its actual length.
This incorrect increment causes misalignment, preventing access to the
subsequent interface and endpoint descriptors.
[Suggested Solution]
Update the code to increment the pointers by the actual descriptor lengths,
ensuring proper access to all descriptors in the USB configuration.
Signed-off-by: Aniket Surekar <Aniket.Surekar@Dell.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4858
Ph52a PCIE to SATA card inserted on Intel MTL/ARL causes system hanged.
Root cause of this issue is because Ph52a's driver only uses DevicePath
protocol alone and EDK2 driver only uses PciIo protocol alone. Both
drivers start and try to manage SATA controller.
Signed-off-by: Paul Chang <paulchang@ami.com>
On AARCH64, there is no ordering guarantee between configuration
space (ECAM) writes and memory space reads (MMIO). ARM AMBA CHI
only guarantees ordering for reads and writes within a single address
region, however, on some systems MMIO and ECAM may be split into
separateaddress regions.
A problem may arise when an ECAM write is issued a completion before a
subsequent MMIO read is issued and receives a completion.
For example, a typical PCI software flow is the following:
1. ECAM write to device command register to enable memory space
2. MMIO read from device memory space for which access was enabled
in step 1.
There is no guarantee that step 2. will not begin before the completion
of step 1.
on systems where ECAM/MMIO are specified as separate address regions,
even
if both spaces have the memory attributes device-nGnRnE.
- Add a barrier after the final PCI Configuration space write
in RootBridgeIoPciAccess. Configuration space reads should not have
side-efects.
- When configuration space is strongly ordered, this ensures
that program execution cannot continue until the completion
is received for the previous Cfg-Write, which may have side-effects.
- Risk of reading a "write-only" register and causing a CA which leaves
the device unresponsive. The expectation based on the PCI Base Spec
v6.1 section 7.4 is that all PCI Spec-defined registers will be readable,
however, there may exist design-specific registers that fall into
this category.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
Co-authored-by: Ard Biesheuvel <ardb@kernel.org>
- Class specific types for interface and endpoint are generic
- Definitions are in IndustryStandard/Usb.h
- Remove type redefinitions
- Update references to the descriptor types
Signed-off-by: Oleg Ilyasov <olegi@ami.com>
Implementation of MEDIA_SANITIZE_PROTOCOL for NIST
purge/clear actions with mapping to NVM Express native
commands.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
Michał Żygowski
Benjamin Doron
Patrick Rudolph
Phil Noh
Mike Maslenkin
Dionna Glaze
INDIA\sachinganesh
Henz, Patrick
Christopher Zurcher
Aniket_Surekar
Paul Chang
INDIA\kanagavels
joe
Oleg Ilyasov
Rebecca Cran
Ray Robles