From ea28fd44712e2b43d920f0777f280284dd4235fd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Wed, 8 Apr 2026 10:16:05 +0200 Subject: [PATCH] soc/intel/common/block/smbus/smbuslib.c: Sync with upstream MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes build failures on Intel Dasharo boards. Upstream-Status: Backport [CB:52731] Signed-off-by: Michał Żygowski --- src/soc/intel/common/block/smbus/smbuslib.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/soc/intel/common/block/smbus/smbuslib.c b/src/soc/intel/common/block/smbus/smbuslib.c index 4b4e42baaf..30b24145d6 100644 --- a/src/soc/intel/common/block/smbus/smbuslib.c +++ b/src/soc/intel/common/block/smbus/smbuslib.c @@ -108,19 +108,19 @@ static int get_spd(u8 *spd, u8 addr) } /* Check if module is DDR4, DDR4 spd is 512 byte. */ - if (spd[SPD_DRAM_TYPE] == SPD_DRAM_DDR4 && - CONFIG_DIMM_SPD_SIZE > SPD_PAGE_LEN) { + if (spd[SPD_MEMORY_TYPE] == SPD_MEMORY_TYPE_DDR4_SDRAM && + CONFIG_DIMM_SPD_SIZE > SPD_SIZE_MAX_DDR3) { /* Switch to page 1 */ - smbus_write_byte(SPD_PAGE_1, 0, 0); + spd_write_byte(SPD_PAGE_1, 0, 0); /* IMC doesn't support i2c eeprom read. */ if (CONFIG(SOC_INTEL_COMMON_BLOCK_IMC) || - i2c_eeprom_read(addr, 0, SPD_PAGE_LEN, spd + SPD_PAGE_LEN) < 0) { + i2c_eeprom_read(addr, 0, SPD_SIZE_MAX_DDR3, spd + SPD_SIZE_MAX_DDR3) < 0) { printk(BIOS_INFO, "do_i2c_eeprom_read failed, using fallback\n"); - spd_read(spd + SPD_PAGE_LEN, addr); + spd_read(spd + SPD_SIZE_MAX_DDR3, addr); } /* Restore to page 0 */ - smbus_write_byte(SPD_PAGE_0, 0, 0); + spd_write_byte(SPD_PAGE_0, 0, 0); } }