diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index d013fd3bd1..355ee9e6be 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -1489,6 +1489,7 @@ static void integrate_bios_firmwares(context *ctx, fw_table[i].type != AMD_BIOS_APOB_NV && fw_table[i].type != AMD_BIOS_L2_PTR && fw_table[i].type != AMD_BIOS_BIN && + fw_table[i].type != AMD_BIOS_NV_ST && fw_table[i].type != AMD_BIOS_PSP_SHARED_MEM)) continue; @@ -1573,6 +1574,7 @@ static void integrate_bios_firmwares(context *ctx, biosdir->entries[count].address_mode = SET_ADDR_MODE_BY_TABLE(biosdir); break; case AMD_BIOS_APOB_NV: + case AMD_BIOS_NV_ST: if (has_apob_nv_quirk(cb_config->soc_id)) { /* * once ROM3 mapping (>16MiB) is used on any SOC that diff --git a/util/amdfwtool/opts.c b/util/amdfwtool/opts.c index b18b57d4fa..3af72b6830 100644 --- a/util/amdfwtool/opts.c +++ b/util/amdfwtool/opts.c @@ -62,6 +62,8 @@ enum { AMDFW_OPT_SIGNED_OUTPUT, AMDFW_OPT_SIGNED_ADDR, AMDFW_OPT_BODY_LOCATION, + AMDFW_OPT_VARIABLE_NVRAM_BASE, + AMDFW_OPT_VARIABLE_NVRAM_SIZE, /* begin after ASCII characters */ LONGOPT_SPI_READ_MODE = 256, LONGOPT_SPI_SPEED = 257, @@ -94,6 +96,8 @@ static struct option long_options[] = { {"combo-config1", required_argument, 0, AMDFW_OPT_COMBO1_CONFIG }, {"multilevel", no_argument, 0, AMDFW_OPT_MULTILEVEL }, {"nvram", required_argument, 0, AMDFW_OPT_NVRAM }, + {"variable-nvram-base", required_argument, 0, AMDFW_OPT_VARIABLE_NVRAM_BASE }, + {"variable-nvram-size", required_argument, 0, AMDFW_OPT_VARIABLE_NVRAM_SIZE }, {"nvram-base", required_argument, 0, LONGOPT_NVRAM_BASE }, {"nvram-size", required_argument, 0, LONGOPT_NVRAM_SIZE }, {"rpmc-nvram-base", required_argument, 0, LONGOPT_RPMC_NVRAM_BASE }, @@ -155,84 +159,86 @@ static void usage(void) { printf("amdfwtool: Create AMD Firmware combination\n"); printf("Usage: amdfwtool [options] --flashsize --output \n"); - printf("--xhci Add XHCI blob\n"); - printf("--imc Add IMC blob\n"); - printf("--gec Add GEC blob\n"); + printf("--xhci Add XHCI blob\n"); + printf("--imc Add IMC blob\n"); + printf("--gec Add GEC blob\n"); printf("\nPSP options:\n"); - printf("--use-combo Use the COMBO layout\n"); - printf("--combo-config1 Config for 1st combo entry\n"); - printf("--multilevel Generate primary and secondary tables\n"); - printf("--nvram Add nvram binary\n"); - printf("--soft-fuse Set soft fuse\n"); - printf("--token-unlock Set token unlock\n"); - printf("--nvram-base Base address of nvram\n"); - printf("--nvram-size Size of nvram\n"); - printf("--rpmc-nvram-base Base address of RPMC nvram\n"); - printf("--rpmc-nvram-size Size of RPMC nvram\n"); - printf("--sev-nvram-base Location of SEV nvram\n"); - printf("--sev-nvram-size Size of SEV nvram\n"); - printf("--whitelist Set if there is a whitelist\n"); - printf("--use-pspsecureos Set if psp secure OS is needed\n"); - printf("--load-mp2-fw Set if load MP2 firmware\n"); - printf("--load-s0i3 Set if load s0i3 firmware\n"); - printf("--verstage Add verstage\n"); - printf("--verstage_sig Add verstage signature\n"); - printf("--recovery-ab Use the recovery A/B layout\n"); - printf("--espi0-config eSPI0 bus configuration 1st byte\n"); - printf("--espi1-config eSPI1 bus configuration 1st byte\n"); - printf("--espi0-config1 eSPI0 bus configuration 2nd byte\n"); - printf("--espi1-config1 eSPI1 bus configuration 2nd byte\n"); + printf("--use-combo Use the COMBO layout\n"); + printf("--combo-config1 Config for 1st combo entry\n"); + printf("--multilevel Generate primary and secondary tables\n"); + printf("--nvram Add nvram binary\n"); + printf("--soft-fuse Set soft fuse\n"); + printf("--token-unlock Set token unlock\n"); + printf("--nvram-base Base address of nvram\n"); + printf("--nvram-size Size of nvram\n"); + printf("--rpmc-nvram-base Base address of RPMC nvram\n"); + printf("--rpmc-nvram-size Size of RPMC nvram\n"); + printf("--sev-nvram-base Location of SEV nvram\n"); + printf("--sev-nvram-size Size of SEV nvram\n"); + printf("--variable-nvram-base Base address of variable nvram\n"); + printf("--variable-nvram-size Size of variable nvram\n"); + printf("--whitelist Set if there is a whitelist\n"); + printf("--use-pspsecureos Set if psp secure OS is needed\n"); + printf("--load-mp2-fw Set if load MP2 firmware\n"); + printf("--load-s0i3 Set if load s0i3 firmware\n"); + printf("--verstage Add verstage\n"); + printf("--verstage_sig Add verstage signature\n"); + printf("--recovery-ab Use the recovery A/B layout\n"); + printf("--espi0-config eSPI0 bus configuration 1st byte\n"); + printf("--espi1-config eSPI1 bus configuration 1st byte\n"); + printf("--espi0-config1 eSPI0 bus configuration 2nd byte\n"); + printf("--espi1-config1 eSPI1 bus configuration 2nd byte\n"); printf("\nBIOS options:\n"); - printf("--instance Sets instance field for the next BIOS\n"); - printf(" firmware\n"); - printf("--apcb Add AGESA PSP customization block\n"); - printf("--apcb-combo1 Add APCB for 1st combo\n"); - printf("--apob-base Destination for AGESA PSP output block\n"); - printf("--apob-nv-base Location of S3 resume data\n"); - printf("--apob-nv-size Size of S3 resume data\n"); - printf("--ucode Add microcode patch\n"); - printf("--bios-bin Add compressed image; auto source address\n"); - printf("--bios-bin-src Address in flash of source if -V not used\n"); - printf("--bios-bin-dest Destination for uncompressed BIOS\n"); - printf("--bios-uncomp-size Uncompressed size of BIOS image\n"); - printf("--output output filename\n"); - printf("--flashsize ROM size in bytes\n"); - printf(" size must be larger than %dKB\n", + printf("--instance Sets instance field for the next BIOS\n"); + printf(" firmware\n"); + printf("--apcb Add AGESA PSP customization block\n"); + printf("--apcb-combo1 Add APCB for 1st combo\n"); + printf("--apob-base Destination for AGESA PSP output block\n"); + printf("--apob-nv-base Location of S3 resume data\n"); + printf("--apob-nv-size Size of S3 resume data\n"); + printf("--ucode Add microcode patch\n"); + printf("--bios-bin Add compressed image; auto source address\n"); + printf("--bios-bin-src Address in flash of source if -V not used\n"); + printf("--bios-bin-dest Destination for uncompressed BIOS\n"); + printf("--bios-uncomp-size Uncompressed size of BIOS image\n"); + printf("--output output filename\n"); + printf("--flashsize ROM size in bytes\n"); + printf(" size must be larger than %dKB\n", MIN_ROM_KB); - printf(" and must a multiple of 1024\n"); - printf("--location Location of Directory\n"); - printf("--anywhere Use any 64-byte aligned addr for Directory\n"); - printf("--sharedmem Location of PSP/FW shared memory\n"); - printf("--sharedmem-size Maximum size of the PSP/FW shared memory\n"); - printf(" area\n"); - printf("--output-manifest Writes a manifest with the blobs versions\n"); + printf(" and must a multiple of 1024\n"); + printf("--location Location of Directory\n"); + printf("--anywhere Use any 64-byte aligned addr for Directory\n"); + printf("--sharedmem Location of PSP/FW shared memory\n"); + printf("--sharedmem-size Maximum size of the PSP/FW shared memory\n"); + printf(" area\n"); + printf("--output-manifest Writes a manifest with the blobs versions\n"); printf("\nEmbedded Firmware Structure options used by the PSP:\n"); - printf("--spi-speed SPI fast speed to place in EFS Table\n"); - printf(" 0x0 66.66Mhz\n"); - printf(" 0x1 33.33MHz\n"); - printf(" 0x2 22.22MHz\n"); - printf(" 0x3 16.66MHz\n"); - printf(" 0x4 100MHz\n"); - printf(" 0x5 800KHz\n"); - printf("--spi-read-mode SPI read mode to place in EFS Table\n"); - printf(" 0x0 Normal Read (up to 33M)\n"); - printf(" 0x1 Reserved\n"); - printf(" 0x2 Dual IO (1-1-2)\n"); - printf(" 0x3 Quad IO (1-1-4)\n"); - printf(" 0x4 Dual IO (1-2-2)\n"); - printf(" 0x5 Quad IO (1-4-4)\n"); - printf(" 0x6 Normal Read (up to 66M)\n"); - printf(" 0x7 Fast Read\n"); - printf("--spi-micron-flag Micron SPI part support for RV and later SOC\n"); - printf(" 0x0 Micron parts are not used\n"); - printf(" 0x1 Micron parts are always used\n"); - printf(" 0x2 Micron parts optional, this option is only\n"); + printf("--spi-speed SPI fast speed to place in EFS Table\n"); + printf(" 0x0 66.66Mhz\n"); + printf(" 0x1 33.33MHz\n"); + printf(" 0x2 22.22MHz\n"); + printf(" 0x3 16.66MHz\n"); + printf(" 0x4 100MHz\n"); + printf(" 0x5 800KHz\n"); + printf("--spi-read-mode SPI read mode to place in EFS Table\n"); + printf(" 0x0 Normal Read (up to 33M)\n"); + printf(" 0x1 Reserved\n"); + printf(" 0x2 Dual IO (1-1-2)\n"); + printf(" 0x3 Quad IO (1-1-4)\n"); + printf(" 0x4 Dual IO (1-2-2)\n"); + printf(" 0x5 Quad IO (1-4-4)\n"); + printf(" 0x6 Normal Read (up to 66M)\n"); + printf(" 0x7 Fast Read\n"); + printf("--spi-micron-flag Micron SPI part support for RV and later SOC\n"); + printf(" 0x0 Micron parts are not used\n"); + printf(" 0x1 Micron parts are always used\n"); + printf(" 0x2 Micron parts optional, this option is only\n"); printf(" supported with RN/LCN SOC\n"); printf("\nGeneral options:\n"); - printf("-c|--config Config file\n"); - printf("-d|--debug Print debug message\n"); - printf("-h|--help Show this help\n"); + printf("-c|--config Config file\n"); + printf("-d|--debug Print debug message\n"); + printf("-h|--help Show this help\n"); } extern amd_fw_entry amd_psp_fw_table[]; @@ -481,6 +487,16 @@ int amdfwtool_getopt(int argc, char *argv[], amd_cb_config *cb_config, context * register_bios_fw_addr(AMD_BIOS_APOB_NV, 0, 0, optarg); sub = instance = 0; break; + case AMDFW_OPT_VARIABLE_NVRAM_BASE: + /* APOB variable NVRAM base */ + register_bios_fw_addr(AMD_BIOS_NV_ST, optarg, 0, 0); + sub = instance = 0; + break; + case AMDFW_OPT_VARIABLE_NVRAM_SIZE: + /* APOB variable NVRAM size */ + register_bios_fw_addr(AMD_BIOS_NV_ST, 0, 0, optarg); + sub = instance = 0; + break; case AMDFW_OPT_BIOSBIN: register_bdt_data(AMD_BIOS_BIN, sub, instance, optarg); sub = instance = 0;