From 2c4aa0c118e09f00a7dc423cf7bd00ea9049a8a7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Go=C5=82a=C5=9B?= Date: Thu, 9 Oct 2025 12:34:45 +0200 Subject: [PATCH] intel soc,southbridge: Add Kconfig to set TSBS in IFD during build MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To modify the Top Swap Block Size in the FD (if provided and CONFIG_HAVE_IFD_BIN=y), set the following Kconfig variables: - CONFIG_INTEL_HAS_TOP_SWAP - CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK - CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE - CONFIG_INTEL_IFD_SET_TOP_SWAP_BOOTBLOCK_SIZE Needed for the bootblock redundancy feature suggested at https://mail.coreboot.org/archives/list/coreboot@coreboot.org/thread/C6JN2PB7K7D67EG7OIKB6BBERZU5YV35/ TEST=build VP66xx with custom Kconfig, check if TSBS is modified in FD Change-Id: I94d3d3e2511a7e56392a9e34f845ae91602ce7f1 Upstream-Status: Backport [CB:89493] Signed-off-by: Filip Gołaś Reviewed-on: https://review.coreboot.org/c/coreboot/+/89493 Reviewed-by: Sergii Dmytruk Tested-by: build bot (Jenkins) Signed-off-by: Michał Żygowski --- src/southbridge/intel/common/firmware/Makefile.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/southbridge/intel/common/firmware/Makefile.mk b/src/southbridge/intel/common/firmware/Makefile.mk index 9cea88e645..bc91a9e01f 100644 --- a/src/southbridge/intel/common/firmware/Makefile.mk +++ b/src/southbridge/intel/common/firmware/Makefile.mk @@ -66,6 +66,7 @@ else printf " DD Adding Intel Firmware Descriptor\n" dd if=$(IFD_BIN_PATH) \ of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 + ifeq ($(CONFIG_IFDTOOL_DISABLE_ME),y) printf " IFDTOOL set AltMeDisable/HAP bit\n" $(objutil)/ifdtool/ifdtool \ @@ -73,6 +74,7 @@ ifeq ($(CONFIG_IFDTOOL_DISABLE_ME),y) --altmedisable 1 \ -O $(obj)/coreboot.pre \ $(obj)/coreboot.pre + endif ifeq ($(CONFIG_VALIDATE_INTEL_DESCRIPTOR),y) printf " IFDTOOL validate IFD against FMAP\n"