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79 Commits

Author SHA1 Message Date
Craig Topper bf4043768c Add support for converting llvm.fma to fma4 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162999 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-31 15:40:30 +00:00
Craig Topper 49d86c9eb9 Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160951 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-30 06:48:11 +00:00
Craig Topper 95c929f45c Remove some unnecessary filter checks. They were already covered by IsCodeGenOnly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160950 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-30 06:27:19 +00:00
Craig Topper 24fd0ddf31 Remove check for sub class of X86Inst from filter function since caller guaranteed it. Replace another sub class check with ShouldBeEmitted flag since it was factored in there already. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160949 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-30 05:39:34 +00:00
Craig Topper 50c5c8275e Simplify code that filtered certain instructions in two different ways. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160948 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-30 05:10:05 +00:00
Craig Topper 87a9ece154 Remove check for f256mem from has256BitOperands as nothing depended on it and it isn't the only 256-bit memory type anyway. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160946 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-30 04:53:00 +00:00
Craig Topper e6c97ffb0d Remove trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160945 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-30 04:48:12 +00:00
Craig Topper 7f76cb6666 Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160775 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-26 07:48:28 +00:00
Richard Trieu 76f63aef56 Move around some enum elements so that lastMRM corrects gets assigned 56, which 
is one more that MRM_DF which is 55.  Previously, it held value 45, the same
as MRM_D0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160465 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-18 23:04:22 +00:00
Craig Topper 75dc33a60b Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160420 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-18 04:11:12 +00:00
Craig Topper 5aba78bd80 Update GATHER instructions to support 2 read-write operands. Patch from myself and Manman Ren. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160110 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-12 06:52:41 +00:00
Manman Ren 1f7a1b68a0 X86: add GATHER intrinsics (AVX2) in LLVM 
Support the following intrinsics:
llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256

Modified Disassembler to handle VSIB addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-26 19:47:59 +00:00
Benjamin Kramer 1386e9b7b1 Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. 
This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-29 19:05:25 +00:00
Craig Topper 769bbfd951 Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153935 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 05:20:24 +00:00
Kevin Enderby faf72ffda3 Fix the x86 disassembler to at least print the lock prefix if it is the first 
prefix.  Added a FIXME to remind us this still does not work when it is not the
first prefix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152414 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-09 17:52:49 +00:00
Craig Topper 930a1ebd92 X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151510 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-27 01:54:29 +00:00
Craig Topper 28a713b20a Add vmfunc instruction to X86 assembler and disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150899 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 01:39:49 +00:00
Craig Topper 9e3d0b3351 Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150873 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 08:19:49 +00:00
Craig Topper 06f554d06a Add disassembler support for VPERMIL2PD and VPERMIL2PS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147368 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-30 06:23:39 +00:00
Craig Topper e6a3a2990e Add FMA4 instructions to disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147367 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-30 05:20:36 +00:00
Craig Topper 787a88ff18 Remove some unnecessary filtering checks from X86 disassembler table build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144986 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-19 05:48:20 +00:00
Craig Topper c8eb880a7f More AVX2 instructions and their intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-06 23:04:08 +00:00
Craig Topper 75485d6746 Add X86 RORX instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-23 07:34:00 +00:00
Craig Topper ee62e4f6d1 Add X86 PEXTR and PDEP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142141 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 16:50:08 +00:00
Craig Topper b53fa8bf19 Add X86 BZHI instruction as well as BMI2 feature detection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 07:55:05 +00:00