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57 Commits

Author SHA1 Message Date
Robert Khasanov 9371efbcdb [AVX512] Extended avx512_sqrt_packed (sqrt instructions) to VL subset. 
Refactored through AVX512_maskable



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220806 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-28 18:15:20 +00:00
Robert Khasanov 340b5b9ad7 [AVX512] Extended avx512_binop_rm for AVX512VL subsets. 
Added avx512_binop_rm_vl multiclass for VL subset
Added encoding tests



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219390 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-09 08:38:48 +00:00
Robert Khasanov cc4b123a47 [SKX] avx512_icmp_packed multiclass extension 
Extended avx512_icmp_packed multiclass by masking versions.
Added avx512_icmp_packed_rmb multiclass for embedded broadcast versions.
Added corresponding _vl multiclasses.
Added encoding tests for CPCMP{EQ|GT}* instructions.
Add more fields for X86VectorVTInfo.
Added AVX512VLVectorVTInfo that include X86VectorVTInfo for 512/256/128-bit versions

Differential Revision: http://reviews.llvm.org/D5024


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216383 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-25 14:49:34 +00:00
Robert Khasanov 7017934668 [SKX] Enabling load/store instructions: encoding 
Instructions: VMOVAPD, VMOVAPS, VMOVDQA8, VMOVDQA16, VMOVDQA32,VMOVDQA64, VMOVDQU8, VMOVDQU16, VMOVDQU32,VMOVDQU64, VMOVUPD, VMOVUPS,

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214719 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-04 14:35:15 +00:00
Elena Demikhovsky b0a3627443 AVX-512: Added rrk, rrkz, rmk, rmkz, rmbk, rmbkz versions of AVX512 FP packed instructions, added encoding tests for them. 
By Robert Khazanov.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203098 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-06 08:45:30 +00:00
Craig Topper 82a644adf2 Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201641 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-19 05:34:21 +00:00
Craig Topper 1ee7e39dd4 Remove filtering concept from X86 disassembler table generation. It's no longer necessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201299 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-13 07:07:16 +00:00
Craig Topper a01427c15a Remove unnecessary include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201041 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-09 07:55:19 +00:00
David Woodhouse 9334b07527 [x86] Fix disassembly of MOV16ao16 et al. 
The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It
also turns out to have been unnecessary. The disassembler handles the
AdSize prefix for itself, and doesn't care about the difference between
(e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and
don't worry about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199654 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-20 12:02:53 +00:00
Elena Demikhovsky 1f044d443d AVX-512: Embedded Rounding Control - encoding and printing 
Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199102 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-13 12:55:03 +00:00
David Woodhouse aab59870a4 [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand 
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.

Hm, perhaps we do need an AdSize16 bit after all?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198759 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-08 12:58:24 +00:00
Craig Topper 5cfd40ccd4 Remove modifierType/Base from X86 disassembler tables as they are no longer used. Removes ~11.5K from static tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198284 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 21:52:57 +00:00
Elena Demikhovsky 3062a311ac AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp 
Printing rounding control.
Enncoding for EVEX_RC (rounding control).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198277 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 15:12:34 +00:00
Elena Demikhovsky 09a63715ce AVX-512: decoder for AVX-512, made by Alexey Bader. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198013 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-25 11:40:51 +00:00
Elena Demikhovsky 633f98bdfa AVX-512: added VPCONFLICT instruction and intrinsics, 
added EVEX_KZ to tablegen


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-03 13:46:31 +00:00
Craig Topper 279d28265d Add XOP disassembler support. Fixes PR13933. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191874 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-03 05:17:48 +00:00
Craig Topper 39004b537b Filter out repeated sections from the X86 disassembler modRMTable. Saves about ~43K from a released build. Unfortunately the disassembler tables are still upwards of 800K. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191652 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 06:23:19 +00:00
Craig Topper 92b4581953 Various x86 disassembler fixes. 
Add VEX_LIG to scalar FMA4 instructions.
Use VEX_LIG in some of the inheriting checks in disassembler table generator.
Make use of VEX_L_W, VEX_L_W_XS, VEX_L_W_XD contexts.
Don't let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from their non-L forms unless VEX_LIG is set.
Let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from all of their non-L or non-W cases.
Increase ranking on VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE so they get chosen over non-L/non-W forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191649 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 02:46:36 +00:00
Elena Demikhovsky c18f4efc5d Added encoding prefixes for KNL instructions (EVEX). 
Added 512-bit operands printing.
Added instruction formats for KNL instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187324 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-28 08:28:38 +00:00
Chandler Carruth 4ffd89fa4d Sort the #include lines for utils/... 
I've tried to find main moudle headers where possible, but the TableGen
stuff may warrant someone else looking at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169251 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-04 10:37:14 +00:00
Craig Topper 76b29b518d Add a new compression type to ModRM table that detects when the memory modRM byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163774 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-13 05:45:42 +00:00
Craig Topper 9e6dc8b9e7 Change unsigned to a uint16_t in static disassembler tables to reduce the table size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163594 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-11 04:19:21 +00:00
Craig Topper 5a2c607153 Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161101 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-01 07:39:18 +00:00
Craig Topper 19dbe2f5f0 Use uint8_t to store the InstructionContext table. Saves 768 bytes of static data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161034 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 06:15:39 +00:00
Craig Topper de9e333e18 Tidy up. Move for loop index declarations into for statements. Use unsigned instead of uint16_t for loop indices. Use unsigned instead of uint32_t for arguments to raw_ostream.indent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161033 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 06:02:05 +00:00