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716 Commits

Author SHA1 Message Date
Nate Begeman e0efc216eb Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself 
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-27 18:02:18 +00:00
Owen Anderson 54026c0f1b Remove r108639 now that it is handled by InstCombine instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 08:10:24 +00:00
Owen Anderson 3ecdfafe3b Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions. 
I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.

This fixed <rdar://problem/8197504>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108639 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-18 08:47:54 +00:00
Duncan Sands 3472766f9e Convert some tab stops into spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 08:16:59 +00:00
Bob Wilson f1d93ca920 Reenable DAG combining for vector shuffles. It looks like it was temporarily 
disabled and then never turned back on again.  Adjust some tests, one because
this change avoids an unnecessary instruction, and the other to make it
continue testing what it was intended to test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107941 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:38:12 +00:00
Benjamin Kramer cde51108de Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107868 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 12:09:56 +00:00
Evan Cheng bcc8017c73 Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:15:37 +00:00
Devang Patel 0d881dabc1 Propagate debug loc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:08:15 +00:00
Bob Wilson 8674949513 Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they 
can't be changed arbitrarily by the DAGCombiner without checking if it is
running after legalization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107097 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-28 23:40:25 +00:00
Duncan Sands b447c4e65b Remove variables which are assigned to but for which the value 
is not used.  Spotted by gcc-4.6.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106854 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 14:48:39 +00:00
Dan Gohman 4e39e9da0f Reapply r106634, now that the bug it exposed is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-24 14:30:44 +00:00
Daniel Dunbar cbe762b5d1 Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-23 17:09:26 +00:00
Jim Grosbach 9a526495e0 Some targets don't require the fencing MEMBARRIER instructions surrounding 
atomic intrinsics, either because the use locking instructions for the
atomics, or because they perform the locking directly. Add support in the
DAG combiner to fold away the fences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106630 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-23 16:07:42 +00:00
Dan Gohman 8a7f7426ee Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass, 
which is faster, simpler, and less surprising.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-18 01:05:21 +00:00
Dale Johannesen 86234c30a7 Fix another variant of PR 7191. Also add a testcase 
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:47:23 +00:00
Dale Johannesen 61734eb117 Fix PR 7191. I have been unable to create a .ll file that fails, sorry. 
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104619 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:50:03 +00:00
Bob Wilson 70fe6643d6 Clean up extra whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 23:53:55 +00:00
Bob Wilson 78f006acdf Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements 
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 21:05:32 +00:00
Bob Wilson 492fd454ca Optimize away insertelement of an undef value. This shows up in 
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up.  Radar 7998853.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 23:42:58 +00:00
Evan Cheng 0a942dbb1e Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. 
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.

Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 01:08:17 +00:00
Evan Cheng 28dad2a5ca Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 21:31:17 +00:00
Evan Cheng a083988c8a FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 00:03:40 +00:00
Evan Cheng aad753bbbd Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-10 19:03:57 +00:00
Dan Gohman 3ce89f47de Apply a patch from Jan Sjodin to fix a compiler abort on vector 
comparisons sign-extended to a different bitwidth than the
comparison operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102721 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-30 17:19:19 +00:00
Evan Cheng b3a3d5e858 Try operation promotion only if regular dag combine and target-specific ones failed to do anything. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 07:10:39 +00:00