Commit Graph

192 Commits

Author SHA1 Message Date
Igor Breger 7f2251533a AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.
Differential Revision: http://reviews.llvm.org/D17564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261862 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 13:30:17 +00:00
Craig Topper f150810c18 [X86] Remove some unused encoding checks from the disassembler table building.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261418 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 06:20:21 +00:00
Craig Topper 2082d39556 [TableGen,X86] Add NDEBUG check to a variable initialization that's only used by asserts. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261188 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-18 04:54:32 +00:00
Craig Topper a5754d7efa [TableGen,X86] Remove extra optional operand from RawFrm. RawFrm with 2 immediates is handled by RawFrmImm8/RawFrmImm16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261187 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-18 04:54:29 +00:00
Craig Topper 35e38d845b [TableGen] Fix inconsistent spacing. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260935 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-16 04:24:58 +00:00
Craig Topper 69dced0d4c [TableGen] Stop passing by reference an integer that doesn't get modified. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260934 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-16 04:24:56 +00:00
Craig Topper 6ff0feee63 [TableGen] Remove unused member variable. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260933 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-16 04:24:54 +00:00
Asaf Badouh 5c7343b3a6 [X86][PKU] Add {RD,WR}PKRU encoding
Differential Revision: http://reviews.llvm.org/D15711

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256366 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-24 08:25:00 +00:00
Chih-Hung Hsieh 3a1999a311 [X86] Part 2 to fix x86-64 fp128 calling convention.
Part 1 was submitted in http://reviews.llvm.org/D15134.
Changes in this part:
* X86RegisterInfo.td, X86RecognizableInstr.cpp: Add FR128 register class.
* X86CallingConv.td: Pass f128 values in XMM registers or on stack.
* X86InstrCompiler.td, X86InstrInfo.td, X86InstrSSE.td:
  Add instruction selection patterns for f128.
* X86ISelLowering.cpp:
  When target has MMX registers, configure MVT::f128 in FR128RegClass,
  with TypeSoftenFloat action, and custom actions for some opcodes.
  Add missed cases of MVT::f128 in places that handle f32, f64, or vector types.
  Add TODO comment to support f128 type in inline assembly code.
* SelectionDAGBuilder.cpp:
  Fix infinite loop when f128 type can have
  VT == TLI.getTypeToTransformTo(Ctx, VT).
* Add unit tests for x86-64 fp128 type.

Differential Revision: http://reviews.llvm.org/D11438



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255558 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-14 22:08:36 +00:00
Elena Demikhovsky b23b2fbd3a AVX-512: Added all SKX forms of GATHER instructions.
Added intrinsics.
Added encoding and tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-28 10:53:29 +00:00
Elena Demikhovsky 22debdcab6 X86-MPX: Implemented encoding for MPX instructions.
Added encoding tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239403 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 13:02:10 +00:00
Elena Demikhovsky bf704ed348 AVX-512: Added VPMOVx2M instructions for SKX,
fixed encoding of VPMOVM2x.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235385 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-21 14:38:31 +00:00
Craig Topper e2f7231e45 [X86] Add the remaining 11 possible exact ModRM formats. This makes their encodings linear which can then be used to simplify some other code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229279 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-15 04:16:44 +00:00
Craig Topper f3455f13a2 [X86] Add support for parsing and printing the mnemonic aliases for the XOP VPCOM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229078 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 07:42:25 +00:00
Craig Topper aef361807e [X86] Teach disassembler to handle illegal immediates on AVX512 integer compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 10:09:56 +00:00
Craig Topper 896c1e9b70 [X86] Replace i32i8imm on SSE/AVX instructions with i32u8imm which will make the assembler bounds check them. It will also make them print as unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227032 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 02:21:16 +00:00
Craig Topper 951d088ae7 [X86] Convert all the i8imm used by SSE and AVX instructions to u8imm.
This makes the assembler check their size and removes a hack from the disassembler to avoid sign extending the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226645 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 08:15:54 +00:00
Alexander Kornienko b4c6267f7c Replace size method call of containers to empty method where appropriate
This patch was generated by a clang tidy checker that is being open sourced.
The documentation of that checker is the following:

/// The emptiness of a container should be checked using the empty method
/// instead of the size method. It is not guaranteed that size is a
/// constant-time function, and it is generally more efficient and also shows
/// clearer intent to use empty. Furthermore some containers may implement the
/// empty method but not implement the size method. Using empty whenever
/// possible makes it easier to switch to another container in the future.

Patch by Gábor Horváth!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226161 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 11:41:30 +00:00
Craig Topper 367b67df3e [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225432 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 07:41:30 +00:00
Craig Topper decea4d6a6 [X86] Remove some unused TYPE enums from the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225343 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-07 07:47:52 +00:00
Craig Topper f6145affbf [X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.
Requires new AsmParserOperand types that detect 16-bit and 32/64-bit mode so that we choose the right instruction based on default sizing without predicates. This is necessary since predicates mess up the disassembler table building.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 08:59:30 +00:00
Craig Topper 3249372d83 [X86] Remove unused operand type from disassembler handling. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225151 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 08:18:52 +00:00
Craig Topper 01c99892ca [X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225099 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-03 00:00:20 +00:00
Craig Topper 71fc42dbf6 [X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates.
This is necessary to allow the disassembler to be able to handle AdSize32 instructions in 64-bit mode when address size prefix is used.

Eventually we should probably also support 'addr32' and 'addr16' in the assembler to override the address size on some of these instructions. But for now we'll just use special operand types that will lookup the current mode size to select the right instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-02 07:02:25 +00:00
Craig Topper 51f423ff30 [X86] Fix disassembly of absolute moves to work correctly in 16 and 32-bit modes with all 4 combinations of OpSize and AdSize prefixes being present or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-31 07:07:31 +00:00