mirror of
https://github.com/ARMSX2/ARMSX2.git
synced 2026-08-24 16:50:16 -07:00
Brian Degenhardt
3e077eff9b
Merges yaps2/main (github.com/yaps2/yaps2,c16b88cb7) into ARMSX2, replacing the arm64 recompiler family with the yaps2 JITs and importing the yaps2 testing, perf, and libretro infrastructure. Common ancestor is upstream PCSX2342db5152(2026-06-19); git auto-merged all but 38 files. Replaced (deleted in this merge, recoverable from history): - arm64/aR5900*, aR3000A*, aVU* -> arm64/iR5900*/iR3000A*/microVU*-arm64: EE static-pin register file with lazy dirty tracking, dual-residence allocator, IOP block linking, native COP2 macro ops, inline unaligned fastmem, persisted VU program cache, call-ret shadow ring, VU0 spin fast-forward. - MVU_DIFF shadow-run hooks in shared VU interpreter TUs (superseded by the offline vurunner JIT-vs-interp oracle). Imported from yaps2: - tests/ctest/core/recompilers: ~80 gtest suites (EE/IOP/VU differential harnesses, fuzzers, ABI digest tripwire, capture format pins) plus the gs_vertex_tests kernel oracle. - pcsx2-vurunner / pcsx2-eerunner headless capture-replay runners. - tools/perf counter-based A/B rigs, perf jitdump productionization, PmuCounters, clang-perf/clang-handheld presets. - pcsx2-libretro core (ENABLE_LIBRETRO, default OFF; rename pending). - GS vertex-kick fast path (GV series): TBL-based packed parse, register-resident kick, scalar-outcode cull, fused draw-rect/FindMinMax. - Null renderer, VK_KHR_display direct WSI, swapchain PresentStats. - SPU2 NEON mixer vectorization, EE timer read clamp (NFL 2K5 hang), IOP ioman signed-compare fix, assorted UB fixes. Kept from ARMSX2 in the both-touched files: - iOS dual-map W^X and fastmem-unavailable resilience (Memory, HostSys, vtlb). The split data/code area model is retained; both areas now take fixed VA hints so cached VU JIT code stays deterministic on Linux. - Android thread-affinity model, VMState shutdown early-outs, all platform frontends, branding, CI, RetroAchievements identity/policy. - GSDeviceVK: ARMSX2's push-descriptor decision logic (Mali crash gate, proprietary-vs-turnip Adreno split) merged with yaps2's descriptor-pool exhaustion recovery (flush + render-pass restart instead of dropped binds). Vendor feature policy is the union: Mali fbfetch policy with MediaTek/G57/Xclipse gates from ARMSX2; Adreno stencil/ROV/ test-and-sample-depth hang avoidance and no_ps2_z_quantization from yaps2. Build-system notes: - The Qt debugger is now gated behind ENABLE_QT_DEBUGGER (default off on arm64) so handheld builds drop the KDDockWidgets dependency. - GSDeviceNone and remaining yaps2 GS code were ported to the newer upstream GSTexture Usage-flags API. The replaced backend's interpreter-fallback glue (intExecuteOneInst, AndroidEEOpHist) and the EEDiffVerify runtime differ are retained for now; dead pieces will be removed in a follow-up commit.
152 lines
4.4 KiB
C++
152 lines
4.4 KiB
C++
// SPDX-FileCopyrightText: 2002-2026 PCSX2 Dev Team
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// SPDX-FileCopyrightText: 2026 isztld <https://isztld.com/>
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// SPDX-License-Identifier: GPL-3.0
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#pragma once
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#include "Common.h"
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#include "Vif_Dma.h"
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#include "Vif_Dynarec.h"
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#include "arm64/AsmHelpers.h"
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// Shared with microVU — single definition in arm64/microVU_Misc-arm64.inl
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// (mirrors x86, where newVif.h declares the helper defined in microVU_Misc.inl).
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extern void mVUmergeRegs(const vixl::aarch64::VRegister& dest, const vixl::aarch64::VRegister& src, int xyzw, bool modXYZW = false);
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#define xmmCol0 vixl::aarch64::q2
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#define xmmCol1 vixl::aarch64::q3
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#define xmmCol2 vixl::aarch64::q4
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#define xmmCol3 vixl::aarch64::q5
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#define xmmRow vixl::aarch64::q6
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#define xmmTemp vixl::aarch64::q7
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// --------------------------------------------------------------------------------------
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// VifUnpackSSE_Base
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// --------------------------------------------------------------------------------------
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class VifUnpackNEON_Base
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{
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public:
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bool usn; // unsigned flag
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bool doMask; // masking write enable flag
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int UnpkLoopIteration;
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int UnpkNoOfIterations;
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int IsAligned;
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protected:
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vixl::aarch64::MemOperand dstIndirect;
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vixl::aarch64::MemOperand srcIndirect;
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vixl::aarch64::VRegister workReg;
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vixl::aarch64::VRegister destReg;
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vixl::aarch64::WRegister workGprW;
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public:
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VifUnpackNEON_Base();
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virtual ~VifUnpackNEON_Base() = default;
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virtual void xUnpack(int upktype) const;
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virtual bool IsWriteProtectedOp() const = 0;
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virtual bool IsInputMasked() const = 0;
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virtual bool IsUnmaskedOp() const = 0;
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virtual void xMovDest() const;
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protected:
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virtual void doMaskWrite(const vixl::aarch64::VRegister& regX) const = 0;
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virtual void xShiftR(const vixl::aarch64::VRegister& regX, int n) const;
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virtual void xPMOVXX8(const vixl::aarch64::VRegister& regX) const;
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virtual void xPMOVXX16(const vixl::aarch64::VRegister& regX) const;
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virtual void xUPK_S_32() const;
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virtual void xUPK_S_16() const;
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virtual void xUPK_S_8() const;
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virtual void xUPK_V2_32() const;
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virtual void xUPK_V2_16() const;
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virtual void xUPK_V2_8() const;
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virtual void xUPK_V3_32() const;
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virtual void xUPK_V3_16() const;
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virtual void xUPK_V3_8() const;
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virtual void xUPK_V4_32() const;
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virtual void xUPK_V4_16() const;
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virtual void xUPK_V4_8() const;
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virtual void xUPK_V4_5() const;
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};
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// --------------------------------------------------------------------------------------
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// VifUnpackSSE_Simple
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// --------------------------------------------------------------------------------------
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class VifUnpackNEON_Simple : public VifUnpackNEON_Base
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{
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typedef VifUnpackNEON_Base _parent;
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public:
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int curCycle;
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public:
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VifUnpackNEON_Simple(bool usn_, bool domask_, int curCycle_);
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virtual ~VifUnpackNEON_Simple() = default;
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virtual bool IsWriteProtectedOp() const { return false; }
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virtual bool IsInputMasked() const { return false; }
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virtual bool IsUnmaskedOp() const { return !doMask; }
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protected:
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virtual void doMaskWrite(const vixl::aarch64::VRegister& regX) const;
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};
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// --------------------------------------------------------------------------------------
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// VifUnpackSSE_Dynarec
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// --------------------------------------------------------------------------------------
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class VifUnpackNEON_Dynarec : public VifUnpackNEON_Base
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{
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typedef VifUnpackNEON_Base _parent;
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public:
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bool isFill;
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int doMode; // two bit value representing difference mode
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bool skipProcessing;
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bool inputMasked;
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protected:
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const nVifStruct& v; // vif0 or vif1
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const nVifBlock& vB; // some pre-collected data from VifStruct
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int vCL; // internal copy of vif->cl
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public:
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VifUnpackNEON_Dynarec(const nVifStruct& vif_, const nVifBlock& vifBlock_);
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VifUnpackNEON_Dynarec(const VifUnpackNEON_Dynarec& src) // copy constructor
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: _parent(src)
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, v(src.v)
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, vB(src.vB)
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{
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isFill = src.isFill;
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vCL = src.vCL;
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}
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virtual ~VifUnpackNEON_Dynarec() = default;
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virtual bool IsWriteProtectedOp() const { return skipProcessing; }
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virtual bool IsInputMasked() const { return inputMasked; }
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virtual bool IsUnmaskedOp() const { return !doMode && !doMask; }
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void ModUnpack(int upknum, bool PostOp);
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void ProcessMasks();
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void CompileRoutine();
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protected:
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virtual void doMaskWrite(const vixl::aarch64::VRegister& regX) const;
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void SetMasks(int cS) const;
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void writeBackRow() const;
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static VifUnpackNEON_Dynarec FillingWrite(const VifUnpackNEON_Dynarec& src)
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{
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VifUnpackNEON_Dynarec fillingWrite(src);
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fillingWrite.doMask = true;
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fillingWrite.doMode = 0;
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return fillingWrite;
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}
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};
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