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pstef
85fb137bbc
eeFprSyncSlotFormat keys on CHECK_FPU_FULL, so the relocated file is what both of iFPUd's rungs compute over, not mode 3 alone. The comments that name a mode where they mean the tier are renamed to the tier.
72 lines
2.3 KiB
C++
72 lines
2.3 KiB
C++
// SPDX-FileCopyrightText: 2026 ARMSX2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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#pragma once
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#include "common/Pcsx2Defs.h"
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#include <cstring>
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/* An EE FPR word held in a host double:
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stored = sign << 63 | (word & 0x7FFFFFFF) << 29
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Uniformly stored == eeValue(word) / 2^896. The scale puts 2^-126 on
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0x1p-1022, so FPCR.FZ flushes at the EE's boundary; it keeps the double
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exponent field under 256, so the EE's top binade is an ordinary number
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here; and it is bijective, so a raw int32 parked in an FPR survives.
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*/
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static constexpr int kEeFprScaleExp = 896;
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__fi static constexpr u64 eeFprWidenBits(u32 word)
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{
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return (static_cast<u64>(word & 0x80000000u) << 32) | (static_cast<u64>(word & 0x7FFFFFFFu) << 29);
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}
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__fi static constexpr u32 eeFprNarrowBits(u64 stored)
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{
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return static_cast<u32>((stored >> 32) & 0x80000000u) | static_cast<u32>((stored >> 29) & 0x7FFFFFFFu);
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}
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// Bounds and scale factor for code computing in this domain. 0x7FFFFFFF is the
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// largest number the FPU has.
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static constexpr u64 kEeFprMaxBits = eeFprWidenBits(0x7FFFFFFFu);
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static constexpr u64 kEeFprMinBits = eeFprWidenBits(0xFFFFFFFFu);
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static constexpr u64 kEeFprUnscaleBits = UINT64_C(0x77F0000000000000);
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static constexpr u64 kEeFprSignBit = UINT64_C(0x8000000000000000);
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static constexpr u64 kEeFprExpMask = UINT64_C(0x7FF0000000000000);
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static_assert(kEeFprMaxBits == UINT64_C(0x0FFFFFFFE0000000));
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static_assert(kEeFprMinBits == UINT64_C(0x8FFFFFFFE0000000));
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static_assert((kEeFprUnscaleBits >> 52) == static_cast<u64>(1023 + kEeFprScaleExp),
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"kEeFprUnscaleBits must be 2^kEeFprScaleExp");
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__fi static double eeFprWiden(u32 word)
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{
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const u64 bits = eeFprWidenBits(word);
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double d;
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std::memcpy(&d, &bits, sizeof(d));
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return d;
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}
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__fi static u32 eeFprNarrow(double stored)
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{
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u64 bits;
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std::memcpy(&bits, &stored, sizeof(bits));
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return eeFprNarrowBits(bits);
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}
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/* Whether the FPR file is in this domain right now. It follows the EE FPU's
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clamp mode: only iFPUd computes here, and modes 0 to 2 leave the
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architectural word in the slot's low half. Read it through
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FPRreg::Word()/SetWord().
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*/
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extern bool g_eeFprSlotsRelocated;
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/* Put the file in the format the current clamp mode calls for. Emitted code
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assumes one format, so call this with the code-cache reset a mode change
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already forces.
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*/
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void eeFprSyncSlotFormat();
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