Commit Graph
93 Commits
Author SHA1 Message Date
Gauvain 'GovanifY' Roussel-Tarbouriech a2e2ed1ecf DEV9: initial merge complete 2020-10-31 16:35:38 +00:00
Gauvain 'GovanifY' Roussel-Tarbouriech 9c97092efd SPU2: merging some codebase callbacks 2020-10-04 00:13:36 +01:00
tellowkrinkle 75aac90452 Allocate memory in an x86-64-compatible way (#3523)
Allocate memory in an x86-64-compatible way

Another part of #3451

Note: While this shouldn't change how anything works, it's been the #1 source of breakage of 32-bit builds in #3451 (it was the cause for the failure of win32 to allocate memory and the failure of linux-32 afterward) so we should definitely make sure it gets tested

see #3523 for more information
2020-08-19 09:20:48 +01:00
Gregory Hainaut e4f407ae7c ee: use enum for mmap_GetRamPageInfo returned value 2015-11-12 10:35:10 +01:00
Gregory Hainaut c5d2343f51 pcsx2/common: fix tons of warning spamming on clang
* Don't use parameter name to avoid unused parameter
* Set a default for various case
2014-07-05 00:08:48 +02:00
gregory.hainaut ba2ec6fe59 all: gcc warning clean round 4
* remove unused variable
* move static function from h into cpp
* Initialized hw_by_page to 0xFFFFFFFF instead of -1 (number must be a positive integer)
* Use a s32 fore m_current_lsn instead of u32 (use -1 as error code)
Bonus: a couple of fix for clang compiler (doesn't mean that it fully compile with clang)
* remove useless __debugbreak on linux
* use short for 16bits atomic function


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5695 96395faa-99c1-11dd-bbfe-3dabce05a288
2013-07-03 18:42:05 +00:00
gregory.hainaut 3c7167be50 clean (some) gdb warning: round 1
* use svnrev.h on linux too
* replace sprintf_s with snprintf (hope it still compile on Windows)
* init integer with 0 instead of NULL
* various int -> u32/uint32/uint on for loop index
* remove a couple of unused variable
* init few variable
* disable unused warning results


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5683 96395faa-99c1-11dd-bbfe-3dabce05a288
2013-06-28 10:43:50 +00:00
refraction@gmail.com f984c7027f Decided after discussion amongst the team to let the BIOS bugs run wild. Altered microVU to just ignore these problems and end silently (The real VU would probably do this anyway)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5575 96395faa-99c1-11dd-bbfe-3dabce05a288
2013-02-24 20:29:51 +00:00
refraction@gmail.com 64474926f1 As previous commit - But check anywhere in the BIOS. It varies, the address i used was for Europe 1.7 only >.<
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5572 96395faa-99c1-11dd-bbfe-3dabce05a288
2013-02-24 15:24:28 +00:00
refraction@gmail.com 3f27730f45 Fixed up my changes from r5569. Change it so it only reverses the order during the bios writes to VU memory. FFXII is fine again, games still not have the unknown op problems, also TOCA 3 no longer has the illegal opcode errors.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5571 96395faa-99c1-11dd-bbfe-3dabce05a288
2013-02-24 14:37:30 +00:00
refraction@gmail.com 4cada4d0ff microVU: Fixed random Unknown Opcode messages. Turns out the bios blanket writes MOV VF00, VF00 and NOP (for lower, upper respectively) ops to the VU's on boot, apparently some game designers new this and just left it being ran as part of their programs. Our problem being is it was writing it to the VU MicroMem in the wrong order!
All fixed now :)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5569 96395faa-99c1-11dd-bbfe-3dabce05a288
2013-02-22 16:30:59 +00:00
cottonvibes ac9bf45f98 pcsx2: Implemented Threaded VU1 :D
Threading VU1 took a lot of rewrites and new code to make possible (MTGS, microVU, gifUnit...), but we finally got to the point where it was feasible, and now we've done it! (so now everyone can stop complaining that pcsx2 only takes advantages of 2 cores :p).

The speedups in the games that benefit from it are great if you have a cpu with 3+ cores (generally a 10~45% speedup), however games that are GS limited can be a slowdown (especially on dual core cpu's).

The option can be found in the speedhacks section as "MTVU (Multi-Threaded microVU1)". And when enabled it should should show the VU thread-time percentage on the title bar window (Like we currently do for EE/GS/UI threads).

It is listed as a speedhack because in order for threading VU1 to have been a speedup, we need to assume that games will not send gif packets containing Signal/Finish/Label commands from path 1 (vu1's xgkick). The good news is very-few games ever do this, so the compatibility of MTVU is very high (a game that does do this will likely hang).

Note: vs2010 builds and Linux builds need to be updated to include "MTVU.h" and "MTVU.cpp".


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4865 96395faa-99c1-11dd-bbfe-3dabce05a288
2011-08-12 02:31:49 +00:00
cottonvibes c05dc759e3 Big gif transfer code rewrite!
Pcsx2 now has a gifUnit class which acts like the ps2's gif and executes a single gif transfer at a time (and performs path arbitration according to priority and path3 slicing).

This new code is generally a speedup for most games. Particularly VU heavy games like GoW.
This revision breaks old saved state compatibility so don't update if you wish to keep playing with your old saved states.
Leave comments if this revision fixes or breaks anything...

Message to GS Plugin authors:
This new code now uses only 1 gif callback to transfer data to the gs plugin (GSgifTransfer).
pcsx2 also is garaunteed to send full GS primitives to the plugin. So you don't have to account for partial-transfers anymore.

Thanks goes out to shadowlady who tested around 500 games for me :D

Note 1: The old gif code is still in this revision, and can be enabled by the USE_OLD_GIF macro. The old code will be deleted soon.
Note 2: This revision also enables assertion dialogs in devel builds, and changed a lot of assume cases into assertions.


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4821 96395faa-99c1-11dd-bbfe-3dabce05a288
2011-07-24 13:02:50 +00:00
Jake.Stine 2ca8278c65 newHostVM: Some Linux compilation fixes, warning removals.
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4023 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-16 05:32:31 +00:00
Jake.Stine 9a0a89aa13 newHostVM: Cleanups, improved error messages.
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4022 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-16 04:53:52 +00:00
Jake.Stine 239c9f83d8 newHostVM: (Restored booting) -
* Added some bounds checking to debug builds for VTLB mappings.
 * Fixed a VU mapping bug that caused boot crashing
 * Fixed some startup, shutdown, and reset resource management.

git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4021 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-16 00:22:18 +00:00
Jake.Stine be1a590464 newHostVM: (WIP, may not run!) -- Applied host virtual memory mapping to the EE/IOP/VU main and on-chip memory banks. Added a new OO-based system allocator object for handling said virtual memory resources. Plus many code cleanups, and some added mess that needs to be cleaned up.
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4020 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-15 14:05:02 +00:00
Jake.Stine bd8127f75e newHostVM: More error/exception handling WIP stuff.
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@3980 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-10-29 02:49:01 +00:00
Jake.Stine 4bee22a4cd newHostVM branch: Implemented VM reservation feature for all recompilers.
* SuperVU note: SuperVU recompiler now uses two separate 8mb caches for VU0 and VU1 (needed in order to simplify/saneify the reserve/alloc stages of pcsx2 app startup).
 * Added MemsetFast.inl, which houses SSE intrinsic versions of memset and memzero, for use on aligned data targets.

git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@3975 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-10-27 19:18:46 +00:00
Jake.Stine bed33749b5 newHostVM branch: (now boots games!)
* EE and IOP recompilers are using the new RecompiledCodeReserve class.
 * PS2 main memory should typically be located at 0x20000000 (code still need some cleanups)

VU0/VU1 recompilers will be implemented soon.

git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@3959 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-10-22 19:47:02 +00:00
Jake.Stine 01541f2c92 newHostVM branch: work-in-progress stuff...
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@3958 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-10-22 16:23:52 +00:00
Jake.Stine 36d1503581 Converted IOP to use a static/global hardware register allocation. (same as I did for the EE a few weeks ago).
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3826 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-09-23 19:44:55 +00:00
arcum42 fe347c2c04 Fix Linux compilation, fix a potential crash, and add a build target I find useful occassionally.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3706 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-31 09:31:47 +00:00
Jake.Stine 003da7d287 MAJOR: All new hwRead and hwWrite handlers (expect regressions). Details:
* Writes via 16 and 8 bit ops now use 32-bit read/modify/write operations by default; which should enable nearly complete support for all such operations (instead of the formerly spotty coverage before).
 * Eliminated almost all former 8/16-bit specific register operations.  All code shares the same 32 bit handlers now.
 * Completely revamped the developer trace logs for hardware registers!  *ALL* registers are logged now, complete with address, name, and value being read/written (and nicely formatted!).
 * Handlers are now fully page-based using templated functions (minor speedup)


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3704 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-31 05:22:26 +00:00
Jake.Stine bda94b16cd General emulator memory work, regarding my new policy that most (or all) cpu and hardware registers should be standard globals, as it makes our lives a lot easier in general (and their memory footprint is small so it won't adversely affect the virtual memory availability of the host operating systems). Details:
* Removed the hacky g_pVU1 pointer, which required VU1 cpu registers to be part of VU0.  Replaced it with a standard VU1 variable (mimics all other CPU registers, which are standard static vars).  We were using translation functions/tables for all VU0 memory operations anyway, so this was a no-brainer.
 * Removed code from microVU that was only there to help deal with the fact that g_pVU1 was annoying.
 * Turned eeMem->HW into a static global array eeHw [64k].

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3692 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-27 03:21:16 +00:00