refractionpcsx2
8aca0fe288
VIF/MFIFO: Respect MFIFO empty condition on SPR transfers
2026-03-20 11:11:45 -04:00
SternXD
d983b2b066
Copyright: Change year from 2002-2025 to 2002-2026
2026-01-15 00:22:32 +01:00
TheTechnician27
23fd57f641
Copyright: Change year from 2002-2024 to 2002-2025
2025-01-20 05:07:26 +01:00
GovanifY
132431b7c8
headers: relicense to GPL-3.0+
...
also update to 2024 while i'm at it
2024-07-30 17:17:13 -04:00
Stenzek
d9abe10308
Misc: Remove explicit PCH include, switch to SPDX
2023-12-24 14:03:14 +10:00
Stenzek
81236209db
SaveState: Remove exceptions
2023-06-30 21:37:44 +10:00
lightningterror
3b7d22153f
SPR: Cleanup constants.
2023-06-06 12:46:46 +02:00
refractionpcsx2
fd4a5acc40
MTVU: Try to make T-Bit more reliable.
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Add MTVUSpeedHack option to GameDB so it can be forcefully disabled
2022-03-11 10:25:15 +00:00
refractionpcsx2
24e73b3134
Savestates: Add missing things from Savestates ( #4917 )
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Savestates: Add missing variables from Savestates
2021-10-20 10:41:50 +01:00
refractionpcsx2
8fe0061751
VU: Sync tighter when VU Kickstart is disabled + Improved M-Bit Sync
2021-09-19 18:49:24 +01:00
refractionpcsx2
ddb300027c
VU: Improve sync during interlock and Scratchpad VU mem writes
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Also added some setting of next block cycles to 0 in cases where we don't know ahead of compile time or the VU is ending.
2021-09-05 16:37:43 +01:00
refractionpcsx2
fd1305e4da
GIF: Reimplement GIF FIFO to kick in only when it is needed.
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Need to adjust GameDB entries for to remove ones no longer required, added EE Timing fix for SOCOM as that seems to fix it up like its sequel.
Some misc changes too which are inconsequential (mostly formatting)
2021-07-29 14:58:36 +01:00
refractionpcsx2
c31d6b9ca3
GameDB: Add dynamic patching for Ratchet & Clank games
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Removed IPUWait hack as it is no longer required
2021-07-15 13:43:16 +01:00
refractionpcsx2
2ffc6b3acd
SPR: Wrap transfers which would have read outside of SPR memory
2021-01-20 18:41:04 +00:00
refractionpcsx2
40d02400ca
DMAC: Improve DMA Stall handling ( #3701 )
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SIF: Implemented SIF0 and SIF1 DMA Stall handling
Cleaned up some of the handling of DMA Stalls on the other channels
2020-09-18 16:23:18 +01:00
Mrlinkwii
0f1cbe7410
SPR spacing cleanup ( #3499 )
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Correct spacing in SPR.cpp
2020-06-26 20:21:55 +01:00
refractionpcsx2
c78b5b706d
MFIFO: Refactor of some of the VIF/GIF MFIFO functionality. Centralised the MFIFO resume function which should have been separate anyway.
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Added some more memory address safeguards.
Logging now makes a bit more sense to look at.
2018-05-30 01:29:23 +01:00
Gregory Hainaut
4796803c33
pcsx2: Remove == true/false for boolean logic ( #1556 )
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As discussed in #1553
Clang Tidy reports goes from 156 to 9.
Remain some macro in spu2x + a deadcode line
2016-09-10 20:08:14 +02:00
Gregory Hainaut
b2fbbddfa0
dmac: implement memcpy wrapping for SPR
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Partially fix the dma test
2016-01-28 21:02:35 +01:00
Gregory Hainaut
5d1e5df205
dmac: wrap source address to remain in 16K
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Add some assertions of memcpy that overflow (need to be wrapped)
2016-01-27 22:39:39 +01:00
ramapcsx2
5c6b5374af
Less verbose SPR stall control logging, avoids fps dives in ST:Voyager
2015-02-15 18:09:14 +01:00
Sacha
3f7cb991e4
Remove some slow, redundant memcpy implementations: memcpy_const/memcpy_qwc/memcpy_aligned.
2014-08-27 13:13:48 +10:00
Sacha
3271048ab6
Remove init procedures from Hw.cpp
2014-08-15 14:17:35 +10:00
Gregory Hainaut
4d78b6be31
pcsx2/plugin: sign compare mismatch extra
2014-05-03 10:18:27 +02:00
refraction@gmail.com
fb13a502d2
Don't know how/why these changed in the DMA commit, but reverting to what it should be.
...
(seriously, i don't remember changing this!)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5920 96395faa-99c1-11dd-bbfe-3dabce05a288
2014-03-05 10:11:28 +00:00
refractionpcsx2
SternXD
TheTechnician27
GovanifY
Stenzek
lightningterror
Mrlinkwii
Gregory Hainaut
ramapcsx2
Sacha
refraction@gmail.com