diff --git a/common/emitter/instructions.h b/common/emitter/instructions.h
index 162ed5739c..48f39caf3f 100644
--- a/common/emitter/instructions.h
+++ b/common/emitter/instructions.h
@@ -469,11 +469,11 @@ namespace x86Emitter
 	extern void xMOVSSZX(const xRegisterSSE& dst, const xIndirectVoid& src);
 	extern void xMOVSDZX(const xRegisterSSE& dst, const xIndirectVoid& src);
 
-	extern void xMOVNTDQA(const xRegisterSSE& to, const xIndirectVoid& from);
-	extern void xMOVNTDQA(const xIndirectVoid& to, const xRegisterSSE& from);
+	extern void xMOVNTDQA(const xRegisterSSE& dst, const xIndirectVoid& src);
+	extern void xMOVNTDQA(const xIndirectVoid& dst, const xRegisterSSE& src);
 
-	extern void xMOVNTPD(const xIndirectVoid& to, const xRegisterSSE& from);
-	extern void xMOVNTPS(const xIndirectVoid& to, const xRegisterSSE& from);
+	extern void xMOVNTPD(const xIndirectVoid& dst, const xRegisterSSE& src);
+	extern void xMOVNTPS(const xIndirectVoid& dst, const xRegisterSSE& src);
 
 	extern void xMOVMSKPS(const xRegister32& to, const xRegisterSSE& from);
 	extern void xMOVMSKPD(const xRegister32& to, const xRegisterSSE& from);
diff --git a/common/emitter/simd.cpp b/common/emitter/simd.cpp
index f27e5d5612..bd392d96d6 100644
--- a/common/emitter/simd.cpp
+++ b/common/emitter/simd.cpp
@@ -829,19 +829,11 @@ namespace x86Emitter
 	IMPLEMENT_xMOVS(SS, pf3)
 	IMPLEMENT_xMOVS(SD, pf2)
 
-		//////////////////////////////////////////////////////////////////////////////////////////
-		// Non-temporal movs only support a register as a target (ie, load form only, no stores)
-		//
+	__fi void xMOVNTDQA(const xRegisterSSE& dst, const xIndirectVoid& src) { EmitSIMD(SIMDInstructionInfo(0x2a).p66().m0f38().mov(), dst, dst, src); }
+	__fi void xMOVNTDQA(const xIndirectVoid& dst, const xRegisterSSE& src) { EmitSIMD(SIMDInstructionInfo(0xe7).p66().mov(),         src, src, dst); }
 
-		__fi void xMOVNTDQA(const xRegisterSSE& to, const xIndirectVoid& from)
-	{
-		xOpWrite0F(0x66, 0x2a38, to.Id, from);
-	}
-
-	__fi void xMOVNTDQA(const xIndirectVoid& to, const xRegisterSSE& from) { xOpWrite0F(0x66, 0xe7, from, to); }
-
-	__fi void xMOVNTPD(const xIndirectVoid& to, const xRegisterSSE& from) { xOpWrite0F(0x66, 0x2b, from, to); }
-	__fi void xMOVNTPS(const xIndirectVoid& to, const xRegisterSSE& from) { xOpWrite0F(0x2b, from, to); }
+	__fi void xMOVNTPD(const xIndirectVoid& dst, const xRegisterSSE& src) { EmitSIMD(SIMDInstructionInfo(0x2b).p66().mov(), src, src, dst); }
+	__fi void xMOVNTPS(const xIndirectVoid& dst, const xRegisterSSE& src) { EmitSIMD(SIMDInstructionInfo(0x2b).mov(),       src, src, dst); }
 
 	// ------------------------------------------------------------------------
 
diff --git a/tests/ctest/common/x86emitter/codegen_tests_main.cpp b/tests/ctest/common/x86emitter/codegen_tests_main.cpp
index 2db635e4e6..947b2ae554 100644
--- a/tests/ctest/common/x86emitter/codegen_tests_main.cpp
+++ b/tests/ctest/common/x86emitter/codegen_tests_main.cpp
@@ -409,6 +409,11 @@ TEST(CodegenTests, SSETest)
 	CODEGEN_TEST(xMOVSD(xmm4, xmm8),      "f2 41 0f 10 e0");
 	CODEGEN_TEST(xMOVSD(ptr[rcx], xmm3),  "f2 0f 11 19");
 	CODEGEN_TEST(xMOVSDZX(xmm2, ptr[r9]), "f2 41 0f 10 11");
+
+	CODEGEN_TEST(xMOVNTDQA(xmm2, ptr[r9]), "66 41 0f 38 2a 11");
+	CODEGEN_TEST(xMOVNTDQA(ptr[r9], xmm3), "66 41 0f e7 19");
+	CODEGEN_TEST(xMOVNTPD(ptr[rax], xmm4), "66 0f 2b 20");
+	CODEGEN_TEST(xMOVNTPS(ptr[rcx], xmm8), "44 0f 2b 01");
 }
 
 TEST(CodegenTests, AVXTest)
@@ -684,6 +689,11 @@ TEST(CodegenTests, AVXTest)
 	CODEGEN_TEST(xMOVSD(ptr[rcx], xmm3),  "c5 fb 11 19");
 	CODEGEN_TEST(xMOVSDZX(xmm2, ptr[r9]), "c4 c1 7b 10 11");
 
+	CODEGEN_TEST(xMOVNTDQA(xmm2, ptr[r9]), "c4 c2 79 2a 11");
+	CODEGEN_TEST(xMOVNTDQA(ptr[r9], xmm3), "c4 c1 79 e7 19");
+	CODEGEN_TEST(xMOVNTPD(ptr[rax], xmm4), "c5 f9 2b 20");
+	CODEGEN_TEST(xMOVNTPS(ptr[rcx], xmm8), "c5 78 2b 01");
+
 	CODEGEN_TEST(xVMOVAPS(xmm0, xmm1), "c5 f8 28 c1");
 	CODEGEN_TEST(xVMOVAPS(xmm0, ptr32[rdi]), "c5 f8 28 07");
 	CODEGEN_TEST(xVMOVAPS(ptr32[rdi], xmm0), "c5 f8 29 07");