diff --git a/pcsx2/R5900.cpp b/pcsx2/R5900.cpp
index 3febf42454..31ae0d43ca 100644
--- a/pcsx2/R5900.cpp
+++ b/pcsx2/R5900.cpp
@@ -185,39 +185,19 @@ __ri void cpuException(u32 code, u32 bd)
 
 void cpuTlbMiss(u32 addr, u32 bd, u32 excode)
 {
-	Console.Error("cpuTlbMiss pc:%x, cycl:%x, addr: %x, status=%x, code=%x",
-		cpuRegs.pc, cpuRegs.cycle, addr, cpuRegs.CP0.n.Status.val, excode);
-
-#if 0
-	if (bd) Console.Warning("branch delay!!");
-
-	pxFail( "TLB Miss handler is uninished code." ); // temporary
-#endif
+	// Avoid too much spamming on the interpreter
+	if (Cpu != &intCpu || IsDebugBuild) {
+		Console.Error("cpuTlbMiss pc:%x, cycl:%x, addr: %x, status=%x, code=%x",
+				cpuRegs.pc, cpuRegs.cycle, addr, cpuRegs.CP0.n.Status.val, excode);
+	}
 
 	cpuRegs.CP0.n.BadVAddr = addr;
 	cpuRegs.CP0.n.Context &= 0xFF80000F;
 	cpuRegs.CP0.n.Context |= (addr >> 9) & 0x007FFFF0;
 	cpuRegs.CP0.n.EntryHi = (addr & 0xFFFFE000) | (cpuRegs.CP0.n.EntryHi & 0x1FFF);
 
-	// Don't reinvent the wheel ;)
 	cpuRegs.pc -= 4;
 	cpuException(excode, bd);
-#if 0
-	cpuRegs.CP0.n.Cause = excode;
-	if (!(cpuRegs.CP0.n.Status.val & 0x2)) { // EXL bit
-		cpuRegs.CP0.n.EPC = cpuRegs.pc - 4;
-	}
-
-	if (!cpuRegs.CP0.n.Status.b.IE) {
-		cpuRegs.pc = 0x80000000;
-	} else {
-		cpuRegs.pc = 0x80000180;
-	}
-
-	cpuRegs.CP0.n.Status.b.EXL = 1;
-	cpuUpdateOperationMode();
-//	Log=1; varLog|= 0x40000000;
-#endif
 }
 
 void cpuTlbMissR(u32 addr, u32 bd) {