mirror of
https://github.com/ARMSX2/ARMSX1.git
synced 2026-08-24 16:53:35 -07:00
Implemented bilinear texture filtering Fixed I_MASK IRQ triggering issue Implemented 384 mode (need config) Fixed CUE TOC values Implemented initial GPU line generalization Fixed SPU interpolation Fixed CPU delayed LWL/LWR Fixed CPU GTE instruction in delay slot
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include "mc2.h"
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#include "../log.h"
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psx_mc2_t* psx_mc2_create(void) {
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return (psx_mc2_t*)malloc(sizeof(psx_mc2_t));
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}
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/*
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1F801060h 4/2 RAM_SIZE (usually 00000B88h; 2MB RAM mirrored in first 8MB)
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*/
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void psx_mc2_init(psx_mc2_t* mc2) {
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memset(mc2, 0, sizeof(psx_mc2_t));
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mc2->io_base = PSX_MC2_BEGIN;
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mc2->io_size = PSX_MC2_SIZE;
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mc2->ram_size = 0x00000b88;
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}
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uint32_t psx_mc2_read32(psx_mc2_t* mc2, uint32_t offset) {
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switch (offset) {
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case 0x00: return mc2->ram_size;
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}
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log_warn("Unhandled 32-bit MC2 read at offset %08x", offset);
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return 0x0;
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}
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uint16_t psx_mc2_read16(psx_mc2_t* mc2, uint32_t offset) {
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log_warn("Unhandled 16-bit MC2 read at offset %08x", offset);
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return 0x0;
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}
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uint8_t psx_mc2_read8(psx_mc2_t* mc2, uint32_t offset) {
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log_warn("Unhandled 8-bit MC2 read at offset %08x", offset);
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return 0x0;
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}
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void psx_mc2_write32(psx_mc2_t* mc2, uint32_t offset, uint32_t value) {
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switch (offset) {
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case 0x00: printf("ram_size write %08x\n", value); mc2->ram_size = value; break;
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default: {
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log_warn("Unhandled 32-bit MC2 write at offset %08x (%08x)", offset, value);
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} break;
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}
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}
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void psx_mc2_write16(psx_mc2_t* mc2, uint32_t offset, uint16_t value) {
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log_warn("Unhandled 16-bit MC2 write at offset %08x (%04x)", offset, value);
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}
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void psx_mc2_write8(psx_mc2_t* mc2, uint32_t offset, uint8_t value) {
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log_warn("Unhandled 8-bit MC2 write at offset %08x (%02x)", offset, value);
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}
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void psx_mc2_destroy(psx_mc2_t* mc2) {
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free(mc2);
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} |