From 92f10ef13e71e221ae3a5bf31d7ac09b7097c17b Mon Sep 17 00:00:00 2001 From: zador-blood-stained Date: Thu, 17 Aug 2017 17:56:47 +0300 Subject: [PATCH] Add A10/A20 SPI overlays to use for enabling the SPI bus This allows easily setting up the SPI bus and enabling the pinmux for it (since compared to H3, H5 and A64 the base DT doesn't add pinctrl-* entries to the SPI controllers) --- sun4i-a10/README.sun4i-a10-overlays | 46 +++++++++++++++++++-------- sun4i-a10/sun4i-a10-spi-jedec-nor.dts | 8 ----- sun4i-a10/sun4i-a10-spi-spidev.dts | 8 ----- sun4i-a10/sun4i-a10-spi0.dts | 23 ++++++++++++++ sun4i-a10/sun4i-a10-spi1.dts | 22 +++++++++++++ sun4i-a10/sun4i-a10-spi2.dts | 23 ++++++++++++++ sun7i-a20/README.sun7i-a20-overlays | 45 ++++++++++++++++++-------- sun7i-a20/sun7i-a20-spi-jedec-nor.dts | 8 ----- sun7i-a20/sun7i-a20-spi-spidev.dts | 8 ----- sun7i-a20/sun7i-a20-spi0.dts | 23 ++++++++++++++ sun7i-a20/sun7i-a20-spi1.dts | 22 +++++++++++++ sun7i-a20/sun7i-a20-spi2.dts | 23 ++++++++++++++ 12 files changed, 199 insertions(+), 60 deletions(-) create mode 100644 sun4i-a10/sun4i-a10-spi0.dts create mode 100644 sun4i-a10/sun4i-a10-spi1.dts create mode 100644 sun4i-a10/sun4i-a10-spi2.dts create mode 100644 sun7i-a20/sun7i-a20-spi0.dts create mode 100644 sun7i-a20/sun7i-a20-spi1.dts create mode 100644 sun7i-a20/sun7i-a20-spi2.dts diff --git a/sun4i-a10/README.sun4i-a10-overlays b/sun4i-a10/README.sun4i-a10-overlays index adcc66f..fd059d1 100644 --- a/sun4i-a10/README.sun4i-a10-overlays +++ b/sun4i-a10/README.sun4i-a10-overlays @@ -26,6 +26,9 @@ I2C bus 0 is used for the AXP209 PMIC - pps-gpio - pwm - spdif-out +- spi0 +- spi1 +- spi2 - spi-jedec-nor - spi-spidev - uart1 @@ -110,6 +113,35 @@ Activates SPDIF/Toslink audio output SPDIF pin: PB13 +### spi0 + +Activates SPI controller 0 to use it with other overlays and sets up the pin multiplexing for it + +SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14 + +### spi1 + +Activates SPI controller 1 to use it with other overlays and sets up the pin multiplexing for it + +SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16 + +### spi2 + +Activates SPI controller 2 to use it with other overlays and sets up the pin multiplexing for it + +SPI 2 pins a (MOSI, MISO, SCK, CS0): PC21, PC22, PC20, PC19 +SPI 2 pins b (MOSI, MISO, SCK, CS0): PB16, PB17, PB15, PB14 + +Parameters: + +param_spi2_bus_pins (char) + SPI bus 2 pinmux variant + Optional + Default: a + Supported values: a, b + Determines what pins SPI bus 2 is exposed on if SPI 2 is used + + ### spi-jedec-nor Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus @@ -127,13 +159,6 @@ param_spinor_spi_bus (int) Required Supported values: 0, 1, 2 -param_spi2_bus_pins (char) - SPI bus 2 pinmux variant - Optional - Default: a - Supported values: a, b - Determines what pins SPI bus 2 is exposed on if SPI 2 is used by any overlay - param_spinor_max_freq (int) Maximum SPI frequency Optional @@ -157,13 +182,6 @@ param_spidev_spi_bus (int) Required Supported values: 0, 1, 2 -param_spi2_bus_pins (char) - SPI bus 2 pinmux variant - Optional - Default: a - Supported values: a, b - Determines what pins SPI bus 2 is exposed on if SPI 2 is used by any overlay - param_spidev_max_freq (int) Maximum SPIdev frequency Optional diff --git a/sun4i-a10/sun4i-a10-spi-jedec-nor.dts b/sun4i-a10/sun4i-a10-spi-jedec-nor.dts index a9feedf..7d3c252 100644 --- a/sun4i-a10/sun4i-a10-spi-jedec-nor.dts +++ b/sun4i-a10/sun4i-a10-spi-jedec-nor.dts @@ -16,9 +16,6 @@ fragment@1 { target = <&spi0>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi0_pins_a>; - pinctrl-1 = <&spi0_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spiflash { @@ -33,8 +30,6 @@ fragment@2 { target = <&spi1>; __overlay__ { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spiflash { @@ -49,9 +44,6 @@ fragment@3 { target = <&spi2>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi2_pins_a>; - pinctrl-1 = <&spi2_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spiflash { diff --git a/sun4i-a10/sun4i-a10-spi-spidev.dts b/sun4i-a10/sun4i-a10-spi-spidev.dts index 6072c66..ecdffc0 100644 --- a/sun4i-a10/sun4i-a10-spi-spidev.dts +++ b/sun4i-a10/sun4i-a10-spi-spidev.dts @@ -16,9 +16,6 @@ fragment@1 { target = <&spi0>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi0_pins_a>; - pinctrl-1 = <&spi0_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spidev { @@ -33,8 +30,6 @@ fragment@2 { target = <&spi1>; __overlay__ { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spidev { @@ -49,9 +44,6 @@ fragment@3 { target = <&spi2>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi2_pins_a>; - pinctrl-1 = <&spi2_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spidev { diff --git a/sun4i-a10/sun4i-a10-spi0.dts b/sun4i-a10/sun4i-a10-spi0.dts new file mode 100644 index 0000000..73f01a6 --- /dev/null +++ b/sun4i-a10/sun4i-a10-spi0.dts @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@01c05000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi0_pins_a>; + pinctrl-1 = <&spi0_cs0_pins_a>; + }; + }; +}; diff --git a/sun4i-a10/sun4i-a10-spi1.dts b/sun4i-a10/sun4i-a10-spi1.dts new file mode 100644 index 0000000..0b4f70f --- /dev/null +++ b/sun4i-a10/sun4i-a10-spi1.dts @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi1 = "/soc/spi@01c06000"; + }; + }; + + fragment@1 { + target = <&spi1>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>; + }; + }; +}; diff --git a/sun4i-a10/sun4i-a10-spi2.dts b/sun4i-a10/sun4i-a10-spi2.dts new file mode 100644 index 0000000..216058e --- /dev/null +++ b/sun4i-a10/sun4i-a10-spi2.dts @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi2 = "/soc/spi@01c17000"; + }; + }; + + fragment@1 { + target = <&spi2>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi2_pins_a>; + pinctrl-1 = <&spi2_cs0_pins_a>; + }; + }; +}; diff --git a/sun7i-a20/README.sun7i-a20-overlays b/sun7i-a20/README.sun7i-a20-overlays index 602a208..9e53a86 100644 --- a/sun7i-a20/README.sun7i-a20-overlays +++ b/sun7i-a20/README.sun7i-a20-overlays @@ -29,6 +29,9 @@ I2C bus 0 is used for the AXP209 PMIC - pps-gpio - pwm - spdif-out +- spi0 +- spi1 +- spi2 - spi-add-cs1 - spi-jedec-nor - spi-spidev @@ -146,6 +149,34 @@ Activates SPDIF/Toslink audio output SPDIF pin: PB13 +### spi0 + +Activates SPI controller 0 to use it with other overlays and sets up the pin multiplexing for it + +SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14 + +### spi1 + +Activates SPI controller 1 to use it with other overlays and sets up the pin multiplexing for it + +SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16 + +### spi2 + +Activates SPI controller 2 to use it with other overlays and sets up the pin multiplexing for it + +SPI 2 pins a (MOSI, MISO, SCK, CS0): PC21, PC22, PC20, PC19 +SPI 2 pins b (MOSI, MISO, SCK, CS0): PB16, PB17, PB15, PB14 + +Parameters: + +param_spi2_bus_pins (char) + SPI bus 2 pinmux variant + Optional + Default: a + Supported values: a, b + Determines what pins SPI bus 2 is exposed on if SPI 2 is used + ### spi-add-cs1 Activates SPI chip select 1 on SPI controller 0 @@ -177,13 +208,6 @@ param_spinor_spi_cs (int) Supported values: 0, 1 Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay -param_spi2_bus_pins (char) - SPI bus 2 pinmux variant - Optional - Default: a - Supported values: a, b - Determines what pins SPI bus 2 is exposed on if SPI 2 is used by any overlay - param_spinor_max_freq (int) Maximum SPI frequency Optional @@ -214,13 +238,6 @@ param_spidev_spi_cs (int) Supported values: 0, 1 Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay -param_spi2_bus_pins (char) - SPI bus 2 pinmux variant - Optional - Default: a - Supported values: a, b - Determines what pins SPI bus 2 is exposed on if SPI 2 is used by any overlay - param_spidev_max_freq (int) Maximum SPIdev frequency Optional diff --git a/sun7i-a20/sun7i-a20-spi-jedec-nor.dts b/sun7i-a20/sun7i-a20-spi-jedec-nor.dts index 08177a3..8df0250 100644 --- a/sun7i-a20/sun7i-a20-spi-jedec-nor.dts +++ b/sun7i-a20/sun7i-a20-spi-jedec-nor.dts @@ -16,9 +16,6 @@ fragment@1 { target = <&spi0>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi0_pins_a>; - pinctrl-1 = <&spi0_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spiflash { @@ -33,8 +30,6 @@ fragment@2 { target = <&spi1>; __overlay__ { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spiflash { @@ -49,9 +44,6 @@ fragment@3 { target = <&spi2>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi2_pins_a>; - pinctrl-1 = <&spi2_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spiflash { diff --git a/sun7i-a20/sun7i-a20-spi-spidev.dts b/sun7i-a20/sun7i-a20-spi-spidev.dts index c52ba0e..c89382e 100644 --- a/sun7i-a20/sun7i-a20-spi-spidev.dts +++ b/sun7i-a20/sun7i-a20-spi-spidev.dts @@ -16,9 +16,6 @@ fragment@1 { target = <&spi0>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi0_pins_a>; - pinctrl-1 = <&spi0_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spidev { @@ -33,8 +30,6 @@ fragment@2 { target = <&spi1>; __overlay__ { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spidev { @@ -49,9 +44,6 @@ fragment@3 { target = <&spi2>; __overlay__ { - pinctrl-names = "default", "default"; - pinctrl-0 = <&spi2_pins_a>; - pinctrl-1 = <&spi2_cs0_pins_a>; #address-cells = <1>; #size-cells = <0>; spidev { diff --git a/sun7i-a20/sun7i-a20-spi0.dts b/sun7i-a20/sun7i-a20-spi0.dts new file mode 100644 index 0000000..73f01a6 --- /dev/null +++ b/sun7i-a20/sun7i-a20-spi0.dts @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@01c05000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi0_pins_a>; + pinctrl-1 = <&spi0_cs0_pins_a>; + }; + }; +}; diff --git a/sun7i-a20/sun7i-a20-spi1.dts b/sun7i-a20/sun7i-a20-spi1.dts new file mode 100644 index 0000000..0b4f70f --- /dev/null +++ b/sun7i-a20/sun7i-a20-spi1.dts @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi1 = "/soc/spi@01c06000"; + }; + }; + + fragment@1 { + target = <&spi1>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>; + }; + }; +}; diff --git a/sun7i-a20/sun7i-a20-spi2.dts b/sun7i-a20/sun7i-a20-spi2.dts new file mode 100644 index 0000000..216058e --- /dev/null +++ b/sun7i-a20/sun7i-a20-spi2.dts @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi2 = "/soc/spi@01c17000"; + }; + }; + + fragment@1 { + target = <&spi2>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi2_pins_a>; + pinctrl-1 = <&spi2_cs0_pins_a>; + }; + }; +};