From 8e29b9245ecc17b58a875d61e4ca5671c4aca3fc Mon Sep 17 00:00:00 2001 From: Martin Ayotte Date: Tue, 13 Nov 2018 17:41:35 -0500 Subject: [PATCH] add h6-spi-add-cs1/h6-spi-jedec-nor overlays --- sun50i-h6/sun50i-h6-spi-add-cs1.dts | 41 ++++++++++++++++++++++++++ sun50i-h6/sun50i-h6-spi-jedec-nor.dts | 42 +++++++++++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 sun50i-h6/sun50i-h6-spi-add-cs1.dts create mode 100644 sun50i-h6/sun50i-h6-spi-jedec-nor.dts diff --git a/sun50i-h6/sun50i-h6-spi-add-cs1.dts b/sun50i-h6/sun50i-h6-spi-add-cs1.dts new file mode 100644 index 0000000..0fa060f --- /dev/null +++ b/sun50i-h6/sun50i-h6-spi-add-cs1.dts @@ -0,0 +1,41 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target = <&pio>; + __overlay__ { + spi0_cs1: spi0_cs1 { + pins = "PA10"; + function = "gpio_out"; + output-high; + }; + + spi1_cs1: spi1_cs1 { + pins = "PA21"; + function = "gpio_out"; + output-high; + }; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi0_cs1>; + cs-gpios = <0>, <&pio 0 10 0>; /* PA10 */ + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi1_cs1>; + cs-gpios = <0>, <&pio 0 21 0>; /* PA21 */ + }; + }; +}; diff --git a/sun50i-h6/sun50i-h6-spi-jedec-nor.dts b/sun50i-h6/sun50i-h6-spi-jedec-nor.dts new file mode 100644 index 0000000..3a2be38 --- /dev/null +++ b/sun50i-h6/sun50i-h6-spi-jedec-nor.dts @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@5010000"; + spi1 = "/soc/spi@5011000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; +};