mirror of
https://github.com/armbian/mpads.git
synced 2026-01-06 10:32:31 -08:00
27030 lines
965 KiB
Plaintext
27030 lines
965 KiB
Plaintext
|
|
USB2SDIO.elf: file format elf32-littlearm
|
|
|
|
Sections:
|
|
Idx Name Size VMA LMA File off Algn
|
|
0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
|
|
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
|
1 .text 0000a46c 080001e4 080001e4 000101e4 2**2
|
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
|
2 .rodata 000000ac 0800a650 0800a650 0001a650 2**2
|
|
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
|
3 .ARM.extab 00000000 0800a6fc 0800a6fc 00020124 2**0
|
|
CONTENTS
|
|
4 .ARM 00000000 0800a6fc 0800a6fc 00020124 2**0
|
|
CONTENTS
|
|
5 .preinit_array 00000000 0800a6fc 0800a6fc 00020124 2**0
|
|
CONTENTS, ALLOC, LOAD, DATA
|
|
6 .init_array 00000004 0800a6fc 0800a6fc 0001a6fc 2**2
|
|
CONTENTS, ALLOC, LOAD, DATA
|
|
7 .fini_array 00000004 0800a700 0800a700 0001a700 2**2
|
|
CONTENTS, ALLOC, LOAD, DATA
|
|
8 .data 00000124 20000000 0800a704 00020000 2**2
|
|
CONTENTS, ALLOC, LOAD, DATA
|
|
9 .bss 00000b3c 20000124 0800a828 00020124 2**2
|
|
ALLOC
|
|
10 ._user_heap_stack 00003000 20000c60 0800a828 00020c60 2**0
|
|
ALLOC
|
|
11 .ARM.attributes 00000029 00000000 00000000 00020124 2**0
|
|
CONTENTS, READONLY
|
|
12 .debug_info 00019e9a 00000000 00000000 0002014d 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
13 .debug_abbrev 00003703 00000000 00000000 00039fe7 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
14 .debug_aranges 00001110 00000000 00000000 0003d6f0 2**3
|
|
CONTENTS, READONLY, DEBUGGING
|
|
15 .debug_ranges 00000f88 00000000 00000000 0003e800 2**3
|
|
CONTENTS, READONLY, DEBUGGING
|
|
16 .debug_macro 0001db1a 00000000 00000000 0003f788 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
17 .debug_line 00014336 00000000 00000000 0005d2a2 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
18 .debug_str 0009bb5c 00000000 00000000 000715d8 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
19 .comment 0000007b 00000000 00000000 0010d134 2**0
|
|
CONTENTS, READONLY
|
|
20 .debug_frame 00004530 00000000 00000000 0010d1b0 2**2
|
|
CONTENTS, READONLY, DEBUGGING
|
|
|
|
Disassembly of section .text:
|
|
|
|
080001e4 <__do_global_dtors_aux>:
|
|
80001e4: b510 push {r4, lr}
|
|
80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>)
|
|
80001e8: 7823 ldrb r3, [r4, #0]
|
|
80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16>
|
|
80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>)
|
|
80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12>
|
|
80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>)
|
|
80001f2: f3af 8000 nop.w
|
|
80001f6: 2301 movs r3, #1
|
|
80001f8: 7023 strb r3, [r4, #0]
|
|
80001fa: bd10 pop {r4, pc}
|
|
80001fc: 20000124 .word 0x20000124
|
|
8000200: 00000000 .word 0x00000000
|
|
8000204: 0800a638 .word 0x0800a638
|
|
|
|
08000208 <frame_dummy>:
|
|
8000208: b508 push {r3, lr}
|
|
800020a: 4b03 ldr r3, [pc, #12] ; (8000218 <frame_dummy+0x10>)
|
|
800020c: b11b cbz r3, 8000216 <frame_dummy+0xe>
|
|
800020e: 4903 ldr r1, [pc, #12] ; (800021c <frame_dummy+0x14>)
|
|
8000210: 4803 ldr r0, [pc, #12] ; (8000220 <frame_dummy+0x18>)
|
|
8000212: f3af 8000 nop.w
|
|
8000216: bd08 pop {r3, pc}
|
|
8000218: 00000000 .word 0x00000000
|
|
800021c: 20000128 .word 0x20000128
|
|
8000220: 0800a638 .word 0x0800a638
|
|
|
|
08000224 <main>:
|
|
/**
|
|
* @brief The application entry point.
|
|
* @retval int
|
|
*/
|
|
int main(void)
|
|
{
|
|
8000224: b580 push {r7, lr}
|
|
8000226: b082 sub sp, #8
|
|
8000228: af00 add r7, sp, #0
|
|
/* USER CODE END 1 */
|
|
|
|
/* MCU Configuration--------------------------------------------------------*/
|
|
|
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
|
HAL_Init();
|
|
800022a: f000 fb3b bl 80008a4 <HAL_Init>
|
|
/* USER CODE BEGIN Init */
|
|
|
|
/* USER CODE END Init */
|
|
|
|
/* Configure the system clock */
|
|
SystemClock_Config();
|
|
800022e: f000 f89d bl 800036c <SystemClock_Config>
|
|
/* USER CODE BEGIN SysInit */
|
|
|
|
/* USER CODE END SysInit */
|
|
|
|
/* Initialize all configured peripherals */
|
|
MX_GPIO_Init();
|
|
8000232: f000 f963 bl 80004fc <MX_GPIO_Init>
|
|
MX_USB_DEVICE_Init();
|
|
8000236: f009 fd53 bl 8009ce0 <MX_USB_DEVICE_Init>
|
|
MX_SDIO_SD_Init();
|
|
800023a: f000 f923 bl 8000484 <MX_SDIO_SD_Init>
|
|
MX_I2C1_Init();
|
|
800023e: f000 f8f3 bl 8000428 <MX_I2C1_Init>
|
|
/* USER CODE BEGIN 2 */
|
|
|
|
uint8_t buff[2];
|
|
buff[0] = 255;
|
|
8000242: 23ff movs r3, #255 ; 0xff
|
|
8000244: 713b strb r3, [r7, #4]
|
|
buff[1] = 255;
|
|
8000246: 23ff movs r3, #255 ; 0xff
|
|
8000248: 717b strb r3, [r7, #5]
|
|
while (1)
|
|
{
|
|
/* USER CODE END WHILE */
|
|
|
|
/* USER CODE BEGIN 3 */
|
|
HAL_StatusTypeDef status = HAL_I2C_Slave_Receive(&hi2c1, buff, 2, 10);
|
|
800024a: 1d39 adds r1, r7, #4
|
|
800024c: 230a movs r3, #10
|
|
800024e: 2202 movs r2, #2
|
|
8000250: 4840 ldr r0, [pc, #256] ; (8000354 <main+0x130>)
|
|
8000252: f001 f83f bl 80012d4 <HAL_I2C_Slave_Receive>
|
|
8000256: 4603 mov r3, r0
|
|
8000258: 71fb strb r3, [r7, #7]
|
|
if (status == HAL_OK)
|
|
800025a: 79fb ldrb r3, [r7, #7]
|
|
800025c: 2b00 cmp r3, #0
|
|
800025e: d1f4 bne.n 800024a <main+0x26>
|
|
{
|
|
if (buff[0] == 0x01 && selectedSDcard != buff[1]) {
|
|
8000260: 793b ldrb r3, [r7, #4]
|
|
8000262: 2b01 cmp r3, #1
|
|
8000264: d1f1 bne.n 800024a <main+0x26>
|
|
8000266: 797b ldrb r3, [r7, #5]
|
|
8000268: 461a mov r2, r3
|
|
800026a: 4b3b ldr r3, [pc, #236] ; (8000358 <main+0x134>)
|
|
800026c: 681b ldr r3, [r3, #0]
|
|
800026e: 429a cmp r2, r3
|
|
8000270: d0eb beq.n 800024a <main+0x26>
|
|
// command to connect/disconnect host to sd
|
|
if (selectedSDcard > 0 && selectedSDcard < 8) {
|
|
8000272: 4b39 ldr r3, [pc, #228] ; (8000358 <main+0x134>)
|
|
8000274: 681b ldr r3, [r3, #0]
|
|
8000276: 2b00 cmp r3, #0
|
|
8000278: dd06 ble.n 8000288 <main+0x64>
|
|
800027a: 4b37 ldr r3, [pc, #220] ; (8000358 <main+0x134>)
|
|
800027c: 681b ldr r3, [r3, #0]
|
|
800027e: 2b07 cmp r3, #7
|
|
8000280: dc02 bgt.n 8000288 <main+0x64>
|
|
HAL_SD_DeInit(&hsd);
|
|
8000282: 4836 ldr r0, [pc, #216] ; (800035c <main+0x138>)
|
|
8000284: f003 fb48 bl 8003918 <HAL_SD_DeInit>
|
|
}
|
|
|
|
selectedSDcard = buff[1];
|
|
8000288: 797b ldrb r3, [r7, #5]
|
|
800028a: 461a mov r2, r3
|
|
800028c: 4b32 ldr r3, [pc, #200] ; (8000358 <main+0x134>)
|
|
800028e: 601a str r2, [r3, #0]
|
|
|
|
// disconnect all sd from master, connect to slaves
|
|
HAL_GPIO_WritePin(GPIOB, PORT0_Pin|PORT1_Pin|PORT2_Pin, GPIO_PIN_RESET);
|
|
8000290: 2200 movs r2, #0
|
|
8000292: f44f 4160 mov.w r1, #57344 ; 0xe000
|
|
8000296: 4832 ldr r0, [pc, #200] ; (8000360 <main+0x13c>)
|
|
8000298: f000 fecc bl 8001034 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOC, PORT3_Pin|PORT4_Pin, GPIO_PIN_RESET);
|
|
800029c: 2200 movs r2, #0
|
|
800029e: 21c0 movs r1, #192 ; 0xc0
|
|
80002a0: 4830 ldr r0, [pc, #192] ; (8000364 <main+0x140>)
|
|
80002a2: f000 fec7 bl 8001034 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOA, PORT5_Pin|PORT6_Pin|PORT7_Pin, GPIO_PIN_RESET);
|
|
80002a6: 2200 movs r2, #0
|
|
80002a8: f44f 61e0 mov.w r1, #1792 ; 0x700
|
|
80002ac: 482e ldr r0, [pc, #184] ; (8000368 <main+0x144>)
|
|
80002ae: f000 fec1 bl 8001034 <HAL_GPIO_WritePin>
|
|
|
|
|
|
// if valid sd number connect master to this sd
|
|
switch (buff[1]) {
|
|
80002b2: 797b ldrb r3, [r7, #5]
|
|
80002b4: 2b07 cmp r3, #7
|
|
80002b6: d849 bhi.n 800034c <main+0x128>
|
|
80002b8: a201 add r2, pc, #4 ; (adr r2, 80002c0 <main+0x9c>)
|
|
80002ba: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80002be: bf00 nop
|
|
80002c0: 080002e1 .word 0x080002e1
|
|
80002c4: 080002ef .word 0x080002ef
|
|
80002c8: 080002fd .word 0x080002fd
|
|
80002cc: 0800030b .word 0x0800030b
|
|
80002d0: 08000317 .word 0x08000317
|
|
80002d4: 08000323 .word 0x08000323
|
|
80002d8: 08000331 .word 0x08000331
|
|
80002dc: 0800033f .word 0x0800033f
|
|
case 0:
|
|
HAL_GPIO_WritePin(PORT0_GPIO_Port, PORT0_Pin, GPIO_PIN_SET);
|
|
80002e0: 2201 movs r2, #1
|
|
80002e2: f44f 5100 mov.w r1, #8192 ; 0x2000
|
|
80002e6: 481e ldr r0, [pc, #120] ; (8000360 <main+0x13c>)
|
|
80002e8: f000 fea4 bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
80002ec: e02f b.n 800034e <main+0x12a>
|
|
case 1:
|
|
HAL_GPIO_WritePin(PORT1_GPIO_Port, PORT1_Pin, GPIO_PIN_SET);
|
|
80002ee: 2201 movs r2, #1
|
|
80002f0: f44f 4180 mov.w r1, #16384 ; 0x4000
|
|
80002f4: 481a ldr r0, [pc, #104] ; (8000360 <main+0x13c>)
|
|
80002f6: f000 fe9d bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
80002fa: e028 b.n 800034e <main+0x12a>
|
|
case 2:
|
|
HAL_GPIO_WritePin(PORT2_GPIO_Port, PORT2_Pin, GPIO_PIN_SET);
|
|
80002fc: 2201 movs r2, #1
|
|
80002fe: f44f 4100 mov.w r1, #32768 ; 0x8000
|
|
8000302: 4817 ldr r0, [pc, #92] ; (8000360 <main+0x13c>)
|
|
8000304: f000 fe96 bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
8000308: e021 b.n 800034e <main+0x12a>
|
|
case 3:
|
|
HAL_GPIO_WritePin(PORT3_GPIO_Port, PORT3_Pin, GPIO_PIN_SET);
|
|
800030a: 2201 movs r2, #1
|
|
800030c: 2140 movs r1, #64 ; 0x40
|
|
800030e: 4815 ldr r0, [pc, #84] ; (8000364 <main+0x140>)
|
|
8000310: f000 fe90 bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
8000314: e01b b.n 800034e <main+0x12a>
|
|
case 4:
|
|
HAL_GPIO_WritePin(PORT4_GPIO_Port, PORT4_Pin, GPIO_PIN_SET);
|
|
8000316: 2201 movs r2, #1
|
|
8000318: 2180 movs r1, #128 ; 0x80
|
|
800031a: 4812 ldr r0, [pc, #72] ; (8000364 <main+0x140>)
|
|
800031c: f000 fe8a bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
8000320: e015 b.n 800034e <main+0x12a>
|
|
case 5:
|
|
HAL_GPIO_WritePin(PORT5_GPIO_Port, PORT5_Pin, GPIO_PIN_SET);
|
|
8000322: 2201 movs r2, #1
|
|
8000324: f44f 7180 mov.w r1, #256 ; 0x100
|
|
8000328: 480f ldr r0, [pc, #60] ; (8000368 <main+0x144>)
|
|
800032a: f000 fe83 bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
800032e: e00e b.n 800034e <main+0x12a>
|
|
case 6:
|
|
HAL_GPIO_WritePin(PORT6_GPIO_Port, PORT6_Pin, GPIO_PIN_SET);
|
|
8000330: 2201 movs r2, #1
|
|
8000332: f44f 7100 mov.w r1, #512 ; 0x200
|
|
8000336: 480c ldr r0, [pc, #48] ; (8000368 <main+0x144>)
|
|
8000338: f000 fe7c bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
800033c: e007 b.n 800034e <main+0x12a>
|
|
case 7:
|
|
HAL_GPIO_WritePin(PORT7_GPIO_Port, PORT7_Pin, GPIO_PIN_SET);
|
|
800033e: 2201 movs r2, #1
|
|
8000340: f44f 6180 mov.w r1, #1024 ; 0x400
|
|
8000344: 4808 ldr r0, [pc, #32] ; (8000368 <main+0x144>)
|
|
8000346: f000 fe75 bl 8001034 <HAL_GPIO_WritePin>
|
|
break;
|
|
800034a: e000 b.n 800034e <main+0x12a>
|
|
default:
|
|
break;
|
|
800034c: bf00 nop
|
|
}
|
|
|
|
MX_SDIO_SD_Init();
|
|
800034e: f000 f899 bl 8000484 <MX_SDIO_SD_Init>
|
|
{
|
|
8000352: e77a b.n 800024a <main+0x26>
|
|
8000354: 200003b4 .word 0x200003b4
|
|
8000358: 20000000 .word 0x20000000
|
|
800035c: 20000408 .word 0x20000408
|
|
8000360: 40010c00 .word 0x40010c00
|
|
8000364: 40011000 .word 0x40011000
|
|
8000368: 40010800 .word 0x40010800
|
|
|
|
0800036c <SystemClock_Config>:
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
800036c: b580 push {r7, lr}
|
|
800036e: b096 sub sp, #88 ; 0x58
|
|
8000370: af00 add r7, sp, #0
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
8000372: f107 0330 add.w r3, r7, #48 ; 0x30
|
|
8000376: 2228 movs r2, #40 ; 0x28
|
|
8000378: 2100 movs r1, #0
|
|
800037a: 4618 mov r0, r3
|
|
800037c: f00a f954 bl 800a628 <memset>
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
8000380: f107 031c add.w r3, r7, #28
|
|
8000384: 2200 movs r2, #0
|
|
8000386: 601a str r2, [r3, #0]
|
|
8000388: 605a str r2, [r3, #4]
|
|
800038a: 609a str r2, [r3, #8]
|
|
800038c: 60da str r2, [r3, #12]
|
|
800038e: 611a str r2, [r3, #16]
|
|
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
|
8000390: 1d3b adds r3, r7, #4
|
|
8000392: 2200 movs r2, #0
|
|
8000394: 601a str r2, [r3, #0]
|
|
8000396: 605a str r2, [r3, #4]
|
|
8000398: 609a str r2, [r3, #8]
|
|
800039a: 60da str r2, [r3, #12]
|
|
800039c: 611a str r2, [r3, #16]
|
|
800039e: 615a str r2, [r3, #20]
|
|
|
|
/** Initializes the RCC Oscillators according to the specified parameters
|
|
* in the RCC_OscInitTypeDef structure.
|
|
*/
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|
80003a0: 2301 movs r3, #1
|
|
80003a2: 633b str r3, [r7, #48] ; 0x30
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
80003a4: f44f 3380 mov.w r3, #65536 ; 0x10000
|
|
80003a8: 637b str r3, [r7, #52] ; 0x34
|
|
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
|
|
80003aa: f44f 3300 mov.w r3, #131072 ; 0x20000
|
|
80003ae: 63bb str r3, [r7, #56] ; 0x38
|
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
|
80003b0: 2301 movs r3, #1
|
|
80003b2: 643b str r3, [r7, #64] ; 0x40
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
80003b4: 2302 movs r3, #2
|
|
80003b6: 64fb str r3, [r7, #76] ; 0x4c
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
80003b8: f44f 3380 mov.w r3, #65536 ; 0x10000
|
|
80003bc: 653b str r3, [r7, #80] ; 0x50
|
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
|
|
80003be: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
|
|
80003c2: 657b str r3, [r7, #84] ; 0x54
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
80003c4: f107 0330 add.w r3, r7, #48 ; 0x30
|
|
80003c8: 4618 mov r0, r3
|
|
80003ca: f002 fd55 bl 8002e78 <HAL_RCC_OscConfig>
|
|
80003ce: 4603 mov r3, r0
|
|
80003d0: 2b00 cmp r3, #0
|
|
80003d2: d001 beq.n 80003d8 <SystemClock_Config+0x6c>
|
|
{
|
|
Error_Handler();
|
|
80003d4: f000 f916 bl 8000604 <Error_Handler>
|
|
}
|
|
/** Initializes the CPU, AHB and APB buses clocks
|
|
*/
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
80003d8: 230f movs r3, #15
|
|
80003da: 61fb str r3, [r7, #28]
|
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
80003dc: 2302 movs r3, #2
|
|
80003de: 623b str r3, [r7, #32]
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
80003e0: 2300 movs r3, #0
|
|
80003e2: 627b str r3, [r7, #36] ; 0x24
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
|
80003e4: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
80003e8: 62bb str r3, [r7, #40] ; 0x28
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
|
80003ea: 2300 movs r3, #0
|
|
80003ec: 62fb str r3, [r7, #44] ; 0x2c
|
|
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
|
80003ee: f107 031c add.w r3, r7, #28
|
|
80003f2: 2102 movs r1, #2
|
|
80003f4: 4618 mov r0, r3
|
|
80003f6: f002 ffbf bl 8003378 <HAL_RCC_ClockConfig>
|
|
80003fa: 4603 mov r3, r0
|
|
80003fc: 2b00 cmp r3, #0
|
|
80003fe: d001 beq.n 8000404 <SystemClock_Config+0x98>
|
|
{
|
|
Error_Handler();
|
|
8000400: f000 f900 bl 8000604 <Error_Handler>
|
|
}
|
|
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
|
8000404: 2310 movs r3, #16
|
|
8000406: 607b str r3, [r7, #4]
|
|
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
|
|
8000408: 2300 movs r3, #0
|
|
800040a: 61bb str r3, [r7, #24]
|
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
|
800040c: 1d3b adds r3, r7, #4
|
|
800040e: 4618 mov r0, r3
|
|
8000410: f003 f93c bl 800368c <HAL_RCCEx_PeriphCLKConfig>
|
|
8000414: 4603 mov r3, r0
|
|
8000416: 2b00 cmp r3, #0
|
|
8000418: d001 beq.n 800041e <SystemClock_Config+0xb2>
|
|
{
|
|
Error_Handler();
|
|
800041a: f000 f8f3 bl 8000604 <Error_Handler>
|
|
}
|
|
}
|
|
800041e: bf00 nop
|
|
8000420: 3758 adds r7, #88 ; 0x58
|
|
8000422: 46bd mov sp, r7
|
|
8000424: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08000428 <MX_I2C1_Init>:
|
|
* @brief I2C1 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_I2C1_Init(void)
|
|
{
|
|
8000428: b580 push {r7, lr}
|
|
800042a: af00 add r7, sp, #0
|
|
/* USER CODE END I2C1_Init 0 */
|
|
|
|
/* USER CODE BEGIN I2C1_Init 1 */
|
|
|
|
/* USER CODE END I2C1_Init 1 */
|
|
hi2c1.Instance = I2C1;
|
|
800042c: 4b12 ldr r3, [pc, #72] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
800042e: 4a13 ldr r2, [pc, #76] ; (800047c <MX_I2C1_Init+0x54>)
|
|
8000430: 601a str r2, [r3, #0]
|
|
hi2c1.Init.ClockSpeed = 400000;
|
|
8000432: 4b11 ldr r3, [pc, #68] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
8000434: 4a12 ldr r2, [pc, #72] ; (8000480 <MX_I2C1_Init+0x58>)
|
|
8000436: 605a str r2, [r3, #4]
|
|
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
|
8000438: 4b0f ldr r3, [pc, #60] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
800043a: 2200 movs r2, #0
|
|
800043c: 609a str r2, [r3, #8]
|
|
hi2c1.Init.OwnAddress1 = 74;
|
|
800043e: 4b0e ldr r3, [pc, #56] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
8000440: 224a movs r2, #74 ; 0x4a
|
|
8000442: 60da str r2, [r3, #12]
|
|
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
8000444: 4b0c ldr r3, [pc, #48] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
8000446: f44f 4280 mov.w r2, #16384 ; 0x4000
|
|
800044a: 611a str r2, [r3, #16]
|
|
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
|
800044c: 4b0a ldr r3, [pc, #40] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
800044e: 2200 movs r2, #0
|
|
8000450: 615a str r2, [r3, #20]
|
|
hi2c1.Init.OwnAddress2 = 0;
|
|
8000452: 4b09 ldr r3, [pc, #36] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
8000454: 2200 movs r2, #0
|
|
8000456: 619a str r2, [r3, #24]
|
|
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
|
8000458: 4b07 ldr r3, [pc, #28] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
800045a: 2200 movs r2, #0
|
|
800045c: 61da str r2, [r3, #28]
|
|
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
|
800045e: 4b06 ldr r3, [pc, #24] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
8000460: 2200 movs r2, #0
|
|
8000462: 621a str r2, [r3, #32]
|
|
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
|
|
8000464: 4804 ldr r0, [pc, #16] ; (8000478 <MX_I2C1_Init+0x50>)
|
|
8000466: f000 fdfd bl 8001064 <HAL_I2C_Init>
|
|
800046a: 4603 mov r3, r0
|
|
800046c: 2b00 cmp r3, #0
|
|
800046e: d001 beq.n 8000474 <MX_I2C1_Init+0x4c>
|
|
{
|
|
Error_Handler();
|
|
8000470: f000 f8c8 bl 8000604 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN I2C1_Init 2 */
|
|
|
|
/* USER CODE END I2C1_Init 2 */
|
|
|
|
}
|
|
8000474: bf00 nop
|
|
8000476: bd80 pop {r7, pc}
|
|
8000478: 200003b4 .word 0x200003b4
|
|
800047c: 40005400 .word 0x40005400
|
|
8000480: 00061a80 .word 0x00061a80
|
|
|
|
08000484 <MX_SDIO_SD_Init>:
|
|
* @brief SDIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_SDIO_SD_Init(void)
|
|
{
|
|
8000484: b580 push {r7, lr}
|
|
8000486: af00 add r7, sp, #0
|
|
|
|
/* USER CODE BEGIN SDIO_Init 0 */
|
|
if (selectedSDcard < 0 || selectedSDcard > 7) return;
|
|
8000488: 4b19 ldr r3, [pc, #100] ; (80004f0 <MX_SDIO_SD_Init+0x6c>)
|
|
800048a: 681b ldr r3, [r3, #0]
|
|
800048c: 2b00 cmp r3, #0
|
|
800048e: db2c blt.n 80004ea <MX_SDIO_SD_Init+0x66>
|
|
8000490: 4b17 ldr r3, [pc, #92] ; (80004f0 <MX_SDIO_SD_Init+0x6c>)
|
|
8000492: 681b ldr r3, [r3, #0]
|
|
8000494: 2b07 cmp r3, #7
|
|
8000496: dc28 bgt.n 80004ea <MX_SDIO_SD_Init+0x66>
|
|
/* USER CODE END SDIO_Init 0 */
|
|
|
|
/* USER CODE BEGIN SDIO_Init 1 */
|
|
|
|
/* USER CODE END SDIO_Init 1 */
|
|
hsd.Instance = SDIO;
|
|
8000498: 4b16 ldr r3, [pc, #88] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
800049a: 4a17 ldr r2, [pc, #92] ; (80004f8 <MX_SDIO_SD_Init+0x74>)
|
|
800049c: 601a str r2, [r3, #0]
|
|
hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
|
|
800049e: 4b15 ldr r3, [pc, #84] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004a0: 2200 movs r2, #0
|
|
80004a2: 605a str r2, [r3, #4]
|
|
hsd.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
|
|
80004a4: 4b13 ldr r3, [pc, #76] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004a6: 2200 movs r2, #0
|
|
80004a8: 609a str r2, [r3, #8]
|
|
hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
|
|
80004aa: 4b12 ldr r3, [pc, #72] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004ac: 2200 movs r2, #0
|
|
80004ae: 60da str r2, [r3, #12]
|
|
hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
|
|
80004b0: 4b10 ldr r3, [pc, #64] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004b2: 2200 movs r2, #0
|
|
80004b4: 611a str r2, [r3, #16]
|
|
hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_ENABLE;
|
|
80004b6: 4b0f ldr r3, [pc, #60] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004b8: f44f 4280 mov.w r2, #16384 ; 0x4000
|
|
80004bc: 615a str r2, [r3, #20]
|
|
hsd.Init.ClockDiv = 7;
|
|
80004be: 4b0d ldr r3, [pc, #52] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004c0: 2207 movs r2, #7
|
|
80004c2: 619a str r2, [r3, #24]
|
|
if (HAL_SD_Init(&hsd) != HAL_OK)
|
|
80004c4: 480b ldr r0, [pc, #44] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004c6: f003 f997 bl 80037f8 <HAL_SD_Init>
|
|
80004ca: 4603 mov r3, r0
|
|
80004cc: 2b00 cmp r3, #0
|
|
80004ce: d001 beq.n 80004d4 <MX_SDIO_SD_Init+0x50>
|
|
{
|
|
Error_Handler();
|
|
80004d0: f000 f898 bl 8000604 <Error_Handler>
|
|
}
|
|
if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
|
|
80004d4: f44f 6100 mov.w r1, #2048 ; 0x800
|
|
80004d8: 4806 ldr r0, [pc, #24] ; (80004f4 <MX_SDIO_SD_Init+0x70>)
|
|
80004da: f003 ffa9 bl 8004430 <HAL_SD_ConfigWideBusOperation>
|
|
80004de: 4603 mov r3, r0
|
|
80004e0: 2b00 cmp r3, #0
|
|
80004e2: d003 beq.n 80004ec <MX_SDIO_SD_Init+0x68>
|
|
{
|
|
Error_Handler();
|
|
80004e4: f000 f88e bl 8000604 <Error_Handler>
|
|
80004e8: e000 b.n 80004ec <MX_SDIO_SD_Init+0x68>
|
|
if (selectedSDcard < 0 || selectedSDcard > 7) return;
|
|
80004ea: bf00 nop
|
|
}
|
|
/* USER CODE BEGIN SDIO_Init 2 */
|
|
|
|
/* USER CODE END SDIO_Init 2 */
|
|
|
|
}
|
|
80004ec: bd80 pop {r7, pc}
|
|
80004ee: bf00 nop
|
|
80004f0: 20000000 .word 0x20000000
|
|
80004f4: 20000408 .word 0x20000408
|
|
80004f8: 40018000 .word 0x40018000
|
|
|
|
080004fc <MX_GPIO_Init>:
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
80004fc: b580 push {r7, lr}
|
|
80004fe: b088 sub sp, #32
|
|
8000500: af00 add r7, sp, #0
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8000502: f107 0310 add.w r3, r7, #16
|
|
8000506: 2200 movs r2, #0
|
|
8000508: 601a str r2, [r3, #0]
|
|
800050a: 605a str r2, [r3, #4]
|
|
800050c: 609a str r2, [r3, #8]
|
|
800050e: 60da str r2, [r3, #12]
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
|
8000510: 4b38 ldr r3, [pc, #224] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
8000512: 699b ldr r3, [r3, #24]
|
|
8000514: 4a37 ldr r2, [pc, #220] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
8000516: f043 0320 orr.w r3, r3, #32
|
|
800051a: 6193 str r3, [r2, #24]
|
|
800051c: 4b35 ldr r3, [pc, #212] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
800051e: 699b ldr r3, [r3, #24]
|
|
8000520: f003 0320 and.w r3, r3, #32
|
|
8000524: 60fb str r3, [r7, #12]
|
|
8000526: 68fb ldr r3, [r7, #12]
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8000528: 4b32 ldr r3, [pc, #200] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
800052a: 699b ldr r3, [r3, #24]
|
|
800052c: 4a31 ldr r2, [pc, #196] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
800052e: f043 0308 orr.w r3, r3, #8
|
|
8000532: 6193 str r3, [r2, #24]
|
|
8000534: 4b2f ldr r3, [pc, #188] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
8000536: 699b ldr r3, [r3, #24]
|
|
8000538: f003 0308 and.w r3, r3, #8
|
|
800053c: 60bb str r3, [r7, #8]
|
|
800053e: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
8000540: 4b2c ldr r3, [pc, #176] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
8000542: 699b ldr r3, [r3, #24]
|
|
8000544: 4a2b ldr r2, [pc, #172] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
8000546: f043 0310 orr.w r3, r3, #16
|
|
800054a: 6193 str r3, [r2, #24]
|
|
800054c: 4b29 ldr r3, [pc, #164] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
800054e: 699b ldr r3, [r3, #24]
|
|
8000550: f003 0310 and.w r3, r3, #16
|
|
8000554: 607b str r3, [r7, #4]
|
|
8000556: 687b ldr r3, [r7, #4]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
8000558: 4b26 ldr r3, [pc, #152] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
800055a: 699b ldr r3, [r3, #24]
|
|
800055c: 4a25 ldr r2, [pc, #148] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
800055e: f043 0304 orr.w r3, r3, #4
|
|
8000562: 6193 str r3, [r2, #24]
|
|
8000564: 4b23 ldr r3, [pc, #140] ; (80005f4 <MX_GPIO_Init+0xf8>)
|
|
8000566: 699b ldr r3, [r3, #24]
|
|
8000568: f003 0304 and.w r3, r3, #4
|
|
800056c: 603b str r3, [r7, #0]
|
|
800056e: 683b ldr r3, [r7, #0]
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(GPIOB, PORT0_Pin|PORT1_Pin|PORT2_Pin, GPIO_PIN_RESET);
|
|
8000570: 2200 movs r2, #0
|
|
8000572: f44f 4160 mov.w r1, #57344 ; 0xe000
|
|
8000576: 4820 ldr r0, [pc, #128] ; (80005f8 <MX_GPIO_Init+0xfc>)
|
|
8000578: f000 fd5c bl 8001034 <HAL_GPIO_WritePin>
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(GPIOC, PORT3_Pin|PORT4_Pin, GPIO_PIN_RESET);
|
|
800057c: 2200 movs r2, #0
|
|
800057e: 21c0 movs r1, #192 ; 0xc0
|
|
8000580: 481e ldr r0, [pc, #120] ; (80005fc <MX_GPIO_Init+0x100>)
|
|
8000582: f000 fd57 bl 8001034 <HAL_GPIO_WritePin>
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(GPIOA, PORT5_Pin|PORT6_Pin|PORT7_Pin, GPIO_PIN_RESET);
|
|
8000586: 2200 movs r2, #0
|
|
8000588: f44f 61e0 mov.w r1, #1792 ; 0x700
|
|
800058c: 481c ldr r0, [pc, #112] ; (8000600 <MX_GPIO_Init+0x104>)
|
|
800058e: f000 fd51 bl 8001034 <HAL_GPIO_WritePin>
|
|
|
|
/*Configure GPIO pins : PORT0_Pin PORT1_Pin PORT2_Pin */
|
|
GPIO_InitStruct.Pin = PORT0_Pin|PORT1_Pin|PORT2_Pin;
|
|
8000592: f44f 4360 mov.w r3, #57344 ; 0xe000
|
|
8000596: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8000598: 2301 movs r3, #1
|
|
800059a: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800059c: 2300 movs r3, #0
|
|
800059e: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80005a0: 2302 movs r3, #2
|
|
80005a2: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
80005a4: f107 0310 add.w r3, r7, #16
|
|
80005a8: 4619 mov r1, r3
|
|
80005aa: 4813 ldr r0, [pc, #76] ; (80005f8 <MX_GPIO_Init+0xfc>)
|
|
80005ac: f000 fb0c bl 8000bc8 <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : PORT3_Pin PORT4_Pin */
|
|
GPIO_InitStruct.Pin = PORT3_Pin|PORT4_Pin;
|
|
80005b0: 23c0 movs r3, #192 ; 0xc0
|
|
80005b2: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
80005b4: 2301 movs r3, #1
|
|
80005b6: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80005b8: 2300 movs r3, #0
|
|
80005ba: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80005bc: 2302 movs r3, #2
|
|
80005be: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
80005c0: f107 0310 add.w r3, r7, #16
|
|
80005c4: 4619 mov r1, r3
|
|
80005c6: 480d ldr r0, [pc, #52] ; (80005fc <MX_GPIO_Init+0x100>)
|
|
80005c8: f000 fafe bl 8000bc8 <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : PORT5_Pin PORT6_Pin PORT7_Pin */
|
|
GPIO_InitStruct.Pin = PORT5_Pin|PORT6_Pin|PORT7_Pin;
|
|
80005cc: f44f 63e0 mov.w r3, #1792 ; 0x700
|
|
80005d0: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
80005d2: 2301 movs r3, #1
|
|
80005d4: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80005d6: 2300 movs r3, #0
|
|
80005d8: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80005da: 2302 movs r3, #2
|
|
80005dc: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
80005de: f107 0310 add.w r3, r7, #16
|
|
80005e2: 4619 mov r1, r3
|
|
80005e4: 4806 ldr r0, [pc, #24] ; (8000600 <MX_GPIO_Init+0x104>)
|
|
80005e6: f000 faef bl 8000bc8 <HAL_GPIO_Init>
|
|
|
|
}
|
|
80005ea: bf00 nop
|
|
80005ec: 3720 adds r7, #32
|
|
80005ee: 46bd mov sp, r7
|
|
80005f0: bd80 pop {r7, pc}
|
|
80005f2: bf00 nop
|
|
80005f4: 40021000 .word 0x40021000
|
|
80005f8: 40010c00 .word 0x40010c00
|
|
80005fc: 40011000 .word 0x40011000
|
|
8000600: 40010800 .word 0x40010800
|
|
|
|
08000604 <Error_Handler>:
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
8000604: b480 push {r7}
|
|
8000606: af00 add r7, sp, #0
|
|
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid i" : : : "memory");
|
|
8000608: b672 cpsid i
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
800060a: e7fe b.n 800060a <Error_Handler+0x6>
|
|
|
|
0800060c <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
800060c: b480 push {r7}
|
|
800060e: b085 sub sp, #20
|
|
8000610: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_AFIO_CLK_ENABLE();
|
|
8000612: 4b15 ldr r3, [pc, #84] ; (8000668 <HAL_MspInit+0x5c>)
|
|
8000614: 699b ldr r3, [r3, #24]
|
|
8000616: 4a14 ldr r2, [pc, #80] ; (8000668 <HAL_MspInit+0x5c>)
|
|
8000618: f043 0301 orr.w r3, r3, #1
|
|
800061c: 6193 str r3, [r2, #24]
|
|
800061e: 4b12 ldr r3, [pc, #72] ; (8000668 <HAL_MspInit+0x5c>)
|
|
8000620: 699b ldr r3, [r3, #24]
|
|
8000622: f003 0301 and.w r3, r3, #1
|
|
8000626: 60bb str r3, [r7, #8]
|
|
8000628: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
800062a: 4b0f ldr r3, [pc, #60] ; (8000668 <HAL_MspInit+0x5c>)
|
|
800062c: 69db ldr r3, [r3, #28]
|
|
800062e: 4a0e ldr r2, [pc, #56] ; (8000668 <HAL_MspInit+0x5c>)
|
|
8000630: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
8000634: 61d3 str r3, [r2, #28]
|
|
8000636: 4b0c ldr r3, [pc, #48] ; (8000668 <HAL_MspInit+0x5c>)
|
|
8000638: 69db ldr r3, [r3, #28]
|
|
800063a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
800063e: 607b str r3, [r7, #4]
|
|
8000640: 687b ldr r3, [r7, #4]
|
|
|
|
/* System interrupt init*/
|
|
|
|
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
|
|
*/
|
|
__HAL_AFIO_REMAP_SWJ_NOJTAG();
|
|
8000642: 4b0a ldr r3, [pc, #40] ; (800066c <HAL_MspInit+0x60>)
|
|
8000644: 685b ldr r3, [r3, #4]
|
|
8000646: 60fb str r3, [r7, #12]
|
|
8000648: 68fb ldr r3, [r7, #12]
|
|
800064a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
|
800064e: 60fb str r3, [r7, #12]
|
|
8000650: 68fb ldr r3, [r7, #12]
|
|
8000652: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
|
|
8000656: 60fb str r3, [r7, #12]
|
|
8000658: 4a04 ldr r2, [pc, #16] ; (800066c <HAL_MspInit+0x60>)
|
|
800065a: 68fb ldr r3, [r7, #12]
|
|
800065c: 6053 str r3, [r2, #4]
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
800065e: bf00 nop
|
|
8000660: 3714 adds r7, #20
|
|
8000662: 46bd mov sp, r7
|
|
8000664: bc80 pop {r7}
|
|
8000666: 4770 bx lr
|
|
8000668: 40021000 .word 0x40021000
|
|
800066c: 40010000 .word 0x40010000
|
|
|
|
08000670 <HAL_I2C_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hi2c: I2C handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
|
{
|
|
8000670: b580 push {r7, lr}
|
|
8000672: b088 sub sp, #32
|
|
8000674: af00 add r7, sp, #0
|
|
8000676: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8000678: f107 0310 add.w r3, r7, #16
|
|
800067c: 2200 movs r2, #0
|
|
800067e: 601a str r2, [r3, #0]
|
|
8000680: 605a str r2, [r3, #4]
|
|
8000682: 609a str r2, [r3, #8]
|
|
8000684: 60da str r2, [r3, #12]
|
|
if(hi2c->Instance==I2C1)
|
|
8000686: 687b ldr r3, [r7, #4]
|
|
8000688: 681b ldr r3, [r3, #0]
|
|
800068a: 4a15 ldr r2, [pc, #84] ; (80006e0 <HAL_I2C_MspInit+0x70>)
|
|
800068c: 4293 cmp r3, r2
|
|
800068e: d123 bne.n 80006d8 <HAL_I2C_MspInit+0x68>
|
|
{
|
|
/* USER CODE BEGIN I2C1_MspInit 0 */
|
|
|
|
/* USER CODE END I2C1_MspInit 0 */
|
|
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8000690: 4b14 ldr r3, [pc, #80] ; (80006e4 <HAL_I2C_MspInit+0x74>)
|
|
8000692: 699b ldr r3, [r3, #24]
|
|
8000694: 4a13 ldr r2, [pc, #76] ; (80006e4 <HAL_I2C_MspInit+0x74>)
|
|
8000696: f043 0308 orr.w r3, r3, #8
|
|
800069a: 6193 str r3, [r2, #24]
|
|
800069c: 4b11 ldr r3, [pc, #68] ; (80006e4 <HAL_I2C_MspInit+0x74>)
|
|
800069e: 699b ldr r3, [r3, #24]
|
|
80006a0: f003 0308 and.w r3, r3, #8
|
|
80006a4: 60fb str r3, [r7, #12]
|
|
80006a6: 68fb ldr r3, [r7, #12]
|
|
/**I2C1 GPIO Configuration
|
|
PB6 ------> I2C1_SCL
|
|
PB7 ------> I2C1_SDA
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
|
80006a8: 23c0 movs r3, #192 ; 0xc0
|
|
80006aa: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
|
80006ac: 2312 movs r3, #18
|
|
80006ae: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
80006b0: 2303 movs r3, #3
|
|
80006b2: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
80006b4: f107 0310 add.w r3, r7, #16
|
|
80006b8: 4619 mov r1, r3
|
|
80006ba: 480b ldr r0, [pc, #44] ; (80006e8 <HAL_I2C_MspInit+0x78>)
|
|
80006bc: f000 fa84 bl 8000bc8 <HAL_GPIO_Init>
|
|
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
80006c0: 4b08 ldr r3, [pc, #32] ; (80006e4 <HAL_I2C_MspInit+0x74>)
|
|
80006c2: 69db ldr r3, [r3, #28]
|
|
80006c4: 4a07 ldr r2, [pc, #28] ; (80006e4 <HAL_I2C_MspInit+0x74>)
|
|
80006c6: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
|
|
80006ca: 61d3 str r3, [r2, #28]
|
|
80006cc: 4b05 ldr r3, [pc, #20] ; (80006e4 <HAL_I2C_MspInit+0x74>)
|
|
80006ce: 69db ldr r3, [r3, #28]
|
|
80006d0: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
80006d4: 60bb str r3, [r7, #8]
|
|
80006d6: 68bb ldr r3, [r7, #8]
|
|
/* USER CODE BEGIN I2C1_MspInit 1 */
|
|
|
|
/* USER CODE END I2C1_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
80006d8: bf00 nop
|
|
80006da: 3720 adds r7, #32
|
|
80006dc: 46bd mov sp, r7
|
|
80006de: bd80 pop {r7, pc}
|
|
80006e0: 40005400 .word 0x40005400
|
|
80006e4: 40021000 .word 0x40021000
|
|
80006e8: 40010c00 .word 0x40010c00
|
|
|
|
080006ec <HAL_SD_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hsd: SD handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
|
|
{
|
|
80006ec: b580 push {r7, lr}
|
|
80006ee: b08a sub sp, #40 ; 0x28
|
|
80006f0: af00 add r7, sp, #0
|
|
80006f2: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
80006f4: f107 0318 add.w r3, r7, #24
|
|
80006f8: 2200 movs r2, #0
|
|
80006fa: 601a str r2, [r3, #0]
|
|
80006fc: 605a str r2, [r3, #4]
|
|
80006fe: 609a str r2, [r3, #8]
|
|
8000700: 60da str r2, [r3, #12]
|
|
if(hsd->Instance==SDIO)
|
|
8000702: 687b ldr r3, [r7, #4]
|
|
8000704: 681b ldr r3, [r3, #0]
|
|
8000706: 4a22 ldr r2, [pc, #136] ; (8000790 <HAL_SD_MspInit+0xa4>)
|
|
8000708: 4293 cmp r3, r2
|
|
800070a: d13c bne.n 8000786 <HAL_SD_MspInit+0x9a>
|
|
{
|
|
/* USER CODE BEGIN SDIO_MspInit 0 */
|
|
|
|
/* USER CODE END SDIO_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_SDIO_CLK_ENABLE();
|
|
800070c: 4b21 ldr r3, [pc, #132] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
800070e: 695b ldr r3, [r3, #20]
|
|
8000710: 4a20 ldr r2, [pc, #128] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
8000712: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
|
8000716: 6153 str r3, [r2, #20]
|
|
8000718: 4b1e ldr r3, [pc, #120] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
800071a: 695b ldr r3, [r3, #20]
|
|
800071c: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
8000720: 617b str r3, [r7, #20]
|
|
8000722: 697b ldr r3, [r7, #20]
|
|
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
8000724: 4b1b ldr r3, [pc, #108] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
8000726: 699b ldr r3, [r3, #24]
|
|
8000728: 4a1a ldr r2, [pc, #104] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
800072a: f043 0310 orr.w r3, r3, #16
|
|
800072e: 6193 str r3, [r2, #24]
|
|
8000730: 4b18 ldr r3, [pc, #96] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
8000732: 699b ldr r3, [r3, #24]
|
|
8000734: f003 0310 and.w r3, r3, #16
|
|
8000738: 613b str r3, [r7, #16]
|
|
800073a: 693b ldr r3, [r7, #16]
|
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
|
800073c: 4b15 ldr r3, [pc, #84] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
800073e: 699b ldr r3, [r3, #24]
|
|
8000740: 4a14 ldr r2, [pc, #80] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
8000742: f043 0320 orr.w r3, r3, #32
|
|
8000746: 6193 str r3, [r2, #24]
|
|
8000748: 4b12 ldr r3, [pc, #72] ; (8000794 <HAL_SD_MspInit+0xa8>)
|
|
800074a: 699b ldr r3, [r3, #24]
|
|
800074c: f003 0320 and.w r3, r3, #32
|
|
8000750: 60fb str r3, [r7, #12]
|
|
8000752: 68fb ldr r3, [r7, #12]
|
|
PC10 ------> SDIO_D2
|
|
PC11 ------> SDIO_D3
|
|
PC12 ------> SDIO_CK
|
|
PD2 ------> SDIO_CMD
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
|
8000754: f44f 53f8 mov.w r3, #7936 ; 0x1f00
|
|
8000758: 61bb str r3, [r7, #24]
|
|
|GPIO_PIN_12;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
800075a: 2302 movs r3, #2
|
|
800075c: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
800075e: 2303 movs r3, #3
|
|
8000760: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
8000762: f107 0318 add.w r3, r7, #24
|
|
8000766: 4619 mov r1, r3
|
|
8000768: 480b ldr r0, [pc, #44] ; (8000798 <HAL_SD_MspInit+0xac>)
|
|
800076a: f000 fa2d bl 8000bc8 <HAL_GPIO_Init>
|
|
|
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
|
800076e: 2304 movs r3, #4
|
|
8000770: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
8000772: 2302 movs r3, #2
|
|
8000774: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
8000776: 2303 movs r3, #3
|
|
8000778: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
|
800077a: f107 0318 add.w r3, r7, #24
|
|
800077e: 4619 mov r1, r3
|
|
8000780: 4806 ldr r0, [pc, #24] ; (800079c <HAL_SD_MspInit+0xb0>)
|
|
8000782: f000 fa21 bl 8000bc8 <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN SDIO_MspInit 1 */
|
|
|
|
/* USER CODE END SDIO_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
8000786: bf00 nop
|
|
8000788: 3728 adds r7, #40 ; 0x28
|
|
800078a: 46bd mov sp, r7
|
|
800078c: bd80 pop {r7, pc}
|
|
800078e: bf00 nop
|
|
8000790: 40018000 .word 0x40018000
|
|
8000794: 40021000 .word 0x40021000
|
|
8000798: 40011000 .word 0x40011000
|
|
800079c: 40011400 .word 0x40011400
|
|
|
|
080007a0 <HAL_SD_MspDeInit>:
|
|
* This function freeze the hardware resources used in this example
|
|
* @param hsd: SD handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
|
|
{
|
|
80007a0: b580 push {r7, lr}
|
|
80007a2: b082 sub sp, #8
|
|
80007a4: af00 add r7, sp, #0
|
|
80007a6: 6078 str r0, [r7, #4]
|
|
if(hsd->Instance==SDIO)
|
|
80007a8: 687b ldr r3, [r7, #4]
|
|
80007aa: 681b ldr r3, [r3, #0]
|
|
80007ac: 4a0a ldr r2, [pc, #40] ; (80007d8 <HAL_SD_MspDeInit+0x38>)
|
|
80007ae: 4293 cmp r3, r2
|
|
80007b0: d10e bne.n 80007d0 <HAL_SD_MspDeInit+0x30>
|
|
{
|
|
/* USER CODE BEGIN SDIO_MspDeInit 0 */
|
|
|
|
/* USER CODE END SDIO_MspDeInit 0 */
|
|
/* Peripheral clock disable */
|
|
__HAL_RCC_SDIO_CLK_DISABLE();
|
|
80007b2: 4b0a ldr r3, [pc, #40] ; (80007dc <HAL_SD_MspDeInit+0x3c>)
|
|
80007b4: 695b ldr r3, [r3, #20]
|
|
80007b6: 4a09 ldr r2, [pc, #36] ; (80007dc <HAL_SD_MspDeInit+0x3c>)
|
|
80007b8: f423 6380 bic.w r3, r3, #1024 ; 0x400
|
|
80007bc: 6153 str r3, [r2, #20]
|
|
PC10 ------> SDIO_D2
|
|
PC11 ------> SDIO_D3
|
|
PC12 ------> SDIO_CK
|
|
PD2 ------> SDIO_CMD
|
|
*/
|
|
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
|
80007be: f44f 51f8 mov.w r1, #7936 ; 0x1f00
|
|
80007c2: 4807 ldr r0, [pc, #28] ; (80007e0 <HAL_SD_MspDeInit+0x40>)
|
|
80007c4: f000 fb6a bl 8000e9c <HAL_GPIO_DeInit>
|
|
|GPIO_PIN_12);
|
|
|
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
|
|
80007c8: 2104 movs r1, #4
|
|
80007ca: 4806 ldr r0, [pc, #24] ; (80007e4 <HAL_SD_MspDeInit+0x44>)
|
|
80007cc: f000 fb66 bl 8000e9c <HAL_GPIO_DeInit>
|
|
/* USER CODE BEGIN SDIO_MspDeInit 1 */
|
|
|
|
/* USER CODE END SDIO_MspDeInit 1 */
|
|
}
|
|
|
|
}
|
|
80007d0: bf00 nop
|
|
80007d2: 3708 adds r7, #8
|
|
80007d4: 46bd mov sp, r7
|
|
80007d6: bd80 pop {r7, pc}
|
|
80007d8: 40018000 .word 0x40018000
|
|
80007dc: 40021000 .word 0x40021000
|
|
80007e0: 40011000 .word 0x40011000
|
|
80007e4: 40011400 .word 0x40011400
|
|
|
|
080007e8 <NMI_Handler>:
|
|
/******************************************************************************/
|
|
/**
|
|
* @brief This function handles Non maskable interrupt.
|
|
*/
|
|
void NMI_Handler(void)
|
|
{
|
|
80007e8: b480 push {r7}
|
|
80007ea: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
while (1)
|
|
80007ec: e7fe b.n 80007ec <NMI_Handler+0x4>
|
|
|
|
080007ee <HardFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Hard fault interrupt.
|
|
*/
|
|
void HardFault_Handler(void)
|
|
{
|
|
80007ee: b480 push {r7}
|
|
80007f0: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
80007f2: e7fe b.n 80007f2 <HardFault_Handler+0x4>
|
|
|
|
080007f4 <MemManage_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Memory management fault.
|
|
*/
|
|
void MemManage_Handler(void)
|
|
{
|
|
80007f4: b480 push {r7}
|
|
80007f6: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
|
|
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
|
while (1)
|
|
80007f8: e7fe b.n 80007f8 <MemManage_Handler+0x4>
|
|
|
|
080007fa <BusFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Prefetch fault, memory access fault.
|
|
*/
|
|
void BusFault_Handler(void)
|
|
{
|
|
80007fa: b480 push {r7}
|
|
80007fc: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
|
|
|
/* USER CODE END BusFault_IRQn 0 */
|
|
while (1)
|
|
80007fe: e7fe b.n 80007fe <BusFault_Handler+0x4>
|
|
|
|
08000800 <UsageFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Undefined instruction or illegal state.
|
|
*/
|
|
void UsageFault_Handler(void)
|
|
{
|
|
8000800: b480 push {r7}
|
|
8000802: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
|
|
|
/* USER CODE END UsageFault_IRQn 0 */
|
|
while (1)
|
|
8000804: e7fe b.n 8000804 <UsageFault_Handler+0x4>
|
|
|
|
08000806 <SVC_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System service call via SWI instruction.
|
|
*/
|
|
void SVC_Handler(void)
|
|
{
|
|
8000806: b480 push {r7}
|
|
8000808: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END SVCall_IRQn 0 */
|
|
/* USER CODE BEGIN SVCall_IRQn 1 */
|
|
|
|
/* USER CODE END SVCall_IRQn 1 */
|
|
}
|
|
800080a: bf00 nop
|
|
800080c: 46bd mov sp, r7
|
|
800080e: bc80 pop {r7}
|
|
8000810: 4770 bx lr
|
|
|
|
08000812 <DebugMon_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Debug monitor.
|
|
*/
|
|
void DebugMon_Handler(void)
|
|
{
|
|
8000812: b480 push {r7}
|
|
8000814: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
|
}
|
|
8000816: bf00 nop
|
|
8000818: 46bd mov sp, r7
|
|
800081a: bc80 pop {r7}
|
|
800081c: 4770 bx lr
|
|
|
|
0800081e <PendSV_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Pendable request for system service.
|
|
*/
|
|
void PendSV_Handler(void)
|
|
{
|
|
800081e: b480 push {r7}
|
|
8000820: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END PendSV_IRQn 0 */
|
|
/* USER CODE BEGIN PendSV_IRQn 1 */
|
|
|
|
/* USER CODE END PendSV_IRQn 1 */
|
|
}
|
|
8000822: bf00 nop
|
|
8000824: 46bd mov sp, r7
|
|
8000826: bc80 pop {r7}
|
|
8000828: 4770 bx lr
|
|
|
|
0800082a <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
800082a: b580 push {r7, lr}
|
|
800082c: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
800082e: f000 f87f bl 8000930 <HAL_IncTick>
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
8000832: bf00 nop
|
|
8000834: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08000838 <USB_LP_CAN1_RX0_IRQHandler>:
|
|
|
|
/**
|
|
* @brief This function handles USB low priority or CAN RX0 interrupts.
|
|
*/
|
|
void USB_LP_CAN1_RX0_IRQHandler(void)
|
|
{
|
|
8000838: b580 push {r7, lr}
|
|
800083a: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
|
|
|
|
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
|
|
HAL_PCD_IRQHandler(&hpcd_USB_FS);
|
|
800083c: 4802 ldr r0, [pc, #8] ; (8000848 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
|
|
800083e: f001 f89c bl 800197a <HAL_PCD_IRQHandler>
|
|
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
|
|
|
|
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
|
|
}
|
|
8000842: bf00 nop
|
|
8000844: bd80 pop {r7, pc}
|
|
8000846: bf00 nop
|
|
8000848: 20000974 .word 0x20000974
|
|
|
|
0800084c <SystemInit>:
|
|
* @note This function should be used only after reset.
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
void SystemInit (void)
|
|
{
|
|
800084c: b480 push {r7}
|
|
800084e: af00 add r7, sp, #0
|
|
|
|
/* Configure the Vector Table location -------------------------------------*/
|
|
#if defined(USER_VECT_TAB_ADDRESS)
|
|
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
|
#endif /* USER_VECT_TAB_ADDRESS */
|
|
}
|
|
8000850: bf00 nop
|
|
8000852: 46bd mov sp, r7
|
|
8000854: bc80 pop {r7}
|
|
8000856: 4770 bx lr
|
|
|
|
08000858 <Reset_Handler>:
|
|
8000858: 2100 movs r1, #0
|
|
800085a: e003 b.n 8000864 <LoopCopyDataInit>
|
|
|
|
0800085c <CopyDataInit>:
|
|
800085c: 4b0b ldr r3, [pc, #44] ; (800088c <LoopFillZerobss+0x14>)
|
|
800085e: 585b ldr r3, [r3, r1]
|
|
8000860: 5043 str r3, [r0, r1]
|
|
8000862: 3104 adds r1, #4
|
|
|
|
08000864 <LoopCopyDataInit>:
|
|
8000864: 480a ldr r0, [pc, #40] ; (8000890 <LoopFillZerobss+0x18>)
|
|
8000866: 4b0b ldr r3, [pc, #44] ; (8000894 <LoopFillZerobss+0x1c>)
|
|
8000868: 1842 adds r2, r0, r1
|
|
800086a: 429a cmp r2, r3
|
|
800086c: d3f6 bcc.n 800085c <CopyDataInit>
|
|
800086e: 4a0a ldr r2, [pc, #40] ; (8000898 <LoopFillZerobss+0x20>)
|
|
8000870: e002 b.n 8000878 <LoopFillZerobss>
|
|
|
|
08000872 <FillZerobss>:
|
|
8000872: 2300 movs r3, #0
|
|
8000874: f842 3b04 str.w r3, [r2], #4
|
|
|
|
08000878 <LoopFillZerobss>:
|
|
8000878: 4b08 ldr r3, [pc, #32] ; (800089c <LoopFillZerobss+0x24>)
|
|
800087a: 429a cmp r2, r3
|
|
800087c: d3f9 bcc.n 8000872 <FillZerobss>
|
|
800087e: f7ff ffe5 bl 800084c <SystemInit>
|
|
8000882: f009 fead bl 800a5e0 <__libc_init_array>
|
|
8000886: f7ff fccd bl 8000224 <main>
|
|
800088a: 4770 bx lr
|
|
800088c: 0800a704 .word 0x0800a704
|
|
8000890: 20000000 .word 0x20000000
|
|
8000894: 20000124 .word 0x20000124
|
|
8000898: 20000124 .word 0x20000124
|
|
800089c: 20000c60 .word 0x20000c60
|
|
|
|
080008a0 <ADC1_2_IRQHandler>:
|
|
80008a0: e7fe b.n 80008a0 <ADC1_2_IRQHandler>
|
|
...
|
|
|
|
080008a4 <HAL_Init>:
|
|
* need to ensure that the SysTick time base is always set to 1 millisecond
|
|
* to have correct HAL operation.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_Init(void)
|
|
{
|
|
80008a4: b580 push {r7, lr}
|
|
80008a6: af00 add r7, sp, #0
|
|
defined(STM32F102x6) || defined(STM32F102xB) || \
|
|
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
|
defined(STM32F105xC) || defined(STM32F107xC)
|
|
|
|
/* Prefetch buffer is not available on value line devices */
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
80008a8: 4b08 ldr r3, [pc, #32] ; (80008cc <HAL_Init+0x28>)
|
|
80008aa: 681b ldr r3, [r3, #0]
|
|
80008ac: 4a07 ldr r2, [pc, #28] ; (80008cc <HAL_Init+0x28>)
|
|
80008ae: f043 0310 orr.w r3, r3, #16
|
|
80008b2: 6013 str r3, [r2, #0]
|
|
#endif
|
|
#endif /* PREFETCH_ENABLE */
|
|
|
|
/* Set Interrupt Group Priority */
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
80008b4: 2003 movs r0, #3
|
|
80008b6: f000 f945 bl 8000b44 <HAL_NVIC_SetPriorityGrouping>
|
|
|
|
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
80008ba: 2000 movs r0, #0
|
|
80008bc: f000 f808 bl 80008d0 <HAL_InitTick>
|
|
|
|
/* Init the low level hardware */
|
|
HAL_MspInit();
|
|
80008c0: f7ff fea4 bl 800060c <HAL_MspInit>
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80008c4: 2300 movs r3, #0
|
|
}
|
|
80008c6: 4618 mov r0, r3
|
|
80008c8: bd80 pop {r7, pc}
|
|
80008ca: bf00 nop
|
|
80008cc: 40022000 .word 0x40022000
|
|
|
|
080008d0 <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
80008d0: b580 push {r7, lr}
|
|
80008d2: b082 sub sp, #8
|
|
80008d4: af00 add r7, sp, #0
|
|
80008d6: 6078 str r0, [r7, #4]
|
|
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
80008d8: 4b12 ldr r3, [pc, #72] ; (8000924 <HAL_InitTick+0x54>)
|
|
80008da: 681a ldr r2, [r3, #0]
|
|
80008dc: 4b12 ldr r3, [pc, #72] ; (8000928 <HAL_InitTick+0x58>)
|
|
80008de: 781b ldrb r3, [r3, #0]
|
|
80008e0: 4619 mov r1, r3
|
|
80008e2: f44f 737a mov.w r3, #1000 ; 0x3e8
|
|
80008e6: fbb3 f3f1 udiv r3, r3, r1
|
|
80008ea: fbb2 f3f3 udiv r3, r2, r3
|
|
80008ee: 4618 mov r0, r3
|
|
80008f0: f000 f95d bl 8000bae <HAL_SYSTICK_Config>
|
|
80008f4: 4603 mov r3, r0
|
|
80008f6: 2b00 cmp r3, #0
|
|
80008f8: d001 beq.n 80008fe <HAL_InitTick+0x2e>
|
|
{
|
|
return HAL_ERROR;
|
|
80008fa: 2301 movs r3, #1
|
|
80008fc: e00e b.n 800091c <HAL_InitTick+0x4c>
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
80008fe: 687b ldr r3, [r7, #4]
|
|
8000900: 2b0f cmp r3, #15
|
|
8000902: d80a bhi.n 800091a <HAL_InitTick+0x4a>
|
|
{
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
8000904: 2200 movs r2, #0
|
|
8000906: 6879 ldr r1, [r7, #4]
|
|
8000908: f04f 30ff mov.w r0, #4294967295
|
|
800090c: f000 f925 bl 8000b5a <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
8000910: 4a06 ldr r2, [pc, #24] ; (800092c <HAL_InitTick+0x5c>)
|
|
8000912: 687b ldr r3, [r7, #4]
|
|
8000914: 6013 str r3, [r2, #0]
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8000916: 2300 movs r3, #0
|
|
8000918: e000 b.n 800091c <HAL_InitTick+0x4c>
|
|
return HAL_ERROR;
|
|
800091a: 2301 movs r3, #1
|
|
}
|
|
800091c: 4618 mov r0, r3
|
|
800091e: 3708 adds r7, #8
|
|
8000920: 46bd mov sp, r7
|
|
8000922: bd80 pop {r7, pc}
|
|
8000924: 20000004 .word 0x20000004
|
|
8000928: 2000000c .word 0x2000000c
|
|
800092c: 20000008 .word 0x20000008
|
|
|
|
08000930 <HAL_IncTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
8000930: b480 push {r7}
|
|
8000932: af00 add r7, sp, #0
|
|
uwTick += uwTickFreq;
|
|
8000934: 4b05 ldr r3, [pc, #20] ; (800094c <HAL_IncTick+0x1c>)
|
|
8000936: 781b ldrb r3, [r3, #0]
|
|
8000938: 461a mov r2, r3
|
|
800093a: 4b05 ldr r3, [pc, #20] ; (8000950 <HAL_IncTick+0x20>)
|
|
800093c: 681b ldr r3, [r3, #0]
|
|
800093e: 4413 add r3, r2
|
|
8000940: 4a03 ldr r2, [pc, #12] ; (8000950 <HAL_IncTick+0x20>)
|
|
8000942: 6013 str r3, [r2, #0]
|
|
}
|
|
8000944: bf00 nop
|
|
8000946: 46bd mov sp, r7
|
|
8000948: bc80 pop {r7}
|
|
800094a: 4770 bx lr
|
|
800094c: 2000000c .word 0x2000000c
|
|
8000950: 2000048c .word 0x2000048c
|
|
|
|
08000954 <HAL_GetTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
8000954: b480 push {r7}
|
|
8000956: af00 add r7, sp, #0
|
|
return uwTick;
|
|
8000958: 4b02 ldr r3, [pc, #8] ; (8000964 <HAL_GetTick+0x10>)
|
|
800095a: 681b ldr r3, [r3, #0]
|
|
}
|
|
800095c: 4618 mov r0, r3
|
|
800095e: 46bd mov sp, r7
|
|
8000960: bc80 pop {r7}
|
|
8000962: 4770 bx lr
|
|
8000964: 2000048c .word 0x2000048c
|
|
|
|
08000968 <HAL_Delay>:
|
|
* implementations in user file.
|
|
* @param Delay specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_Delay(uint32_t Delay)
|
|
{
|
|
8000968: b580 push {r7, lr}
|
|
800096a: b084 sub sp, #16
|
|
800096c: af00 add r7, sp, #0
|
|
800096e: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8000970: f7ff fff0 bl 8000954 <HAL_GetTick>
|
|
8000974: 60b8 str r0, [r7, #8]
|
|
uint32_t wait = Delay;
|
|
8000976: 687b ldr r3, [r7, #4]
|
|
8000978: 60fb str r3, [r7, #12]
|
|
|
|
/* Add a freq to guarantee minimum wait */
|
|
if (wait < HAL_MAX_DELAY)
|
|
800097a: 68fb ldr r3, [r7, #12]
|
|
800097c: f1b3 3fff cmp.w r3, #4294967295
|
|
8000980: d005 beq.n 800098e <HAL_Delay+0x26>
|
|
{
|
|
wait += (uint32_t)(uwTickFreq);
|
|
8000982: 4b09 ldr r3, [pc, #36] ; (80009a8 <HAL_Delay+0x40>)
|
|
8000984: 781b ldrb r3, [r3, #0]
|
|
8000986: 461a mov r2, r3
|
|
8000988: 68fb ldr r3, [r7, #12]
|
|
800098a: 4413 add r3, r2
|
|
800098c: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
while ((HAL_GetTick() - tickstart) < wait)
|
|
800098e: bf00 nop
|
|
8000990: f7ff ffe0 bl 8000954 <HAL_GetTick>
|
|
8000994: 4602 mov r2, r0
|
|
8000996: 68bb ldr r3, [r7, #8]
|
|
8000998: 1ad3 subs r3, r2, r3
|
|
800099a: 68fa ldr r2, [r7, #12]
|
|
800099c: 429a cmp r2, r3
|
|
800099e: d8f7 bhi.n 8000990 <HAL_Delay+0x28>
|
|
{
|
|
}
|
|
}
|
|
80009a0: bf00 nop
|
|
80009a2: 3710 adds r7, #16
|
|
80009a4: 46bd mov sp, r7
|
|
80009a6: bd80 pop {r7, pc}
|
|
80009a8: 2000000c .word 0x2000000c
|
|
|
|
080009ac <__NVIC_SetPriorityGrouping>:
|
|
In case of a conflict between priority grouping and available
|
|
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
|
\param [in] PriorityGroup Priority grouping field.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
80009ac: b480 push {r7}
|
|
80009ae: b085 sub sp, #20
|
|
80009b0: af00 add r7, sp, #0
|
|
80009b2: 6078 str r0, [r7, #4]
|
|
uint32_t reg_value;
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
80009b4: 687b ldr r3, [r7, #4]
|
|
80009b6: f003 0307 and.w r3, r3, #7
|
|
80009ba: 60fb str r3, [r7, #12]
|
|
|
|
reg_value = SCB->AIRCR; /* read old register configuration */
|
|
80009bc: 4b0c ldr r3, [pc, #48] ; (80009f0 <__NVIC_SetPriorityGrouping+0x44>)
|
|
80009be: 68db ldr r3, [r3, #12]
|
|
80009c0: 60bb str r3, [r7, #8]
|
|
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
|
80009c2: 68ba ldr r2, [r7, #8]
|
|
80009c4: f64f 03ff movw r3, #63743 ; 0xf8ff
|
|
80009c8: 4013 ands r3, r2
|
|
80009ca: 60bb str r3, [r7, #8]
|
|
reg_value = (reg_value |
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
|
80009cc: 68fb ldr r3, [r7, #12]
|
|
80009ce: 021a lsls r2, r3, #8
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
80009d0: 68bb ldr r3, [r7, #8]
|
|
80009d2: 4313 orrs r3, r2
|
|
reg_value = (reg_value |
|
|
80009d4: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
|
80009d8: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
|
80009dc: 60bb str r3, [r7, #8]
|
|
SCB->AIRCR = reg_value;
|
|
80009de: 4a04 ldr r2, [pc, #16] ; (80009f0 <__NVIC_SetPriorityGrouping+0x44>)
|
|
80009e0: 68bb ldr r3, [r7, #8]
|
|
80009e2: 60d3 str r3, [r2, #12]
|
|
}
|
|
80009e4: bf00 nop
|
|
80009e6: 3714 adds r7, #20
|
|
80009e8: 46bd mov sp, r7
|
|
80009ea: bc80 pop {r7}
|
|
80009ec: 4770 bx lr
|
|
80009ee: bf00 nop
|
|
80009f0: e000ed00 .word 0xe000ed00
|
|
|
|
080009f4 <__NVIC_GetPriorityGrouping>:
|
|
\brief Get Priority Grouping
|
|
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
|
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
|
*/
|
|
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
|
{
|
|
80009f4: b480 push {r7}
|
|
80009f6: af00 add r7, sp, #0
|
|
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
|
80009f8: 4b04 ldr r3, [pc, #16] ; (8000a0c <__NVIC_GetPriorityGrouping+0x18>)
|
|
80009fa: 68db ldr r3, [r3, #12]
|
|
80009fc: 0a1b lsrs r3, r3, #8
|
|
80009fe: f003 0307 and.w r3, r3, #7
|
|
}
|
|
8000a02: 4618 mov r0, r3
|
|
8000a04: 46bd mov sp, r7
|
|
8000a06: bc80 pop {r7}
|
|
8000a08: 4770 bx lr
|
|
8000a0a: bf00 nop
|
|
8000a0c: e000ed00 .word 0xe000ed00
|
|
|
|
08000a10 <__NVIC_EnableIRQ>:
|
|
\details Enables a device specific interrupt in the NVIC interrupt controller.
|
|
\param [in] IRQn Device specific interrupt number.
|
|
\note IRQn must not be negative.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
8000a10: b480 push {r7}
|
|
8000a12: b083 sub sp, #12
|
|
8000a14: af00 add r7, sp, #0
|
|
8000a16: 4603 mov r3, r0
|
|
8000a18: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
8000a1a: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000a1e: 2b00 cmp r3, #0
|
|
8000a20: db0b blt.n 8000a3a <__NVIC_EnableIRQ+0x2a>
|
|
{
|
|
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
|
8000a22: 79fb ldrb r3, [r7, #7]
|
|
8000a24: f003 021f and.w r2, r3, #31
|
|
8000a28: 4906 ldr r1, [pc, #24] ; (8000a44 <__NVIC_EnableIRQ+0x34>)
|
|
8000a2a: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000a2e: 095b lsrs r3, r3, #5
|
|
8000a30: 2001 movs r0, #1
|
|
8000a32: fa00 f202 lsl.w r2, r0, r2
|
|
8000a36: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
}
|
|
}
|
|
8000a3a: bf00 nop
|
|
8000a3c: 370c adds r7, #12
|
|
8000a3e: 46bd mov sp, r7
|
|
8000a40: bc80 pop {r7}
|
|
8000a42: 4770 bx lr
|
|
8000a44: e000e100 .word 0xe000e100
|
|
|
|
08000a48 <__NVIC_SetPriority>:
|
|
\param [in] IRQn Interrupt number.
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
8000a48: b480 push {r7}
|
|
8000a4a: b083 sub sp, #12
|
|
8000a4c: af00 add r7, sp, #0
|
|
8000a4e: 4603 mov r3, r0
|
|
8000a50: 6039 str r1, [r7, #0]
|
|
8000a52: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
8000a54: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000a58: 2b00 cmp r3, #0
|
|
8000a5a: db0a blt.n 8000a72 <__NVIC_SetPriority+0x2a>
|
|
{
|
|
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
8000a5c: 683b ldr r3, [r7, #0]
|
|
8000a5e: b2da uxtb r2, r3
|
|
8000a60: 490c ldr r1, [pc, #48] ; (8000a94 <__NVIC_SetPriority+0x4c>)
|
|
8000a62: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000a66: 0112 lsls r2, r2, #4
|
|
8000a68: b2d2 uxtb r2, r2
|
|
8000a6a: 440b add r3, r1
|
|
8000a6c: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
|
}
|
|
else
|
|
{
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
}
|
|
}
|
|
8000a70: e00a b.n 8000a88 <__NVIC_SetPriority+0x40>
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
8000a72: 683b ldr r3, [r7, #0]
|
|
8000a74: b2da uxtb r2, r3
|
|
8000a76: 4908 ldr r1, [pc, #32] ; (8000a98 <__NVIC_SetPriority+0x50>)
|
|
8000a78: 79fb ldrb r3, [r7, #7]
|
|
8000a7a: f003 030f and.w r3, r3, #15
|
|
8000a7e: 3b04 subs r3, #4
|
|
8000a80: 0112 lsls r2, r2, #4
|
|
8000a82: b2d2 uxtb r2, r2
|
|
8000a84: 440b add r3, r1
|
|
8000a86: 761a strb r2, [r3, #24]
|
|
}
|
|
8000a88: bf00 nop
|
|
8000a8a: 370c adds r7, #12
|
|
8000a8c: 46bd mov sp, r7
|
|
8000a8e: bc80 pop {r7}
|
|
8000a90: 4770 bx lr
|
|
8000a92: bf00 nop
|
|
8000a94: e000e100 .word 0xe000e100
|
|
8000a98: e000ed00 .word 0xe000ed00
|
|
|
|
08000a9c <NVIC_EncodePriority>:
|
|
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
|
\param [in] SubPriority Subpriority value (starting from 0).
|
|
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
|
*/
|
|
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
8000a9c: b480 push {r7}
|
|
8000a9e: b089 sub sp, #36 ; 0x24
|
|
8000aa0: af00 add r7, sp, #0
|
|
8000aa2: 60f8 str r0, [r7, #12]
|
|
8000aa4: 60b9 str r1, [r7, #8]
|
|
8000aa6: 607a str r2, [r7, #4]
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
8000aa8: 68fb ldr r3, [r7, #12]
|
|
8000aaa: f003 0307 and.w r3, r3, #7
|
|
8000aae: 61fb str r3, [r7, #28]
|
|
uint32_t PreemptPriorityBits;
|
|
uint32_t SubPriorityBits;
|
|
|
|
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
|
8000ab0: 69fb ldr r3, [r7, #28]
|
|
8000ab2: f1c3 0307 rsb r3, r3, #7
|
|
8000ab6: 2b04 cmp r3, #4
|
|
8000ab8: bf28 it cs
|
|
8000aba: 2304 movcs r3, #4
|
|
8000abc: 61bb str r3, [r7, #24]
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
8000abe: 69fb ldr r3, [r7, #28]
|
|
8000ac0: 3304 adds r3, #4
|
|
8000ac2: 2b06 cmp r3, #6
|
|
8000ac4: d902 bls.n 8000acc <NVIC_EncodePriority+0x30>
|
|
8000ac6: 69fb ldr r3, [r7, #28]
|
|
8000ac8: 3b03 subs r3, #3
|
|
8000aca: e000 b.n 8000ace <NVIC_EncodePriority+0x32>
|
|
8000acc: 2300 movs r3, #0
|
|
8000ace: 617b str r3, [r7, #20]
|
|
|
|
return (
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
8000ad0: f04f 32ff mov.w r2, #4294967295
|
|
8000ad4: 69bb ldr r3, [r7, #24]
|
|
8000ad6: fa02 f303 lsl.w r3, r2, r3
|
|
8000ada: 43da mvns r2, r3
|
|
8000adc: 68bb ldr r3, [r7, #8]
|
|
8000ade: 401a ands r2, r3
|
|
8000ae0: 697b ldr r3, [r7, #20]
|
|
8000ae2: 409a lsls r2, r3
|
|
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
|
8000ae4: f04f 31ff mov.w r1, #4294967295
|
|
8000ae8: 697b ldr r3, [r7, #20]
|
|
8000aea: fa01 f303 lsl.w r3, r1, r3
|
|
8000aee: 43d9 mvns r1, r3
|
|
8000af0: 687b ldr r3, [r7, #4]
|
|
8000af2: 400b ands r3, r1
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
8000af4: 4313 orrs r3, r2
|
|
);
|
|
}
|
|
8000af6: 4618 mov r0, r3
|
|
8000af8: 3724 adds r7, #36 ; 0x24
|
|
8000afa: 46bd mov sp, r7
|
|
8000afc: bc80 pop {r7}
|
|
8000afe: 4770 bx lr
|
|
|
|
08000b00 <SysTick_Config>:
|
|
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
8000b00: b580 push {r7, lr}
|
|
8000b02: b082 sub sp, #8
|
|
8000b04: af00 add r7, sp, #0
|
|
8000b06: 6078 str r0, [r7, #4]
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
8000b08: 687b ldr r3, [r7, #4]
|
|
8000b0a: 3b01 subs r3, #1
|
|
8000b0c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
|
8000b10: d301 bcc.n 8000b16 <SysTick_Config+0x16>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
8000b12: 2301 movs r3, #1
|
|
8000b14: e00f b.n 8000b36 <SysTick_Config+0x36>
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
8000b16: 4a0a ldr r2, [pc, #40] ; (8000b40 <SysTick_Config+0x40>)
|
|
8000b18: 687b ldr r3, [r7, #4]
|
|
8000b1a: 3b01 subs r3, #1
|
|
8000b1c: 6053 str r3, [r2, #4]
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
8000b1e: 210f movs r1, #15
|
|
8000b20: f04f 30ff mov.w r0, #4294967295
|
|
8000b24: f7ff ff90 bl 8000a48 <__NVIC_SetPriority>
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
8000b28: 4b05 ldr r3, [pc, #20] ; (8000b40 <SysTick_Config+0x40>)
|
|
8000b2a: 2200 movs r2, #0
|
|
8000b2c: 609a str r2, [r3, #8]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
8000b2e: 4b04 ldr r3, [pc, #16] ; (8000b40 <SysTick_Config+0x40>)
|
|
8000b30: 2207 movs r2, #7
|
|
8000b32: 601a str r2, [r3, #0]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
8000b34: 2300 movs r3, #0
|
|
}
|
|
8000b36: 4618 mov r0, r3
|
|
8000b38: 3708 adds r7, #8
|
|
8000b3a: 46bd mov sp, r7
|
|
8000b3c: bd80 pop {r7, pc}
|
|
8000b3e: bf00 nop
|
|
8000b40: e000e010 .word 0xe000e010
|
|
|
|
08000b44 <HAL_NVIC_SetPriorityGrouping>:
|
|
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
|
* The pending IRQ priority will be managed only by the subpriority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
8000b44: b580 push {r7, lr}
|
|
8000b46: b082 sub sp, #8
|
|
8000b48: af00 add r7, sp, #0
|
|
8000b4a: 6078 str r0, [r7, #4]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
|
|
|
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
|
NVIC_SetPriorityGrouping(PriorityGroup);
|
|
8000b4c: 6878 ldr r0, [r7, #4]
|
|
8000b4e: f7ff ff2d bl 80009ac <__NVIC_SetPriorityGrouping>
|
|
}
|
|
8000b52: bf00 nop
|
|
8000b54: 3708 adds r7, #8
|
|
8000b56: 46bd mov sp, r7
|
|
8000b58: bd80 pop {r7, pc}
|
|
|
|
08000b5a <HAL_NVIC_SetPriority>:
|
|
* This parameter can be a value between 0 and 15
|
|
* A lower priority value indicates a higher priority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
8000b5a: b580 push {r7, lr}
|
|
8000b5c: b086 sub sp, #24
|
|
8000b5e: af00 add r7, sp, #0
|
|
8000b60: 4603 mov r3, r0
|
|
8000b62: 60b9 str r1, [r7, #8]
|
|
8000b64: 607a str r2, [r7, #4]
|
|
8000b66: 73fb strb r3, [r7, #15]
|
|
uint32_t prioritygroup = 0x00U;
|
|
8000b68: 2300 movs r3, #0
|
|
8000b6a: 617b str r3, [r7, #20]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
|
|
prioritygroup = NVIC_GetPriorityGrouping();
|
|
8000b6c: f7ff ff42 bl 80009f4 <__NVIC_GetPriorityGrouping>
|
|
8000b70: 6178 str r0, [r7, #20]
|
|
|
|
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
|
8000b72: 687a ldr r2, [r7, #4]
|
|
8000b74: 68b9 ldr r1, [r7, #8]
|
|
8000b76: 6978 ldr r0, [r7, #20]
|
|
8000b78: f7ff ff90 bl 8000a9c <NVIC_EncodePriority>
|
|
8000b7c: 4602 mov r2, r0
|
|
8000b7e: f997 300f ldrsb.w r3, [r7, #15]
|
|
8000b82: 4611 mov r1, r2
|
|
8000b84: 4618 mov r0, r3
|
|
8000b86: f7ff ff5f bl 8000a48 <__NVIC_SetPriority>
|
|
}
|
|
8000b8a: bf00 nop
|
|
8000b8c: 3718 adds r7, #24
|
|
8000b8e: 46bd mov sp, r7
|
|
8000b90: bd80 pop {r7, pc}
|
|
|
|
08000b92 <HAL_NVIC_EnableIRQ>:
|
|
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
8000b92: b580 push {r7, lr}
|
|
8000b94: b082 sub sp, #8
|
|
8000b96: af00 add r7, sp, #0
|
|
8000b98: 4603 mov r3, r0
|
|
8000b9a: 71fb strb r3, [r7, #7]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
|
|
/* Enable interrupt */
|
|
NVIC_EnableIRQ(IRQn);
|
|
8000b9c: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000ba0: 4618 mov r0, r3
|
|
8000ba2: f7ff ff35 bl 8000a10 <__NVIC_EnableIRQ>
|
|
}
|
|
8000ba6: bf00 nop
|
|
8000ba8: 3708 adds r7, #8
|
|
8000baa: 46bd mov sp, r7
|
|
8000bac: bd80 pop {r7, pc}
|
|
|
|
08000bae <HAL_SYSTICK_Config>:
|
|
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
|
* @retval status: - 0 Function succeeded.
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
8000bae: b580 push {r7, lr}
|
|
8000bb0: b082 sub sp, #8
|
|
8000bb2: af00 add r7, sp, #0
|
|
8000bb4: 6078 str r0, [r7, #4]
|
|
return SysTick_Config(TicksNumb);
|
|
8000bb6: 6878 ldr r0, [r7, #4]
|
|
8000bb8: f7ff ffa2 bl 8000b00 <SysTick_Config>
|
|
8000bbc: 4603 mov r3, r0
|
|
}
|
|
8000bbe: 4618 mov r0, r3
|
|
8000bc0: 3708 adds r7, #8
|
|
8000bc2: 46bd mov sp, r7
|
|
8000bc4: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08000bc8 <HAL_GPIO_Init>:
|
|
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
|
* the configuration information for the specified GPIO peripheral.
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
|
{
|
|
8000bc8: b480 push {r7}
|
|
8000bca: b08b sub sp, #44 ; 0x2c
|
|
8000bcc: af00 add r7, sp, #0
|
|
8000bce: 6078 str r0, [r7, #4]
|
|
8000bd0: 6039 str r1, [r7, #0]
|
|
uint32_t position = 0x00u;
|
|
8000bd2: 2300 movs r3, #0
|
|
8000bd4: 627b str r3, [r7, #36] ; 0x24
|
|
uint32_t ioposition;
|
|
uint32_t iocurrent;
|
|
uint32_t temp;
|
|
uint32_t config = 0x00u;
|
|
8000bd6: 2300 movs r3, #0
|
|
8000bd8: 623b str r3, [r7, #32]
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
|
|
/* Configure the port pins */
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
8000bda: e133 b.n 8000e44 <HAL_GPIO_Init+0x27c>
|
|
{
|
|
/* Get the IO position */
|
|
ioposition = (0x01uL << position);
|
|
8000bdc: 2201 movs r2, #1
|
|
8000bde: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000be0: fa02 f303 lsl.w r3, r2, r3
|
|
8000be4: 61fb str r3, [r7, #28]
|
|
|
|
/* Get the current IO position */
|
|
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
|
8000be6: 683b ldr r3, [r7, #0]
|
|
8000be8: 681b ldr r3, [r3, #0]
|
|
8000bea: 69fa ldr r2, [r7, #28]
|
|
8000bec: 4013 ands r3, r2
|
|
8000bee: 61bb str r3, [r7, #24]
|
|
|
|
if (iocurrent == ioposition)
|
|
8000bf0: 69ba ldr r2, [r7, #24]
|
|
8000bf2: 69fb ldr r3, [r7, #28]
|
|
8000bf4: 429a cmp r2, r3
|
|
8000bf6: f040 8122 bne.w 8000e3e <HAL_GPIO_Init+0x276>
|
|
{
|
|
/* Check the Alternate function parameters */
|
|
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
|
|
|
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
|
switch (GPIO_Init->Mode)
|
|
8000bfa: 683b ldr r3, [r7, #0]
|
|
8000bfc: 685b ldr r3, [r3, #4]
|
|
8000bfe: 2b12 cmp r3, #18
|
|
8000c00: d034 beq.n 8000c6c <HAL_GPIO_Init+0xa4>
|
|
8000c02: 2b12 cmp r3, #18
|
|
8000c04: d80d bhi.n 8000c22 <HAL_GPIO_Init+0x5a>
|
|
8000c06: 2b02 cmp r3, #2
|
|
8000c08: d02b beq.n 8000c62 <HAL_GPIO_Init+0x9a>
|
|
8000c0a: 2b02 cmp r3, #2
|
|
8000c0c: d804 bhi.n 8000c18 <HAL_GPIO_Init+0x50>
|
|
8000c0e: 2b00 cmp r3, #0
|
|
8000c10: d031 beq.n 8000c76 <HAL_GPIO_Init+0xae>
|
|
8000c12: 2b01 cmp r3, #1
|
|
8000c14: d01c beq.n 8000c50 <HAL_GPIO_Init+0x88>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
|
break;
|
|
|
|
/* Parameters are checked with assert_param */
|
|
default:
|
|
break;
|
|
8000c16: e048 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
switch (GPIO_Init->Mode)
|
|
8000c18: 2b03 cmp r3, #3
|
|
8000c1a: d043 beq.n 8000ca4 <HAL_GPIO_Init+0xdc>
|
|
8000c1c: 2b11 cmp r3, #17
|
|
8000c1e: d01b beq.n 8000c58 <HAL_GPIO_Init+0x90>
|
|
break;
|
|
8000c20: e043 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
switch (GPIO_Init->Mode)
|
|
8000c22: 4a8f ldr r2, [pc, #572] ; (8000e60 <HAL_GPIO_Init+0x298>)
|
|
8000c24: 4293 cmp r3, r2
|
|
8000c26: d026 beq.n 8000c76 <HAL_GPIO_Init+0xae>
|
|
8000c28: 4a8d ldr r2, [pc, #564] ; (8000e60 <HAL_GPIO_Init+0x298>)
|
|
8000c2a: 4293 cmp r3, r2
|
|
8000c2c: d806 bhi.n 8000c3c <HAL_GPIO_Init+0x74>
|
|
8000c2e: 4a8d ldr r2, [pc, #564] ; (8000e64 <HAL_GPIO_Init+0x29c>)
|
|
8000c30: 4293 cmp r3, r2
|
|
8000c32: d020 beq.n 8000c76 <HAL_GPIO_Init+0xae>
|
|
8000c34: 4a8c ldr r2, [pc, #560] ; (8000e68 <HAL_GPIO_Init+0x2a0>)
|
|
8000c36: 4293 cmp r3, r2
|
|
8000c38: d01d beq.n 8000c76 <HAL_GPIO_Init+0xae>
|
|
break;
|
|
8000c3a: e036 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
switch (GPIO_Init->Mode)
|
|
8000c3c: 4a8b ldr r2, [pc, #556] ; (8000e6c <HAL_GPIO_Init+0x2a4>)
|
|
8000c3e: 4293 cmp r3, r2
|
|
8000c40: d019 beq.n 8000c76 <HAL_GPIO_Init+0xae>
|
|
8000c42: 4a8b ldr r2, [pc, #556] ; (8000e70 <HAL_GPIO_Init+0x2a8>)
|
|
8000c44: 4293 cmp r3, r2
|
|
8000c46: d016 beq.n 8000c76 <HAL_GPIO_Init+0xae>
|
|
8000c48: 4a8a ldr r2, [pc, #552] ; (8000e74 <HAL_GPIO_Init+0x2ac>)
|
|
8000c4a: 4293 cmp r3, r2
|
|
8000c4c: d013 beq.n 8000c76 <HAL_GPIO_Init+0xae>
|
|
break;
|
|
8000c4e: e02c b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
|
8000c50: 683b ldr r3, [r7, #0]
|
|
8000c52: 68db ldr r3, [r3, #12]
|
|
8000c54: 623b str r3, [r7, #32]
|
|
break;
|
|
8000c56: e028 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
|
8000c58: 683b ldr r3, [r7, #0]
|
|
8000c5a: 68db ldr r3, [r3, #12]
|
|
8000c5c: 3304 adds r3, #4
|
|
8000c5e: 623b str r3, [r7, #32]
|
|
break;
|
|
8000c60: e023 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
|
8000c62: 683b ldr r3, [r7, #0]
|
|
8000c64: 68db ldr r3, [r3, #12]
|
|
8000c66: 3308 adds r3, #8
|
|
8000c68: 623b str r3, [r7, #32]
|
|
break;
|
|
8000c6a: e01e b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
|
8000c6c: 683b ldr r3, [r7, #0]
|
|
8000c6e: 68db ldr r3, [r3, #12]
|
|
8000c70: 330c adds r3, #12
|
|
8000c72: 623b str r3, [r7, #32]
|
|
break;
|
|
8000c74: e019 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
if (GPIO_Init->Pull == GPIO_NOPULL)
|
|
8000c76: 683b ldr r3, [r7, #0]
|
|
8000c78: 689b ldr r3, [r3, #8]
|
|
8000c7a: 2b00 cmp r3, #0
|
|
8000c7c: d102 bne.n 8000c84 <HAL_GPIO_Init+0xbc>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
|
8000c7e: 2304 movs r3, #4
|
|
8000c80: 623b str r3, [r7, #32]
|
|
break;
|
|
8000c82: e012 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
|
8000c84: 683b ldr r3, [r7, #0]
|
|
8000c86: 689b ldr r3, [r3, #8]
|
|
8000c88: 2b01 cmp r3, #1
|
|
8000c8a: d105 bne.n 8000c98 <HAL_GPIO_Init+0xd0>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
|
8000c8c: 2308 movs r3, #8
|
|
8000c8e: 623b str r3, [r7, #32]
|
|
GPIOx->BSRR = ioposition;
|
|
8000c90: 687b ldr r3, [r7, #4]
|
|
8000c92: 69fa ldr r2, [r7, #28]
|
|
8000c94: 611a str r2, [r3, #16]
|
|
break;
|
|
8000c96: e008 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
|
8000c98: 2308 movs r3, #8
|
|
8000c9a: 623b str r3, [r7, #32]
|
|
GPIOx->BRR = ioposition;
|
|
8000c9c: 687b ldr r3, [r7, #4]
|
|
8000c9e: 69fa ldr r2, [r7, #28]
|
|
8000ca0: 615a str r2, [r3, #20]
|
|
break;
|
|
8000ca2: e002 b.n 8000caa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
|
8000ca4: 2300 movs r3, #0
|
|
8000ca6: 623b str r3, [r7, #32]
|
|
break;
|
|
8000ca8: bf00 nop
|
|
}
|
|
|
|
/* Check if the current bit belongs to first half or last half of the pin count number
|
|
in order to address CRH or CRL register*/
|
|
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
|
8000caa: 69bb ldr r3, [r7, #24]
|
|
8000cac: 2bff cmp r3, #255 ; 0xff
|
|
8000cae: d801 bhi.n 8000cb4 <HAL_GPIO_Init+0xec>
|
|
8000cb0: 687b ldr r3, [r7, #4]
|
|
8000cb2: e001 b.n 8000cb8 <HAL_GPIO_Init+0xf0>
|
|
8000cb4: 687b ldr r3, [r7, #4]
|
|
8000cb6: 3304 adds r3, #4
|
|
8000cb8: 617b str r3, [r7, #20]
|
|
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
|
8000cba: 69bb ldr r3, [r7, #24]
|
|
8000cbc: 2bff cmp r3, #255 ; 0xff
|
|
8000cbe: d802 bhi.n 8000cc6 <HAL_GPIO_Init+0xfe>
|
|
8000cc0: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000cc2: 009b lsls r3, r3, #2
|
|
8000cc4: e002 b.n 8000ccc <HAL_GPIO_Init+0x104>
|
|
8000cc6: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000cc8: 3b08 subs r3, #8
|
|
8000cca: 009b lsls r3, r3, #2
|
|
8000ccc: 613b str r3, [r7, #16]
|
|
|
|
/* Apply the new configuration of the pin to the register */
|
|
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
|
8000cce: 697b ldr r3, [r7, #20]
|
|
8000cd0: 681a ldr r2, [r3, #0]
|
|
8000cd2: 210f movs r1, #15
|
|
8000cd4: 693b ldr r3, [r7, #16]
|
|
8000cd6: fa01 f303 lsl.w r3, r1, r3
|
|
8000cda: 43db mvns r3, r3
|
|
8000cdc: 401a ands r2, r3
|
|
8000cde: 6a39 ldr r1, [r7, #32]
|
|
8000ce0: 693b ldr r3, [r7, #16]
|
|
8000ce2: fa01 f303 lsl.w r3, r1, r3
|
|
8000ce6: 431a orrs r2, r3
|
|
8000ce8: 697b ldr r3, [r7, #20]
|
|
8000cea: 601a str r2, [r3, #0]
|
|
|
|
/*--------------------- EXTI Mode Configuration ------------------------*/
|
|
/* Configure the External Interrupt or event for the current IO */
|
|
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
|
8000cec: 683b ldr r3, [r7, #0]
|
|
8000cee: 685b ldr r3, [r3, #4]
|
|
8000cf0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8000cf4: 2b00 cmp r3, #0
|
|
8000cf6: f000 80a2 beq.w 8000e3e <HAL_GPIO_Init+0x276>
|
|
{
|
|
/* Enable AFIO Clock */
|
|
__HAL_RCC_AFIO_CLK_ENABLE();
|
|
8000cfa: 4b5f ldr r3, [pc, #380] ; (8000e78 <HAL_GPIO_Init+0x2b0>)
|
|
8000cfc: 699b ldr r3, [r3, #24]
|
|
8000cfe: 4a5e ldr r2, [pc, #376] ; (8000e78 <HAL_GPIO_Init+0x2b0>)
|
|
8000d00: f043 0301 orr.w r3, r3, #1
|
|
8000d04: 6193 str r3, [r2, #24]
|
|
8000d06: 4b5c ldr r3, [pc, #368] ; (8000e78 <HAL_GPIO_Init+0x2b0>)
|
|
8000d08: 699b ldr r3, [r3, #24]
|
|
8000d0a: f003 0301 and.w r3, r3, #1
|
|
8000d0e: 60bb str r3, [r7, #8]
|
|
8000d10: 68bb ldr r3, [r7, #8]
|
|
temp = AFIO->EXTICR[position >> 2u];
|
|
8000d12: 4a5a ldr r2, [pc, #360] ; (8000e7c <HAL_GPIO_Init+0x2b4>)
|
|
8000d14: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000d16: 089b lsrs r3, r3, #2
|
|
8000d18: 3302 adds r3, #2
|
|
8000d1a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
|
8000d1e: 60fb str r3, [r7, #12]
|
|
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
|
8000d20: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000d22: f003 0303 and.w r3, r3, #3
|
|
8000d26: 009b lsls r3, r3, #2
|
|
8000d28: 220f movs r2, #15
|
|
8000d2a: fa02 f303 lsl.w r3, r2, r3
|
|
8000d2e: 43db mvns r3, r3
|
|
8000d30: 68fa ldr r2, [r7, #12]
|
|
8000d32: 4013 ands r3, r2
|
|
8000d34: 60fb str r3, [r7, #12]
|
|
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
|
8000d36: 687b ldr r3, [r7, #4]
|
|
8000d38: 4a51 ldr r2, [pc, #324] ; (8000e80 <HAL_GPIO_Init+0x2b8>)
|
|
8000d3a: 4293 cmp r3, r2
|
|
8000d3c: d01f beq.n 8000d7e <HAL_GPIO_Init+0x1b6>
|
|
8000d3e: 687b ldr r3, [r7, #4]
|
|
8000d40: 4a50 ldr r2, [pc, #320] ; (8000e84 <HAL_GPIO_Init+0x2bc>)
|
|
8000d42: 4293 cmp r3, r2
|
|
8000d44: d019 beq.n 8000d7a <HAL_GPIO_Init+0x1b2>
|
|
8000d46: 687b ldr r3, [r7, #4]
|
|
8000d48: 4a4f ldr r2, [pc, #316] ; (8000e88 <HAL_GPIO_Init+0x2c0>)
|
|
8000d4a: 4293 cmp r3, r2
|
|
8000d4c: d013 beq.n 8000d76 <HAL_GPIO_Init+0x1ae>
|
|
8000d4e: 687b ldr r3, [r7, #4]
|
|
8000d50: 4a4e ldr r2, [pc, #312] ; (8000e8c <HAL_GPIO_Init+0x2c4>)
|
|
8000d52: 4293 cmp r3, r2
|
|
8000d54: d00d beq.n 8000d72 <HAL_GPIO_Init+0x1aa>
|
|
8000d56: 687b ldr r3, [r7, #4]
|
|
8000d58: 4a4d ldr r2, [pc, #308] ; (8000e90 <HAL_GPIO_Init+0x2c8>)
|
|
8000d5a: 4293 cmp r3, r2
|
|
8000d5c: d007 beq.n 8000d6e <HAL_GPIO_Init+0x1a6>
|
|
8000d5e: 687b ldr r3, [r7, #4]
|
|
8000d60: 4a4c ldr r2, [pc, #304] ; (8000e94 <HAL_GPIO_Init+0x2cc>)
|
|
8000d62: 4293 cmp r3, r2
|
|
8000d64: d101 bne.n 8000d6a <HAL_GPIO_Init+0x1a2>
|
|
8000d66: 2305 movs r3, #5
|
|
8000d68: e00a b.n 8000d80 <HAL_GPIO_Init+0x1b8>
|
|
8000d6a: 2306 movs r3, #6
|
|
8000d6c: e008 b.n 8000d80 <HAL_GPIO_Init+0x1b8>
|
|
8000d6e: 2304 movs r3, #4
|
|
8000d70: e006 b.n 8000d80 <HAL_GPIO_Init+0x1b8>
|
|
8000d72: 2303 movs r3, #3
|
|
8000d74: e004 b.n 8000d80 <HAL_GPIO_Init+0x1b8>
|
|
8000d76: 2302 movs r3, #2
|
|
8000d78: e002 b.n 8000d80 <HAL_GPIO_Init+0x1b8>
|
|
8000d7a: 2301 movs r3, #1
|
|
8000d7c: e000 b.n 8000d80 <HAL_GPIO_Init+0x1b8>
|
|
8000d7e: 2300 movs r3, #0
|
|
8000d80: 6a7a ldr r2, [r7, #36] ; 0x24
|
|
8000d82: f002 0203 and.w r2, r2, #3
|
|
8000d86: 0092 lsls r2, r2, #2
|
|
8000d88: 4093 lsls r3, r2
|
|
8000d8a: 68fa ldr r2, [r7, #12]
|
|
8000d8c: 4313 orrs r3, r2
|
|
8000d8e: 60fb str r3, [r7, #12]
|
|
AFIO->EXTICR[position >> 2u] = temp;
|
|
8000d90: 493a ldr r1, [pc, #232] ; (8000e7c <HAL_GPIO_Init+0x2b4>)
|
|
8000d92: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000d94: 089b lsrs r3, r3, #2
|
|
8000d96: 3302 adds r3, #2
|
|
8000d98: 68fa ldr r2, [r7, #12]
|
|
8000d9a: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
|
|
|
|
/* Configure the interrupt mask */
|
|
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
|
8000d9e: 683b ldr r3, [r7, #0]
|
|
8000da0: 685b ldr r3, [r3, #4]
|
|
8000da2: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8000da6: 2b00 cmp r3, #0
|
|
8000da8: d006 beq.n 8000db8 <HAL_GPIO_Init+0x1f0>
|
|
{
|
|
SET_BIT(EXTI->IMR, iocurrent);
|
|
8000daa: 4b3b ldr r3, [pc, #236] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000dac: 681a ldr r2, [r3, #0]
|
|
8000dae: 493a ldr r1, [pc, #232] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000db0: 69bb ldr r3, [r7, #24]
|
|
8000db2: 4313 orrs r3, r2
|
|
8000db4: 600b str r3, [r1, #0]
|
|
8000db6: e006 b.n 8000dc6 <HAL_GPIO_Init+0x1fe>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->IMR, iocurrent);
|
|
8000db8: 4b37 ldr r3, [pc, #220] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000dba: 681a ldr r2, [r3, #0]
|
|
8000dbc: 69bb ldr r3, [r7, #24]
|
|
8000dbe: 43db mvns r3, r3
|
|
8000dc0: 4935 ldr r1, [pc, #212] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000dc2: 4013 ands r3, r2
|
|
8000dc4: 600b str r3, [r1, #0]
|
|
}
|
|
|
|
/* Configure the event mask */
|
|
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
|
8000dc6: 683b ldr r3, [r7, #0]
|
|
8000dc8: 685b ldr r3, [r3, #4]
|
|
8000dca: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8000dce: 2b00 cmp r3, #0
|
|
8000dd0: d006 beq.n 8000de0 <HAL_GPIO_Init+0x218>
|
|
{
|
|
SET_BIT(EXTI->EMR, iocurrent);
|
|
8000dd2: 4b31 ldr r3, [pc, #196] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000dd4: 685a ldr r2, [r3, #4]
|
|
8000dd6: 4930 ldr r1, [pc, #192] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000dd8: 69bb ldr r3, [r7, #24]
|
|
8000dda: 4313 orrs r3, r2
|
|
8000ddc: 604b str r3, [r1, #4]
|
|
8000dde: e006 b.n 8000dee <HAL_GPIO_Init+0x226>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->EMR, iocurrent);
|
|
8000de0: 4b2d ldr r3, [pc, #180] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000de2: 685a ldr r2, [r3, #4]
|
|
8000de4: 69bb ldr r3, [r7, #24]
|
|
8000de6: 43db mvns r3, r3
|
|
8000de8: 492b ldr r1, [pc, #172] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000dea: 4013 ands r3, r2
|
|
8000dec: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/* Enable or disable the rising trigger */
|
|
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
|
8000dee: 683b ldr r3, [r7, #0]
|
|
8000df0: 685b ldr r3, [r3, #4]
|
|
8000df2: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
|
8000df6: 2b00 cmp r3, #0
|
|
8000df8: d006 beq.n 8000e08 <HAL_GPIO_Init+0x240>
|
|
{
|
|
SET_BIT(EXTI->RTSR, iocurrent);
|
|
8000dfa: 4b27 ldr r3, [pc, #156] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000dfc: 689a ldr r2, [r3, #8]
|
|
8000dfe: 4926 ldr r1, [pc, #152] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000e00: 69bb ldr r3, [r7, #24]
|
|
8000e02: 4313 orrs r3, r2
|
|
8000e04: 608b str r3, [r1, #8]
|
|
8000e06: e006 b.n 8000e16 <HAL_GPIO_Init+0x24e>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
|
8000e08: 4b23 ldr r3, [pc, #140] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000e0a: 689a ldr r2, [r3, #8]
|
|
8000e0c: 69bb ldr r3, [r7, #24]
|
|
8000e0e: 43db mvns r3, r3
|
|
8000e10: 4921 ldr r1, [pc, #132] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000e12: 4013 ands r3, r2
|
|
8000e14: 608b str r3, [r1, #8]
|
|
}
|
|
|
|
/* Enable or disable the falling trigger */
|
|
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
|
8000e16: 683b ldr r3, [r7, #0]
|
|
8000e18: 685b ldr r3, [r3, #4]
|
|
8000e1a: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
8000e1e: 2b00 cmp r3, #0
|
|
8000e20: d006 beq.n 8000e30 <HAL_GPIO_Init+0x268>
|
|
{
|
|
SET_BIT(EXTI->FTSR, iocurrent);
|
|
8000e22: 4b1d ldr r3, [pc, #116] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000e24: 68da ldr r2, [r3, #12]
|
|
8000e26: 491c ldr r1, [pc, #112] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000e28: 69bb ldr r3, [r7, #24]
|
|
8000e2a: 4313 orrs r3, r2
|
|
8000e2c: 60cb str r3, [r1, #12]
|
|
8000e2e: e006 b.n 8000e3e <HAL_GPIO_Init+0x276>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
|
8000e30: 4b19 ldr r3, [pc, #100] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000e32: 68da ldr r2, [r3, #12]
|
|
8000e34: 69bb ldr r3, [r7, #24]
|
|
8000e36: 43db mvns r3, r3
|
|
8000e38: 4917 ldr r1, [pc, #92] ; (8000e98 <HAL_GPIO_Init+0x2d0>)
|
|
8000e3a: 4013 ands r3, r2
|
|
8000e3c: 60cb str r3, [r1, #12]
|
|
}
|
|
}
|
|
}
|
|
|
|
position++;
|
|
8000e3e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000e40: 3301 adds r3, #1
|
|
8000e42: 627b str r3, [r7, #36] ; 0x24
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
8000e44: 683b ldr r3, [r7, #0]
|
|
8000e46: 681a ldr r2, [r3, #0]
|
|
8000e48: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8000e4a: fa22 f303 lsr.w r3, r2, r3
|
|
8000e4e: 2b00 cmp r3, #0
|
|
8000e50: f47f aec4 bne.w 8000bdc <HAL_GPIO_Init+0x14>
|
|
}
|
|
}
|
|
8000e54: bf00 nop
|
|
8000e56: 372c adds r7, #44 ; 0x2c
|
|
8000e58: 46bd mov sp, r7
|
|
8000e5a: bc80 pop {r7}
|
|
8000e5c: 4770 bx lr
|
|
8000e5e: bf00 nop
|
|
8000e60: 10210000 .word 0x10210000
|
|
8000e64: 10110000 .word 0x10110000
|
|
8000e68: 10120000 .word 0x10120000
|
|
8000e6c: 10310000 .word 0x10310000
|
|
8000e70: 10320000 .word 0x10320000
|
|
8000e74: 10220000 .word 0x10220000
|
|
8000e78: 40021000 .word 0x40021000
|
|
8000e7c: 40010000 .word 0x40010000
|
|
8000e80: 40010800 .word 0x40010800
|
|
8000e84: 40010c00 .word 0x40010c00
|
|
8000e88: 40011000 .word 0x40011000
|
|
8000e8c: 40011400 .word 0x40011400
|
|
8000e90: 40011800 .word 0x40011800
|
|
8000e94: 40011c00 .word 0x40011c00
|
|
8000e98: 40010400 .word 0x40010400
|
|
|
|
08000e9c <HAL_GPIO_DeInit>:
|
|
* @param GPIO_Pin: specifies the port bit to be written.
|
|
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
|
|
{
|
|
8000e9c: b480 push {r7}
|
|
8000e9e: b089 sub sp, #36 ; 0x24
|
|
8000ea0: af00 add r7, sp, #0
|
|
8000ea2: 6078 str r0, [r7, #4]
|
|
8000ea4: 6039 str r1, [r7, #0]
|
|
uint32_t position = 0x00u;
|
|
8000ea6: 2300 movs r3, #0
|
|
8000ea8: 61fb str r3, [r7, #28]
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
|
|
/* Configure the port pins */
|
|
while ((GPIO_Pin >> position) != 0u)
|
|
8000eaa: e0a6 b.n 8000ffa <HAL_GPIO_DeInit+0x15e>
|
|
{
|
|
/* Get current io position */
|
|
iocurrent = (GPIO_Pin) & (1uL << position);
|
|
8000eac: 2201 movs r2, #1
|
|
8000eae: 69fb ldr r3, [r7, #28]
|
|
8000eb0: fa02 f303 lsl.w r3, r2, r3
|
|
8000eb4: 683a ldr r2, [r7, #0]
|
|
8000eb6: 4013 ands r3, r2
|
|
8000eb8: 61bb str r3, [r7, #24]
|
|
|
|
if (iocurrent)
|
|
8000eba: 69bb ldr r3, [r7, #24]
|
|
8000ebc: 2b00 cmp r3, #0
|
|
8000ebe: f000 8099 beq.w 8000ff4 <HAL_GPIO_DeInit+0x158>
|
|
{
|
|
/*------------------------- EXTI Mode Configuration --------------------*/
|
|
/* Clear the External Interrupt or Event for the current IO */
|
|
|
|
tmp = AFIO->EXTICR[position >> 2u];
|
|
8000ec2: 4a54 ldr r2, [pc, #336] ; (8001014 <HAL_GPIO_DeInit+0x178>)
|
|
8000ec4: 69fb ldr r3, [r7, #28]
|
|
8000ec6: 089b lsrs r3, r3, #2
|
|
8000ec8: 3302 adds r3, #2
|
|
8000eca: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
|
8000ece: 617b str r3, [r7, #20]
|
|
tmp &= 0x0FuL << (4u * (position & 0x03u));
|
|
8000ed0: 69fb ldr r3, [r7, #28]
|
|
8000ed2: f003 0303 and.w r3, r3, #3
|
|
8000ed6: 009b lsls r3, r3, #2
|
|
8000ed8: 220f movs r2, #15
|
|
8000eda: fa02 f303 lsl.w r3, r2, r3
|
|
8000ede: 697a ldr r2, [r7, #20]
|
|
8000ee0: 4013 ands r3, r2
|
|
8000ee2: 617b str r3, [r7, #20]
|
|
if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
|
|
8000ee4: 687b ldr r3, [r7, #4]
|
|
8000ee6: 4a4c ldr r2, [pc, #304] ; (8001018 <HAL_GPIO_DeInit+0x17c>)
|
|
8000ee8: 4293 cmp r3, r2
|
|
8000eea: d01f beq.n 8000f2c <HAL_GPIO_DeInit+0x90>
|
|
8000eec: 687b ldr r3, [r7, #4]
|
|
8000eee: 4a4b ldr r2, [pc, #300] ; (800101c <HAL_GPIO_DeInit+0x180>)
|
|
8000ef0: 4293 cmp r3, r2
|
|
8000ef2: d019 beq.n 8000f28 <HAL_GPIO_DeInit+0x8c>
|
|
8000ef4: 687b ldr r3, [r7, #4]
|
|
8000ef6: 4a4a ldr r2, [pc, #296] ; (8001020 <HAL_GPIO_DeInit+0x184>)
|
|
8000ef8: 4293 cmp r3, r2
|
|
8000efa: d013 beq.n 8000f24 <HAL_GPIO_DeInit+0x88>
|
|
8000efc: 687b ldr r3, [r7, #4]
|
|
8000efe: 4a49 ldr r2, [pc, #292] ; (8001024 <HAL_GPIO_DeInit+0x188>)
|
|
8000f00: 4293 cmp r3, r2
|
|
8000f02: d00d beq.n 8000f20 <HAL_GPIO_DeInit+0x84>
|
|
8000f04: 687b ldr r3, [r7, #4]
|
|
8000f06: 4a48 ldr r2, [pc, #288] ; (8001028 <HAL_GPIO_DeInit+0x18c>)
|
|
8000f08: 4293 cmp r3, r2
|
|
8000f0a: d007 beq.n 8000f1c <HAL_GPIO_DeInit+0x80>
|
|
8000f0c: 687b ldr r3, [r7, #4]
|
|
8000f0e: 4a47 ldr r2, [pc, #284] ; (800102c <HAL_GPIO_DeInit+0x190>)
|
|
8000f10: 4293 cmp r3, r2
|
|
8000f12: d101 bne.n 8000f18 <HAL_GPIO_DeInit+0x7c>
|
|
8000f14: 2305 movs r3, #5
|
|
8000f16: e00a b.n 8000f2e <HAL_GPIO_DeInit+0x92>
|
|
8000f18: 2306 movs r3, #6
|
|
8000f1a: e008 b.n 8000f2e <HAL_GPIO_DeInit+0x92>
|
|
8000f1c: 2304 movs r3, #4
|
|
8000f1e: e006 b.n 8000f2e <HAL_GPIO_DeInit+0x92>
|
|
8000f20: 2303 movs r3, #3
|
|
8000f22: e004 b.n 8000f2e <HAL_GPIO_DeInit+0x92>
|
|
8000f24: 2302 movs r3, #2
|
|
8000f26: e002 b.n 8000f2e <HAL_GPIO_DeInit+0x92>
|
|
8000f28: 2301 movs r3, #1
|
|
8000f2a: e000 b.n 8000f2e <HAL_GPIO_DeInit+0x92>
|
|
8000f2c: 2300 movs r3, #0
|
|
8000f2e: 69fa ldr r2, [r7, #28]
|
|
8000f30: f002 0203 and.w r2, r2, #3
|
|
8000f34: 0092 lsls r2, r2, #2
|
|
8000f36: 4093 lsls r3, r2
|
|
8000f38: 697a ldr r2, [r7, #20]
|
|
8000f3a: 429a cmp r2, r3
|
|
8000f3c: d132 bne.n 8000fa4 <HAL_GPIO_DeInit+0x108>
|
|
{
|
|
tmp = 0x0FuL << (4u * (position & 0x03u));
|
|
8000f3e: 69fb ldr r3, [r7, #28]
|
|
8000f40: f003 0303 and.w r3, r3, #3
|
|
8000f44: 009b lsls r3, r3, #2
|
|
8000f46: 220f movs r2, #15
|
|
8000f48: fa02 f303 lsl.w r3, r2, r3
|
|
8000f4c: 617b str r3, [r7, #20]
|
|
CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
|
|
8000f4e: 4a31 ldr r2, [pc, #196] ; (8001014 <HAL_GPIO_DeInit+0x178>)
|
|
8000f50: 69fb ldr r3, [r7, #28]
|
|
8000f52: 089b lsrs r3, r3, #2
|
|
8000f54: 3302 adds r3, #2
|
|
8000f56: f852 1023 ldr.w r1, [r2, r3, lsl #2]
|
|
8000f5a: 697b ldr r3, [r7, #20]
|
|
8000f5c: 43da mvns r2, r3
|
|
8000f5e: 482d ldr r0, [pc, #180] ; (8001014 <HAL_GPIO_DeInit+0x178>)
|
|
8000f60: 69fb ldr r3, [r7, #28]
|
|
8000f62: 089b lsrs r3, r3, #2
|
|
8000f64: 400a ands r2, r1
|
|
8000f66: 3302 adds r3, #2
|
|
8000f68: f840 2023 str.w r2, [r0, r3, lsl #2]
|
|
|
|
/* Clear EXTI line configuration */
|
|
CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
|
|
8000f6c: 4b30 ldr r3, [pc, #192] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000f6e: 681a ldr r2, [r3, #0]
|
|
8000f70: 69bb ldr r3, [r7, #24]
|
|
8000f72: 43db mvns r3, r3
|
|
8000f74: 492e ldr r1, [pc, #184] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000f76: 4013 ands r3, r2
|
|
8000f78: 600b str r3, [r1, #0]
|
|
CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
|
|
8000f7a: 4b2d ldr r3, [pc, #180] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000f7c: 685a ldr r2, [r3, #4]
|
|
8000f7e: 69bb ldr r3, [r7, #24]
|
|
8000f80: 43db mvns r3, r3
|
|
8000f82: 492b ldr r1, [pc, #172] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000f84: 4013 ands r3, r2
|
|
8000f86: 604b str r3, [r1, #4]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
|
|
8000f88: 4b29 ldr r3, [pc, #164] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000f8a: 689a ldr r2, [r3, #8]
|
|
8000f8c: 69bb ldr r3, [r7, #24]
|
|
8000f8e: 43db mvns r3, r3
|
|
8000f90: 4927 ldr r1, [pc, #156] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000f92: 4013 ands r3, r2
|
|
8000f94: 608b str r3, [r1, #8]
|
|
CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
|
|
8000f96: 4b26 ldr r3, [pc, #152] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000f98: 68da ldr r2, [r3, #12]
|
|
8000f9a: 69bb ldr r3, [r7, #24]
|
|
8000f9c: 43db mvns r3, r3
|
|
8000f9e: 4924 ldr r1, [pc, #144] ; (8001030 <HAL_GPIO_DeInit+0x194>)
|
|
8000fa0: 4013 ands r3, r2
|
|
8000fa2: 60cb str r3, [r1, #12]
|
|
}
|
|
/*------------------------- GPIO Mode Configuration --------------------*/
|
|
/* Check if the current bit belongs to first half or last half of the pin count number
|
|
in order to address CRH or CRL register */
|
|
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
|
8000fa4: 69bb ldr r3, [r7, #24]
|
|
8000fa6: 2bff cmp r3, #255 ; 0xff
|
|
8000fa8: d801 bhi.n 8000fae <HAL_GPIO_DeInit+0x112>
|
|
8000faa: 687b ldr r3, [r7, #4]
|
|
8000fac: e001 b.n 8000fb2 <HAL_GPIO_DeInit+0x116>
|
|
8000fae: 687b ldr r3, [r7, #4]
|
|
8000fb0: 3304 adds r3, #4
|
|
8000fb2: 613b str r3, [r7, #16]
|
|
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
|
8000fb4: 69bb ldr r3, [r7, #24]
|
|
8000fb6: 2bff cmp r3, #255 ; 0xff
|
|
8000fb8: d802 bhi.n 8000fc0 <HAL_GPIO_DeInit+0x124>
|
|
8000fba: 69fb ldr r3, [r7, #28]
|
|
8000fbc: 009b lsls r3, r3, #2
|
|
8000fbe: e002 b.n 8000fc6 <HAL_GPIO_DeInit+0x12a>
|
|
8000fc0: 69fb ldr r3, [r7, #28]
|
|
8000fc2: 3b08 subs r3, #8
|
|
8000fc4: 009b lsls r3, r3, #2
|
|
8000fc6: 60fb str r3, [r7, #12]
|
|
|
|
/* CRL/CRH default value is floating input(0x04) shifted to correct position */
|
|
MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), GPIO_CRL_CNF0_0 << registeroffset);
|
|
8000fc8: 693b ldr r3, [r7, #16]
|
|
8000fca: 681a ldr r2, [r3, #0]
|
|
8000fcc: 210f movs r1, #15
|
|
8000fce: 68fb ldr r3, [r7, #12]
|
|
8000fd0: fa01 f303 lsl.w r3, r1, r3
|
|
8000fd4: 43db mvns r3, r3
|
|
8000fd6: 401a ands r2, r3
|
|
8000fd8: 2104 movs r1, #4
|
|
8000fda: 68fb ldr r3, [r7, #12]
|
|
8000fdc: fa01 f303 lsl.w r3, r1, r3
|
|
8000fe0: 431a orrs r2, r3
|
|
8000fe2: 693b ldr r3, [r7, #16]
|
|
8000fe4: 601a str r2, [r3, #0]
|
|
|
|
/* ODR default value is 0 */
|
|
CLEAR_BIT(GPIOx->ODR, iocurrent);
|
|
8000fe6: 687b ldr r3, [r7, #4]
|
|
8000fe8: 68da ldr r2, [r3, #12]
|
|
8000fea: 69bb ldr r3, [r7, #24]
|
|
8000fec: 43db mvns r3, r3
|
|
8000fee: 401a ands r2, r3
|
|
8000ff0: 687b ldr r3, [r7, #4]
|
|
8000ff2: 60da str r2, [r3, #12]
|
|
}
|
|
|
|
position++;
|
|
8000ff4: 69fb ldr r3, [r7, #28]
|
|
8000ff6: 3301 adds r3, #1
|
|
8000ff8: 61fb str r3, [r7, #28]
|
|
while ((GPIO_Pin >> position) != 0u)
|
|
8000ffa: 683a ldr r2, [r7, #0]
|
|
8000ffc: 69fb ldr r3, [r7, #28]
|
|
8000ffe: fa22 f303 lsr.w r3, r2, r3
|
|
8001002: 2b00 cmp r3, #0
|
|
8001004: f47f af52 bne.w 8000eac <HAL_GPIO_DeInit+0x10>
|
|
}
|
|
}
|
|
8001008: bf00 nop
|
|
800100a: 3724 adds r7, #36 ; 0x24
|
|
800100c: 46bd mov sp, r7
|
|
800100e: bc80 pop {r7}
|
|
8001010: 4770 bx lr
|
|
8001012: bf00 nop
|
|
8001014: 40010000 .word 0x40010000
|
|
8001018: 40010800 .word 0x40010800
|
|
800101c: 40010c00 .word 0x40010c00
|
|
8001020: 40011000 .word 0x40011000
|
|
8001024: 40011400 .word 0x40011400
|
|
8001028: 40011800 .word 0x40011800
|
|
800102c: 40011c00 .word 0x40011c00
|
|
8001030: 40010400 .word 0x40010400
|
|
|
|
08001034 <HAL_GPIO_WritePin>:
|
|
* @arg GPIO_PIN_RESET: to clear the port pin
|
|
* @arg GPIO_PIN_SET: to set the port pin
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
|
{
|
|
8001034: b480 push {r7}
|
|
8001036: b083 sub sp, #12
|
|
8001038: af00 add r7, sp, #0
|
|
800103a: 6078 str r0, [r7, #4]
|
|
800103c: 460b mov r3, r1
|
|
800103e: 807b strh r3, [r7, #2]
|
|
8001040: 4613 mov r3, r2
|
|
8001042: 707b strb r3, [r7, #1]
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
|
|
|
if (PinState != GPIO_PIN_RESET)
|
|
8001044: 787b ldrb r3, [r7, #1]
|
|
8001046: 2b00 cmp r3, #0
|
|
8001048: d003 beq.n 8001052 <HAL_GPIO_WritePin+0x1e>
|
|
{
|
|
GPIOx->BSRR = GPIO_Pin;
|
|
800104a: 887a ldrh r2, [r7, #2]
|
|
800104c: 687b ldr r3, [r7, #4]
|
|
800104e: 611a str r2, [r3, #16]
|
|
}
|
|
else
|
|
{
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
|
}
|
|
}
|
|
8001050: e003 b.n 800105a <HAL_GPIO_WritePin+0x26>
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
|
8001052: 887b ldrh r3, [r7, #2]
|
|
8001054: 041a lsls r2, r3, #16
|
|
8001056: 687b ldr r3, [r7, #4]
|
|
8001058: 611a str r2, [r3, #16]
|
|
}
|
|
800105a: bf00 nop
|
|
800105c: 370c adds r7, #12
|
|
800105e: 46bd mov sp, r7
|
|
8001060: bc80 pop {r7}
|
|
8001062: 4770 bx lr
|
|
|
|
08001064 <HAL_I2C_Init>:
|
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
8001064: b580 push {r7, lr}
|
|
8001066: b084 sub sp, #16
|
|
8001068: af00 add r7, sp, #0
|
|
800106a: 6078 str r0, [r7, #4]
|
|
uint32_t freqrange;
|
|
uint32_t pclk1;
|
|
|
|
/* Check the I2C handle allocation */
|
|
if (hi2c == NULL)
|
|
800106c: 687b ldr r3, [r7, #4]
|
|
800106e: 2b00 cmp r3, #0
|
|
8001070: d101 bne.n 8001076 <HAL_I2C_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8001072: 2301 movs r3, #1
|
|
8001074: e11f b.n 80012b6 <HAL_I2C_Init+0x252>
|
|
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
|
|
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
|
|
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
|
|
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_RESET)
|
|
8001076: 687b ldr r3, [r7, #4]
|
|
8001078: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
|
800107c: b2db uxtb r3, r3
|
|
800107e: 2b00 cmp r3, #0
|
|
8001080: d106 bne.n 8001090 <HAL_I2C_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hi2c->Lock = HAL_UNLOCKED;
|
|
8001082: 687b ldr r3, [r7, #4]
|
|
8001084: 2200 movs r2, #0
|
|
8001086: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
|
hi2c->MspInitCallback(hi2c);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
|
HAL_I2C_MspInit(hi2c);
|
|
800108a: 6878 ldr r0, [r7, #4]
|
|
800108c: f7ff faf0 bl 8000670 <HAL_I2C_MspInit>
|
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
8001090: 687b ldr r3, [r7, #4]
|
|
8001092: 2224 movs r2, #36 ; 0x24
|
|
8001094: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
|
|
/* Disable the selected I2C peripheral */
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
8001098: 687b ldr r3, [r7, #4]
|
|
800109a: 681b ldr r3, [r3, #0]
|
|
800109c: 681a ldr r2, [r3, #0]
|
|
800109e: 687b ldr r3, [r7, #4]
|
|
80010a0: 681b ldr r3, [r3, #0]
|
|
80010a2: f022 0201 bic.w r2, r2, #1
|
|
80010a6: 601a str r2, [r3, #0]
|
|
|
|
/*Reset I2C*/
|
|
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
|
|
80010a8: 687b ldr r3, [r7, #4]
|
|
80010aa: 681b ldr r3, [r3, #0]
|
|
80010ac: 681a ldr r2, [r3, #0]
|
|
80010ae: 687b ldr r3, [r7, #4]
|
|
80010b0: 681b ldr r3, [r3, #0]
|
|
80010b2: f442 4200 orr.w r2, r2, #32768 ; 0x8000
|
|
80010b6: 601a str r2, [r3, #0]
|
|
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
|
|
80010b8: 687b ldr r3, [r7, #4]
|
|
80010ba: 681b ldr r3, [r3, #0]
|
|
80010bc: 681a ldr r2, [r3, #0]
|
|
80010be: 687b ldr r3, [r7, #4]
|
|
80010c0: 681b ldr r3, [r3, #0]
|
|
80010c2: f422 4200 bic.w r2, r2, #32768 ; 0x8000
|
|
80010c6: 601a str r2, [r3, #0]
|
|
|
|
/* Get PCLK1 frequency */
|
|
pclk1 = HAL_RCC_GetPCLK1Freq();
|
|
80010c8: f002 faae bl 8003628 <HAL_RCC_GetPCLK1Freq>
|
|
80010cc: 60f8 str r0, [r7, #12]
|
|
|
|
/* Check the minimum allowed PCLK1 frequency */
|
|
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
|
80010ce: 687b ldr r3, [r7, #4]
|
|
80010d0: 685b ldr r3, [r3, #4]
|
|
80010d2: 4a7b ldr r2, [pc, #492] ; (80012c0 <HAL_I2C_Init+0x25c>)
|
|
80010d4: 4293 cmp r3, r2
|
|
80010d6: d807 bhi.n 80010e8 <HAL_I2C_Init+0x84>
|
|
80010d8: 68fb ldr r3, [r7, #12]
|
|
80010da: 4a7a ldr r2, [pc, #488] ; (80012c4 <HAL_I2C_Init+0x260>)
|
|
80010dc: 4293 cmp r3, r2
|
|
80010de: bf94 ite ls
|
|
80010e0: 2301 movls r3, #1
|
|
80010e2: 2300 movhi r3, #0
|
|
80010e4: b2db uxtb r3, r3
|
|
80010e6: e006 b.n 80010f6 <HAL_I2C_Init+0x92>
|
|
80010e8: 68fb ldr r3, [r7, #12]
|
|
80010ea: 4a77 ldr r2, [pc, #476] ; (80012c8 <HAL_I2C_Init+0x264>)
|
|
80010ec: 4293 cmp r3, r2
|
|
80010ee: bf94 ite ls
|
|
80010f0: 2301 movls r3, #1
|
|
80010f2: 2300 movhi r3, #0
|
|
80010f4: b2db uxtb r3, r3
|
|
80010f6: 2b00 cmp r3, #0
|
|
80010f8: d001 beq.n 80010fe <HAL_I2C_Init+0x9a>
|
|
{
|
|
return HAL_ERROR;
|
|
80010fa: 2301 movs r3, #1
|
|
80010fc: e0db b.n 80012b6 <HAL_I2C_Init+0x252>
|
|
}
|
|
|
|
/* Calculate frequency range */
|
|
freqrange = I2C_FREQRANGE(pclk1);
|
|
80010fe: 68fb ldr r3, [r7, #12]
|
|
8001100: 4a72 ldr r2, [pc, #456] ; (80012cc <HAL_I2C_Init+0x268>)
|
|
8001102: fba2 2303 umull r2, r3, r2, r3
|
|
8001106: 0c9b lsrs r3, r3, #18
|
|
8001108: 60bb str r3, [r7, #8]
|
|
|
|
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
|
/* Configure I2Cx: Frequency range */
|
|
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
|
800110a: 687b ldr r3, [r7, #4]
|
|
800110c: 681b ldr r3, [r3, #0]
|
|
800110e: 685b ldr r3, [r3, #4]
|
|
8001110: f023 013f bic.w r1, r3, #63 ; 0x3f
|
|
8001114: 687b ldr r3, [r7, #4]
|
|
8001116: 681b ldr r3, [r3, #0]
|
|
8001118: 68ba ldr r2, [r7, #8]
|
|
800111a: 430a orrs r2, r1
|
|
800111c: 605a str r2, [r3, #4]
|
|
|
|
/*---------------------------- I2Cx TRISE Configuration --------------------*/
|
|
/* Configure I2Cx: Rise Time */
|
|
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
|
800111e: 687b ldr r3, [r7, #4]
|
|
8001120: 681b ldr r3, [r3, #0]
|
|
8001122: 6a1b ldr r3, [r3, #32]
|
|
8001124: f023 013f bic.w r1, r3, #63 ; 0x3f
|
|
8001128: 687b ldr r3, [r7, #4]
|
|
800112a: 685b ldr r3, [r3, #4]
|
|
800112c: 4a64 ldr r2, [pc, #400] ; (80012c0 <HAL_I2C_Init+0x25c>)
|
|
800112e: 4293 cmp r3, r2
|
|
8001130: d802 bhi.n 8001138 <HAL_I2C_Init+0xd4>
|
|
8001132: 68bb ldr r3, [r7, #8]
|
|
8001134: 3301 adds r3, #1
|
|
8001136: e009 b.n 800114c <HAL_I2C_Init+0xe8>
|
|
8001138: 68bb ldr r3, [r7, #8]
|
|
800113a: f44f 7296 mov.w r2, #300 ; 0x12c
|
|
800113e: fb02 f303 mul.w r3, r2, r3
|
|
8001142: 4a63 ldr r2, [pc, #396] ; (80012d0 <HAL_I2C_Init+0x26c>)
|
|
8001144: fba2 2303 umull r2, r3, r2, r3
|
|
8001148: 099b lsrs r3, r3, #6
|
|
800114a: 3301 adds r3, #1
|
|
800114c: 687a ldr r2, [r7, #4]
|
|
800114e: 6812 ldr r2, [r2, #0]
|
|
8001150: 430b orrs r3, r1
|
|
8001152: 6213 str r3, [r2, #32]
|
|
|
|
/*---------------------------- I2Cx CCR Configuration ----------------------*/
|
|
/* Configure I2Cx: Speed */
|
|
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
|
8001154: 687b ldr r3, [r7, #4]
|
|
8001156: 681b ldr r3, [r3, #0]
|
|
8001158: 69db ldr r3, [r3, #28]
|
|
800115a: f423 424f bic.w r2, r3, #52992 ; 0xcf00
|
|
800115e: f022 02ff bic.w r2, r2, #255 ; 0xff
|
|
8001162: 687b ldr r3, [r7, #4]
|
|
8001164: 685b ldr r3, [r3, #4]
|
|
8001166: 4956 ldr r1, [pc, #344] ; (80012c0 <HAL_I2C_Init+0x25c>)
|
|
8001168: 428b cmp r3, r1
|
|
800116a: d80d bhi.n 8001188 <HAL_I2C_Init+0x124>
|
|
800116c: 68fb ldr r3, [r7, #12]
|
|
800116e: 1e59 subs r1, r3, #1
|
|
8001170: 687b ldr r3, [r7, #4]
|
|
8001172: 685b ldr r3, [r3, #4]
|
|
8001174: 005b lsls r3, r3, #1
|
|
8001176: fbb1 f3f3 udiv r3, r1, r3
|
|
800117a: 3301 adds r3, #1
|
|
800117c: f3c3 030b ubfx r3, r3, #0, #12
|
|
8001180: 2b04 cmp r3, #4
|
|
8001182: bf38 it cc
|
|
8001184: 2304 movcc r3, #4
|
|
8001186: e04f b.n 8001228 <HAL_I2C_Init+0x1c4>
|
|
8001188: 687b ldr r3, [r7, #4]
|
|
800118a: 689b ldr r3, [r3, #8]
|
|
800118c: 2b00 cmp r3, #0
|
|
800118e: d111 bne.n 80011b4 <HAL_I2C_Init+0x150>
|
|
8001190: 68fb ldr r3, [r7, #12]
|
|
8001192: 1e58 subs r0, r3, #1
|
|
8001194: 687b ldr r3, [r7, #4]
|
|
8001196: 6859 ldr r1, [r3, #4]
|
|
8001198: 460b mov r3, r1
|
|
800119a: 005b lsls r3, r3, #1
|
|
800119c: 440b add r3, r1
|
|
800119e: fbb0 f3f3 udiv r3, r0, r3
|
|
80011a2: 3301 adds r3, #1
|
|
80011a4: f3c3 030b ubfx r3, r3, #0, #12
|
|
80011a8: 2b00 cmp r3, #0
|
|
80011aa: bf0c ite eq
|
|
80011ac: 2301 moveq r3, #1
|
|
80011ae: 2300 movne r3, #0
|
|
80011b0: b2db uxtb r3, r3
|
|
80011b2: e012 b.n 80011da <HAL_I2C_Init+0x176>
|
|
80011b4: 68fb ldr r3, [r7, #12]
|
|
80011b6: 1e58 subs r0, r3, #1
|
|
80011b8: 687b ldr r3, [r7, #4]
|
|
80011ba: 6859 ldr r1, [r3, #4]
|
|
80011bc: 460b mov r3, r1
|
|
80011be: 009b lsls r3, r3, #2
|
|
80011c0: 440b add r3, r1
|
|
80011c2: 0099 lsls r1, r3, #2
|
|
80011c4: 440b add r3, r1
|
|
80011c6: fbb0 f3f3 udiv r3, r0, r3
|
|
80011ca: 3301 adds r3, #1
|
|
80011cc: f3c3 030b ubfx r3, r3, #0, #12
|
|
80011d0: 2b00 cmp r3, #0
|
|
80011d2: bf0c ite eq
|
|
80011d4: 2301 moveq r3, #1
|
|
80011d6: 2300 movne r3, #0
|
|
80011d8: b2db uxtb r3, r3
|
|
80011da: 2b00 cmp r3, #0
|
|
80011dc: d001 beq.n 80011e2 <HAL_I2C_Init+0x17e>
|
|
80011de: 2301 movs r3, #1
|
|
80011e0: e022 b.n 8001228 <HAL_I2C_Init+0x1c4>
|
|
80011e2: 687b ldr r3, [r7, #4]
|
|
80011e4: 689b ldr r3, [r3, #8]
|
|
80011e6: 2b00 cmp r3, #0
|
|
80011e8: d10e bne.n 8001208 <HAL_I2C_Init+0x1a4>
|
|
80011ea: 68fb ldr r3, [r7, #12]
|
|
80011ec: 1e58 subs r0, r3, #1
|
|
80011ee: 687b ldr r3, [r7, #4]
|
|
80011f0: 6859 ldr r1, [r3, #4]
|
|
80011f2: 460b mov r3, r1
|
|
80011f4: 005b lsls r3, r3, #1
|
|
80011f6: 440b add r3, r1
|
|
80011f8: fbb0 f3f3 udiv r3, r0, r3
|
|
80011fc: 3301 adds r3, #1
|
|
80011fe: f3c3 030b ubfx r3, r3, #0, #12
|
|
8001202: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8001206: e00f b.n 8001228 <HAL_I2C_Init+0x1c4>
|
|
8001208: 68fb ldr r3, [r7, #12]
|
|
800120a: 1e58 subs r0, r3, #1
|
|
800120c: 687b ldr r3, [r7, #4]
|
|
800120e: 6859 ldr r1, [r3, #4]
|
|
8001210: 460b mov r3, r1
|
|
8001212: 009b lsls r3, r3, #2
|
|
8001214: 440b add r3, r1
|
|
8001216: 0099 lsls r1, r3, #2
|
|
8001218: 440b add r3, r1
|
|
800121a: fbb0 f3f3 udiv r3, r0, r3
|
|
800121e: 3301 adds r3, #1
|
|
8001220: f3c3 030b ubfx r3, r3, #0, #12
|
|
8001224: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8001228: 6879 ldr r1, [r7, #4]
|
|
800122a: 6809 ldr r1, [r1, #0]
|
|
800122c: 4313 orrs r3, r2
|
|
800122e: 61cb str r3, [r1, #28]
|
|
|
|
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
|
/* Configure I2Cx: Generalcall and NoStretch mode */
|
|
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
|
8001230: 687b ldr r3, [r7, #4]
|
|
8001232: 681b ldr r3, [r3, #0]
|
|
8001234: 681b ldr r3, [r3, #0]
|
|
8001236: f023 01c0 bic.w r1, r3, #192 ; 0xc0
|
|
800123a: 687b ldr r3, [r7, #4]
|
|
800123c: 69da ldr r2, [r3, #28]
|
|
800123e: 687b ldr r3, [r7, #4]
|
|
8001240: 6a1b ldr r3, [r3, #32]
|
|
8001242: 431a orrs r2, r3
|
|
8001244: 687b ldr r3, [r7, #4]
|
|
8001246: 681b ldr r3, [r3, #0]
|
|
8001248: 430a orrs r2, r1
|
|
800124a: 601a str r2, [r3, #0]
|
|
|
|
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
|
/* Configure I2Cx: Own Address1 and addressing mode */
|
|
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
|
800124c: 687b ldr r3, [r7, #4]
|
|
800124e: 681b ldr r3, [r3, #0]
|
|
8001250: 689b ldr r3, [r3, #8]
|
|
8001252: f423 4303 bic.w r3, r3, #33536 ; 0x8300
|
|
8001256: f023 03ff bic.w r3, r3, #255 ; 0xff
|
|
800125a: 687a ldr r2, [r7, #4]
|
|
800125c: 6911 ldr r1, [r2, #16]
|
|
800125e: 687a ldr r2, [r7, #4]
|
|
8001260: 68d2 ldr r2, [r2, #12]
|
|
8001262: 4311 orrs r1, r2
|
|
8001264: 687a ldr r2, [r7, #4]
|
|
8001266: 6812 ldr r2, [r2, #0]
|
|
8001268: 430b orrs r3, r1
|
|
800126a: 6093 str r3, [r2, #8]
|
|
|
|
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
|
/* Configure I2Cx: Dual mode and Own Address2 */
|
|
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
|
800126c: 687b ldr r3, [r7, #4]
|
|
800126e: 681b ldr r3, [r3, #0]
|
|
8001270: 68db ldr r3, [r3, #12]
|
|
8001272: f023 01ff bic.w r1, r3, #255 ; 0xff
|
|
8001276: 687b ldr r3, [r7, #4]
|
|
8001278: 695a ldr r2, [r3, #20]
|
|
800127a: 687b ldr r3, [r7, #4]
|
|
800127c: 699b ldr r3, [r3, #24]
|
|
800127e: 431a orrs r2, r3
|
|
8001280: 687b ldr r3, [r7, #4]
|
|
8001282: 681b ldr r3, [r3, #0]
|
|
8001284: 430a orrs r2, r1
|
|
8001286: 60da str r2, [r3, #12]
|
|
|
|
/* Enable the selected I2C peripheral */
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8001288: 687b ldr r3, [r7, #4]
|
|
800128a: 681b ldr r3, [r3, #0]
|
|
800128c: 681a ldr r2, [r3, #0]
|
|
800128e: 687b ldr r3, [r7, #4]
|
|
8001290: 681b ldr r3, [r3, #0]
|
|
8001292: f042 0201 orr.w r2, r2, #1
|
|
8001296: 601a str r2, [r3, #0]
|
|
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8001298: 687b ldr r3, [r7, #4]
|
|
800129a: 2200 movs r2, #0
|
|
800129c: 641a str r2, [r3, #64] ; 0x40
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800129e: 687b ldr r3, [r7, #4]
|
|
80012a0: 2220 movs r2, #32
|
|
80012a2: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
80012a6: 687b ldr r3, [r7, #4]
|
|
80012a8: 2200 movs r2, #0
|
|
80012aa: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80012ac: 687b ldr r3, [r7, #4]
|
|
80012ae: 2200 movs r2, #0
|
|
80012b0: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
|
|
return HAL_OK;
|
|
80012b4: 2300 movs r3, #0
|
|
}
|
|
80012b6: 4618 mov r0, r3
|
|
80012b8: 3710 adds r7, #16
|
|
80012ba: 46bd mov sp, r7
|
|
80012bc: bd80 pop {r7, pc}
|
|
80012be: bf00 nop
|
|
80012c0: 000186a0 .word 0x000186a0
|
|
80012c4: 001e847f .word 0x001e847f
|
|
80012c8: 003d08ff .word 0x003d08ff
|
|
80012cc: 431bde83 .word 0x431bde83
|
|
80012d0: 10624dd3 .word 0x10624dd3
|
|
|
|
080012d4 <HAL_I2C_Slave_Receive>:
|
|
* @param Size Amount of data to be sent
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
|
{
|
|
80012d4: b580 push {r7, lr}
|
|
80012d6: b08a sub sp, #40 ; 0x28
|
|
80012d8: af02 add r7, sp, #8
|
|
80012da: 60f8 str r0, [r7, #12]
|
|
80012dc: 60b9 str r1, [r7, #8]
|
|
80012de: 603b str r3, [r7, #0]
|
|
80012e0: 4613 mov r3, r2
|
|
80012e2: 80fb strh r3, [r7, #6]
|
|
/* Init tickstart for timeout management*/
|
|
uint32_t tickstart = HAL_GetTick();
|
|
80012e4: f7ff fb36 bl 8000954 <HAL_GetTick>
|
|
80012e8: 61f8 str r0, [r7, #28]
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
80012ea: 68fb ldr r3, [r7, #12]
|
|
80012ec: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
|
80012f0: b2db uxtb r3, r3
|
|
80012f2: 2b20 cmp r3, #32
|
|
80012f4: f040 80ee bne.w 80014d4 <HAL_I2C_Slave_Receive+0x200>
|
|
{
|
|
if ((pData == NULL) || (Size == (uint16_t)0))
|
|
80012f8: 68bb ldr r3, [r7, #8]
|
|
80012fa: 2b00 cmp r3, #0
|
|
80012fc: d002 beq.n 8001304 <HAL_I2C_Slave_Receive+0x30>
|
|
80012fe: 88fb ldrh r3, [r7, #6]
|
|
8001300: 2b00 cmp r3, #0
|
|
8001302: d101 bne.n 8001308 <HAL_I2C_Slave_Receive+0x34>
|
|
{
|
|
return HAL_ERROR;
|
|
8001304: 2301 movs r3, #1
|
|
8001306: e0e6 b.n 80014d6 <HAL_I2C_Slave_Receive+0x202>
|
|
}
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hi2c);
|
|
8001308: 68fb ldr r3, [r7, #12]
|
|
800130a: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
|
800130e: 2b01 cmp r3, #1
|
|
8001310: d101 bne.n 8001316 <HAL_I2C_Slave_Receive+0x42>
|
|
8001312: 2302 movs r3, #2
|
|
8001314: e0df b.n 80014d6 <HAL_I2C_Slave_Receive+0x202>
|
|
8001316: 68fb ldr r3, [r7, #12]
|
|
8001318: 2201 movs r2, #1
|
|
800131a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
/* Check if the I2C is already enabled */
|
|
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
|
800131e: 68fb ldr r3, [r7, #12]
|
|
8001320: 681b ldr r3, [r3, #0]
|
|
8001322: 681b ldr r3, [r3, #0]
|
|
8001324: f003 0301 and.w r3, r3, #1
|
|
8001328: 2b01 cmp r3, #1
|
|
800132a: d007 beq.n 800133c <HAL_I2C_Slave_Receive+0x68>
|
|
{
|
|
/* Enable I2C peripheral */
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
800132c: 68fb ldr r3, [r7, #12]
|
|
800132e: 681b ldr r3, [r3, #0]
|
|
8001330: 681a ldr r2, [r3, #0]
|
|
8001332: 68fb ldr r3, [r7, #12]
|
|
8001334: 681b ldr r3, [r3, #0]
|
|
8001336: f042 0201 orr.w r2, r2, #1
|
|
800133a: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Disable Pos */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
800133c: 68fb ldr r3, [r7, #12]
|
|
800133e: 681b ldr r3, [r3, #0]
|
|
8001340: 681a ldr r2, [r3, #0]
|
|
8001342: 68fb ldr r3, [r7, #12]
|
|
8001344: 681b ldr r3, [r3, #0]
|
|
8001346: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
|
800134a: 601a str r2, [r3, #0]
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
|
800134c: 68fb ldr r3, [r7, #12]
|
|
800134e: 2222 movs r2, #34 ; 0x22
|
|
8001350: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_SLAVE;
|
|
8001354: 68fb ldr r3, [r7, #12]
|
|
8001356: 2220 movs r2, #32
|
|
8001358: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
800135c: 68fb ldr r3, [r7, #12]
|
|
800135e: 2200 movs r2, #0
|
|
8001360: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Prepare transfer parameters */
|
|
hi2c->pBuffPtr = pData;
|
|
8001362: 68fb ldr r3, [r7, #12]
|
|
8001364: 68ba ldr r2, [r7, #8]
|
|
8001366: 625a str r2, [r3, #36] ; 0x24
|
|
hi2c->XferCount = Size;
|
|
8001368: 68fb ldr r3, [r7, #12]
|
|
800136a: 88fa ldrh r2, [r7, #6]
|
|
800136c: 855a strh r2, [r3, #42] ; 0x2a
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
800136e: 68fb ldr r3, [r7, #12]
|
|
8001370: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8001372: b29a uxth r2, r3
|
|
8001374: 68fb ldr r3, [r7, #12]
|
|
8001376: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
|
8001378: 68fb ldr r3, [r7, #12]
|
|
800137a: 4a59 ldr r2, [pc, #356] ; (80014e0 <HAL_I2C_Slave_Receive+0x20c>)
|
|
800137c: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* Enable Address Acknowledge */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
800137e: 68fb ldr r3, [r7, #12]
|
|
8001380: 681b ldr r3, [r3, #0]
|
|
8001382: 681a ldr r2, [r3, #0]
|
|
8001384: 68fb ldr r3, [r7, #12]
|
|
8001386: 681b ldr r3, [r3, #0]
|
|
8001388: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
|
800138c: 601a str r2, [r3, #0]
|
|
|
|
/* Wait until ADDR flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
|
|
800138e: 69fb ldr r3, [r7, #28]
|
|
8001390: 9300 str r3, [sp, #0]
|
|
8001392: 683b ldr r3, [r7, #0]
|
|
8001394: 2200 movs r2, #0
|
|
8001396: 4953 ldr r1, [pc, #332] ; (80014e4 <HAL_I2C_Slave_Receive+0x210>)
|
|
8001398: 68f8 ldr r0, [r7, #12]
|
|
800139a: f000 f8a5 bl 80014e8 <I2C_WaitOnFlagUntilTimeout>
|
|
800139e: 4603 mov r3, r0
|
|
80013a0: 2b00 cmp r3, #0
|
|
80013a2: d001 beq.n 80013a8 <HAL_I2C_Slave_Receive+0xd4>
|
|
{
|
|
return HAL_ERROR;
|
|
80013a4: 2301 movs r3, #1
|
|
80013a6: e096 b.n 80014d6 <HAL_I2C_Slave_Receive+0x202>
|
|
}
|
|
|
|
/* Clear ADDR flag */
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
80013a8: 2300 movs r3, #0
|
|
80013aa: 61bb str r3, [r7, #24]
|
|
80013ac: 68fb ldr r3, [r7, #12]
|
|
80013ae: 681b ldr r3, [r3, #0]
|
|
80013b0: 695b ldr r3, [r3, #20]
|
|
80013b2: 61bb str r3, [r7, #24]
|
|
80013b4: 68fb ldr r3, [r7, #12]
|
|
80013b6: 681b ldr r3, [r3, #0]
|
|
80013b8: 699b ldr r3, [r3, #24]
|
|
80013ba: 61bb str r3, [r7, #24]
|
|
80013bc: 69bb ldr r3, [r7, #24]
|
|
|
|
while (hi2c->XferSize > 0U)
|
|
80013be: e04e b.n 800145e <HAL_I2C_Slave_Receive+0x18a>
|
|
{
|
|
/* Wait until RXNE flag is set */
|
|
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
80013c0: 69fa ldr r2, [r7, #28]
|
|
80013c2: 6839 ldr r1, [r7, #0]
|
|
80013c4: 68f8 ldr r0, [r7, #12]
|
|
80013c6: f000 f923 bl 8001610 <I2C_WaitOnRXNEFlagUntilTimeout>
|
|
80013ca: 4603 mov r3, r0
|
|
80013cc: 2b00 cmp r3, #0
|
|
80013ce: d009 beq.n 80013e4 <HAL_I2C_Slave_Receive+0x110>
|
|
{
|
|
/* Disable Address Acknowledge */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
80013d0: 68fb ldr r3, [r7, #12]
|
|
80013d2: 681b ldr r3, [r3, #0]
|
|
80013d4: 681a ldr r2, [r3, #0]
|
|
80013d6: 68fb ldr r3, [r7, #12]
|
|
80013d8: 681b ldr r3, [r3, #0]
|
|
80013da: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
80013de: 601a str r2, [r3, #0]
|
|
|
|
return HAL_ERROR;
|
|
80013e0: 2301 movs r3, #1
|
|
80013e2: e078 b.n 80014d6 <HAL_I2C_Slave_Receive+0x202>
|
|
}
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80013e4: 68fb ldr r3, [r7, #12]
|
|
80013e6: 681b ldr r3, [r3, #0]
|
|
80013e8: 691a ldr r2, [r3, #16]
|
|
80013ea: 68fb ldr r3, [r7, #12]
|
|
80013ec: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80013ee: b2d2 uxtb r2, r2
|
|
80013f0: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
80013f2: 68fb ldr r3, [r7, #12]
|
|
80013f4: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80013f6: 1c5a adds r2, r3, #1
|
|
80013f8: 68fb ldr r3, [r7, #12]
|
|
80013fa: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
80013fc: 68fb ldr r3, [r7, #12]
|
|
80013fe: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8001400: 3b01 subs r3, #1
|
|
8001402: b29a uxth r2, r3
|
|
8001404: 68fb ldr r3, [r7, #12]
|
|
8001406: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8001408: 68fb ldr r3, [r7, #12]
|
|
800140a: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
800140c: b29b uxth r3, r3
|
|
800140e: 3b01 subs r3, #1
|
|
8001410: b29a uxth r2, r3
|
|
8001412: 68fb ldr r3, [r7, #12]
|
|
8001414: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
|
|
8001416: 68fb ldr r3, [r7, #12]
|
|
8001418: 681b ldr r3, [r3, #0]
|
|
800141a: 695b ldr r3, [r3, #20]
|
|
800141c: f003 0304 and.w r3, r3, #4
|
|
8001420: 2b04 cmp r3, #4
|
|
8001422: d11c bne.n 800145e <HAL_I2C_Slave_Receive+0x18a>
|
|
8001424: 68fb ldr r3, [r7, #12]
|
|
8001426: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8001428: 2b00 cmp r3, #0
|
|
800142a: d018 beq.n 800145e <HAL_I2C_Slave_Receive+0x18a>
|
|
{
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
800142c: 68fb ldr r3, [r7, #12]
|
|
800142e: 681b ldr r3, [r3, #0]
|
|
8001430: 691a ldr r2, [r3, #16]
|
|
8001432: 68fb ldr r3, [r7, #12]
|
|
8001434: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8001436: b2d2 uxtb r2, r2
|
|
8001438: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
800143a: 68fb ldr r3, [r7, #12]
|
|
800143c: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800143e: 1c5a adds r2, r3, #1
|
|
8001440: 68fb ldr r3, [r7, #12]
|
|
8001442: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8001444: 68fb ldr r3, [r7, #12]
|
|
8001446: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8001448: 3b01 subs r3, #1
|
|
800144a: b29a uxth r2, r3
|
|
800144c: 68fb ldr r3, [r7, #12]
|
|
800144e: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8001450: 68fb ldr r3, [r7, #12]
|
|
8001452: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8001454: b29b uxth r3, r3
|
|
8001456: 3b01 subs r3, #1
|
|
8001458: b29a uxth r2, r3
|
|
800145a: 68fb ldr r3, [r7, #12]
|
|
800145c: 855a strh r2, [r3, #42] ; 0x2a
|
|
while (hi2c->XferSize > 0U)
|
|
800145e: 68fb ldr r3, [r7, #12]
|
|
8001460: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8001462: 2b00 cmp r3, #0
|
|
8001464: d1ac bne.n 80013c0 <HAL_I2C_Slave_Receive+0xec>
|
|
}
|
|
}
|
|
|
|
/* Wait until STOP flag is set */
|
|
if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8001466: 69fa ldr r2, [r7, #28]
|
|
8001468: 6839 ldr r1, [r7, #0]
|
|
800146a: 68f8 ldr r0, [r7, #12]
|
|
800146c: f000 f893 bl 8001596 <I2C_WaitOnSTOPFlagUntilTimeout>
|
|
8001470: 4603 mov r3, r0
|
|
8001472: 2b00 cmp r3, #0
|
|
8001474: d009 beq.n 800148a <HAL_I2C_Slave_Receive+0x1b6>
|
|
{
|
|
/* Disable Address Acknowledge */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8001476: 68fb ldr r3, [r7, #12]
|
|
8001478: 681b ldr r3, [r3, #0]
|
|
800147a: 681a ldr r2, [r3, #0]
|
|
800147c: 68fb ldr r3, [r7, #12]
|
|
800147e: 681b ldr r3, [r3, #0]
|
|
8001480: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
8001484: 601a str r2, [r3, #0]
|
|
|
|
return HAL_ERROR;
|
|
8001486: 2301 movs r3, #1
|
|
8001488: e025 b.n 80014d6 <HAL_I2C_Slave_Receive+0x202>
|
|
}
|
|
|
|
/* Clear STOP flag */
|
|
__HAL_I2C_CLEAR_STOPFLAG(hi2c);
|
|
800148a: 2300 movs r3, #0
|
|
800148c: 617b str r3, [r7, #20]
|
|
800148e: 68fb ldr r3, [r7, #12]
|
|
8001490: 681b ldr r3, [r3, #0]
|
|
8001492: 695b ldr r3, [r3, #20]
|
|
8001494: 617b str r3, [r7, #20]
|
|
8001496: 68fb ldr r3, [r7, #12]
|
|
8001498: 681b ldr r3, [r3, #0]
|
|
800149a: 681a ldr r2, [r3, #0]
|
|
800149c: 68fb ldr r3, [r7, #12]
|
|
800149e: 681b ldr r3, [r3, #0]
|
|
80014a0: f042 0201 orr.w r2, r2, #1
|
|
80014a4: 601a str r2, [r3, #0]
|
|
80014a6: 697b ldr r3, [r7, #20]
|
|
|
|
/* Disable Address Acknowledge */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
80014a8: 68fb ldr r3, [r7, #12]
|
|
80014aa: 681b ldr r3, [r3, #0]
|
|
80014ac: 681a ldr r2, [r3, #0]
|
|
80014ae: 68fb ldr r3, [r7, #12]
|
|
80014b0: 681b ldr r3, [r3, #0]
|
|
80014b2: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
80014b6: 601a str r2, [r3, #0]
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80014b8: 68fb ldr r3, [r7, #12]
|
|
80014ba: 2220 movs r2, #32
|
|
80014bc: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80014c0: 68fb ldr r3, [r7, #12]
|
|
80014c2: 2200 movs r2, #0
|
|
80014c4: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
80014c8: 68fb ldr r3, [r7, #12]
|
|
80014ca: 2200 movs r2, #0
|
|
80014cc: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_OK;
|
|
80014d0: 2300 movs r3, #0
|
|
80014d2: e000 b.n 80014d6 <HAL_I2C_Slave_Receive+0x202>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
80014d4: 2302 movs r3, #2
|
|
}
|
|
}
|
|
80014d6: 4618 mov r0, r3
|
|
80014d8: 3720 adds r7, #32
|
|
80014da: 46bd mov sp, r7
|
|
80014dc: bd80 pop {r7, pc}
|
|
80014de: bf00 nop
|
|
80014e0: ffff0000 .word 0xffff0000
|
|
80014e4: 00010002 .word 0x00010002
|
|
|
|
080014e8 <I2C_WaitOnFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
80014e8: b580 push {r7, lr}
|
|
80014ea: b084 sub sp, #16
|
|
80014ec: af00 add r7, sp, #0
|
|
80014ee: 60f8 str r0, [r7, #12]
|
|
80014f0: 60b9 str r1, [r7, #8]
|
|
80014f2: 603b str r3, [r7, #0]
|
|
80014f4: 4613 mov r3, r2
|
|
80014f6: 71fb strb r3, [r7, #7]
|
|
/* Wait until flag is set */
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
80014f8: e025 b.n 8001546 <I2C_WaitOnFlagUntilTimeout+0x5e>
|
|
{
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
80014fa: 683b ldr r3, [r7, #0]
|
|
80014fc: f1b3 3fff cmp.w r3, #4294967295
|
|
8001500: d021 beq.n 8001546 <I2C_WaitOnFlagUntilTimeout+0x5e>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8001502: f7ff fa27 bl 8000954 <HAL_GetTick>
|
|
8001506: 4602 mov r2, r0
|
|
8001508: 69bb ldr r3, [r7, #24]
|
|
800150a: 1ad3 subs r3, r2, r3
|
|
800150c: 683a ldr r2, [r7, #0]
|
|
800150e: 429a cmp r2, r3
|
|
8001510: d302 bcc.n 8001518 <I2C_WaitOnFlagUntilTimeout+0x30>
|
|
8001512: 683b ldr r3, [r7, #0]
|
|
8001514: 2b00 cmp r3, #0
|
|
8001516: d116 bne.n 8001546 <I2C_WaitOnFlagUntilTimeout+0x5e>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8001518: 68fb ldr r3, [r7, #12]
|
|
800151a: 2200 movs r2, #0
|
|
800151c: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800151e: 68fb ldr r3, [r7, #12]
|
|
8001520: 2220 movs r2, #32
|
|
8001522: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8001526: 68fb ldr r3, [r7, #12]
|
|
8001528: 2200 movs r2, #0
|
|
800152a: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
800152e: 68fb ldr r3, [r7, #12]
|
|
8001530: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8001532: f043 0220 orr.w r2, r3, #32
|
|
8001536: 68fb ldr r3, [r7, #12]
|
|
8001538: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
800153a: 68fb ldr r3, [r7, #12]
|
|
800153c: 2200 movs r2, #0
|
|
800153e: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
8001542: 2301 movs r3, #1
|
|
8001544: e023 b.n 800158e <I2C_WaitOnFlagUntilTimeout+0xa6>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8001546: 68bb ldr r3, [r7, #8]
|
|
8001548: 0c1b lsrs r3, r3, #16
|
|
800154a: b2db uxtb r3, r3
|
|
800154c: 2b01 cmp r3, #1
|
|
800154e: d10d bne.n 800156c <I2C_WaitOnFlagUntilTimeout+0x84>
|
|
8001550: 68fb ldr r3, [r7, #12]
|
|
8001552: 681b ldr r3, [r3, #0]
|
|
8001554: 695b ldr r3, [r3, #20]
|
|
8001556: 43da mvns r2, r3
|
|
8001558: 68bb ldr r3, [r7, #8]
|
|
800155a: 4013 ands r3, r2
|
|
800155c: b29b uxth r3, r3
|
|
800155e: 2b00 cmp r3, #0
|
|
8001560: bf0c ite eq
|
|
8001562: 2301 moveq r3, #1
|
|
8001564: 2300 movne r3, #0
|
|
8001566: b2db uxtb r3, r3
|
|
8001568: 461a mov r2, r3
|
|
800156a: e00c b.n 8001586 <I2C_WaitOnFlagUntilTimeout+0x9e>
|
|
800156c: 68fb ldr r3, [r7, #12]
|
|
800156e: 681b ldr r3, [r3, #0]
|
|
8001570: 699b ldr r3, [r3, #24]
|
|
8001572: 43da mvns r2, r3
|
|
8001574: 68bb ldr r3, [r7, #8]
|
|
8001576: 4013 ands r3, r2
|
|
8001578: b29b uxth r3, r3
|
|
800157a: 2b00 cmp r3, #0
|
|
800157c: bf0c ite eq
|
|
800157e: 2301 moveq r3, #1
|
|
8001580: 2300 movne r3, #0
|
|
8001582: b2db uxtb r3, r3
|
|
8001584: 461a mov r2, r3
|
|
8001586: 79fb ldrb r3, [r7, #7]
|
|
8001588: 429a cmp r2, r3
|
|
800158a: d0b6 beq.n 80014fa <I2C_WaitOnFlagUntilTimeout+0x12>
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
800158c: 2300 movs r3, #0
|
|
}
|
|
800158e: 4618 mov r0, r3
|
|
8001590: 3710 adds r7, #16
|
|
8001592: 46bd mov sp, r7
|
|
8001594: bd80 pop {r7, pc}
|
|
|
|
08001596 <I2C_WaitOnSTOPFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8001596: b580 push {r7, lr}
|
|
8001598: b084 sub sp, #16
|
|
800159a: af00 add r7, sp, #0
|
|
800159c: 60f8 str r0, [r7, #12]
|
|
800159e: 60b9 str r1, [r7, #8]
|
|
80015a0: 607a str r2, [r7, #4]
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
|
|
80015a2: e029 b.n 80015f8 <I2C_WaitOnSTOPFlagUntilTimeout+0x62>
|
|
{
|
|
/* Check if a NACK is detected */
|
|
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
|
80015a4: 68f8 ldr r0, [r7, #12]
|
|
80015a6: f000 f889 bl 80016bc <I2C_IsAcknowledgeFailed>
|
|
80015aa: 4603 mov r3, r0
|
|
80015ac: 2b00 cmp r3, #0
|
|
80015ae: d001 beq.n 80015b4 <I2C_WaitOnSTOPFlagUntilTimeout+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
80015b0: 2301 movs r3, #1
|
|
80015b2: e029 b.n 8001608 <I2C_WaitOnSTOPFlagUntilTimeout+0x72>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
80015b4: f7ff f9ce bl 8000954 <HAL_GetTick>
|
|
80015b8: 4602 mov r2, r0
|
|
80015ba: 687b ldr r3, [r7, #4]
|
|
80015bc: 1ad3 subs r3, r2, r3
|
|
80015be: 68ba ldr r2, [r7, #8]
|
|
80015c0: 429a cmp r2, r3
|
|
80015c2: d302 bcc.n 80015ca <I2C_WaitOnSTOPFlagUntilTimeout+0x34>
|
|
80015c4: 68bb ldr r3, [r7, #8]
|
|
80015c6: 2b00 cmp r3, #0
|
|
80015c8: d116 bne.n 80015f8 <I2C_WaitOnSTOPFlagUntilTimeout+0x62>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
80015ca: 68fb ldr r3, [r7, #12]
|
|
80015cc: 2200 movs r2, #0
|
|
80015ce: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80015d0: 68fb ldr r3, [r7, #12]
|
|
80015d2: 2220 movs r2, #32
|
|
80015d4: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80015d8: 68fb ldr r3, [r7, #12]
|
|
80015da: 2200 movs r2, #0
|
|
80015dc: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
80015e0: 68fb ldr r3, [r7, #12]
|
|
80015e2: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80015e4: f043 0220 orr.w r2, r3, #32
|
|
80015e8: 68fb ldr r3, [r7, #12]
|
|
80015ea: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
80015ec: 68fb ldr r3, [r7, #12]
|
|
80015ee: 2200 movs r2, #0
|
|
80015f0: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
80015f4: 2301 movs r3, #1
|
|
80015f6: e007 b.n 8001608 <I2C_WaitOnSTOPFlagUntilTimeout+0x72>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
|
|
80015f8: 68fb ldr r3, [r7, #12]
|
|
80015fa: 681b ldr r3, [r3, #0]
|
|
80015fc: 695b ldr r3, [r3, #20]
|
|
80015fe: f003 0310 and.w r3, r3, #16
|
|
8001602: 2b10 cmp r3, #16
|
|
8001604: d1ce bne.n 80015a4 <I2C_WaitOnSTOPFlagUntilTimeout+0xe>
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
8001606: 2300 movs r3, #0
|
|
}
|
|
8001608: 4618 mov r0, r3
|
|
800160a: 3710 adds r7, #16
|
|
800160c: 46bd mov sp, r7
|
|
800160e: bd80 pop {r7, pc}
|
|
|
|
08001610 <I2C_WaitOnRXNEFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8001610: b580 push {r7, lr}
|
|
8001612: b084 sub sp, #16
|
|
8001614: af00 add r7, sp, #0
|
|
8001616: 60f8 str r0, [r7, #12]
|
|
8001618: 60b9 str r1, [r7, #8]
|
|
800161a: 607a str r2, [r7, #4]
|
|
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
|
800161c: e042 b.n 80016a4 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
|
{
|
|
/* Check if a STOPF is detected */
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
|
|
800161e: 68fb ldr r3, [r7, #12]
|
|
8001620: 681b ldr r3, [r3, #0]
|
|
8001622: 695b ldr r3, [r3, #20]
|
|
8001624: f003 0310 and.w r3, r3, #16
|
|
8001628: 2b10 cmp r3, #16
|
|
800162a: d119 bne.n 8001660 <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
|
|
{
|
|
/* Clear STOP Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
|
800162c: 68fb ldr r3, [r7, #12]
|
|
800162e: 681b ldr r3, [r3, #0]
|
|
8001630: f06f 0210 mvn.w r2, #16
|
|
8001634: 615a str r2, [r3, #20]
|
|
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8001636: 68fb ldr r3, [r7, #12]
|
|
8001638: 2200 movs r2, #0
|
|
800163a: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800163c: 68fb ldr r3, [r7, #12]
|
|
800163e: 2220 movs r2, #32
|
|
8001640: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8001644: 68fb ldr r3, [r7, #12]
|
|
8001646: 2200 movs r2, #0
|
|
8001648: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
|
|
800164c: 68fb ldr r3, [r7, #12]
|
|
800164e: 6c1a ldr r2, [r3, #64] ; 0x40
|
|
8001650: 68fb ldr r3, [r7, #12]
|
|
8001652: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8001654: 68fb ldr r3, [r7, #12]
|
|
8001656: 2200 movs r2, #0
|
|
8001658: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
800165c: 2301 movs r3, #1
|
|
800165e: e029 b.n 80016b4 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8001660: f7ff f978 bl 8000954 <HAL_GetTick>
|
|
8001664: 4602 mov r2, r0
|
|
8001666: 687b ldr r3, [r7, #4]
|
|
8001668: 1ad3 subs r3, r2, r3
|
|
800166a: 68ba ldr r2, [r7, #8]
|
|
800166c: 429a cmp r2, r3
|
|
800166e: d302 bcc.n 8001676 <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
|
|
8001670: 68bb ldr r3, [r7, #8]
|
|
8001672: 2b00 cmp r3, #0
|
|
8001674: d116 bne.n 80016a4 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8001676: 68fb ldr r3, [r7, #12]
|
|
8001678: 2200 movs r2, #0
|
|
800167a: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800167c: 68fb ldr r3, [r7, #12]
|
|
800167e: 2220 movs r2, #32
|
|
8001680: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8001684: 68fb ldr r3, [r7, #12]
|
|
8001686: 2200 movs r2, #0
|
|
8001688: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
800168c: 68fb ldr r3, [r7, #12]
|
|
800168e: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8001690: f043 0220 orr.w r2, r3, #32
|
|
8001694: 68fb ldr r3, [r7, #12]
|
|
8001696: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8001698: 68fb ldr r3, [r7, #12]
|
|
800169a: 2200 movs r2, #0
|
|
800169c: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
80016a0: 2301 movs r3, #1
|
|
80016a2: e007 b.n 80016b4 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
|
80016a4: 68fb ldr r3, [r7, #12]
|
|
80016a6: 681b ldr r3, [r3, #0]
|
|
80016a8: 695b ldr r3, [r3, #20]
|
|
80016aa: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80016ae: 2b40 cmp r3, #64 ; 0x40
|
|
80016b0: d1b5 bne.n 800161e <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
80016b2: 2300 movs r3, #0
|
|
}
|
|
80016b4: 4618 mov r0, r3
|
|
80016b6: 3710 adds r7, #16
|
|
80016b8: 46bd mov sp, r7
|
|
80016ba: bd80 pop {r7, pc}
|
|
|
|
080016bc <I2C_IsAcknowledgeFailed>:
|
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
80016bc: b480 push {r7}
|
|
80016be: b083 sub sp, #12
|
|
80016c0: af00 add r7, sp, #0
|
|
80016c2: 6078 str r0, [r7, #4]
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
|
80016c4: 687b ldr r3, [r7, #4]
|
|
80016c6: 681b ldr r3, [r3, #0]
|
|
80016c8: 695b ldr r3, [r3, #20]
|
|
80016ca: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
80016ce: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
80016d2: d11b bne.n 800170c <I2C_IsAcknowledgeFailed+0x50>
|
|
{
|
|
/* Clear NACKF Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
80016d4: 687b ldr r3, [r7, #4]
|
|
80016d6: 681b ldr r3, [r3, #0]
|
|
80016d8: f46f 6280 mvn.w r2, #1024 ; 0x400
|
|
80016dc: 615a str r2, [r3, #20]
|
|
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
80016de: 687b ldr r3, [r7, #4]
|
|
80016e0: 2200 movs r2, #0
|
|
80016e2: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80016e4: 687b ldr r3, [r7, #4]
|
|
80016e6: 2220 movs r2, #32
|
|
80016e8: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80016ec: 687b ldr r3, [r7, #4]
|
|
80016ee: 2200 movs r2, #0
|
|
80016f0: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
80016f4: 687b ldr r3, [r7, #4]
|
|
80016f6: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80016f8: f043 0204 orr.w r2, r3, #4
|
|
80016fc: 687b ldr r3, [r7, #4]
|
|
80016fe: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8001700: 687b ldr r3, [r7, #4]
|
|
8001702: 2200 movs r2, #0
|
|
8001704: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
8001708: 2301 movs r3, #1
|
|
800170a: e000 b.n 800170e <I2C_IsAcknowledgeFailed+0x52>
|
|
}
|
|
return HAL_OK;
|
|
800170c: 2300 movs r3, #0
|
|
}
|
|
800170e: 4618 mov r0, r3
|
|
8001710: 370c adds r7, #12
|
|
8001712: 46bd mov sp, r7
|
|
8001714: bc80 pop {r7}
|
|
8001716: 4770 bx lr
|
|
|
|
08001718 <HAL_PCD_Init>:
|
|
* parameters in the PCD_InitTypeDef and initialize the associated handle.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
8001718: b5f0 push {r4, r5, r6, r7, lr}
|
|
800171a: b08b sub sp, #44 ; 0x2c
|
|
800171c: af06 add r7, sp, #24
|
|
800171e: 6078 str r0, [r7, #4]
|
|
USB_OTG_GlobalTypeDef *USBx;
|
|
#endif /* defined (USB_OTG_FS) */
|
|
uint8_t i;
|
|
|
|
/* Check the PCD handle allocation */
|
|
if (hpcd == NULL)
|
|
8001720: 687b ldr r3, [r7, #4]
|
|
8001722: 2b00 cmp r3, #0
|
|
8001724: d101 bne.n 800172a <HAL_PCD_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8001726: 2301 movs r3, #1
|
|
8001728: e0fd b.n 8001926 <HAL_PCD_Init+0x20e>
|
|
|
|
#if defined (USB_OTG_FS)
|
|
USBx = hpcd->Instance;
|
|
#endif /* defined (USB_OTG_FS) */
|
|
|
|
if (hpcd->State == HAL_PCD_STATE_RESET)
|
|
800172a: 687b ldr r3, [r7, #4]
|
|
800172c: f893 32a9 ldrb.w r3, [r3, #681] ; 0x2a9
|
|
8001730: b2db uxtb r3, r3
|
|
8001732: 2b00 cmp r3, #0
|
|
8001734: d106 bne.n 8001744 <HAL_PCD_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hpcd->Lock = HAL_UNLOCKED;
|
|
8001736: 687b ldr r3, [r7, #4]
|
|
8001738: 2200 movs r2, #0
|
|
800173a: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
/* Init the low level hardware */
|
|
hpcd->MspInitCallback(hpcd);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
HAL_PCD_MspInit(hpcd);
|
|
800173e: 6878 ldr r0, [r7, #4]
|
|
8001740: f008 fc8e bl 800a060 <HAL_PCD_MspInit>
|
|
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
|
|
}
|
|
|
|
hpcd->State = HAL_PCD_STATE_BUSY;
|
|
8001744: 687b ldr r3, [r7, #4]
|
|
8001746: 2203 movs r2, #3
|
|
8001748: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
|
|
hpcd->Init.dma_enable = 0U;
|
|
}
|
|
#endif /* defined (USB_OTG_FS) */
|
|
|
|
/* Disable the Interrupts */
|
|
__HAL_PCD_DISABLE(hpcd);
|
|
800174c: 687b ldr r3, [r7, #4]
|
|
800174e: 681b ldr r3, [r3, #0]
|
|
8001750: 4618 mov r0, r3
|
|
8001752: f003 ff89 bl 8005668 <USB_DisableGlobalInt>
|
|
|
|
/*Init the Core (common init.) */
|
|
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
|
|
8001756: 687b ldr r3, [r7, #4]
|
|
8001758: 681b ldr r3, [r3, #0]
|
|
800175a: 603b str r3, [r7, #0]
|
|
800175c: 687e ldr r6, [r7, #4]
|
|
800175e: 466d mov r5, sp
|
|
8001760: f106 0410 add.w r4, r6, #16
|
|
8001764: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
8001766: c50f stmia r5!, {r0, r1, r2, r3}
|
|
8001768: 6823 ldr r3, [r4, #0]
|
|
800176a: 602b str r3, [r5, #0]
|
|
800176c: 1d33 adds r3, r6, #4
|
|
800176e: cb0e ldmia r3, {r1, r2, r3}
|
|
8001770: 6838 ldr r0, [r7, #0]
|
|
8001772: f003 ff53 bl 800561c <USB_CoreInit>
|
|
8001776: 4603 mov r3, r0
|
|
8001778: 2b00 cmp r3, #0
|
|
800177a: d005 beq.n 8001788 <HAL_PCD_Init+0x70>
|
|
{
|
|
hpcd->State = HAL_PCD_STATE_ERROR;
|
|
800177c: 687b ldr r3, [r7, #4]
|
|
800177e: 2202 movs r2, #2
|
|
8001780: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
|
|
return HAL_ERROR;
|
|
8001784: 2301 movs r3, #1
|
|
8001786: e0ce b.n 8001926 <HAL_PCD_Init+0x20e>
|
|
}
|
|
|
|
/* Force Device Mode*/
|
|
(void)USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE);
|
|
8001788: 687b ldr r3, [r7, #4]
|
|
800178a: 681b ldr r3, [r3, #0]
|
|
800178c: 2100 movs r1, #0
|
|
800178e: 4618 mov r0, r3
|
|
8001790: f003 ff84 bl 800569c <USB_SetCurrentMode>
|
|
|
|
/* Init endpoints structures */
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
8001794: 2300 movs r3, #0
|
|
8001796: 73fb strb r3, [r7, #15]
|
|
8001798: e04c b.n 8001834 <HAL_PCD_Init+0x11c>
|
|
{
|
|
/* Init ep structure */
|
|
hpcd->IN_ep[i].is_in = 1U;
|
|
800179a: 7bfb ldrb r3, [r7, #15]
|
|
800179c: 6879 ldr r1, [r7, #4]
|
|
800179e: 1c5a adds r2, r3, #1
|
|
80017a0: 4613 mov r3, r2
|
|
80017a2: 009b lsls r3, r3, #2
|
|
80017a4: 4413 add r3, r2
|
|
80017a6: 00db lsls r3, r3, #3
|
|
80017a8: 440b add r3, r1
|
|
80017aa: 3301 adds r3, #1
|
|
80017ac: 2201 movs r2, #1
|
|
80017ae: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].num = i;
|
|
80017b0: 7bfb ldrb r3, [r7, #15]
|
|
80017b2: 6879 ldr r1, [r7, #4]
|
|
80017b4: 1c5a adds r2, r3, #1
|
|
80017b6: 4613 mov r3, r2
|
|
80017b8: 009b lsls r3, r3, #2
|
|
80017ba: 4413 add r3, r2
|
|
80017bc: 00db lsls r3, r3, #3
|
|
80017be: 440b add r3, r1
|
|
80017c0: 7bfa ldrb r2, [r7, #15]
|
|
80017c2: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].tx_fifo_num = i;
|
|
80017c4: 7bfa ldrb r2, [r7, #15]
|
|
80017c6: 7bfb ldrb r3, [r7, #15]
|
|
80017c8: b298 uxth r0, r3
|
|
80017ca: 6879 ldr r1, [r7, #4]
|
|
80017cc: 4613 mov r3, r2
|
|
80017ce: 009b lsls r3, r3, #2
|
|
80017d0: 4413 add r3, r2
|
|
80017d2: 00db lsls r3, r3, #3
|
|
80017d4: 440b add r3, r1
|
|
80017d6: 3336 adds r3, #54 ; 0x36
|
|
80017d8: 4602 mov r2, r0
|
|
80017da: 801a strh r2, [r3, #0]
|
|
/* Control until ep is activated */
|
|
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
|
|
80017dc: 7bfb ldrb r3, [r7, #15]
|
|
80017de: 6879 ldr r1, [r7, #4]
|
|
80017e0: 1c5a adds r2, r3, #1
|
|
80017e2: 4613 mov r3, r2
|
|
80017e4: 009b lsls r3, r3, #2
|
|
80017e6: 4413 add r3, r2
|
|
80017e8: 00db lsls r3, r3, #3
|
|
80017ea: 440b add r3, r1
|
|
80017ec: 3303 adds r3, #3
|
|
80017ee: 2200 movs r2, #0
|
|
80017f0: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].maxpacket = 0U;
|
|
80017f2: 7bfa ldrb r2, [r7, #15]
|
|
80017f4: 6879 ldr r1, [r7, #4]
|
|
80017f6: 4613 mov r3, r2
|
|
80017f8: 009b lsls r3, r3, #2
|
|
80017fa: 4413 add r3, r2
|
|
80017fc: 00db lsls r3, r3, #3
|
|
80017fe: 440b add r3, r1
|
|
8001800: 3338 adds r3, #56 ; 0x38
|
|
8001802: 2200 movs r2, #0
|
|
8001804: 601a str r2, [r3, #0]
|
|
hpcd->IN_ep[i].xfer_buff = 0U;
|
|
8001806: 7bfa ldrb r2, [r7, #15]
|
|
8001808: 6879 ldr r1, [r7, #4]
|
|
800180a: 4613 mov r3, r2
|
|
800180c: 009b lsls r3, r3, #2
|
|
800180e: 4413 add r3, r2
|
|
8001810: 00db lsls r3, r3, #3
|
|
8001812: 440b add r3, r1
|
|
8001814: 333c adds r3, #60 ; 0x3c
|
|
8001816: 2200 movs r2, #0
|
|
8001818: 601a str r2, [r3, #0]
|
|
hpcd->IN_ep[i].xfer_len = 0U;
|
|
800181a: 7bfa ldrb r2, [r7, #15]
|
|
800181c: 6879 ldr r1, [r7, #4]
|
|
800181e: 4613 mov r3, r2
|
|
8001820: 009b lsls r3, r3, #2
|
|
8001822: 4413 add r3, r2
|
|
8001824: 00db lsls r3, r3, #3
|
|
8001826: 440b add r3, r1
|
|
8001828: 3340 adds r3, #64 ; 0x40
|
|
800182a: 2200 movs r2, #0
|
|
800182c: 601a str r2, [r3, #0]
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
800182e: 7bfb ldrb r3, [r7, #15]
|
|
8001830: 3301 adds r3, #1
|
|
8001832: 73fb strb r3, [r7, #15]
|
|
8001834: 7bfa ldrb r2, [r7, #15]
|
|
8001836: 687b ldr r3, [r7, #4]
|
|
8001838: 685b ldr r3, [r3, #4]
|
|
800183a: 429a cmp r2, r3
|
|
800183c: d3ad bcc.n 800179a <HAL_PCD_Init+0x82>
|
|
}
|
|
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
800183e: 2300 movs r3, #0
|
|
8001840: 73fb strb r3, [r7, #15]
|
|
8001842: e044 b.n 80018ce <HAL_PCD_Init+0x1b6>
|
|
{
|
|
hpcd->OUT_ep[i].is_in = 0U;
|
|
8001844: 7bfa ldrb r2, [r7, #15]
|
|
8001846: 6879 ldr r1, [r7, #4]
|
|
8001848: 4613 mov r3, r2
|
|
800184a: 009b lsls r3, r3, #2
|
|
800184c: 4413 add r3, r2
|
|
800184e: 00db lsls r3, r3, #3
|
|
8001850: 440b add r3, r1
|
|
8001852: f203 1369 addw r3, r3, #361 ; 0x169
|
|
8001856: 2200 movs r2, #0
|
|
8001858: 701a strb r2, [r3, #0]
|
|
hpcd->OUT_ep[i].num = i;
|
|
800185a: 7bfa ldrb r2, [r7, #15]
|
|
800185c: 6879 ldr r1, [r7, #4]
|
|
800185e: 4613 mov r3, r2
|
|
8001860: 009b lsls r3, r3, #2
|
|
8001862: 4413 add r3, r2
|
|
8001864: 00db lsls r3, r3, #3
|
|
8001866: 440b add r3, r1
|
|
8001868: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
800186c: 7bfa ldrb r2, [r7, #15]
|
|
800186e: 701a strb r2, [r3, #0]
|
|
/* Control until ep is activated */
|
|
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
|
|
8001870: 7bfa ldrb r2, [r7, #15]
|
|
8001872: 6879 ldr r1, [r7, #4]
|
|
8001874: 4613 mov r3, r2
|
|
8001876: 009b lsls r3, r3, #2
|
|
8001878: 4413 add r3, r2
|
|
800187a: 00db lsls r3, r3, #3
|
|
800187c: 440b add r3, r1
|
|
800187e: f203 136b addw r3, r3, #363 ; 0x16b
|
|
8001882: 2200 movs r2, #0
|
|
8001884: 701a strb r2, [r3, #0]
|
|
hpcd->OUT_ep[i].maxpacket = 0U;
|
|
8001886: 7bfa ldrb r2, [r7, #15]
|
|
8001888: 6879 ldr r1, [r7, #4]
|
|
800188a: 4613 mov r3, r2
|
|
800188c: 009b lsls r3, r3, #2
|
|
800188e: 4413 add r3, r2
|
|
8001890: 00db lsls r3, r3, #3
|
|
8001892: 440b add r3, r1
|
|
8001894: f503 73bc add.w r3, r3, #376 ; 0x178
|
|
8001898: 2200 movs r2, #0
|
|
800189a: 601a str r2, [r3, #0]
|
|
hpcd->OUT_ep[i].xfer_buff = 0U;
|
|
800189c: 7bfa ldrb r2, [r7, #15]
|
|
800189e: 6879 ldr r1, [r7, #4]
|
|
80018a0: 4613 mov r3, r2
|
|
80018a2: 009b lsls r3, r3, #2
|
|
80018a4: 4413 add r3, r2
|
|
80018a6: 00db lsls r3, r3, #3
|
|
80018a8: 440b add r3, r1
|
|
80018aa: f503 73be add.w r3, r3, #380 ; 0x17c
|
|
80018ae: 2200 movs r2, #0
|
|
80018b0: 601a str r2, [r3, #0]
|
|
hpcd->OUT_ep[i].xfer_len = 0U;
|
|
80018b2: 7bfa ldrb r2, [r7, #15]
|
|
80018b4: 6879 ldr r1, [r7, #4]
|
|
80018b6: 4613 mov r3, r2
|
|
80018b8: 009b lsls r3, r3, #2
|
|
80018ba: 4413 add r3, r2
|
|
80018bc: 00db lsls r3, r3, #3
|
|
80018be: 440b add r3, r1
|
|
80018c0: f503 73c0 add.w r3, r3, #384 ; 0x180
|
|
80018c4: 2200 movs r2, #0
|
|
80018c6: 601a str r2, [r3, #0]
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
80018c8: 7bfb ldrb r3, [r7, #15]
|
|
80018ca: 3301 adds r3, #1
|
|
80018cc: 73fb strb r3, [r7, #15]
|
|
80018ce: 7bfa ldrb r2, [r7, #15]
|
|
80018d0: 687b ldr r3, [r7, #4]
|
|
80018d2: 685b ldr r3, [r3, #4]
|
|
80018d4: 429a cmp r2, r3
|
|
80018d6: d3b5 bcc.n 8001844 <HAL_PCD_Init+0x12c>
|
|
}
|
|
|
|
/* Init Device */
|
|
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
|
|
80018d8: 687b ldr r3, [r7, #4]
|
|
80018da: 681b ldr r3, [r3, #0]
|
|
80018dc: 603b str r3, [r7, #0]
|
|
80018de: 687e ldr r6, [r7, #4]
|
|
80018e0: 466d mov r5, sp
|
|
80018e2: f106 0410 add.w r4, r6, #16
|
|
80018e6: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
80018e8: c50f stmia r5!, {r0, r1, r2, r3}
|
|
80018ea: 6823 ldr r3, [r4, #0]
|
|
80018ec: 602b str r3, [r5, #0]
|
|
80018ee: 1d33 adds r3, r6, #4
|
|
80018f0: cb0e ldmia r3, {r1, r2, r3}
|
|
80018f2: 6838 ldr r0, [r7, #0]
|
|
80018f4: f003 fede bl 80056b4 <USB_DevInit>
|
|
80018f8: 4603 mov r3, r0
|
|
80018fa: 2b00 cmp r3, #0
|
|
80018fc: d005 beq.n 800190a <HAL_PCD_Init+0x1f2>
|
|
{
|
|
hpcd->State = HAL_PCD_STATE_ERROR;
|
|
80018fe: 687b ldr r3, [r7, #4]
|
|
8001900: 2202 movs r2, #2
|
|
8001902: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
|
|
return HAL_ERROR;
|
|
8001906: 2301 movs r3, #1
|
|
8001908: e00d b.n 8001926 <HAL_PCD_Init+0x20e>
|
|
}
|
|
|
|
hpcd->USB_Address = 0U;
|
|
800190a: 687b ldr r3, [r7, #4]
|
|
800190c: 2200 movs r2, #0
|
|
800190e: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
hpcd->State = HAL_PCD_STATE_READY;
|
|
8001912: 687b ldr r3, [r7, #4]
|
|
8001914: 2201 movs r2, #1
|
|
8001916: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
|
|
(void)USB_DevDisconnect(hpcd->Instance);
|
|
800191a: 687b ldr r3, [r7, #4]
|
|
800191c: 681b ldr r3, [r3, #0]
|
|
800191e: 4618 mov r0, r3
|
|
8001920: f005 fe8e bl 8007640 <USB_DevDisconnect>
|
|
|
|
return HAL_OK;
|
|
8001924: 2300 movs r3, #0
|
|
}
|
|
8001926: 4618 mov r0, r3
|
|
8001928: 3714 adds r7, #20
|
|
800192a: 46bd mov sp, r7
|
|
800192c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
0800192e <HAL_PCD_Start>:
|
|
* @brief Start the USB device
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
800192e: b580 push {r7, lr}
|
|
8001930: b082 sub sp, #8
|
|
8001932: af00 add r7, sp, #0
|
|
8001934: 6078 str r0, [r7, #4]
|
|
__HAL_LOCK(hpcd);
|
|
8001936: 687b ldr r3, [r7, #4]
|
|
8001938: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
800193c: 2b01 cmp r3, #1
|
|
800193e: d101 bne.n 8001944 <HAL_PCD_Start+0x16>
|
|
8001940: 2302 movs r3, #2
|
|
8001942: e016 b.n 8001972 <HAL_PCD_Start+0x44>
|
|
8001944: 687b ldr r3, [r7, #4]
|
|
8001946: 2201 movs r2, #1
|
|
8001948: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
__HAL_PCD_ENABLE(hpcd);
|
|
800194c: 687b ldr r3, [r7, #4]
|
|
800194e: 681b ldr r3, [r3, #0]
|
|
8001950: 4618 mov r0, r3
|
|
8001952: f003 fe73 bl 800563c <USB_EnableGlobalInt>
|
|
|
|
#if defined (USB)
|
|
HAL_PCDEx_SetConnectionState(hpcd, 1U);
|
|
8001956: 2101 movs r1, #1
|
|
8001958: 6878 ldr r0, [r7, #4]
|
|
800195a: f008 fe0a bl 800a572 <HAL_PCDEx_SetConnectionState>
|
|
#endif /* defined (USB) */
|
|
|
|
(void)USB_DevConnect(hpcd->Instance);
|
|
800195e: 687b ldr r3, [r7, #4]
|
|
8001960: 681b ldr r3, [r3, #0]
|
|
8001962: 4618 mov r0, r3
|
|
8001964: f005 fe62 bl 800762c <USB_DevConnect>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001968: 687b ldr r3, [r7, #4]
|
|
800196a: 2200 movs r2, #0
|
|
800196c: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
return HAL_OK;
|
|
8001970: 2300 movs r3, #0
|
|
}
|
|
8001972: 4618 mov r0, r3
|
|
8001974: 3708 adds r7, #8
|
|
8001976: 46bd mov sp, r7
|
|
8001978: bd80 pop {r7, pc}
|
|
|
|
0800197a <HAL_PCD_IRQHandler>:
|
|
* @brief This function handles PCD interrupt request.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
800197a: b580 push {r7, lr}
|
|
800197c: b088 sub sp, #32
|
|
800197e: af00 add r7, sp, #0
|
|
8001980: 6078 str r0, [r7, #4]
|
|
uint16_t store_ep[8];
|
|
uint8_t i;
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
|
|
8001982: 687b ldr r3, [r7, #4]
|
|
8001984: 681b ldr r3, [r3, #0]
|
|
8001986: 4618 mov r0, r3
|
|
8001988: f005 fe64 bl 8007654 <USB_ReadInterrupts>
|
|
800198c: 4603 mov r3, r0
|
|
800198e: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8001992: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
|
8001996: d102 bne.n 800199e <HAL_PCD_IRQHandler+0x24>
|
|
{
|
|
/* servicing of the endpoint correct transfer interrupt */
|
|
/* clear of the CTR flag into the sub */
|
|
(void)PCD_EP_ISR_Handler(hpcd);
|
|
8001998: 6878 ldr r0, [r7, #4]
|
|
800199a: f000 fb8e bl 80020ba <PCD_EP_ISR_Handler>
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET))
|
|
800199e: 687b ldr r3, [r7, #4]
|
|
80019a0: 681b ldr r3, [r3, #0]
|
|
80019a2: 4618 mov r0, r3
|
|
80019a4: f005 fe56 bl 8007654 <USB_ReadInterrupts>
|
|
80019a8: 4603 mov r3, r0
|
|
80019aa: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
80019ae: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
80019b2: d112 bne.n 80019da <HAL_PCD_IRQHandler+0x60>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
|
|
80019b4: 687b ldr r3, [r7, #4]
|
|
80019b6: 681b ldr r3, [r3, #0]
|
|
80019b8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
80019bc: b29a uxth r2, r3
|
|
80019be: 687b ldr r3, [r7, #4]
|
|
80019c0: 681b ldr r3, [r3, #0]
|
|
80019c2: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
80019c6: b292 uxth r2, r2
|
|
80019c8: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->ResetCallback(hpcd);
|
|
#else
|
|
HAL_PCD_ResetCallback(hpcd);
|
|
80019cc: 6878 ldr r0, [r7, #4]
|
|
80019ce: f008 fbc2 bl 800a156 <HAL_PCD_ResetCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
(void)HAL_PCD_SetAddress(hpcd, 0U);
|
|
80019d2: 2100 movs r1, #0
|
|
80019d4: 6878 ldr r0, [r7, #4]
|
|
80019d6: f000 f925 bl 8001c24 <HAL_PCD_SetAddress>
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR))
|
|
80019da: 687b ldr r3, [r7, #4]
|
|
80019dc: 681b ldr r3, [r3, #0]
|
|
80019de: 4618 mov r0, r3
|
|
80019e0: f005 fe38 bl 8007654 <USB_ReadInterrupts>
|
|
80019e4: 4603 mov r3, r0
|
|
80019e6: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
80019ea: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
|
80019ee: d10b bne.n 8001a08 <HAL_PCD_IRQHandler+0x8e>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
|
|
80019f0: 687b ldr r3, [r7, #4]
|
|
80019f2: 681b ldr r3, [r3, #0]
|
|
80019f4: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
80019f8: b29a uxth r2, r3
|
|
80019fa: 687b ldr r3, [r7, #4]
|
|
80019fc: 681b ldr r3, [r3, #0]
|
|
80019fe: f422 4280 bic.w r2, r2, #16384 ; 0x4000
|
|
8001a02: b292 uxth r2, r2
|
|
8001a04: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR))
|
|
8001a08: 687b ldr r3, [r7, #4]
|
|
8001a0a: 681b ldr r3, [r3, #0]
|
|
8001a0c: 4618 mov r0, r3
|
|
8001a0e: f005 fe21 bl 8007654 <USB_ReadInterrupts>
|
|
8001a12: 4603 mov r3, r0
|
|
8001a14: f403 5300 and.w r3, r3, #8192 ; 0x2000
|
|
8001a18: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
|
|
8001a1c: d10b bne.n 8001a36 <HAL_PCD_IRQHandler+0xbc>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
|
|
8001a1e: 687b ldr r3, [r7, #4]
|
|
8001a20: 681b ldr r3, [r3, #0]
|
|
8001a22: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001a26: b29a uxth r2, r3
|
|
8001a28: 687b ldr r3, [r7, #4]
|
|
8001a2a: 681b ldr r3, [r3, #0]
|
|
8001a2c: f422 5200 bic.w r2, r2, #8192 ; 0x2000
|
|
8001a30: b292 uxth r2, r2
|
|
8001a32: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
|
|
8001a36: 687b ldr r3, [r7, #4]
|
|
8001a38: 681b ldr r3, [r3, #0]
|
|
8001a3a: 4618 mov r0, r3
|
|
8001a3c: f005 fe0a bl 8007654 <USB_ReadInterrupts>
|
|
8001a40: 4603 mov r3, r0
|
|
8001a42: f403 5380 and.w r3, r3, #4096 ; 0x1000
|
|
8001a46: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
|
|
8001a4a: d126 bne.n 8001a9a <HAL_PCD_IRQHandler+0x120>
|
|
{
|
|
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
|
|
8001a4c: 687b ldr r3, [r7, #4]
|
|
8001a4e: 681b ldr r3, [r3, #0]
|
|
8001a50: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001a54: b29a uxth r2, r3
|
|
8001a56: 687b ldr r3, [r7, #4]
|
|
8001a58: 681b ldr r3, [r3, #0]
|
|
8001a5a: f022 0204 bic.w r2, r2, #4
|
|
8001a5e: b292 uxth r2, r2
|
|
8001a60: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
|
|
8001a64: 687b ldr r3, [r7, #4]
|
|
8001a66: 681b ldr r3, [r3, #0]
|
|
8001a68: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001a6c: b29a uxth r2, r3
|
|
8001a6e: 687b ldr r3, [r7, #4]
|
|
8001a70: 681b ldr r3, [r3, #0]
|
|
8001a72: f022 0208 bic.w r2, r2, #8
|
|
8001a76: b292 uxth r2, r2
|
|
8001a78: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->ResumeCallback(hpcd);
|
|
#else
|
|
HAL_PCD_ResumeCallback(hpcd);
|
|
8001a7c: 6878 ldr r0, [r7, #4]
|
|
8001a7e: f008 fba3 bl 800a1c8 <HAL_PCD_ResumeCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
|
|
8001a82: 687b ldr r3, [r7, #4]
|
|
8001a84: 681b ldr r3, [r3, #0]
|
|
8001a86: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001a8a: b29a uxth r2, r3
|
|
8001a8c: 687b ldr r3, [r7, #4]
|
|
8001a8e: 681b ldr r3, [r3, #0]
|
|
8001a90: f422 5280 bic.w r2, r2, #4096 ; 0x1000
|
|
8001a94: b292 uxth r2, r2
|
|
8001a96: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
|
|
8001a9a: 687b ldr r3, [r7, #4]
|
|
8001a9c: 681b ldr r3, [r3, #0]
|
|
8001a9e: 4618 mov r0, r3
|
|
8001aa0: f005 fdd8 bl 8007654 <USB_ReadInterrupts>
|
|
8001aa4: 4603 mov r3, r0
|
|
8001aa6: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
8001aaa: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
|
8001aae: f040 8084 bne.w 8001bba <HAL_PCD_IRQHandler+0x240>
|
|
{
|
|
/* WA: To Clear Wakeup flag if raised with suspend signal */
|
|
|
|
/* Store Endpoint register */
|
|
for (i = 0U; i < 8U; i++)
|
|
8001ab2: 2300 movs r3, #0
|
|
8001ab4: 77fb strb r3, [r7, #31]
|
|
8001ab6: e011 b.n 8001adc <HAL_PCD_IRQHandler+0x162>
|
|
{
|
|
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
|
|
8001ab8: 687b ldr r3, [r7, #4]
|
|
8001aba: 681b ldr r3, [r3, #0]
|
|
8001abc: 461a mov r2, r3
|
|
8001abe: 7ffb ldrb r3, [r7, #31]
|
|
8001ac0: 009b lsls r3, r3, #2
|
|
8001ac2: 441a add r2, r3
|
|
8001ac4: 7ffb ldrb r3, [r7, #31]
|
|
8001ac6: 8812 ldrh r2, [r2, #0]
|
|
8001ac8: b292 uxth r2, r2
|
|
8001aca: 005b lsls r3, r3, #1
|
|
8001acc: f107 0120 add.w r1, r7, #32
|
|
8001ad0: 440b add r3, r1
|
|
8001ad2: f823 2c14 strh.w r2, [r3, #-20]
|
|
for (i = 0U; i < 8U; i++)
|
|
8001ad6: 7ffb ldrb r3, [r7, #31]
|
|
8001ad8: 3301 adds r3, #1
|
|
8001ada: 77fb strb r3, [r7, #31]
|
|
8001adc: 7ffb ldrb r3, [r7, #31]
|
|
8001ade: 2b07 cmp r3, #7
|
|
8001ae0: d9ea bls.n 8001ab8 <HAL_PCD_IRQHandler+0x13e>
|
|
}
|
|
|
|
/* FORCE RESET */
|
|
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
|
|
8001ae2: 687b ldr r3, [r7, #4]
|
|
8001ae4: 681b ldr r3, [r3, #0]
|
|
8001ae6: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001aea: b29a uxth r2, r3
|
|
8001aec: 687b ldr r3, [r7, #4]
|
|
8001aee: 681b ldr r3, [r3, #0]
|
|
8001af0: f042 0201 orr.w r2, r2, #1
|
|
8001af4: b292 uxth r2, r2
|
|
8001af6: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/* CLEAR RESET */
|
|
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
|
|
8001afa: 687b ldr r3, [r7, #4]
|
|
8001afc: 681b ldr r3, [r3, #0]
|
|
8001afe: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001b02: b29a uxth r2, r3
|
|
8001b04: 687b ldr r3, [r7, #4]
|
|
8001b06: 681b ldr r3, [r3, #0]
|
|
8001b08: f022 0201 bic.w r2, r2, #1
|
|
8001b0c: b292 uxth r2, r2
|
|
8001b0e: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/* wait for reset flag in ISTR */
|
|
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
|
|
8001b12: bf00 nop
|
|
8001b14: 687b ldr r3, [r7, #4]
|
|
8001b16: 681b ldr r3, [r3, #0]
|
|
8001b18: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001b1c: b29b uxth r3, r3
|
|
8001b1e: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
8001b22: 2b00 cmp r3, #0
|
|
8001b24: d0f6 beq.n 8001b14 <HAL_PCD_IRQHandler+0x19a>
|
|
{
|
|
}
|
|
|
|
/* Clear Reset Flag */
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
|
|
8001b26: 687b ldr r3, [r7, #4]
|
|
8001b28: 681b ldr r3, [r3, #0]
|
|
8001b2a: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001b2e: b29a uxth r2, r3
|
|
8001b30: 687b ldr r3, [r7, #4]
|
|
8001b32: 681b ldr r3, [r3, #0]
|
|
8001b34: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
8001b38: b292 uxth r2, r2
|
|
8001b3a: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
/* Restore Registre */
|
|
for (i = 0U; i < 8U; i++)
|
|
8001b3e: 2300 movs r3, #0
|
|
8001b40: 77fb strb r3, [r7, #31]
|
|
8001b42: e010 b.n 8001b66 <HAL_PCD_IRQHandler+0x1ec>
|
|
{
|
|
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
|
|
8001b44: 7ffb ldrb r3, [r7, #31]
|
|
8001b46: 687a ldr r2, [r7, #4]
|
|
8001b48: 6812 ldr r2, [r2, #0]
|
|
8001b4a: 4611 mov r1, r2
|
|
8001b4c: 7ffa ldrb r2, [r7, #31]
|
|
8001b4e: 0092 lsls r2, r2, #2
|
|
8001b50: 440a add r2, r1
|
|
8001b52: 005b lsls r3, r3, #1
|
|
8001b54: f107 0120 add.w r1, r7, #32
|
|
8001b58: 440b add r3, r1
|
|
8001b5a: f833 3c14 ldrh.w r3, [r3, #-20]
|
|
8001b5e: 8013 strh r3, [r2, #0]
|
|
for (i = 0U; i < 8U; i++)
|
|
8001b60: 7ffb ldrb r3, [r7, #31]
|
|
8001b62: 3301 adds r3, #1
|
|
8001b64: 77fb strb r3, [r7, #31]
|
|
8001b66: 7ffb ldrb r3, [r7, #31]
|
|
8001b68: 2b07 cmp r3, #7
|
|
8001b6a: d9eb bls.n 8001b44 <HAL_PCD_IRQHandler+0x1ca>
|
|
}
|
|
|
|
/* Force low-power mode in the macrocell */
|
|
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
|
|
8001b6c: 687b ldr r3, [r7, #4]
|
|
8001b6e: 681b ldr r3, [r3, #0]
|
|
8001b70: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001b74: b29a uxth r2, r3
|
|
8001b76: 687b ldr r3, [r7, #4]
|
|
8001b78: 681b ldr r3, [r3, #0]
|
|
8001b7a: f042 0208 orr.w r2, r2, #8
|
|
8001b7e: b292 uxth r2, r2
|
|
8001b80: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
|
|
8001b84: 687b ldr r3, [r7, #4]
|
|
8001b86: 681b ldr r3, [r3, #0]
|
|
8001b88: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001b8c: b29a uxth r2, r3
|
|
8001b8e: 687b ldr r3, [r7, #4]
|
|
8001b90: 681b ldr r3, [r3, #0]
|
|
8001b92: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
|
8001b96: b292 uxth r2, r2
|
|
8001b98: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
|
|
8001b9c: 687b ldr r3, [r7, #4]
|
|
8001b9e: 681b ldr r3, [r3, #0]
|
|
8001ba0: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001ba4: b29a uxth r2, r3
|
|
8001ba6: 687b ldr r3, [r7, #4]
|
|
8001ba8: 681b ldr r3, [r3, #0]
|
|
8001baa: f042 0204 orr.w r2, r2, #4
|
|
8001bae: b292 uxth r2, r2
|
|
8001bb0: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SuspendCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SuspendCallback(hpcd);
|
|
8001bb4: 6878 ldr r0, [r7, #4]
|
|
8001bb6: f008 faed bl 800a194 <HAL_PCD_SuspendCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF))
|
|
8001bba: 687b ldr r3, [r7, #4]
|
|
8001bbc: 681b ldr r3, [r3, #0]
|
|
8001bbe: 4618 mov r0, r3
|
|
8001bc0: f005 fd48 bl 8007654 <USB_ReadInterrupts>
|
|
8001bc4: 4603 mov r3, r0
|
|
8001bc6: f403 7300 and.w r3, r3, #512 ; 0x200
|
|
8001bca: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8001bce: d10e bne.n 8001bee <HAL_PCD_IRQHandler+0x274>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
|
|
8001bd0: 687b ldr r3, [r7, #4]
|
|
8001bd2: 681b ldr r3, [r3, #0]
|
|
8001bd4: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001bd8: b29a uxth r2, r3
|
|
8001bda: 687b ldr r3, [r7, #4]
|
|
8001bdc: 681b ldr r3, [r3, #0]
|
|
8001bde: f422 7200 bic.w r2, r2, #512 ; 0x200
|
|
8001be2: b292 uxth r2, r2
|
|
8001be4: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SOFCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SOFCallback(hpcd);
|
|
8001be8: 6878 ldr r0, [r7, #4]
|
|
8001bea: f008 faa6 bl 800a13a <HAL_PCD_SOFCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF))
|
|
8001bee: 687b ldr r3, [r7, #4]
|
|
8001bf0: 681b ldr r3, [r3, #0]
|
|
8001bf2: 4618 mov r0, r3
|
|
8001bf4: f005 fd2e bl 8007654 <USB_ReadInterrupts>
|
|
8001bf8: 4603 mov r3, r0
|
|
8001bfa: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8001bfe: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
|
8001c02: d10b bne.n 8001c1c <HAL_PCD_IRQHandler+0x2a2>
|
|
{
|
|
/* clear ESOF flag in ISTR */
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
|
|
8001c04: 687b ldr r3, [r7, #4]
|
|
8001c06: 681b ldr r3, [r3, #0]
|
|
8001c08: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001c0c: b29a uxth r2, r3
|
|
8001c0e: 687b ldr r3, [r7, #4]
|
|
8001c10: 681b ldr r3, [r3, #0]
|
|
8001c12: f422 7280 bic.w r2, r2, #256 ; 0x100
|
|
8001c16: b292 uxth r2, r2
|
|
8001c18: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
}
|
|
8001c1c: bf00 nop
|
|
8001c1e: 3720 adds r7, #32
|
|
8001c20: 46bd mov sp, r7
|
|
8001c22: bd80 pop {r7, pc}
|
|
|
|
08001c24 <HAL_PCD_SetAddress>:
|
|
* @param hpcd PCD handle
|
|
* @param address new device address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
|
|
{
|
|
8001c24: b580 push {r7, lr}
|
|
8001c26: b082 sub sp, #8
|
|
8001c28: af00 add r7, sp, #0
|
|
8001c2a: 6078 str r0, [r7, #4]
|
|
8001c2c: 460b mov r3, r1
|
|
8001c2e: 70fb strb r3, [r7, #3]
|
|
__HAL_LOCK(hpcd);
|
|
8001c30: 687b ldr r3, [r7, #4]
|
|
8001c32: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8001c36: 2b01 cmp r3, #1
|
|
8001c38: d101 bne.n 8001c3e <HAL_PCD_SetAddress+0x1a>
|
|
8001c3a: 2302 movs r3, #2
|
|
8001c3c: e013 b.n 8001c66 <HAL_PCD_SetAddress+0x42>
|
|
8001c3e: 687b ldr r3, [r7, #4]
|
|
8001c40: 2201 movs r2, #1
|
|
8001c42: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
hpcd->USB_Address = address;
|
|
8001c46: 687b ldr r3, [r7, #4]
|
|
8001c48: 78fa ldrb r2, [r7, #3]
|
|
8001c4a: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
(void)USB_SetDevAddress(hpcd->Instance, address);
|
|
8001c4e: 687b ldr r3, [r7, #4]
|
|
8001c50: 681b ldr r3, [r3, #0]
|
|
8001c52: 78fa ldrb r2, [r7, #3]
|
|
8001c54: 4611 mov r1, r2
|
|
8001c56: 4618 mov r0, r3
|
|
8001c58: f005 fcd5 bl 8007606 <USB_SetDevAddress>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001c5c: 687b ldr r3, [r7, #4]
|
|
8001c5e: 2200 movs r2, #0
|
|
8001c60: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
return HAL_OK;
|
|
8001c64: 2300 movs r3, #0
|
|
}
|
|
8001c66: 4618 mov r0, r3
|
|
8001c68: 3708 adds r7, #8
|
|
8001c6a: 46bd mov sp, r7
|
|
8001c6c: bd80 pop {r7, pc}
|
|
|
|
08001c6e <HAL_PCD_EP_Open>:
|
|
* @param ep_type endpoint type
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
|
|
uint16_t ep_mps, uint8_t ep_type)
|
|
{
|
|
8001c6e: b580 push {r7, lr}
|
|
8001c70: b084 sub sp, #16
|
|
8001c72: af00 add r7, sp, #0
|
|
8001c74: 6078 str r0, [r7, #4]
|
|
8001c76: 4608 mov r0, r1
|
|
8001c78: 4611 mov r1, r2
|
|
8001c7a: 461a mov r2, r3
|
|
8001c7c: 4603 mov r3, r0
|
|
8001c7e: 70fb strb r3, [r7, #3]
|
|
8001c80: 460b mov r3, r1
|
|
8001c82: 803b strh r3, [r7, #0]
|
|
8001c84: 4613 mov r3, r2
|
|
8001c86: 70bb strb r3, [r7, #2]
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
8001c88: 2300 movs r3, #0
|
|
8001c8a: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8001c8c: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001c90: 2b00 cmp r3, #0
|
|
8001c92: da0e bge.n 8001cb2 <HAL_PCD_EP_Open+0x44>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001c94: 78fb ldrb r3, [r7, #3]
|
|
8001c96: f003 0307 and.w r3, r3, #7
|
|
8001c9a: 1c5a adds r2, r3, #1
|
|
8001c9c: 4613 mov r3, r2
|
|
8001c9e: 009b lsls r3, r3, #2
|
|
8001ca0: 4413 add r3, r2
|
|
8001ca2: 00db lsls r3, r3, #3
|
|
8001ca4: 687a ldr r2, [r7, #4]
|
|
8001ca6: 4413 add r3, r2
|
|
8001ca8: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001caa: 68fb ldr r3, [r7, #12]
|
|
8001cac: 2201 movs r2, #1
|
|
8001cae: 705a strb r2, [r3, #1]
|
|
8001cb0: e00e b.n 8001cd0 <HAL_PCD_EP_Open+0x62>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001cb2: 78fb ldrb r3, [r7, #3]
|
|
8001cb4: f003 0207 and.w r2, r3, #7
|
|
8001cb8: 4613 mov r3, r2
|
|
8001cba: 009b lsls r3, r3, #2
|
|
8001cbc: 4413 add r3, r2
|
|
8001cbe: 00db lsls r3, r3, #3
|
|
8001cc0: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
8001cc4: 687a ldr r2, [r7, #4]
|
|
8001cc6: 4413 add r3, r2
|
|
8001cc8: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8001cca: 68fb ldr r3, [r7, #12]
|
|
8001ccc: 2200 movs r2, #0
|
|
8001cce: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001cd0: 78fb ldrb r3, [r7, #3]
|
|
8001cd2: f003 0307 and.w r3, r3, #7
|
|
8001cd6: b2da uxtb r2, r3
|
|
8001cd8: 68fb ldr r3, [r7, #12]
|
|
8001cda: 701a strb r2, [r3, #0]
|
|
ep->maxpacket = ep_mps;
|
|
8001cdc: 883a ldrh r2, [r7, #0]
|
|
8001cde: 68fb ldr r3, [r7, #12]
|
|
8001ce0: 611a str r2, [r3, #16]
|
|
ep->type = ep_type;
|
|
8001ce2: 68fb ldr r3, [r7, #12]
|
|
8001ce4: 78ba ldrb r2, [r7, #2]
|
|
8001ce6: 70da strb r2, [r3, #3]
|
|
|
|
if (ep->is_in != 0U)
|
|
8001ce8: 68fb ldr r3, [r7, #12]
|
|
8001cea: 785b ldrb r3, [r3, #1]
|
|
8001cec: 2b00 cmp r3, #0
|
|
8001cee: d004 beq.n 8001cfa <HAL_PCD_EP_Open+0x8c>
|
|
{
|
|
/* Assign a Tx FIFO */
|
|
ep->tx_fifo_num = ep->num;
|
|
8001cf0: 68fb ldr r3, [r7, #12]
|
|
8001cf2: 781b ldrb r3, [r3, #0]
|
|
8001cf4: b29a uxth r2, r3
|
|
8001cf6: 68fb ldr r3, [r7, #12]
|
|
8001cf8: 81da strh r2, [r3, #14]
|
|
}
|
|
/* Set initial data PID. */
|
|
if (ep_type == EP_TYPE_BULK)
|
|
8001cfa: 78bb ldrb r3, [r7, #2]
|
|
8001cfc: 2b02 cmp r3, #2
|
|
8001cfe: d102 bne.n 8001d06 <HAL_PCD_EP_Open+0x98>
|
|
{
|
|
ep->data_pid_start = 0U;
|
|
8001d00: 68fb ldr r3, [r7, #12]
|
|
8001d02: 2200 movs r2, #0
|
|
8001d04: 711a strb r2, [r3, #4]
|
|
}
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8001d06: 687b ldr r3, [r7, #4]
|
|
8001d08: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8001d0c: 2b01 cmp r3, #1
|
|
8001d0e: d101 bne.n 8001d14 <HAL_PCD_EP_Open+0xa6>
|
|
8001d10: 2302 movs r3, #2
|
|
8001d12: e00e b.n 8001d32 <HAL_PCD_EP_Open+0xc4>
|
|
8001d14: 687b ldr r3, [r7, #4]
|
|
8001d16: 2201 movs r2, #1
|
|
8001d18: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
|
|
8001d1c: 687b ldr r3, [r7, #4]
|
|
8001d1e: 681b ldr r3, [r3, #0]
|
|
8001d20: 68f9 ldr r1, [r7, #12]
|
|
8001d22: 4618 mov r0, r3
|
|
8001d24: f003 fcfc bl 8005720 <USB_ActivateEndpoint>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001d28: 687b ldr r3, [r7, #4]
|
|
8001d2a: 2200 movs r2, #0
|
|
8001d2c: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
return ret;
|
|
8001d30: 7afb ldrb r3, [r7, #11]
|
|
}
|
|
8001d32: 4618 mov r0, r3
|
|
8001d34: 3710 adds r7, #16
|
|
8001d36: 46bd mov sp, r7
|
|
8001d38: bd80 pop {r7, pc}
|
|
|
|
08001d3a <HAL_PCD_EP_Close>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001d3a: b580 push {r7, lr}
|
|
8001d3c: b084 sub sp, #16
|
|
8001d3e: af00 add r7, sp, #0
|
|
8001d40: 6078 str r0, [r7, #4]
|
|
8001d42: 460b mov r3, r1
|
|
8001d44: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8001d46: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001d4a: 2b00 cmp r3, #0
|
|
8001d4c: da0e bge.n 8001d6c <HAL_PCD_EP_Close+0x32>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001d4e: 78fb ldrb r3, [r7, #3]
|
|
8001d50: f003 0307 and.w r3, r3, #7
|
|
8001d54: 1c5a adds r2, r3, #1
|
|
8001d56: 4613 mov r3, r2
|
|
8001d58: 009b lsls r3, r3, #2
|
|
8001d5a: 4413 add r3, r2
|
|
8001d5c: 00db lsls r3, r3, #3
|
|
8001d5e: 687a ldr r2, [r7, #4]
|
|
8001d60: 4413 add r3, r2
|
|
8001d62: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001d64: 68fb ldr r3, [r7, #12]
|
|
8001d66: 2201 movs r2, #1
|
|
8001d68: 705a strb r2, [r3, #1]
|
|
8001d6a: e00e b.n 8001d8a <HAL_PCD_EP_Close+0x50>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001d6c: 78fb ldrb r3, [r7, #3]
|
|
8001d6e: f003 0207 and.w r2, r3, #7
|
|
8001d72: 4613 mov r3, r2
|
|
8001d74: 009b lsls r3, r3, #2
|
|
8001d76: 4413 add r3, r2
|
|
8001d78: 00db lsls r3, r3, #3
|
|
8001d7a: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
8001d7e: 687a ldr r2, [r7, #4]
|
|
8001d80: 4413 add r3, r2
|
|
8001d82: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8001d84: 68fb ldr r3, [r7, #12]
|
|
8001d86: 2200 movs r2, #0
|
|
8001d88: 705a strb r2, [r3, #1]
|
|
}
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001d8a: 78fb ldrb r3, [r7, #3]
|
|
8001d8c: f003 0307 and.w r3, r3, #7
|
|
8001d90: b2da uxtb r2, r3
|
|
8001d92: 68fb ldr r3, [r7, #12]
|
|
8001d94: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8001d96: 687b ldr r3, [r7, #4]
|
|
8001d98: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8001d9c: 2b01 cmp r3, #1
|
|
8001d9e: d101 bne.n 8001da4 <HAL_PCD_EP_Close+0x6a>
|
|
8001da0: 2302 movs r3, #2
|
|
8001da2: e00e b.n 8001dc2 <HAL_PCD_EP_Close+0x88>
|
|
8001da4: 687b ldr r3, [r7, #4]
|
|
8001da6: 2201 movs r2, #1
|
|
8001da8: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
|
|
8001dac: 687b ldr r3, [r7, #4]
|
|
8001dae: 681b ldr r3, [r3, #0]
|
|
8001db0: 68f9 ldr r1, [r7, #12]
|
|
8001db2: 4618 mov r0, r3
|
|
8001db4: f004 f81e bl 8005df4 <USB_DeactivateEndpoint>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001db8: 687b ldr r3, [r7, #4]
|
|
8001dba: 2200 movs r2, #0
|
|
8001dbc: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
return HAL_OK;
|
|
8001dc0: 2300 movs r3, #0
|
|
}
|
|
8001dc2: 4618 mov r0, r3
|
|
8001dc4: 3710 adds r7, #16
|
|
8001dc6: 46bd mov sp, r7
|
|
8001dc8: bd80 pop {r7, pc}
|
|
|
|
08001dca <HAL_PCD_EP_Receive>:
|
|
* @param pBuf pointer to the reception buffer
|
|
* @param len amount of data to be received
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
|
|
{
|
|
8001dca: b580 push {r7, lr}
|
|
8001dcc: b086 sub sp, #24
|
|
8001dce: af00 add r7, sp, #0
|
|
8001dd0: 60f8 str r0, [r7, #12]
|
|
8001dd2: 607a str r2, [r7, #4]
|
|
8001dd4: 603b str r3, [r7, #0]
|
|
8001dd6: 460b mov r3, r1
|
|
8001dd8: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001dda: 7afb ldrb r3, [r7, #11]
|
|
8001ddc: f003 0207 and.w r2, r3, #7
|
|
8001de0: 4613 mov r3, r2
|
|
8001de2: 009b lsls r3, r3, #2
|
|
8001de4: 4413 add r3, r2
|
|
8001de6: 00db lsls r3, r3, #3
|
|
8001de8: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
8001dec: 68fa ldr r2, [r7, #12]
|
|
8001dee: 4413 add r3, r2
|
|
8001df0: 617b str r3, [r7, #20]
|
|
|
|
/*setup and start the Xfer */
|
|
ep->xfer_buff = pBuf;
|
|
8001df2: 697b ldr r3, [r7, #20]
|
|
8001df4: 687a ldr r2, [r7, #4]
|
|
8001df6: 615a str r2, [r3, #20]
|
|
ep->xfer_len = len;
|
|
8001df8: 697b ldr r3, [r7, #20]
|
|
8001dfa: 683a ldr r2, [r7, #0]
|
|
8001dfc: 619a str r2, [r3, #24]
|
|
ep->xfer_count = 0U;
|
|
8001dfe: 697b ldr r3, [r7, #20]
|
|
8001e00: 2200 movs r2, #0
|
|
8001e02: 61da str r2, [r3, #28]
|
|
ep->is_in = 0U;
|
|
8001e04: 697b ldr r3, [r7, #20]
|
|
8001e06: 2200 movs r2, #0
|
|
8001e08: 705a strb r2, [r3, #1]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001e0a: 7afb ldrb r3, [r7, #11]
|
|
8001e0c: f003 0307 and.w r3, r3, #7
|
|
8001e10: b2da uxtb r2, r3
|
|
8001e12: 697b ldr r3, [r7, #20]
|
|
8001e14: 701a strb r2, [r3, #0]
|
|
|
|
if ((ep_addr & EP_ADDR_MSK) == 0U)
|
|
8001e16: 7afb ldrb r3, [r7, #11]
|
|
8001e18: f003 0307 and.w r3, r3, #7
|
|
8001e1c: 2b00 cmp r3, #0
|
|
8001e1e: d106 bne.n 8001e2e <HAL_PCD_EP_Receive+0x64>
|
|
{
|
|
(void)USB_EP0StartXfer(hpcd->Instance, ep);
|
|
8001e20: 68fb ldr r3, [r7, #12]
|
|
8001e22: 681b ldr r3, [r3, #0]
|
|
8001e24: 6979 ldr r1, [r7, #20]
|
|
8001e26: 4618 mov r0, r3
|
|
8001e28: f004 f9d0 bl 80061cc <USB_EPStartXfer>
|
|
8001e2c: e005 b.n 8001e3a <HAL_PCD_EP_Receive+0x70>
|
|
}
|
|
else
|
|
{
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
8001e2e: 68fb ldr r3, [r7, #12]
|
|
8001e30: 681b ldr r3, [r3, #0]
|
|
8001e32: 6979 ldr r1, [r7, #20]
|
|
8001e34: 4618 mov r0, r3
|
|
8001e36: f004 f9c9 bl 80061cc <USB_EPStartXfer>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8001e3a: 2300 movs r3, #0
|
|
}
|
|
8001e3c: 4618 mov r0, r3
|
|
8001e3e: 3718 adds r7, #24
|
|
8001e40: 46bd mov sp, r7
|
|
8001e42: bd80 pop {r7, pc}
|
|
|
|
08001e44 <HAL_PCD_EP_GetRxCount>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval Data Size
|
|
*/
|
|
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001e44: b480 push {r7}
|
|
8001e46: b083 sub sp, #12
|
|
8001e48: af00 add r7, sp, #0
|
|
8001e4a: 6078 str r0, [r7, #4]
|
|
8001e4c: 460b mov r3, r1
|
|
8001e4e: 70fb strb r3, [r7, #3]
|
|
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
|
|
8001e50: 78fb ldrb r3, [r7, #3]
|
|
8001e52: f003 0207 and.w r2, r3, #7
|
|
8001e56: 6879 ldr r1, [r7, #4]
|
|
8001e58: 4613 mov r3, r2
|
|
8001e5a: 009b lsls r3, r3, #2
|
|
8001e5c: 4413 add r3, r2
|
|
8001e5e: 00db lsls r3, r3, #3
|
|
8001e60: 440b add r3, r1
|
|
8001e62: f503 73c2 add.w r3, r3, #388 ; 0x184
|
|
8001e66: 681b ldr r3, [r3, #0]
|
|
}
|
|
8001e68: 4618 mov r0, r3
|
|
8001e6a: 370c adds r7, #12
|
|
8001e6c: 46bd mov sp, r7
|
|
8001e6e: bc80 pop {r7}
|
|
8001e70: 4770 bx lr
|
|
|
|
08001e72 <HAL_PCD_EP_Transmit>:
|
|
* @param pBuf pointer to the transmission buffer
|
|
* @param len amount of data to be sent
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
|
|
{
|
|
8001e72: b580 push {r7, lr}
|
|
8001e74: b086 sub sp, #24
|
|
8001e76: af00 add r7, sp, #0
|
|
8001e78: 60f8 str r0, [r7, #12]
|
|
8001e7a: 607a str r2, [r7, #4]
|
|
8001e7c: 603b str r3, [r7, #0]
|
|
8001e7e: 460b mov r3, r1
|
|
8001e80: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001e82: 7afb ldrb r3, [r7, #11]
|
|
8001e84: f003 0307 and.w r3, r3, #7
|
|
8001e88: 1c5a adds r2, r3, #1
|
|
8001e8a: 4613 mov r3, r2
|
|
8001e8c: 009b lsls r3, r3, #2
|
|
8001e8e: 4413 add r3, r2
|
|
8001e90: 00db lsls r3, r3, #3
|
|
8001e92: 68fa ldr r2, [r7, #12]
|
|
8001e94: 4413 add r3, r2
|
|
8001e96: 617b str r3, [r7, #20]
|
|
|
|
/*setup and start the Xfer */
|
|
ep->xfer_buff = pBuf;
|
|
8001e98: 697b ldr r3, [r7, #20]
|
|
8001e9a: 687a ldr r2, [r7, #4]
|
|
8001e9c: 615a str r2, [r3, #20]
|
|
ep->xfer_len = len;
|
|
8001e9e: 697b ldr r3, [r7, #20]
|
|
8001ea0: 683a ldr r2, [r7, #0]
|
|
8001ea2: 619a str r2, [r3, #24]
|
|
#if defined (USB)
|
|
ep->xfer_fill_db = 1U;
|
|
8001ea4: 697b ldr r3, [r7, #20]
|
|
8001ea6: 2201 movs r2, #1
|
|
8001ea8: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
ep->xfer_len_db = len;
|
|
8001eac: 697b ldr r3, [r7, #20]
|
|
8001eae: 683a ldr r2, [r7, #0]
|
|
8001eb0: 621a str r2, [r3, #32]
|
|
#endif /* defined (USB) */
|
|
ep->xfer_count = 0U;
|
|
8001eb2: 697b ldr r3, [r7, #20]
|
|
8001eb4: 2200 movs r2, #0
|
|
8001eb6: 61da str r2, [r3, #28]
|
|
ep->is_in = 1U;
|
|
8001eb8: 697b ldr r3, [r7, #20]
|
|
8001eba: 2201 movs r2, #1
|
|
8001ebc: 705a strb r2, [r3, #1]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001ebe: 7afb ldrb r3, [r7, #11]
|
|
8001ec0: f003 0307 and.w r3, r3, #7
|
|
8001ec4: b2da uxtb r2, r3
|
|
8001ec6: 697b ldr r3, [r7, #20]
|
|
8001ec8: 701a strb r2, [r3, #0]
|
|
|
|
if ((ep_addr & EP_ADDR_MSK) == 0U)
|
|
8001eca: 7afb ldrb r3, [r7, #11]
|
|
8001ecc: f003 0307 and.w r3, r3, #7
|
|
8001ed0: 2b00 cmp r3, #0
|
|
8001ed2: d106 bne.n 8001ee2 <HAL_PCD_EP_Transmit+0x70>
|
|
{
|
|
(void)USB_EP0StartXfer(hpcd->Instance, ep);
|
|
8001ed4: 68fb ldr r3, [r7, #12]
|
|
8001ed6: 681b ldr r3, [r3, #0]
|
|
8001ed8: 6979 ldr r1, [r7, #20]
|
|
8001eda: 4618 mov r0, r3
|
|
8001edc: f004 f976 bl 80061cc <USB_EPStartXfer>
|
|
8001ee0: e005 b.n 8001eee <HAL_PCD_EP_Transmit+0x7c>
|
|
}
|
|
else
|
|
{
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
8001ee2: 68fb ldr r3, [r7, #12]
|
|
8001ee4: 681b ldr r3, [r3, #0]
|
|
8001ee6: 6979 ldr r1, [r7, #20]
|
|
8001ee8: 4618 mov r0, r3
|
|
8001eea: f004 f96f bl 80061cc <USB_EPStartXfer>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8001eee: 2300 movs r3, #0
|
|
}
|
|
8001ef0: 4618 mov r0, r3
|
|
8001ef2: 3718 adds r7, #24
|
|
8001ef4: 46bd mov sp, r7
|
|
8001ef6: bd80 pop {r7, pc}
|
|
|
|
08001ef8 <HAL_PCD_EP_SetStall>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001ef8: b580 push {r7, lr}
|
|
8001efa: b084 sub sp, #16
|
|
8001efc: af00 add r7, sp, #0
|
|
8001efe: 6078 str r0, [r7, #4]
|
|
8001f00: 460b mov r3, r1
|
|
8001f02: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
|
|
8001f04: 78fb ldrb r3, [r7, #3]
|
|
8001f06: f003 0207 and.w r2, r3, #7
|
|
8001f0a: 687b ldr r3, [r7, #4]
|
|
8001f0c: 685b ldr r3, [r3, #4]
|
|
8001f0e: 429a cmp r2, r3
|
|
8001f10: d901 bls.n 8001f16 <HAL_PCD_EP_SetStall+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
8001f12: 2301 movs r3, #1
|
|
8001f14: e04c b.n 8001fb0 <HAL_PCD_EP_SetStall+0xb8>
|
|
}
|
|
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
8001f16: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001f1a: 2b00 cmp r3, #0
|
|
8001f1c: da0e bge.n 8001f3c <HAL_PCD_EP_SetStall+0x44>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001f1e: 78fb ldrb r3, [r7, #3]
|
|
8001f20: f003 0307 and.w r3, r3, #7
|
|
8001f24: 1c5a adds r2, r3, #1
|
|
8001f26: 4613 mov r3, r2
|
|
8001f28: 009b lsls r3, r3, #2
|
|
8001f2a: 4413 add r3, r2
|
|
8001f2c: 00db lsls r3, r3, #3
|
|
8001f2e: 687a ldr r2, [r7, #4]
|
|
8001f30: 4413 add r3, r2
|
|
8001f32: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001f34: 68fb ldr r3, [r7, #12]
|
|
8001f36: 2201 movs r2, #1
|
|
8001f38: 705a strb r2, [r3, #1]
|
|
8001f3a: e00c b.n 8001f56 <HAL_PCD_EP_SetStall+0x5e>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr];
|
|
8001f3c: 78fa ldrb r2, [r7, #3]
|
|
8001f3e: 4613 mov r3, r2
|
|
8001f40: 009b lsls r3, r3, #2
|
|
8001f42: 4413 add r3, r2
|
|
8001f44: 00db lsls r3, r3, #3
|
|
8001f46: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
8001f4a: 687a ldr r2, [r7, #4]
|
|
8001f4c: 4413 add r3, r2
|
|
8001f4e: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8001f50: 68fb ldr r3, [r7, #12]
|
|
8001f52: 2200 movs r2, #0
|
|
8001f54: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->is_stall = 1U;
|
|
8001f56: 68fb ldr r3, [r7, #12]
|
|
8001f58: 2201 movs r2, #1
|
|
8001f5a: 709a strb r2, [r3, #2]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001f5c: 78fb ldrb r3, [r7, #3]
|
|
8001f5e: f003 0307 and.w r3, r3, #7
|
|
8001f62: b2da uxtb r2, r3
|
|
8001f64: 68fb ldr r3, [r7, #12]
|
|
8001f66: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8001f68: 687b ldr r3, [r7, #4]
|
|
8001f6a: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8001f6e: 2b01 cmp r3, #1
|
|
8001f70: d101 bne.n 8001f76 <HAL_PCD_EP_SetStall+0x7e>
|
|
8001f72: 2302 movs r3, #2
|
|
8001f74: e01c b.n 8001fb0 <HAL_PCD_EP_SetStall+0xb8>
|
|
8001f76: 687b ldr r3, [r7, #4]
|
|
8001f78: 2201 movs r2, #1
|
|
8001f7a: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
(void)USB_EPSetStall(hpcd->Instance, ep);
|
|
8001f7e: 687b ldr r3, [r7, #4]
|
|
8001f80: 681b ldr r3, [r3, #0]
|
|
8001f82: 68f9 ldr r1, [r7, #12]
|
|
8001f84: 4618 mov r0, r3
|
|
8001f86: f005 fa41 bl 800740c <USB_EPSetStall>
|
|
|
|
if ((ep_addr & EP_ADDR_MSK) == 0U)
|
|
8001f8a: 78fb ldrb r3, [r7, #3]
|
|
8001f8c: f003 0307 and.w r3, r3, #7
|
|
8001f90: 2b00 cmp r3, #0
|
|
8001f92: d108 bne.n 8001fa6 <HAL_PCD_EP_SetStall+0xae>
|
|
{
|
|
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
|
|
8001f94: 687b ldr r3, [r7, #4]
|
|
8001f96: 681a ldr r2, [r3, #0]
|
|
8001f98: 687b ldr r3, [r7, #4]
|
|
8001f9a: f503 732c add.w r3, r3, #688 ; 0x2b0
|
|
8001f9e: 4619 mov r1, r3
|
|
8001fa0: 4610 mov r0, r2
|
|
8001fa2: f005 fb66 bl 8007672 <USB_EP0_OutStart>
|
|
}
|
|
|
|
__HAL_UNLOCK(hpcd);
|
|
8001fa6: 687b ldr r3, [r7, #4]
|
|
8001fa8: 2200 movs r2, #0
|
|
8001faa: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
return HAL_OK;
|
|
8001fae: 2300 movs r3, #0
|
|
}
|
|
8001fb0: 4618 mov r0, r3
|
|
8001fb2: 3710 adds r7, #16
|
|
8001fb4: 46bd mov sp, r7
|
|
8001fb6: bd80 pop {r7, pc}
|
|
|
|
08001fb8 <HAL_PCD_EP_ClrStall>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001fb8: b580 push {r7, lr}
|
|
8001fba: b084 sub sp, #16
|
|
8001fbc: af00 add r7, sp, #0
|
|
8001fbe: 6078 str r0, [r7, #4]
|
|
8001fc0: 460b mov r3, r1
|
|
8001fc2: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
|
|
8001fc4: 78fb ldrb r3, [r7, #3]
|
|
8001fc6: f003 020f and.w r2, r3, #15
|
|
8001fca: 687b ldr r3, [r7, #4]
|
|
8001fcc: 685b ldr r3, [r3, #4]
|
|
8001fce: 429a cmp r2, r3
|
|
8001fd0: d901 bls.n 8001fd6 <HAL_PCD_EP_ClrStall+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
8001fd2: 2301 movs r3, #1
|
|
8001fd4: e040 b.n 8002058 <HAL_PCD_EP_ClrStall+0xa0>
|
|
}
|
|
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
8001fd6: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001fda: 2b00 cmp r3, #0
|
|
8001fdc: da0e bge.n 8001ffc <HAL_PCD_EP_ClrStall+0x44>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001fde: 78fb ldrb r3, [r7, #3]
|
|
8001fe0: f003 0307 and.w r3, r3, #7
|
|
8001fe4: 1c5a adds r2, r3, #1
|
|
8001fe6: 4613 mov r3, r2
|
|
8001fe8: 009b lsls r3, r3, #2
|
|
8001fea: 4413 add r3, r2
|
|
8001fec: 00db lsls r3, r3, #3
|
|
8001fee: 687a ldr r2, [r7, #4]
|
|
8001ff0: 4413 add r3, r2
|
|
8001ff2: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001ff4: 68fb ldr r3, [r7, #12]
|
|
8001ff6: 2201 movs r2, #1
|
|
8001ff8: 705a strb r2, [r3, #1]
|
|
8001ffa: e00e b.n 800201a <HAL_PCD_EP_ClrStall+0x62>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001ffc: 78fb ldrb r3, [r7, #3]
|
|
8001ffe: f003 0207 and.w r2, r3, #7
|
|
8002002: 4613 mov r3, r2
|
|
8002004: 009b lsls r3, r3, #2
|
|
8002006: 4413 add r3, r2
|
|
8002008: 00db lsls r3, r3, #3
|
|
800200a: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
800200e: 687a ldr r2, [r7, #4]
|
|
8002010: 4413 add r3, r2
|
|
8002012: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8002014: 68fb ldr r3, [r7, #12]
|
|
8002016: 2200 movs r2, #0
|
|
8002018: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->is_stall = 0U;
|
|
800201a: 68fb ldr r3, [r7, #12]
|
|
800201c: 2200 movs r2, #0
|
|
800201e: 709a strb r2, [r3, #2]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8002020: 78fb ldrb r3, [r7, #3]
|
|
8002022: f003 0307 and.w r3, r3, #7
|
|
8002026: b2da uxtb r2, r3
|
|
8002028: 68fb ldr r3, [r7, #12]
|
|
800202a: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
800202c: 687b ldr r3, [r7, #4]
|
|
800202e: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8002032: 2b01 cmp r3, #1
|
|
8002034: d101 bne.n 800203a <HAL_PCD_EP_ClrStall+0x82>
|
|
8002036: 2302 movs r3, #2
|
|
8002038: e00e b.n 8002058 <HAL_PCD_EP_ClrStall+0xa0>
|
|
800203a: 687b ldr r3, [r7, #4]
|
|
800203c: 2201 movs r2, #1
|
|
800203e: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
(void)USB_EPClearStall(hpcd->Instance, ep);
|
|
8002042: 687b ldr r3, [r7, #4]
|
|
8002044: 681b ldr r3, [r3, #0]
|
|
8002046: 68f9 ldr r1, [r7, #12]
|
|
8002048: 4618 mov r0, r3
|
|
800204a: f005 fa2f bl 80074ac <USB_EPClearStall>
|
|
__HAL_UNLOCK(hpcd);
|
|
800204e: 687b ldr r3, [r7, #4]
|
|
8002050: 2200 movs r2, #0
|
|
8002052: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
return HAL_OK;
|
|
8002056: 2300 movs r3, #0
|
|
}
|
|
8002058: 4618 mov r0, r3
|
|
800205a: 3710 adds r7, #16
|
|
800205c: 46bd mov sp, r7
|
|
800205e: bd80 pop {r7, pc}
|
|
|
|
08002060 <HAL_PCD_EP_Flush>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8002060: b580 push {r7, lr}
|
|
8002062: b082 sub sp, #8
|
|
8002064: af00 add r7, sp, #0
|
|
8002066: 6078 str r0, [r7, #4]
|
|
8002068: 460b mov r3, r1
|
|
800206a: 70fb strb r3, [r7, #3]
|
|
__HAL_LOCK(hpcd);
|
|
800206c: 687b ldr r3, [r7, #4]
|
|
800206e: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8002072: 2b01 cmp r3, #1
|
|
8002074: d101 bne.n 800207a <HAL_PCD_EP_Flush+0x1a>
|
|
8002076: 2302 movs r3, #2
|
|
8002078: e01b b.n 80020b2 <HAL_PCD_EP_Flush+0x52>
|
|
800207a: 687b ldr r3, [r7, #4]
|
|
800207c: 2201 movs r2, #1
|
|
800207e: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8002082: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8002086: 2b00 cmp r3, #0
|
|
8002088: da09 bge.n 800209e <HAL_PCD_EP_Flush+0x3e>
|
|
{
|
|
(void)USB_FlushTxFifo(hpcd->Instance, (uint32_t)ep_addr & EP_ADDR_MSK);
|
|
800208a: 687b ldr r3, [r7, #4]
|
|
800208c: 681a ldr r2, [r3, #0]
|
|
800208e: 78fb ldrb r3, [r7, #3]
|
|
8002090: f003 0307 and.w r3, r3, #7
|
|
8002094: 4619 mov r1, r3
|
|
8002096: 4610 mov r0, r2
|
|
8002098: f003 fb2c bl 80056f4 <USB_FlushTxFifo>
|
|
800209c: e004 b.n 80020a8 <HAL_PCD_EP_Flush+0x48>
|
|
}
|
|
else
|
|
{
|
|
(void)USB_FlushRxFifo(hpcd->Instance);
|
|
800209e: 687b ldr r3, [r7, #4]
|
|
80020a0: 681b ldr r3, [r3, #0]
|
|
80020a2: 4618 mov r0, r3
|
|
80020a4: f003 fb31 bl 800570a <USB_FlushRxFifo>
|
|
}
|
|
|
|
__HAL_UNLOCK(hpcd);
|
|
80020a8: 687b ldr r3, [r7, #4]
|
|
80020aa: 2200 movs r2, #0
|
|
80020ac: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
|
|
|
|
return HAL_OK;
|
|
80020b0: 2300 movs r3, #0
|
|
}
|
|
80020b2: 4618 mov r0, r3
|
|
80020b4: 3708 adds r7, #8
|
|
80020b6: 46bd mov sp, r7
|
|
80020b8: bd80 pop {r7, pc}
|
|
|
|
080020ba <PCD_EP_ISR_Handler>:
|
|
* @brief This function handles PCD Endpoint interrupt request.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
80020ba: b580 push {r7, lr}
|
|
80020bc: b08e sub sp, #56 ; 0x38
|
|
80020be: af00 add r7, sp, #0
|
|
80020c0: 6078 str r0, [r7, #4]
|
|
PCD_EPTypeDef *ep;
|
|
uint16_t count, wIstr, wEPVal, TxByteNbre;
|
|
uint8_t epindex;
|
|
|
|
/* stay in loop while pending interrupts */
|
|
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
|
|
80020c2: e2df b.n 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
{
|
|
wIstr = hpcd->Instance->ISTR;
|
|
80020c4: 687b ldr r3, [r7, #4]
|
|
80020c6: 681b ldr r3, [r3, #0]
|
|
80020c8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
80020cc: 85fb strh r3, [r7, #46] ; 0x2e
|
|
|
|
/* extract highest priority endpoint number */
|
|
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
|
|
80020ce: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
80020d0: b2db uxtb r3, r3
|
|
80020d2: f003 030f and.w r3, r3, #15
|
|
80020d6: f887 302d strb.w r3, [r7, #45] ; 0x2d
|
|
|
|
if (epindex == 0U)
|
|
80020da: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
|
|
80020de: 2b00 cmp r3, #0
|
|
80020e0: f040 8158 bne.w 8002394 <PCD_EP_ISR_Handler+0x2da>
|
|
{
|
|
/* Decode and service control endpoint interrupt */
|
|
|
|
/* DIR bit = origin of the interrupt */
|
|
if ((wIstr & USB_ISTR_DIR) == 0U)
|
|
80020e4: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
80020e6: f003 0310 and.w r3, r3, #16
|
|
80020ea: 2b00 cmp r3, #0
|
|
80020ec: d152 bne.n 8002194 <PCD_EP_ISR_Handler+0xda>
|
|
{
|
|
/* DIR = 0 */
|
|
|
|
/* DIR = 0 => IN int */
|
|
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
|
|
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
80020ee: 687b ldr r3, [r7, #4]
|
|
80020f0: 681b ldr r3, [r3, #0]
|
|
80020f2: 881b ldrh r3, [r3, #0]
|
|
80020f4: b29b uxth r3, r3
|
|
80020f6: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
|
|
80020fa: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80020fe: 81fb strh r3, [r7, #14]
|
|
8002100: 687b ldr r3, [r7, #4]
|
|
8002102: 681a ldr r2, [r3, #0]
|
|
8002104: 89fb ldrh r3, [r7, #14]
|
|
8002106: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800210a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800210e: b29b uxth r3, r3
|
|
8002110: 8013 strh r3, [r2, #0]
|
|
ep = &hpcd->IN_ep[0];
|
|
8002112: 687b ldr r3, [r7, #4]
|
|
8002114: 3328 adds r3, #40 ; 0x28
|
|
8002116: 627b str r3, [r7, #36] ; 0x24
|
|
|
|
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
|
|
8002118: 687b ldr r3, [r7, #4]
|
|
800211a: 681b ldr r3, [r3, #0]
|
|
800211c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002120: b29b uxth r3, r3
|
|
8002122: 461a mov r2, r3
|
|
8002124: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002126: 781b ldrb r3, [r3, #0]
|
|
8002128: 00db lsls r3, r3, #3
|
|
800212a: 4413 add r3, r2
|
|
800212c: 3302 adds r3, #2
|
|
800212e: 005b lsls r3, r3, #1
|
|
8002130: 687a ldr r2, [r7, #4]
|
|
8002132: 6812 ldr r2, [r2, #0]
|
|
8002134: 4413 add r3, r2
|
|
8002136: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
800213a: 881b ldrh r3, [r3, #0]
|
|
800213c: f3c3 0209 ubfx r2, r3, #0, #10
|
|
8002140: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002142: 61da str r2, [r3, #28]
|
|
ep->xfer_buff += ep->xfer_count;
|
|
8002144: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002146: 695a ldr r2, [r3, #20]
|
|
8002148: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800214a: 69db ldr r3, [r3, #28]
|
|
800214c: 441a add r2, r3
|
|
800214e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002150: 615a str r2, [r3, #20]
|
|
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, 0U);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, 0U);
|
|
8002152: 2100 movs r1, #0
|
|
8002154: 6878 ldr r0, [r7, #4]
|
|
8002156: f007 ffd6 bl 800a106 <HAL_PCD_DataInStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
|
|
800215a: 687b ldr r3, [r7, #4]
|
|
800215c: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
|
|
8002160: b2db uxtb r3, r3
|
|
8002162: 2b00 cmp r3, #0
|
|
8002164: f000 828e beq.w 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
8002168: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800216a: 699b ldr r3, [r3, #24]
|
|
800216c: 2b00 cmp r3, #0
|
|
800216e: f040 8289 bne.w 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
{
|
|
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
|
|
8002172: 687b ldr r3, [r7, #4]
|
|
8002174: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
|
|
8002178: b2db uxtb r3, r3
|
|
800217a: f063 037f orn r3, r3, #127 ; 0x7f
|
|
800217e: b2da uxtb r2, r3
|
|
8002180: 687b ldr r3, [r7, #4]
|
|
8002182: 681b ldr r3, [r3, #0]
|
|
8002184: b292 uxth r2, r2
|
|
8002186: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
|
|
hpcd->USB_Address = 0U;
|
|
800218a: 687b ldr r3, [r7, #4]
|
|
800218c: 2200 movs r2, #0
|
|
800218e: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
8002192: e277 b.n 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
{
|
|
/* DIR = 1 */
|
|
|
|
/* DIR = 1 & CTR_RX => SETUP or OUT int */
|
|
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
|
|
ep = &hpcd->OUT_ep[0];
|
|
8002194: 687b ldr r3, [r7, #4]
|
|
8002196: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
800219a: 627b str r3, [r7, #36] ; 0x24
|
|
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
|
|
800219c: 687b ldr r3, [r7, #4]
|
|
800219e: 681b ldr r3, [r3, #0]
|
|
80021a0: 881b ldrh r3, [r3, #0]
|
|
80021a2: 857b strh r3, [r7, #42] ; 0x2a
|
|
|
|
if ((wEPVal & USB_EP_SETUP) != 0U)
|
|
80021a4: 8d7b ldrh r3, [r7, #42] ; 0x2a
|
|
80021a6: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
80021aa: 2b00 cmp r3, #0
|
|
80021ac: d034 beq.n 8002218 <PCD_EP_ISR_Handler+0x15e>
|
|
{
|
|
/* Get SETUP Packet */
|
|
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
80021ae: 687b ldr r3, [r7, #4]
|
|
80021b0: 681b ldr r3, [r3, #0]
|
|
80021b2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80021b6: b29b uxth r3, r3
|
|
80021b8: 461a mov r2, r3
|
|
80021ba: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80021bc: 781b ldrb r3, [r3, #0]
|
|
80021be: 00db lsls r3, r3, #3
|
|
80021c0: 4413 add r3, r2
|
|
80021c2: 3306 adds r3, #6
|
|
80021c4: 005b lsls r3, r3, #1
|
|
80021c6: 687a ldr r2, [r7, #4]
|
|
80021c8: 6812 ldr r2, [r2, #0]
|
|
80021ca: 4413 add r3, r2
|
|
80021cc: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80021d0: 881b ldrh r3, [r3, #0]
|
|
80021d2: f3c3 0209 ubfx r2, r3, #0, #10
|
|
80021d6: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80021d8: 61da str r2, [r3, #28]
|
|
|
|
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
|
|
80021da: 687b ldr r3, [r7, #4]
|
|
80021dc: 6818 ldr r0, [r3, #0]
|
|
80021de: 687b ldr r3, [r7, #4]
|
|
80021e0: f503 712c add.w r1, r3, #688 ; 0x2b0
|
|
80021e4: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80021e6: 88da ldrh r2, [r3, #6]
|
|
ep->pmaadress, (uint16_t)ep->xfer_count);
|
|
80021e8: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80021ea: 69db ldr r3, [r3, #28]
|
|
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
|
|
80021ec: b29b uxth r3, r3
|
|
80021ee: f005 fa8f bl 8007710 <USB_ReadPMA>
|
|
|
|
/* SETUP bit kept frozen while CTR_RX = 1 */
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
80021f2: 687b ldr r3, [r7, #4]
|
|
80021f4: 681b ldr r3, [r3, #0]
|
|
80021f6: 881b ldrh r3, [r3, #0]
|
|
80021f8: b29a uxth r2, r3
|
|
80021fa: f640 738f movw r3, #3983 ; 0xf8f
|
|
80021fe: 4013 ands r3, r2
|
|
8002200: 823b strh r3, [r7, #16]
|
|
8002202: 687b ldr r3, [r7, #4]
|
|
8002204: 681b ldr r3, [r3, #0]
|
|
8002206: 8a3a ldrh r2, [r7, #16]
|
|
8002208: f042 0280 orr.w r2, r2, #128 ; 0x80
|
|
800220c: b292 uxth r2, r2
|
|
800220e: 801a strh r2, [r3, #0]
|
|
|
|
/* Process SETUP Packet*/
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SetupStageCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SetupStageCallback(hpcd);
|
|
8002210: 6878 ldr r0, [r7, #4]
|
|
8002212: f007 ff4b bl 800a0ac <HAL_PCD_SetupStageCallback>
|
|
8002216: e235 b.n 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
|
|
8002218: f9b7 302a ldrsh.w r3, [r7, #42] ; 0x2a
|
|
800221c: 2b00 cmp r3, #0
|
|
800221e: f280 8231 bge.w 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
{
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
8002222: 687b ldr r3, [r7, #4]
|
|
8002224: 681b ldr r3, [r3, #0]
|
|
8002226: 881b ldrh r3, [r3, #0]
|
|
8002228: b29a uxth r2, r3
|
|
800222a: f640 738f movw r3, #3983 ; 0xf8f
|
|
800222e: 4013 ands r3, r2
|
|
8002230: 83bb strh r3, [r7, #28]
|
|
8002232: 687b ldr r3, [r7, #4]
|
|
8002234: 681b ldr r3, [r3, #0]
|
|
8002236: 8bba ldrh r2, [r7, #28]
|
|
8002238: f042 0280 orr.w r2, r2, #128 ; 0x80
|
|
800223c: b292 uxth r2, r2
|
|
800223e: 801a strh r2, [r3, #0]
|
|
|
|
/* Get Control Data OUT Packet */
|
|
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
8002240: 687b ldr r3, [r7, #4]
|
|
8002242: 681b ldr r3, [r3, #0]
|
|
8002244: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002248: b29b uxth r3, r3
|
|
800224a: 461a mov r2, r3
|
|
800224c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800224e: 781b ldrb r3, [r3, #0]
|
|
8002250: 00db lsls r3, r3, #3
|
|
8002252: 4413 add r3, r2
|
|
8002254: 3306 adds r3, #6
|
|
8002256: 005b lsls r3, r3, #1
|
|
8002258: 687a ldr r2, [r7, #4]
|
|
800225a: 6812 ldr r2, [r2, #0]
|
|
800225c: 4413 add r3, r2
|
|
800225e: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8002262: 881b ldrh r3, [r3, #0]
|
|
8002264: f3c3 0209 ubfx r2, r3, #0, #10
|
|
8002268: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800226a: 61da str r2, [r3, #28]
|
|
|
|
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
|
|
800226c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800226e: 69db ldr r3, [r3, #28]
|
|
8002270: 2b00 cmp r3, #0
|
|
8002272: d019 beq.n 80022a8 <PCD_EP_ISR_Handler+0x1ee>
|
|
8002274: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002276: 695b ldr r3, [r3, #20]
|
|
8002278: 2b00 cmp r3, #0
|
|
800227a: d015 beq.n 80022a8 <PCD_EP_ISR_Handler+0x1ee>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
|
|
800227c: 687b ldr r3, [r7, #4]
|
|
800227e: 6818 ldr r0, [r3, #0]
|
|
8002280: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002282: 6959 ldr r1, [r3, #20]
|
|
8002284: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002286: 88da ldrh r2, [r3, #6]
|
|
ep->pmaadress, (uint16_t)ep->xfer_count);
|
|
8002288: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800228a: 69db ldr r3, [r3, #28]
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
|
|
800228c: b29b uxth r3, r3
|
|
800228e: f005 fa3f bl 8007710 <USB_ReadPMA>
|
|
|
|
ep->xfer_buff += ep->xfer_count;
|
|
8002292: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002294: 695a ldr r2, [r3, #20]
|
|
8002296: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002298: 69db ldr r3, [r3, #28]
|
|
800229a: 441a add r2, r3
|
|
800229c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800229e: 615a str r2, [r3, #20]
|
|
|
|
/* Process Control Data OUT Packet */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataOutStageCallback(hpcd, 0U);
|
|
#else
|
|
HAL_PCD_DataOutStageCallback(hpcd, 0U);
|
|
80022a0: 2100 movs r1, #0
|
|
80022a2: 6878 ldr r0, [r7, #4]
|
|
80022a4: f007 ff14 bl 800a0d0 <HAL_PCD_DataOutStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
|
|
80022a8: 687b ldr r3, [r7, #4]
|
|
80022aa: 681b ldr r3, [r3, #0]
|
|
80022ac: 61bb str r3, [r7, #24]
|
|
80022ae: 687b ldr r3, [r7, #4]
|
|
80022b0: 681b ldr r3, [r3, #0]
|
|
80022b2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80022b6: b29b uxth r3, r3
|
|
80022b8: 461a mov r2, r3
|
|
80022ba: 69bb ldr r3, [r7, #24]
|
|
80022bc: 4413 add r3, r2
|
|
80022be: 61bb str r3, [r7, #24]
|
|
80022c0: 69bb ldr r3, [r7, #24]
|
|
80022c2: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
80022c6: 617b str r3, [r7, #20]
|
|
80022c8: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80022ca: 691b ldr r3, [r3, #16]
|
|
80022cc: 2b00 cmp r3, #0
|
|
80022ce: d112 bne.n 80022f6 <PCD_EP_ISR_Handler+0x23c>
|
|
80022d0: 697b ldr r3, [r7, #20]
|
|
80022d2: 881b ldrh r3, [r3, #0]
|
|
80022d4: b29b uxth r3, r3
|
|
80022d6: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
80022da: b29a uxth r2, r3
|
|
80022dc: 697b ldr r3, [r7, #20]
|
|
80022de: 801a strh r2, [r3, #0]
|
|
80022e0: 697b ldr r3, [r7, #20]
|
|
80022e2: 881b ldrh r3, [r3, #0]
|
|
80022e4: b29b uxth r3, r3
|
|
80022e6: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80022ea: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80022ee: b29a uxth r2, r3
|
|
80022f0: 697b ldr r3, [r7, #20]
|
|
80022f2: 801a strh r2, [r3, #0]
|
|
80022f4: e02f b.n 8002356 <PCD_EP_ISR_Handler+0x29c>
|
|
80022f6: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80022f8: 691b ldr r3, [r3, #16]
|
|
80022fa: 2b3e cmp r3, #62 ; 0x3e
|
|
80022fc: d813 bhi.n 8002326 <PCD_EP_ISR_Handler+0x26c>
|
|
80022fe: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002300: 691b ldr r3, [r3, #16]
|
|
8002302: 085b lsrs r3, r3, #1
|
|
8002304: 633b str r3, [r7, #48] ; 0x30
|
|
8002306: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002308: 691b ldr r3, [r3, #16]
|
|
800230a: f003 0301 and.w r3, r3, #1
|
|
800230e: 2b00 cmp r3, #0
|
|
8002310: d002 beq.n 8002318 <PCD_EP_ISR_Handler+0x25e>
|
|
8002312: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8002314: 3301 adds r3, #1
|
|
8002316: 633b str r3, [r7, #48] ; 0x30
|
|
8002318: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
800231a: b29b uxth r3, r3
|
|
800231c: 029b lsls r3, r3, #10
|
|
800231e: b29a uxth r2, r3
|
|
8002320: 697b ldr r3, [r7, #20]
|
|
8002322: 801a strh r2, [r3, #0]
|
|
8002324: e017 b.n 8002356 <PCD_EP_ISR_Handler+0x29c>
|
|
8002326: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002328: 691b ldr r3, [r3, #16]
|
|
800232a: 095b lsrs r3, r3, #5
|
|
800232c: 633b str r3, [r7, #48] ; 0x30
|
|
800232e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002330: 691b ldr r3, [r3, #16]
|
|
8002332: f003 031f and.w r3, r3, #31
|
|
8002336: 2b00 cmp r3, #0
|
|
8002338: d102 bne.n 8002340 <PCD_EP_ISR_Handler+0x286>
|
|
800233a: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
800233c: 3b01 subs r3, #1
|
|
800233e: 633b str r3, [r7, #48] ; 0x30
|
|
8002340: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8002342: b29b uxth r3, r3
|
|
8002344: 029b lsls r3, r3, #10
|
|
8002346: b29b uxth r3, r3
|
|
8002348: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800234c: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8002350: b29a uxth r2, r3
|
|
8002352: 697b ldr r3, [r7, #20]
|
|
8002354: 801a strh r2, [r3, #0]
|
|
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
|
|
8002356: 687b ldr r3, [r7, #4]
|
|
8002358: 681b ldr r3, [r3, #0]
|
|
800235a: 881b ldrh r3, [r3, #0]
|
|
800235c: b29b uxth r3, r3
|
|
800235e: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8002362: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002366: 827b strh r3, [r7, #18]
|
|
8002368: 8a7b ldrh r3, [r7, #18]
|
|
800236a: f483 5380 eor.w r3, r3, #4096 ; 0x1000
|
|
800236e: 827b strh r3, [r7, #18]
|
|
8002370: 8a7b ldrh r3, [r7, #18]
|
|
8002372: f483 5300 eor.w r3, r3, #8192 ; 0x2000
|
|
8002376: 827b strh r3, [r7, #18]
|
|
8002378: 687b ldr r3, [r7, #4]
|
|
800237a: 681a ldr r2, [r3, #0]
|
|
800237c: 8a7b ldrh r3, [r7, #18]
|
|
800237e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8002382: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002386: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
800238a: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800238e: b29b uxth r3, r3
|
|
8002390: 8013 strh r3, [r2, #0]
|
|
8002392: e177 b.n 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
}
|
|
else
|
|
{
|
|
/* Decode and service non control endpoints interrupt */
|
|
/* process related endpoint register */
|
|
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
|
|
8002394: 687b ldr r3, [r7, #4]
|
|
8002396: 681b ldr r3, [r3, #0]
|
|
8002398: 461a mov r2, r3
|
|
800239a: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
|
|
800239e: 009b lsls r3, r3, #2
|
|
80023a0: 4413 add r3, r2
|
|
80023a2: 881b ldrh r3, [r3, #0]
|
|
80023a4: 857b strh r3, [r7, #42] ; 0x2a
|
|
|
|
if ((wEPVal & USB_EP_CTR_RX) != 0U)
|
|
80023a6: f9b7 302a ldrsh.w r3, [r7, #42] ; 0x2a
|
|
80023aa: 2b00 cmp r3, #0
|
|
80023ac: f280 80ea bge.w 8002584 <PCD_EP_ISR_Handler+0x4ca>
|
|
{
|
|
/* clear int flag */
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
|
|
80023b0: 687b ldr r3, [r7, #4]
|
|
80023b2: 681b ldr r3, [r3, #0]
|
|
80023b4: 461a mov r2, r3
|
|
80023b6: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
|
|
80023ba: 009b lsls r3, r3, #2
|
|
80023bc: 4413 add r3, r2
|
|
80023be: 881b ldrh r3, [r3, #0]
|
|
80023c0: b29a uxth r2, r3
|
|
80023c2: f640 738f movw r3, #3983 ; 0xf8f
|
|
80023c6: 4013 ands r3, r2
|
|
80023c8: 853b strh r3, [r7, #40] ; 0x28
|
|
80023ca: 687b ldr r3, [r7, #4]
|
|
80023cc: 681b ldr r3, [r3, #0]
|
|
80023ce: 461a mov r2, r3
|
|
80023d0: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
|
|
80023d4: 009b lsls r3, r3, #2
|
|
80023d6: 4413 add r3, r2
|
|
80023d8: 8d3a ldrh r2, [r7, #40] ; 0x28
|
|
80023da: f042 0280 orr.w r2, r2, #128 ; 0x80
|
|
80023de: b292 uxth r2, r2
|
|
80023e0: 801a strh r2, [r3, #0]
|
|
ep = &hpcd->OUT_ep[epindex];
|
|
80023e2: f897 202d ldrb.w r2, [r7, #45] ; 0x2d
|
|
80023e6: 4613 mov r3, r2
|
|
80023e8: 009b lsls r3, r3, #2
|
|
80023ea: 4413 add r3, r2
|
|
80023ec: 00db lsls r3, r3, #3
|
|
80023ee: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
80023f2: 687a ldr r2, [r7, #4]
|
|
80023f4: 4413 add r3, r2
|
|
80023f6: 627b str r3, [r7, #36] ; 0x24
|
|
|
|
/* OUT Single Buffering */
|
|
if (ep->doublebuffer == 0U)
|
|
80023f8: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80023fa: 7b1b ldrb r3, [r3, #12]
|
|
80023fc: 2b00 cmp r3, #0
|
|
80023fe: d122 bne.n 8002446 <PCD_EP_ISR_Handler+0x38c>
|
|
{
|
|
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
8002400: 687b ldr r3, [r7, #4]
|
|
8002402: 681b ldr r3, [r3, #0]
|
|
8002404: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002408: b29b uxth r3, r3
|
|
800240a: 461a mov r2, r3
|
|
800240c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800240e: 781b ldrb r3, [r3, #0]
|
|
8002410: 00db lsls r3, r3, #3
|
|
8002412: 4413 add r3, r2
|
|
8002414: 3306 adds r3, #6
|
|
8002416: 005b lsls r3, r3, #1
|
|
8002418: 687a ldr r2, [r7, #4]
|
|
800241a: 6812 ldr r2, [r2, #0]
|
|
800241c: 4413 add r3, r2
|
|
800241e: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8002422: 881b ldrh r3, [r3, #0]
|
|
8002424: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002428: 86fb strh r3, [r7, #54] ; 0x36
|
|
|
|
if (count != 0U)
|
|
800242a: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
800242c: 2b00 cmp r3, #0
|
|
800242e: f000 8087 beq.w 8002540 <PCD_EP_ISR_Handler+0x486>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
|
|
8002432: 687b ldr r3, [r7, #4]
|
|
8002434: 6818 ldr r0, [r3, #0]
|
|
8002436: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002438: 6959 ldr r1, [r3, #20]
|
|
800243a: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800243c: 88da ldrh r2, [r3, #6]
|
|
800243e: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
8002440: f005 f966 bl 8007710 <USB_ReadPMA>
|
|
8002444: e07c b.n 8002540 <PCD_EP_ISR_Handler+0x486>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* manage double buffer bulk out */
|
|
if (ep->type == EP_TYPE_BULK)
|
|
8002446: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002448: 78db ldrb r3, [r3, #3]
|
|
800244a: 2b02 cmp r3, #2
|
|
800244c: d108 bne.n 8002460 <PCD_EP_ISR_Handler+0x3a6>
|
|
{
|
|
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
|
|
800244e: 8d7b ldrh r3, [r7, #42] ; 0x2a
|
|
8002450: 461a mov r2, r3
|
|
8002452: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
8002454: 6878 ldr r0, [r7, #4]
|
|
8002456: f000 f923 bl 80026a0 <HAL_PCD_EP_DB_Receive>
|
|
800245a: 4603 mov r3, r0
|
|
800245c: 86fb strh r3, [r7, #54] ; 0x36
|
|
800245e: e06f b.n 8002540 <PCD_EP_ISR_Handler+0x486>
|
|
}
|
|
else /* manage double buffer iso out */
|
|
{
|
|
/* free EP OUT Buffer */
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
|
|
8002460: 687b ldr r3, [r7, #4]
|
|
8002462: 681b ldr r3, [r3, #0]
|
|
8002464: 461a mov r2, r3
|
|
8002466: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002468: 781b ldrb r3, [r3, #0]
|
|
800246a: 009b lsls r3, r3, #2
|
|
800246c: 4413 add r3, r2
|
|
800246e: 881b ldrh r3, [r3, #0]
|
|
8002470: b29b uxth r3, r3
|
|
8002472: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8002476: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800247a: 847b strh r3, [r7, #34] ; 0x22
|
|
800247c: 687b ldr r3, [r7, #4]
|
|
800247e: 681b ldr r3, [r3, #0]
|
|
8002480: 461a mov r2, r3
|
|
8002482: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002484: 781b ldrb r3, [r3, #0]
|
|
8002486: 009b lsls r3, r3, #2
|
|
8002488: 441a add r2, r3
|
|
800248a: 8c7b ldrh r3, [r7, #34] ; 0x22
|
|
800248c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8002490: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002494: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8002498: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
800249c: b29b uxth r3, r3
|
|
800249e: 8013 strh r3, [r2, #0]
|
|
|
|
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
|
|
80024a0: 687b ldr r3, [r7, #4]
|
|
80024a2: 681b ldr r3, [r3, #0]
|
|
80024a4: 461a mov r2, r3
|
|
80024a6: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80024a8: 781b ldrb r3, [r3, #0]
|
|
80024aa: 009b lsls r3, r3, #2
|
|
80024ac: 4413 add r3, r2
|
|
80024ae: 881b ldrh r3, [r3, #0]
|
|
80024b0: b29b uxth r3, r3
|
|
80024b2: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
80024b6: 2b00 cmp r3, #0
|
|
80024b8: d021 beq.n 80024fe <PCD_EP_ISR_Handler+0x444>
|
|
{
|
|
/* read from endpoint BUF0Addr buffer */
|
|
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
|
|
80024ba: 687b ldr r3, [r7, #4]
|
|
80024bc: 681b ldr r3, [r3, #0]
|
|
80024be: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80024c2: b29b uxth r3, r3
|
|
80024c4: 461a mov r2, r3
|
|
80024c6: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80024c8: 781b ldrb r3, [r3, #0]
|
|
80024ca: 00db lsls r3, r3, #3
|
|
80024cc: 4413 add r3, r2
|
|
80024ce: 3302 adds r3, #2
|
|
80024d0: 005b lsls r3, r3, #1
|
|
80024d2: 687a ldr r2, [r7, #4]
|
|
80024d4: 6812 ldr r2, [r2, #0]
|
|
80024d6: 4413 add r3, r2
|
|
80024d8: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80024dc: 881b ldrh r3, [r3, #0]
|
|
80024de: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80024e2: 86fb strh r3, [r7, #54] ; 0x36
|
|
|
|
if (count != 0U)
|
|
80024e4: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
80024e6: 2b00 cmp r3, #0
|
|
80024e8: d02a beq.n 8002540 <PCD_EP_ISR_Handler+0x486>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
|
|
80024ea: 687b ldr r3, [r7, #4]
|
|
80024ec: 6818 ldr r0, [r3, #0]
|
|
80024ee: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80024f0: 6959 ldr r1, [r3, #20]
|
|
80024f2: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80024f4: 891a ldrh r2, [r3, #8]
|
|
80024f6: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
80024f8: f005 f90a bl 8007710 <USB_ReadPMA>
|
|
80024fc: e020 b.n 8002540 <PCD_EP_ISR_Handler+0x486>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* read from endpoint BUF1Addr buffer */
|
|
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
|
|
80024fe: 687b ldr r3, [r7, #4]
|
|
8002500: 681b ldr r3, [r3, #0]
|
|
8002502: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002506: b29b uxth r3, r3
|
|
8002508: 461a mov r2, r3
|
|
800250a: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800250c: 781b ldrb r3, [r3, #0]
|
|
800250e: 00db lsls r3, r3, #3
|
|
8002510: 4413 add r3, r2
|
|
8002512: 3306 adds r3, #6
|
|
8002514: 005b lsls r3, r3, #1
|
|
8002516: 687a ldr r2, [r7, #4]
|
|
8002518: 6812 ldr r2, [r2, #0]
|
|
800251a: 4413 add r3, r2
|
|
800251c: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8002520: 881b ldrh r3, [r3, #0]
|
|
8002522: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002526: 86fb strh r3, [r7, #54] ; 0x36
|
|
|
|
if (count != 0U)
|
|
8002528: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
800252a: 2b00 cmp r3, #0
|
|
800252c: d008 beq.n 8002540 <PCD_EP_ISR_Handler+0x486>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
|
|
800252e: 687b ldr r3, [r7, #4]
|
|
8002530: 6818 ldr r0, [r3, #0]
|
|
8002532: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002534: 6959 ldr r1, [r3, #20]
|
|
8002536: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002538: 895a ldrh r2, [r3, #10]
|
|
800253a: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
800253c: f005 f8e8 bl 8007710 <USB_ReadPMA>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/* multi-packet on the NON control OUT endpoint */
|
|
ep->xfer_count += count;
|
|
8002540: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002542: 69da ldr r2, [r3, #28]
|
|
8002544: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
8002546: 441a add r2, r3
|
|
8002548: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800254a: 61da str r2, [r3, #28]
|
|
ep->xfer_buff += count;
|
|
800254c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800254e: 695a ldr r2, [r3, #20]
|
|
8002550: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
8002552: 441a add r2, r3
|
|
8002554: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002556: 615a str r2, [r3, #20]
|
|
|
|
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
|
|
8002558: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800255a: 699b ldr r3, [r3, #24]
|
|
800255c: 2b00 cmp r3, #0
|
|
800255e: d004 beq.n 800256a <PCD_EP_ISR_Handler+0x4b0>
|
|
8002560: 8efa ldrh r2, [r7, #54] ; 0x36
|
|
8002562: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002564: 691b ldr r3, [r3, #16]
|
|
8002566: 429a cmp r2, r3
|
|
8002568: d206 bcs.n 8002578 <PCD_EP_ISR_Handler+0x4be>
|
|
{
|
|
/* RX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataOutStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
|
|
800256a: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800256c: 781b ldrb r3, [r3, #0]
|
|
800256e: 4619 mov r1, r3
|
|
8002570: 6878 ldr r0, [r7, #4]
|
|
8002572: f007 fdad bl 800a0d0 <HAL_PCD_DataOutStageCallback>
|
|
8002576: e005 b.n 8002584 <PCD_EP_ISR_Handler+0x4ca>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else
|
|
{
|
|
(void) USB_EPStartXfer(hpcd->Instance, ep);
|
|
8002578: 687b ldr r3, [r7, #4]
|
|
800257a: 681b ldr r3, [r3, #0]
|
|
800257c: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
800257e: 4618 mov r0, r3
|
|
8002580: f003 fe24 bl 80061cc <USB_EPStartXfer>
|
|
}
|
|
|
|
}
|
|
|
|
if ((wEPVal & USB_EP_CTR_TX) != 0U)
|
|
8002584: 8d7b ldrh r3, [r7, #42] ; 0x2a
|
|
8002586: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
800258a: 2b00 cmp r3, #0
|
|
800258c: d07a beq.n 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
{
|
|
ep = &hpcd->IN_ep[epindex];
|
|
800258e: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
|
|
8002592: 1c5a adds r2, r3, #1
|
|
8002594: 4613 mov r3, r2
|
|
8002596: 009b lsls r3, r3, #2
|
|
8002598: 4413 add r3, r2
|
|
800259a: 00db lsls r3, r3, #3
|
|
800259c: 687a ldr r2, [r7, #4]
|
|
800259e: 4413 add r3, r2
|
|
80025a0: 627b str r3, [r7, #36] ; 0x24
|
|
|
|
/* clear int flag */
|
|
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
|
|
80025a2: 687b ldr r3, [r7, #4]
|
|
80025a4: 681b ldr r3, [r3, #0]
|
|
80025a6: 461a mov r2, r3
|
|
80025a8: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
|
|
80025ac: 009b lsls r3, r3, #2
|
|
80025ae: 4413 add r3, r2
|
|
80025b0: 881b ldrh r3, [r3, #0]
|
|
80025b2: b29b uxth r3, r3
|
|
80025b4: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
|
|
80025b8: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80025bc: 843b strh r3, [r7, #32]
|
|
80025be: 687b ldr r3, [r7, #4]
|
|
80025c0: 681b ldr r3, [r3, #0]
|
|
80025c2: 461a mov r2, r3
|
|
80025c4: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
|
|
80025c8: 009b lsls r3, r3, #2
|
|
80025ca: 441a add r2, r3
|
|
80025cc: 8c3b ldrh r3, [r7, #32]
|
|
80025ce: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80025d2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80025d6: b29b uxth r3, r3
|
|
80025d8: 8013 strh r3, [r2, #0]
|
|
|
|
/* Manage all non bulk transaction or Bulk Single Buffer Transaction */
|
|
if ((ep->type != EP_TYPE_BULK) ||
|
|
80025da: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80025dc: 78db ldrb r3, [r3, #3]
|
|
80025de: 2b02 cmp r3, #2
|
|
80025e0: d108 bne.n 80025f4 <PCD_EP_ISR_Handler+0x53a>
|
|
((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
|
|
80025e2: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80025e4: 78db ldrb r3, [r3, #3]
|
|
if ((ep->type != EP_TYPE_BULK) ||
|
|
80025e6: 2b02 cmp r3, #2
|
|
80025e8: d146 bne.n 8002678 <PCD_EP_ISR_Handler+0x5be>
|
|
((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
|
|
80025ea: 8d7b ldrh r3, [r7, #42] ; 0x2a
|
|
80025ec: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
80025f0: 2b00 cmp r3, #0
|
|
80025f2: d141 bne.n 8002678 <PCD_EP_ISR_Handler+0x5be>
|
|
{
|
|
/* multi-packet on the NON control IN endpoint */
|
|
TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
|
|
80025f4: 687b ldr r3, [r7, #4]
|
|
80025f6: 681b ldr r3, [r3, #0]
|
|
80025f8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80025fc: b29b uxth r3, r3
|
|
80025fe: 461a mov r2, r3
|
|
8002600: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002602: 781b ldrb r3, [r3, #0]
|
|
8002604: 00db lsls r3, r3, #3
|
|
8002606: 4413 add r3, r2
|
|
8002608: 3302 adds r3, #2
|
|
800260a: 005b lsls r3, r3, #1
|
|
800260c: 687a ldr r2, [r7, #4]
|
|
800260e: 6812 ldr r2, [r2, #0]
|
|
8002610: 4413 add r3, r2
|
|
8002612: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8002616: 881b ldrh r3, [r3, #0]
|
|
8002618: f3c3 0309 ubfx r3, r3, #0, #10
|
|
800261c: 83fb strh r3, [r7, #30]
|
|
|
|
if (ep->xfer_len > TxByteNbre)
|
|
800261e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002620: 699a ldr r2, [r3, #24]
|
|
8002622: 8bfb ldrh r3, [r7, #30]
|
|
8002624: 429a cmp r2, r3
|
|
8002626: d906 bls.n 8002636 <PCD_EP_ISR_Handler+0x57c>
|
|
{
|
|
ep->xfer_len -= TxByteNbre;
|
|
8002628: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800262a: 699a ldr r2, [r3, #24]
|
|
800262c: 8bfb ldrh r3, [r7, #30]
|
|
800262e: 1ad2 subs r2, r2, r3
|
|
8002630: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002632: 619a str r2, [r3, #24]
|
|
8002634: e002 b.n 800263c <PCD_EP_ISR_Handler+0x582>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
8002636: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002638: 2200 movs r2, #0
|
|
800263a: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* Zero Length Packet? */
|
|
if (ep->xfer_len == 0U)
|
|
800263c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800263e: 699b ldr r3, [r3, #24]
|
|
8002640: 2b00 cmp r3, #0
|
|
8002642: d106 bne.n 8002652 <PCD_EP_ISR_Handler+0x598>
|
|
{
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
8002644: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002646: 781b ldrb r3, [r3, #0]
|
|
8002648: 4619 mov r1, r3
|
|
800264a: 6878 ldr r0, [r7, #4]
|
|
800264c: f007 fd5b bl 800a106 <HAL_PCD_DataInStageCallback>
|
|
8002650: e018 b.n 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else
|
|
{
|
|
/* Transfer is not yet Done */
|
|
ep->xfer_buff += TxByteNbre;
|
|
8002652: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002654: 695a ldr r2, [r3, #20]
|
|
8002656: 8bfb ldrh r3, [r7, #30]
|
|
8002658: 441a add r2, r3
|
|
800265a: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800265c: 615a str r2, [r3, #20]
|
|
ep->xfer_count += TxByteNbre;
|
|
800265e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002660: 69da ldr r2, [r3, #28]
|
|
8002662: 8bfb ldrh r3, [r7, #30]
|
|
8002664: 441a add r2, r3
|
|
8002666: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002668: 61da str r2, [r3, #28]
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
800266a: 687b ldr r3, [r7, #4]
|
|
800266c: 681b ldr r3, [r3, #0]
|
|
800266e: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
8002670: 4618 mov r0, r3
|
|
8002672: f003 fdab bl 80061cc <USB_EPStartXfer>
|
|
if (ep->xfer_len == 0U)
|
|
8002676: e005 b.n 8002684 <PCD_EP_ISR_Handler+0x5ca>
|
|
}
|
|
}
|
|
/* bulk in double buffer enable in case of transferLen> Ep_Mps */
|
|
else
|
|
{
|
|
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
|
|
8002678: 8d7b ldrh r3, [r7, #42] ; 0x2a
|
|
800267a: 461a mov r2, r3
|
|
800267c: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
800267e: 6878 ldr r0, [r7, #4]
|
|
8002680: f000 f91b bl 80028ba <HAL_PCD_EP_DB_Transmit>
|
|
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
|
|
8002684: 687b ldr r3, [r7, #4]
|
|
8002686: 681b ldr r3, [r3, #0]
|
|
8002688: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
800268c: b29b uxth r3, r3
|
|
800268e: b21b sxth r3, r3
|
|
8002690: 2b00 cmp r3, #0
|
|
8002692: f6ff ad17 blt.w 80020c4 <PCD_EP_ISR_Handler+0xa>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8002696: 2300 movs r3, #0
|
|
}
|
|
8002698: 4618 mov r0, r3
|
|
800269a: 3738 adds r7, #56 ; 0x38
|
|
800269c: 46bd mov sp, r7
|
|
800269e: bd80 pop {r7, pc}
|
|
|
|
080026a0 <HAL_PCD_EP_DB_Receive>:
|
|
* @param wEPVal Last snapshot of EPRx register value taken in ISR
|
|
* @retval HAL status
|
|
*/
|
|
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
|
|
PCD_EPTypeDef *ep, uint16_t wEPVal)
|
|
{
|
|
80026a0: b580 push {r7, lr}
|
|
80026a2: b088 sub sp, #32
|
|
80026a4: af00 add r7, sp, #0
|
|
80026a6: 60f8 str r0, [r7, #12]
|
|
80026a8: 60b9 str r1, [r7, #8]
|
|
80026aa: 4613 mov r3, r2
|
|
80026ac: 80fb strh r3, [r7, #6]
|
|
uint16_t count;
|
|
|
|
/* Manage Buffer0 OUT */
|
|
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
|
|
80026ae: 88fb ldrh r3, [r7, #6]
|
|
80026b0: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
80026b4: 2b00 cmp r3, #0
|
|
80026b6: d07e beq.n 80027b6 <HAL_PCD_EP_DB_Receive+0x116>
|
|
{
|
|
/* Get count of received Data on buffer0 */
|
|
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
|
|
80026b8: 68fb ldr r3, [r7, #12]
|
|
80026ba: 681b ldr r3, [r3, #0]
|
|
80026bc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80026c0: b29b uxth r3, r3
|
|
80026c2: 461a mov r2, r3
|
|
80026c4: 68bb ldr r3, [r7, #8]
|
|
80026c6: 781b ldrb r3, [r3, #0]
|
|
80026c8: 00db lsls r3, r3, #3
|
|
80026ca: 4413 add r3, r2
|
|
80026cc: 3302 adds r3, #2
|
|
80026ce: 005b lsls r3, r3, #1
|
|
80026d0: 68fa ldr r2, [r7, #12]
|
|
80026d2: 6812 ldr r2, [r2, #0]
|
|
80026d4: 4413 add r3, r2
|
|
80026d6: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80026da: 881b ldrh r3, [r3, #0]
|
|
80026dc: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80026e0: 837b strh r3, [r7, #26]
|
|
|
|
if (ep->xfer_len >= count)
|
|
80026e2: 68bb ldr r3, [r7, #8]
|
|
80026e4: 699a ldr r2, [r3, #24]
|
|
80026e6: 8b7b ldrh r3, [r7, #26]
|
|
80026e8: 429a cmp r2, r3
|
|
80026ea: d306 bcc.n 80026fa <HAL_PCD_EP_DB_Receive+0x5a>
|
|
{
|
|
ep->xfer_len -= count;
|
|
80026ec: 68bb ldr r3, [r7, #8]
|
|
80026ee: 699a ldr r2, [r3, #24]
|
|
80026f0: 8b7b ldrh r3, [r7, #26]
|
|
80026f2: 1ad2 subs r2, r2, r3
|
|
80026f4: 68bb ldr r3, [r7, #8]
|
|
80026f6: 619a str r2, [r3, #24]
|
|
80026f8: e002 b.n 8002700 <HAL_PCD_EP_DB_Receive+0x60>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
80026fa: 68bb ldr r3, [r7, #8]
|
|
80026fc: 2200 movs r2, #0
|
|
80026fe: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
if (ep->xfer_len == 0U)
|
|
8002700: 68bb ldr r3, [r7, #8]
|
|
8002702: 699b ldr r3, [r3, #24]
|
|
8002704: 2b00 cmp r3, #0
|
|
8002706: d123 bne.n 8002750 <HAL_PCD_EP_DB_Receive+0xb0>
|
|
{
|
|
/* set NAK to OUT endpoint since double buffer is enabled */
|
|
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
|
|
8002708: 68fb ldr r3, [r7, #12]
|
|
800270a: 681b ldr r3, [r3, #0]
|
|
800270c: 461a mov r2, r3
|
|
800270e: 68bb ldr r3, [r7, #8]
|
|
8002710: 781b ldrb r3, [r3, #0]
|
|
8002712: 009b lsls r3, r3, #2
|
|
8002714: 4413 add r3, r2
|
|
8002716: 881b ldrh r3, [r3, #0]
|
|
8002718: b29b uxth r3, r3
|
|
800271a: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
800271e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002722: 833b strh r3, [r7, #24]
|
|
8002724: 8b3b ldrh r3, [r7, #24]
|
|
8002726: f483 5300 eor.w r3, r3, #8192 ; 0x2000
|
|
800272a: 833b strh r3, [r7, #24]
|
|
800272c: 68fb ldr r3, [r7, #12]
|
|
800272e: 681b ldr r3, [r3, #0]
|
|
8002730: 461a mov r2, r3
|
|
8002732: 68bb ldr r3, [r7, #8]
|
|
8002734: 781b ldrb r3, [r3, #0]
|
|
8002736: 009b lsls r3, r3, #2
|
|
8002738: 441a add r2, r3
|
|
800273a: 8b3b ldrh r3, [r7, #24]
|
|
800273c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8002740: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002744: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8002748: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800274c: b29b uxth r3, r3
|
|
800274e: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/* Check if Buffer1 is in blocked sate which requires to toggle */
|
|
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
|
|
8002750: 88fb ldrh r3, [r7, #6]
|
|
8002752: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8002756: 2b00 cmp r3, #0
|
|
8002758: d01f beq.n 800279a <HAL_PCD_EP_DB_Receive+0xfa>
|
|
{
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
|
|
800275a: 68fb ldr r3, [r7, #12]
|
|
800275c: 681b ldr r3, [r3, #0]
|
|
800275e: 461a mov r2, r3
|
|
8002760: 68bb ldr r3, [r7, #8]
|
|
8002762: 781b ldrb r3, [r3, #0]
|
|
8002764: 009b lsls r3, r3, #2
|
|
8002766: 4413 add r3, r2
|
|
8002768: 881b ldrh r3, [r3, #0]
|
|
800276a: b29b uxth r3, r3
|
|
800276c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8002770: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002774: 82fb strh r3, [r7, #22]
|
|
8002776: 68fb ldr r3, [r7, #12]
|
|
8002778: 681b ldr r3, [r3, #0]
|
|
800277a: 461a mov r2, r3
|
|
800277c: 68bb ldr r3, [r7, #8]
|
|
800277e: 781b ldrb r3, [r3, #0]
|
|
8002780: 009b lsls r3, r3, #2
|
|
8002782: 441a add r2, r3
|
|
8002784: 8afb ldrh r3, [r7, #22]
|
|
8002786: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800278a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
800278e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8002792: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8002796: b29b uxth r3, r3
|
|
8002798: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
if (count != 0U)
|
|
800279a: 8b7b ldrh r3, [r7, #26]
|
|
800279c: 2b00 cmp r3, #0
|
|
800279e: f000 8087 beq.w 80028b0 <HAL_PCD_EP_DB_Receive+0x210>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
|
|
80027a2: 68fb ldr r3, [r7, #12]
|
|
80027a4: 6818 ldr r0, [r3, #0]
|
|
80027a6: 68bb ldr r3, [r7, #8]
|
|
80027a8: 6959 ldr r1, [r3, #20]
|
|
80027aa: 68bb ldr r3, [r7, #8]
|
|
80027ac: 891a ldrh r2, [r3, #8]
|
|
80027ae: 8b7b ldrh r3, [r7, #26]
|
|
80027b0: f004 ffae bl 8007710 <USB_ReadPMA>
|
|
80027b4: e07c b.n 80028b0 <HAL_PCD_EP_DB_Receive+0x210>
|
|
}
|
|
/* Manage Buffer 1 DTOG_RX=0 */
|
|
else
|
|
{
|
|
/* Get count of received data */
|
|
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
|
|
80027b6: 68fb ldr r3, [r7, #12]
|
|
80027b8: 681b ldr r3, [r3, #0]
|
|
80027ba: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80027be: b29b uxth r3, r3
|
|
80027c0: 461a mov r2, r3
|
|
80027c2: 68bb ldr r3, [r7, #8]
|
|
80027c4: 781b ldrb r3, [r3, #0]
|
|
80027c6: 00db lsls r3, r3, #3
|
|
80027c8: 4413 add r3, r2
|
|
80027ca: 3306 adds r3, #6
|
|
80027cc: 005b lsls r3, r3, #1
|
|
80027ce: 68fa ldr r2, [r7, #12]
|
|
80027d0: 6812 ldr r2, [r2, #0]
|
|
80027d2: 4413 add r3, r2
|
|
80027d4: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80027d8: 881b ldrh r3, [r3, #0]
|
|
80027da: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80027de: 837b strh r3, [r7, #26]
|
|
|
|
if (ep->xfer_len >= count)
|
|
80027e0: 68bb ldr r3, [r7, #8]
|
|
80027e2: 699a ldr r2, [r3, #24]
|
|
80027e4: 8b7b ldrh r3, [r7, #26]
|
|
80027e6: 429a cmp r2, r3
|
|
80027e8: d306 bcc.n 80027f8 <HAL_PCD_EP_DB_Receive+0x158>
|
|
{
|
|
ep->xfer_len -= count;
|
|
80027ea: 68bb ldr r3, [r7, #8]
|
|
80027ec: 699a ldr r2, [r3, #24]
|
|
80027ee: 8b7b ldrh r3, [r7, #26]
|
|
80027f0: 1ad2 subs r2, r2, r3
|
|
80027f2: 68bb ldr r3, [r7, #8]
|
|
80027f4: 619a str r2, [r3, #24]
|
|
80027f6: e002 b.n 80027fe <HAL_PCD_EP_DB_Receive+0x15e>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
80027f8: 68bb ldr r3, [r7, #8]
|
|
80027fa: 2200 movs r2, #0
|
|
80027fc: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
if (ep->xfer_len == 0U)
|
|
80027fe: 68bb ldr r3, [r7, #8]
|
|
8002800: 699b ldr r3, [r3, #24]
|
|
8002802: 2b00 cmp r3, #0
|
|
8002804: d123 bne.n 800284e <HAL_PCD_EP_DB_Receive+0x1ae>
|
|
{
|
|
/* set NAK on the current endpoint */
|
|
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
|
|
8002806: 68fb ldr r3, [r7, #12]
|
|
8002808: 681b ldr r3, [r3, #0]
|
|
800280a: 461a mov r2, r3
|
|
800280c: 68bb ldr r3, [r7, #8]
|
|
800280e: 781b ldrb r3, [r3, #0]
|
|
8002810: 009b lsls r3, r3, #2
|
|
8002812: 4413 add r3, r2
|
|
8002814: 881b ldrh r3, [r3, #0]
|
|
8002816: b29b uxth r3, r3
|
|
8002818: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
800281c: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002820: 83fb strh r3, [r7, #30]
|
|
8002822: 8bfb ldrh r3, [r7, #30]
|
|
8002824: f483 5300 eor.w r3, r3, #8192 ; 0x2000
|
|
8002828: 83fb strh r3, [r7, #30]
|
|
800282a: 68fb ldr r3, [r7, #12]
|
|
800282c: 681b ldr r3, [r3, #0]
|
|
800282e: 461a mov r2, r3
|
|
8002830: 68bb ldr r3, [r7, #8]
|
|
8002832: 781b ldrb r3, [r3, #0]
|
|
8002834: 009b lsls r3, r3, #2
|
|
8002836: 441a add r2, r3
|
|
8002838: 8bfb ldrh r3, [r7, #30]
|
|
800283a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800283e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002842: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8002846: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800284a: b29b uxth r3, r3
|
|
800284c: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/*Need to FreeUser Buffer*/
|
|
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
|
|
800284e: 88fb ldrh r3, [r7, #6]
|
|
8002850: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8002854: 2b00 cmp r3, #0
|
|
8002856: d11f bne.n 8002898 <HAL_PCD_EP_DB_Receive+0x1f8>
|
|
{
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
|
|
8002858: 68fb ldr r3, [r7, #12]
|
|
800285a: 681b ldr r3, [r3, #0]
|
|
800285c: 461a mov r2, r3
|
|
800285e: 68bb ldr r3, [r7, #8]
|
|
8002860: 781b ldrb r3, [r3, #0]
|
|
8002862: 009b lsls r3, r3, #2
|
|
8002864: 4413 add r3, r2
|
|
8002866: 881b ldrh r3, [r3, #0]
|
|
8002868: b29b uxth r3, r3
|
|
800286a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800286e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002872: 83bb strh r3, [r7, #28]
|
|
8002874: 68fb ldr r3, [r7, #12]
|
|
8002876: 681b ldr r3, [r3, #0]
|
|
8002878: 461a mov r2, r3
|
|
800287a: 68bb ldr r3, [r7, #8]
|
|
800287c: 781b ldrb r3, [r3, #0]
|
|
800287e: 009b lsls r3, r3, #2
|
|
8002880: 441a add r2, r3
|
|
8002882: 8bbb ldrh r3, [r7, #28]
|
|
8002884: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8002888: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
800288c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8002890: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8002894: b29b uxth r3, r3
|
|
8002896: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
if (count != 0U)
|
|
8002898: 8b7b ldrh r3, [r7, #26]
|
|
800289a: 2b00 cmp r3, #0
|
|
800289c: d008 beq.n 80028b0 <HAL_PCD_EP_DB_Receive+0x210>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
|
|
800289e: 68fb ldr r3, [r7, #12]
|
|
80028a0: 6818 ldr r0, [r3, #0]
|
|
80028a2: 68bb ldr r3, [r7, #8]
|
|
80028a4: 6959 ldr r1, [r3, #20]
|
|
80028a6: 68bb ldr r3, [r7, #8]
|
|
80028a8: 895a ldrh r2, [r3, #10]
|
|
80028aa: 8b7b ldrh r3, [r7, #26]
|
|
80028ac: f004 ff30 bl 8007710 <USB_ReadPMA>
|
|
}
|
|
}
|
|
|
|
return count;
|
|
80028b0: 8b7b ldrh r3, [r7, #26]
|
|
}
|
|
80028b2: 4618 mov r0, r3
|
|
80028b4: 3720 adds r7, #32
|
|
80028b6: 46bd mov sp, r7
|
|
80028b8: bd80 pop {r7, pc}
|
|
|
|
080028ba <HAL_PCD_EP_DB_Transmit>:
|
|
* @param wEPVal Last snapshot of EPRx register value taken in ISR
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
|
|
PCD_EPTypeDef *ep, uint16_t wEPVal)
|
|
{
|
|
80028ba: b580 push {r7, lr}
|
|
80028bc: b092 sub sp, #72 ; 0x48
|
|
80028be: af00 add r7, sp, #0
|
|
80028c0: 60f8 str r0, [r7, #12]
|
|
80028c2: 60b9 str r1, [r7, #8]
|
|
80028c4: 4613 mov r3, r2
|
|
80028c6: 80fb strh r3, [r7, #6]
|
|
uint32_t len;
|
|
uint16_t TxByteNbre;
|
|
|
|
/* Data Buffer0 ACK received */
|
|
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
|
|
80028c8: 88fb ldrh r3, [r7, #6]
|
|
80028ca: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80028ce: 2b00 cmp r3, #0
|
|
80028d0: f000 8132 beq.w 8002b38 <HAL_PCD_EP_DB_Transmit+0x27e>
|
|
{
|
|
/* multi-packet on the NON control IN endpoint */
|
|
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
|
|
80028d4: 68fb ldr r3, [r7, #12]
|
|
80028d6: 681b ldr r3, [r3, #0]
|
|
80028d8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80028dc: b29b uxth r3, r3
|
|
80028de: 461a mov r2, r3
|
|
80028e0: 68bb ldr r3, [r7, #8]
|
|
80028e2: 781b ldrb r3, [r3, #0]
|
|
80028e4: 00db lsls r3, r3, #3
|
|
80028e6: 4413 add r3, r2
|
|
80028e8: 3302 adds r3, #2
|
|
80028ea: 005b lsls r3, r3, #1
|
|
80028ec: 68fa ldr r2, [r7, #12]
|
|
80028ee: 6812 ldr r2, [r2, #0]
|
|
80028f0: 4413 add r3, r2
|
|
80028f2: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80028f6: 881b ldrh r3, [r3, #0]
|
|
80028f8: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80028fc: 85fb strh r3, [r7, #46] ; 0x2e
|
|
|
|
if (ep->xfer_len > TxByteNbre)
|
|
80028fe: 68bb ldr r3, [r7, #8]
|
|
8002900: 699a ldr r2, [r3, #24]
|
|
8002902: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8002904: 429a cmp r2, r3
|
|
8002906: d906 bls.n 8002916 <HAL_PCD_EP_DB_Transmit+0x5c>
|
|
{
|
|
ep->xfer_len -= TxByteNbre;
|
|
8002908: 68bb ldr r3, [r7, #8]
|
|
800290a: 699a ldr r2, [r3, #24]
|
|
800290c: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
800290e: 1ad2 subs r2, r2, r3
|
|
8002910: 68bb ldr r3, [r7, #8]
|
|
8002912: 619a str r2, [r3, #24]
|
|
8002914: e002 b.n 800291c <HAL_PCD_EP_DB_Transmit+0x62>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
8002916: 68bb ldr r3, [r7, #8]
|
|
8002918: 2200 movs r2, #0
|
|
800291a: 619a str r2, [r3, #24]
|
|
}
|
|
/* Transfer is completed */
|
|
if (ep->xfer_len == 0U)
|
|
800291c: 68bb ldr r3, [r7, #8]
|
|
800291e: 699b ldr r3, [r3, #24]
|
|
8002920: 2b00 cmp r3, #0
|
|
8002922: d12c bne.n 800297e <HAL_PCD_EP_DB_Transmit+0xc4>
|
|
{
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
8002924: 68bb ldr r3, [r7, #8]
|
|
8002926: 781b ldrb r3, [r3, #0]
|
|
8002928: 4619 mov r1, r3
|
|
800292a: 68f8 ldr r0, [r7, #12]
|
|
800292c: f007 fbeb bl 800a106 <HAL_PCD_DataInStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
|
|
8002930: 88fb ldrh r3, [r7, #6]
|
|
8002932: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8002936: 2b00 cmp r3, #0
|
|
8002938: f000 822f beq.w 8002d9a <HAL_PCD_EP_DB_Transmit+0x4e0>
|
|
{
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
|
|
800293c: 68fb ldr r3, [r7, #12]
|
|
800293e: 681b ldr r3, [r3, #0]
|
|
8002940: 461a mov r2, r3
|
|
8002942: 68bb ldr r3, [r7, #8]
|
|
8002944: 781b ldrb r3, [r3, #0]
|
|
8002946: 009b lsls r3, r3, #2
|
|
8002948: 4413 add r3, r2
|
|
800294a: 881b ldrh r3, [r3, #0]
|
|
800294c: b29b uxth r3, r3
|
|
800294e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8002952: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002956: 827b strh r3, [r7, #18]
|
|
8002958: 68fb ldr r3, [r7, #12]
|
|
800295a: 681b ldr r3, [r3, #0]
|
|
800295c: 461a mov r2, r3
|
|
800295e: 68bb ldr r3, [r7, #8]
|
|
8002960: 781b ldrb r3, [r3, #0]
|
|
8002962: 009b lsls r3, r3, #2
|
|
8002964: 441a add r2, r3
|
|
8002966: 8a7b ldrh r3, [r7, #18]
|
|
8002968: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800296c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002970: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8002974: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8002978: b29b uxth r3, r3
|
|
800297a: 8013 strh r3, [r2, #0]
|
|
800297c: e20d b.n 8002d9a <HAL_PCD_EP_DB_Transmit+0x4e0>
|
|
}
|
|
}
|
|
else /* Transfer is not yet Done */
|
|
{
|
|
/* need to Free USB Buff */
|
|
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
|
|
800297e: 88fb ldrh r3, [r7, #6]
|
|
8002980: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8002984: 2b00 cmp r3, #0
|
|
8002986: d01f beq.n 80029c8 <HAL_PCD_EP_DB_Transmit+0x10e>
|
|
{
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
|
|
8002988: 68fb ldr r3, [r7, #12]
|
|
800298a: 681b ldr r3, [r3, #0]
|
|
800298c: 461a mov r2, r3
|
|
800298e: 68bb ldr r3, [r7, #8]
|
|
8002990: 781b ldrb r3, [r3, #0]
|
|
8002992: 009b lsls r3, r3, #2
|
|
8002994: 4413 add r3, r2
|
|
8002996: 881b ldrh r3, [r3, #0]
|
|
8002998: b29b uxth r3, r3
|
|
800299a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800299e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80029a2: 84bb strh r3, [r7, #36] ; 0x24
|
|
80029a4: 68fb ldr r3, [r7, #12]
|
|
80029a6: 681b ldr r3, [r3, #0]
|
|
80029a8: 461a mov r2, r3
|
|
80029aa: 68bb ldr r3, [r7, #8]
|
|
80029ac: 781b ldrb r3, [r3, #0]
|
|
80029ae: 009b lsls r3, r3, #2
|
|
80029b0: 441a add r2, r3
|
|
80029b2: 8cbb ldrh r3, [r7, #36] ; 0x24
|
|
80029b4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80029b8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80029bc: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
80029c0: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80029c4: b29b uxth r3, r3
|
|
80029c6: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/* Still there is data to Fill in the next Buffer */
|
|
if (ep->xfer_fill_db == 1U)
|
|
80029c8: 68bb ldr r3, [r7, #8]
|
|
80029ca: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
|
|
80029ce: 2b01 cmp r3, #1
|
|
80029d0: f040 81e3 bne.w 8002d9a <HAL_PCD_EP_DB_Transmit+0x4e0>
|
|
{
|
|
ep->xfer_buff += TxByteNbre;
|
|
80029d4: 68bb ldr r3, [r7, #8]
|
|
80029d6: 695a ldr r2, [r3, #20]
|
|
80029d8: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
80029da: 441a add r2, r3
|
|
80029dc: 68bb ldr r3, [r7, #8]
|
|
80029de: 615a str r2, [r3, #20]
|
|
ep->xfer_count += TxByteNbre;
|
|
80029e0: 68bb ldr r3, [r7, #8]
|
|
80029e2: 69da ldr r2, [r3, #28]
|
|
80029e4: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
80029e6: 441a add r2, r3
|
|
80029e8: 68bb ldr r3, [r7, #8]
|
|
80029ea: 61da str r2, [r3, #28]
|
|
|
|
/* Calculate the len of the new buffer to fill */
|
|
if (ep->xfer_len_db >= ep->maxpacket)
|
|
80029ec: 68bb ldr r3, [r7, #8]
|
|
80029ee: 6a1a ldr r2, [r3, #32]
|
|
80029f0: 68bb ldr r3, [r7, #8]
|
|
80029f2: 691b ldr r3, [r3, #16]
|
|
80029f4: 429a cmp r2, r3
|
|
80029f6: d309 bcc.n 8002a0c <HAL_PCD_EP_DB_Transmit+0x152>
|
|
{
|
|
len = ep->maxpacket;
|
|
80029f8: 68bb ldr r3, [r7, #8]
|
|
80029fa: 691b ldr r3, [r3, #16]
|
|
80029fc: 63bb str r3, [r7, #56] ; 0x38
|
|
ep->xfer_len_db -= len;
|
|
80029fe: 68bb ldr r3, [r7, #8]
|
|
8002a00: 6a1a ldr r2, [r3, #32]
|
|
8002a02: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002a04: 1ad2 subs r2, r2, r3
|
|
8002a06: 68bb ldr r3, [r7, #8]
|
|
8002a08: 621a str r2, [r3, #32]
|
|
8002a0a: e014 b.n 8002a36 <HAL_PCD_EP_DB_Transmit+0x17c>
|
|
}
|
|
else if (ep->xfer_len_db == 0U)
|
|
8002a0c: 68bb ldr r3, [r7, #8]
|
|
8002a0e: 6a1b ldr r3, [r3, #32]
|
|
8002a10: 2b00 cmp r3, #0
|
|
8002a12: d106 bne.n 8002a22 <HAL_PCD_EP_DB_Transmit+0x168>
|
|
{
|
|
len = TxByteNbre;
|
|
8002a14: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8002a16: 63bb str r3, [r7, #56] ; 0x38
|
|
ep->xfer_fill_db = 0U;
|
|
8002a18: 68bb ldr r3, [r7, #8]
|
|
8002a1a: 2200 movs r2, #0
|
|
8002a1c: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
8002a20: e009 b.n 8002a36 <HAL_PCD_EP_DB_Transmit+0x17c>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_fill_db = 0U;
|
|
8002a22: 68bb ldr r3, [r7, #8]
|
|
8002a24: 2200 movs r2, #0
|
|
8002a26: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
len = ep->xfer_len_db;
|
|
8002a2a: 68bb ldr r3, [r7, #8]
|
|
8002a2c: 6a1b ldr r3, [r3, #32]
|
|
8002a2e: 63bb str r3, [r7, #56] ; 0x38
|
|
ep->xfer_len_db = 0U;
|
|
8002a30: 68bb ldr r3, [r7, #8]
|
|
8002a32: 2200 movs r2, #0
|
|
8002a34: 621a str r2, [r3, #32]
|
|
}
|
|
|
|
/* Write remaining Data to Buffer */
|
|
/* Set the Double buffer counter for pma buffer1 */
|
|
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
|
|
8002a36: 68bb ldr r3, [r7, #8]
|
|
8002a38: 785b ldrb r3, [r3, #1]
|
|
8002a3a: 2b00 cmp r3, #0
|
|
8002a3c: d155 bne.n 8002aea <HAL_PCD_EP_DB_Transmit+0x230>
|
|
8002a3e: 68fb ldr r3, [r7, #12]
|
|
8002a40: 681b ldr r3, [r3, #0]
|
|
8002a42: 61bb str r3, [r7, #24]
|
|
8002a44: 68fb ldr r3, [r7, #12]
|
|
8002a46: 681b ldr r3, [r3, #0]
|
|
8002a48: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002a4c: b29b uxth r3, r3
|
|
8002a4e: 461a mov r2, r3
|
|
8002a50: 69bb ldr r3, [r7, #24]
|
|
8002a52: 4413 add r3, r2
|
|
8002a54: 61bb str r3, [r7, #24]
|
|
8002a56: 68bb ldr r3, [r7, #8]
|
|
8002a58: 781b ldrb r3, [r3, #0]
|
|
8002a5a: 011a lsls r2, r3, #4
|
|
8002a5c: 69bb ldr r3, [r7, #24]
|
|
8002a5e: 4413 add r3, r2
|
|
8002a60: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8002a64: 617b str r3, [r7, #20]
|
|
8002a66: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002a68: 2b00 cmp r3, #0
|
|
8002a6a: d112 bne.n 8002a92 <HAL_PCD_EP_DB_Transmit+0x1d8>
|
|
8002a6c: 697b ldr r3, [r7, #20]
|
|
8002a6e: 881b ldrh r3, [r3, #0]
|
|
8002a70: b29b uxth r3, r3
|
|
8002a72: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8002a76: b29a uxth r2, r3
|
|
8002a78: 697b ldr r3, [r7, #20]
|
|
8002a7a: 801a strh r2, [r3, #0]
|
|
8002a7c: 697b ldr r3, [r7, #20]
|
|
8002a7e: 881b ldrh r3, [r3, #0]
|
|
8002a80: b29b uxth r3, r3
|
|
8002a82: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8002a86: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8002a8a: b29a uxth r2, r3
|
|
8002a8c: 697b ldr r3, [r7, #20]
|
|
8002a8e: 801a strh r2, [r3, #0]
|
|
8002a90: e047 b.n 8002b22 <HAL_PCD_EP_DB_Transmit+0x268>
|
|
8002a92: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002a94: 2b3e cmp r3, #62 ; 0x3e
|
|
8002a96: d811 bhi.n 8002abc <HAL_PCD_EP_DB_Transmit+0x202>
|
|
8002a98: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002a9a: 085b lsrs r3, r3, #1
|
|
8002a9c: 62bb str r3, [r7, #40] ; 0x28
|
|
8002a9e: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002aa0: f003 0301 and.w r3, r3, #1
|
|
8002aa4: 2b00 cmp r3, #0
|
|
8002aa6: d002 beq.n 8002aae <HAL_PCD_EP_DB_Transmit+0x1f4>
|
|
8002aa8: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8002aaa: 3301 adds r3, #1
|
|
8002aac: 62bb str r3, [r7, #40] ; 0x28
|
|
8002aae: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8002ab0: b29b uxth r3, r3
|
|
8002ab2: 029b lsls r3, r3, #10
|
|
8002ab4: b29a uxth r2, r3
|
|
8002ab6: 697b ldr r3, [r7, #20]
|
|
8002ab8: 801a strh r2, [r3, #0]
|
|
8002aba: e032 b.n 8002b22 <HAL_PCD_EP_DB_Transmit+0x268>
|
|
8002abc: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002abe: 095b lsrs r3, r3, #5
|
|
8002ac0: 62bb str r3, [r7, #40] ; 0x28
|
|
8002ac2: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002ac4: f003 031f and.w r3, r3, #31
|
|
8002ac8: 2b00 cmp r3, #0
|
|
8002aca: d102 bne.n 8002ad2 <HAL_PCD_EP_DB_Transmit+0x218>
|
|
8002acc: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8002ace: 3b01 subs r3, #1
|
|
8002ad0: 62bb str r3, [r7, #40] ; 0x28
|
|
8002ad2: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8002ad4: b29b uxth r3, r3
|
|
8002ad6: 029b lsls r3, r3, #10
|
|
8002ad8: b29b uxth r3, r3
|
|
8002ada: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8002ade: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8002ae2: b29a uxth r2, r3
|
|
8002ae4: 697b ldr r3, [r7, #20]
|
|
8002ae6: 801a strh r2, [r3, #0]
|
|
8002ae8: e01b b.n 8002b22 <HAL_PCD_EP_DB_Transmit+0x268>
|
|
8002aea: 68bb ldr r3, [r7, #8]
|
|
8002aec: 785b ldrb r3, [r3, #1]
|
|
8002aee: 2b01 cmp r3, #1
|
|
8002af0: d117 bne.n 8002b22 <HAL_PCD_EP_DB_Transmit+0x268>
|
|
8002af2: 68fb ldr r3, [r7, #12]
|
|
8002af4: 681b ldr r3, [r3, #0]
|
|
8002af6: 623b str r3, [r7, #32]
|
|
8002af8: 68fb ldr r3, [r7, #12]
|
|
8002afa: 681b ldr r3, [r3, #0]
|
|
8002afc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002b00: b29b uxth r3, r3
|
|
8002b02: 461a mov r2, r3
|
|
8002b04: 6a3b ldr r3, [r7, #32]
|
|
8002b06: 4413 add r3, r2
|
|
8002b08: 623b str r3, [r7, #32]
|
|
8002b0a: 68bb ldr r3, [r7, #8]
|
|
8002b0c: 781b ldrb r3, [r3, #0]
|
|
8002b0e: 011a lsls r2, r3, #4
|
|
8002b10: 6a3b ldr r3, [r7, #32]
|
|
8002b12: 4413 add r3, r2
|
|
8002b14: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8002b18: 61fb str r3, [r7, #28]
|
|
8002b1a: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002b1c: b29a uxth r2, r3
|
|
8002b1e: 69fb ldr r3, [r7, #28]
|
|
8002b20: 801a strh r2, [r3, #0]
|
|
|
|
/* Copy user buffer to USB PMA */
|
|
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
|
|
8002b22: 68fb ldr r3, [r7, #12]
|
|
8002b24: 6818 ldr r0, [r3, #0]
|
|
8002b26: 68bb ldr r3, [r7, #8]
|
|
8002b28: 6959 ldr r1, [r3, #20]
|
|
8002b2a: 68bb ldr r3, [r7, #8]
|
|
8002b2c: 891a ldrh r2, [r3, #8]
|
|
8002b2e: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002b30: b29b uxth r3, r3
|
|
8002b32: f004 fda9 bl 8007688 <USB_WritePMA>
|
|
8002b36: e130 b.n 8002d9a <HAL_PCD_EP_DB_Transmit+0x4e0>
|
|
}
|
|
}
|
|
else /* Data Buffer1 ACK received */
|
|
{
|
|
/* multi-packet on the NON control IN endpoint */
|
|
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
|
|
8002b38: 68fb ldr r3, [r7, #12]
|
|
8002b3a: 681b ldr r3, [r3, #0]
|
|
8002b3c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002b40: b29b uxth r3, r3
|
|
8002b42: 461a mov r2, r3
|
|
8002b44: 68bb ldr r3, [r7, #8]
|
|
8002b46: 781b ldrb r3, [r3, #0]
|
|
8002b48: 00db lsls r3, r3, #3
|
|
8002b4a: 4413 add r3, r2
|
|
8002b4c: 3306 adds r3, #6
|
|
8002b4e: 005b lsls r3, r3, #1
|
|
8002b50: 68fa ldr r2, [r7, #12]
|
|
8002b52: 6812 ldr r2, [r2, #0]
|
|
8002b54: 4413 add r3, r2
|
|
8002b56: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8002b5a: 881b ldrh r3, [r3, #0]
|
|
8002b5c: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002b60: 85fb strh r3, [r7, #46] ; 0x2e
|
|
|
|
if (ep->xfer_len >= TxByteNbre)
|
|
8002b62: 68bb ldr r3, [r7, #8]
|
|
8002b64: 699a ldr r2, [r3, #24]
|
|
8002b66: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8002b68: 429a cmp r2, r3
|
|
8002b6a: d306 bcc.n 8002b7a <HAL_PCD_EP_DB_Transmit+0x2c0>
|
|
{
|
|
ep->xfer_len -= TxByteNbre;
|
|
8002b6c: 68bb ldr r3, [r7, #8]
|
|
8002b6e: 699a ldr r2, [r3, #24]
|
|
8002b70: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8002b72: 1ad2 subs r2, r2, r3
|
|
8002b74: 68bb ldr r3, [r7, #8]
|
|
8002b76: 619a str r2, [r3, #24]
|
|
8002b78: e002 b.n 8002b80 <HAL_PCD_EP_DB_Transmit+0x2c6>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
8002b7a: 68bb ldr r3, [r7, #8]
|
|
8002b7c: 2200 movs r2, #0
|
|
8002b7e: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* Transfer is completed */
|
|
if (ep->xfer_len == 0U)
|
|
8002b80: 68bb ldr r3, [r7, #8]
|
|
8002b82: 699b ldr r3, [r3, #24]
|
|
8002b84: 2b00 cmp r3, #0
|
|
8002b86: d12c bne.n 8002be2 <HAL_PCD_EP_DB_Transmit+0x328>
|
|
{
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
8002b88: 68bb ldr r3, [r7, #8]
|
|
8002b8a: 781b ldrb r3, [r3, #0]
|
|
8002b8c: 4619 mov r1, r3
|
|
8002b8e: 68f8 ldr r0, [r7, #12]
|
|
8002b90: f007 fab9 bl 800a106 <HAL_PCD_DataInStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
/*need to Free USB Buff*/
|
|
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
|
|
8002b94: 88fb ldrh r3, [r7, #6]
|
|
8002b96: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8002b9a: 2b00 cmp r3, #0
|
|
8002b9c: f040 80fd bne.w 8002d9a <HAL_PCD_EP_DB_Transmit+0x4e0>
|
|
{
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
|
|
8002ba0: 68fb ldr r3, [r7, #12]
|
|
8002ba2: 681b ldr r3, [r3, #0]
|
|
8002ba4: 461a mov r2, r3
|
|
8002ba6: 68bb ldr r3, [r7, #8]
|
|
8002ba8: 781b ldrb r3, [r3, #0]
|
|
8002baa: 009b lsls r3, r3, #2
|
|
8002bac: 4413 add r3, r2
|
|
8002bae: 881b ldrh r3, [r3, #0]
|
|
8002bb0: b29b uxth r3, r3
|
|
8002bb2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8002bb6: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002bba: 84fb strh r3, [r7, #38] ; 0x26
|
|
8002bbc: 68fb ldr r3, [r7, #12]
|
|
8002bbe: 681b ldr r3, [r3, #0]
|
|
8002bc0: 461a mov r2, r3
|
|
8002bc2: 68bb ldr r3, [r7, #8]
|
|
8002bc4: 781b ldrb r3, [r3, #0]
|
|
8002bc6: 009b lsls r3, r3, #2
|
|
8002bc8: 441a add r2, r3
|
|
8002bca: 8cfb ldrh r3, [r7, #38] ; 0x26
|
|
8002bcc: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8002bd0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002bd4: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8002bd8: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8002bdc: b29b uxth r3, r3
|
|
8002bde: 8013 strh r3, [r2, #0]
|
|
8002be0: e0db b.n 8002d9a <HAL_PCD_EP_DB_Transmit+0x4e0>
|
|
}
|
|
}
|
|
else /* Transfer is not yet Done */
|
|
{
|
|
/* need to Free USB Buff */
|
|
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
|
|
8002be2: 88fb ldrh r3, [r7, #6]
|
|
8002be4: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8002be8: 2b00 cmp r3, #0
|
|
8002bea: d11f bne.n 8002c2c <HAL_PCD_EP_DB_Transmit+0x372>
|
|
{
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
|
|
8002bec: 68fb ldr r3, [r7, #12]
|
|
8002bee: 681b ldr r3, [r3, #0]
|
|
8002bf0: 461a mov r2, r3
|
|
8002bf2: 68bb ldr r3, [r7, #8]
|
|
8002bf4: 781b ldrb r3, [r3, #0]
|
|
8002bf6: 009b lsls r3, r3, #2
|
|
8002bf8: 4413 add r3, r2
|
|
8002bfa: 881b ldrh r3, [r3, #0]
|
|
8002bfc: b29b uxth r3, r3
|
|
8002bfe: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8002c02: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002c06: 85bb strh r3, [r7, #44] ; 0x2c
|
|
8002c08: 68fb ldr r3, [r7, #12]
|
|
8002c0a: 681b ldr r3, [r3, #0]
|
|
8002c0c: 461a mov r2, r3
|
|
8002c0e: 68bb ldr r3, [r7, #8]
|
|
8002c10: 781b ldrb r3, [r3, #0]
|
|
8002c12: 009b lsls r3, r3, #2
|
|
8002c14: 441a add r2, r3
|
|
8002c16: 8dbb ldrh r3, [r7, #44] ; 0x2c
|
|
8002c18: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8002c1c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002c20: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8002c24: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8002c28: b29b uxth r3, r3
|
|
8002c2a: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/* Still there is data to Fill in the next Buffer */
|
|
if (ep->xfer_fill_db == 1U)
|
|
8002c2c: 68bb ldr r3, [r7, #8]
|
|
8002c2e: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
|
|
8002c32: 2b01 cmp r3, #1
|
|
8002c34: f040 80b1 bne.w 8002d9a <HAL_PCD_EP_DB_Transmit+0x4e0>
|
|
{
|
|
ep->xfer_buff += TxByteNbre;
|
|
8002c38: 68bb ldr r3, [r7, #8]
|
|
8002c3a: 695a ldr r2, [r3, #20]
|
|
8002c3c: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8002c3e: 441a add r2, r3
|
|
8002c40: 68bb ldr r3, [r7, #8]
|
|
8002c42: 615a str r2, [r3, #20]
|
|
ep->xfer_count += TxByteNbre;
|
|
8002c44: 68bb ldr r3, [r7, #8]
|
|
8002c46: 69da ldr r2, [r3, #28]
|
|
8002c48: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8002c4a: 441a add r2, r3
|
|
8002c4c: 68bb ldr r3, [r7, #8]
|
|
8002c4e: 61da str r2, [r3, #28]
|
|
|
|
/* Calculate the len of the new buffer to fill */
|
|
if (ep->xfer_len_db >= ep->maxpacket)
|
|
8002c50: 68bb ldr r3, [r7, #8]
|
|
8002c52: 6a1a ldr r2, [r3, #32]
|
|
8002c54: 68bb ldr r3, [r7, #8]
|
|
8002c56: 691b ldr r3, [r3, #16]
|
|
8002c58: 429a cmp r2, r3
|
|
8002c5a: d309 bcc.n 8002c70 <HAL_PCD_EP_DB_Transmit+0x3b6>
|
|
{
|
|
len = ep->maxpacket;
|
|
8002c5c: 68bb ldr r3, [r7, #8]
|
|
8002c5e: 691b ldr r3, [r3, #16]
|
|
8002c60: 63bb str r3, [r7, #56] ; 0x38
|
|
ep->xfer_len_db -= len;
|
|
8002c62: 68bb ldr r3, [r7, #8]
|
|
8002c64: 6a1a ldr r2, [r3, #32]
|
|
8002c66: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002c68: 1ad2 subs r2, r2, r3
|
|
8002c6a: 68bb ldr r3, [r7, #8]
|
|
8002c6c: 621a str r2, [r3, #32]
|
|
8002c6e: e014 b.n 8002c9a <HAL_PCD_EP_DB_Transmit+0x3e0>
|
|
}
|
|
else if (ep->xfer_len_db == 0U)
|
|
8002c70: 68bb ldr r3, [r7, #8]
|
|
8002c72: 6a1b ldr r3, [r3, #32]
|
|
8002c74: 2b00 cmp r3, #0
|
|
8002c76: d106 bne.n 8002c86 <HAL_PCD_EP_DB_Transmit+0x3cc>
|
|
{
|
|
len = TxByteNbre;
|
|
8002c78: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8002c7a: 63bb str r3, [r7, #56] ; 0x38
|
|
ep->xfer_fill_db = 0U;
|
|
8002c7c: 68bb ldr r3, [r7, #8]
|
|
8002c7e: 2200 movs r2, #0
|
|
8002c80: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
8002c84: e009 b.n 8002c9a <HAL_PCD_EP_DB_Transmit+0x3e0>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
8002c86: 68bb ldr r3, [r7, #8]
|
|
8002c88: 6a1b ldr r3, [r3, #32]
|
|
8002c8a: 63bb str r3, [r7, #56] ; 0x38
|
|
ep->xfer_len_db = 0U;
|
|
8002c8c: 68bb ldr r3, [r7, #8]
|
|
8002c8e: 2200 movs r2, #0
|
|
8002c90: 621a str r2, [r3, #32]
|
|
ep->xfer_fill_db = 0;
|
|
8002c92: 68bb ldr r3, [r7, #8]
|
|
8002c94: 2200 movs r2, #0
|
|
8002c96: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
}
|
|
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
|
|
8002c9a: 68fb ldr r3, [r7, #12]
|
|
8002c9c: 681b ldr r3, [r3, #0]
|
|
8002c9e: 637b str r3, [r7, #52] ; 0x34
|
|
8002ca0: 68bb ldr r3, [r7, #8]
|
|
8002ca2: 785b ldrb r3, [r3, #1]
|
|
8002ca4: 2b00 cmp r3, #0
|
|
8002ca6: d155 bne.n 8002d54 <HAL_PCD_EP_DB_Transmit+0x49a>
|
|
8002ca8: 68fb ldr r3, [r7, #12]
|
|
8002caa: 681b ldr r3, [r3, #0]
|
|
8002cac: 647b str r3, [r7, #68] ; 0x44
|
|
8002cae: 68fb ldr r3, [r7, #12]
|
|
8002cb0: 681b ldr r3, [r3, #0]
|
|
8002cb2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002cb6: b29b uxth r3, r3
|
|
8002cb8: 461a mov r2, r3
|
|
8002cba: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8002cbc: 4413 add r3, r2
|
|
8002cbe: 647b str r3, [r7, #68] ; 0x44
|
|
8002cc0: 68bb ldr r3, [r7, #8]
|
|
8002cc2: 781b ldrb r3, [r3, #0]
|
|
8002cc4: 011a lsls r2, r3, #4
|
|
8002cc6: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8002cc8: 4413 add r3, r2
|
|
8002cca: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8002cce: 643b str r3, [r7, #64] ; 0x40
|
|
8002cd0: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002cd2: 2b00 cmp r3, #0
|
|
8002cd4: d112 bne.n 8002cfc <HAL_PCD_EP_DB_Transmit+0x442>
|
|
8002cd6: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8002cd8: 881b ldrh r3, [r3, #0]
|
|
8002cda: b29b uxth r3, r3
|
|
8002cdc: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8002ce0: b29a uxth r2, r3
|
|
8002ce2: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8002ce4: 801a strh r2, [r3, #0]
|
|
8002ce6: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8002ce8: 881b ldrh r3, [r3, #0]
|
|
8002cea: b29b uxth r3, r3
|
|
8002cec: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8002cf0: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8002cf4: b29a uxth r2, r3
|
|
8002cf6: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8002cf8: 801a strh r2, [r3, #0]
|
|
8002cfa: e044 b.n 8002d86 <HAL_PCD_EP_DB_Transmit+0x4cc>
|
|
8002cfc: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002cfe: 2b3e cmp r3, #62 ; 0x3e
|
|
8002d00: d811 bhi.n 8002d26 <HAL_PCD_EP_DB_Transmit+0x46c>
|
|
8002d02: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002d04: 085b lsrs r3, r3, #1
|
|
8002d06: 63fb str r3, [r7, #60] ; 0x3c
|
|
8002d08: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002d0a: f003 0301 and.w r3, r3, #1
|
|
8002d0e: 2b00 cmp r3, #0
|
|
8002d10: d002 beq.n 8002d18 <HAL_PCD_EP_DB_Transmit+0x45e>
|
|
8002d12: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8002d14: 3301 adds r3, #1
|
|
8002d16: 63fb str r3, [r7, #60] ; 0x3c
|
|
8002d18: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8002d1a: b29b uxth r3, r3
|
|
8002d1c: 029b lsls r3, r3, #10
|
|
8002d1e: b29a uxth r2, r3
|
|
8002d20: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8002d22: 801a strh r2, [r3, #0]
|
|
8002d24: e02f b.n 8002d86 <HAL_PCD_EP_DB_Transmit+0x4cc>
|
|
8002d26: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002d28: 095b lsrs r3, r3, #5
|
|
8002d2a: 63fb str r3, [r7, #60] ; 0x3c
|
|
8002d2c: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002d2e: f003 031f and.w r3, r3, #31
|
|
8002d32: 2b00 cmp r3, #0
|
|
8002d34: d102 bne.n 8002d3c <HAL_PCD_EP_DB_Transmit+0x482>
|
|
8002d36: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8002d38: 3b01 subs r3, #1
|
|
8002d3a: 63fb str r3, [r7, #60] ; 0x3c
|
|
8002d3c: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8002d3e: b29b uxth r3, r3
|
|
8002d40: 029b lsls r3, r3, #10
|
|
8002d42: b29b uxth r3, r3
|
|
8002d44: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8002d48: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8002d4c: b29a uxth r2, r3
|
|
8002d4e: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8002d50: 801a strh r2, [r3, #0]
|
|
8002d52: e018 b.n 8002d86 <HAL_PCD_EP_DB_Transmit+0x4cc>
|
|
8002d54: 68bb ldr r3, [r7, #8]
|
|
8002d56: 785b ldrb r3, [r3, #1]
|
|
8002d58: 2b01 cmp r3, #1
|
|
8002d5a: d114 bne.n 8002d86 <HAL_PCD_EP_DB_Transmit+0x4cc>
|
|
8002d5c: 68fb ldr r3, [r7, #12]
|
|
8002d5e: 681b ldr r3, [r3, #0]
|
|
8002d60: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002d64: b29b uxth r3, r3
|
|
8002d66: 461a mov r2, r3
|
|
8002d68: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8002d6a: 4413 add r3, r2
|
|
8002d6c: 637b str r3, [r7, #52] ; 0x34
|
|
8002d6e: 68bb ldr r3, [r7, #8]
|
|
8002d70: 781b ldrb r3, [r3, #0]
|
|
8002d72: 011a lsls r2, r3, #4
|
|
8002d74: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8002d76: 4413 add r3, r2
|
|
8002d78: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8002d7c: 633b str r3, [r7, #48] ; 0x30
|
|
8002d7e: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002d80: b29a uxth r2, r3
|
|
8002d82: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8002d84: 801a strh r2, [r3, #0]
|
|
|
|
/* Copy the user buffer to USB PMA */
|
|
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
|
|
8002d86: 68fb ldr r3, [r7, #12]
|
|
8002d88: 6818 ldr r0, [r3, #0]
|
|
8002d8a: 68bb ldr r3, [r7, #8]
|
|
8002d8c: 6959 ldr r1, [r3, #20]
|
|
8002d8e: 68bb ldr r3, [r7, #8]
|
|
8002d90: 895a ldrh r2, [r3, #10]
|
|
8002d92: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8002d94: b29b uxth r3, r3
|
|
8002d96: f004 fc77 bl 8007688 <USB_WritePMA>
|
|
}
|
|
}
|
|
}
|
|
|
|
/*enable endpoint IN*/
|
|
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
|
|
8002d9a: 68fb ldr r3, [r7, #12]
|
|
8002d9c: 681b ldr r3, [r3, #0]
|
|
8002d9e: 461a mov r2, r3
|
|
8002da0: 68bb ldr r3, [r7, #8]
|
|
8002da2: 781b ldrb r3, [r3, #0]
|
|
8002da4: 009b lsls r3, r3, #2
|
|
8002da6: 4413 add r3, r2
|
|
8002da8: 881b ldrh r3, [r3, #0]
|
|
8002daa: b29b uxth r3, r3
|
|
8002dac: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8002db0: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8002db4: 823b strh r3, [r7, #16]
|
|
8002db6: 8a3b ldrh r3, [r7, #16]
|
|
8002db8: f083 0310 eor.w r3, r3, #16
|
|
8002dbc: 823b strh r3, [r7, #16]
|
|
8002dbe: 8a3b ldrh r3, [r7, #16]
|
|
8002dc0: f083 0320 eor.w r3, r3, #32
|
|
8002dc4: 823b strh r3, [r7, #16]
|
|
8002dc6: 68fb ldr r3, [r7, #12]
|
|
8002dc8: 681b ldr r3, [r3, #0]
|
|
8002dca: 461a mov r2, r3
|
|
8002dcc: 68bb ldr r3, [r7, #8]
|
|
8002dce: 781b ldrb r3, [r3, #0]
|
|
8002dd0: 009b lsls r3, r3, #2
|
|
8002dd2: 441a add r2, r3
|
|
8002dd4: 8a3b ldrh r3, [r7, #16]
|
|
8002dd6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8002dda: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8002dde: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8002de2: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8002de6: b29b uxth r3, r3
|
|
8002de8: 8013 strh r3, [r2, #0]
|
|
|
|
return HAL_OK;
|
|
8002dea: 2300 movs r3, #0
|
|
}
|
|
8002dec: 4618 mov r0, r3
|
|
8002dee: 3748 adds r7, #72 ; 0x48
|
|
8002df0: 46bd mov sp, r7
|
|
8002df2: bd80 pop {r7, pc}
|
|
|
|
08002df4 <HAL_PCDEx_PMAConfig>:
|
|
* @retval HAL status
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
|
|
uint16_t ep_kind, uint32_t pmaadress)
|
|
{
|
|
8002df4: b480 push {r7}
|
|
8002df6: b087 sub sp, #28
|
|
8002df8: af00 add r7, sp, #0
|
|
8002dfa: 60f8 str r0, [r7, #12]
|
|
8002dfc: 607b str r3, [r7, #4]
|
|
8002dfe: 460b mov r3, r1
|
|
8002e00: 817b strh r3, [r7, #10]
|
|
8002e02: 4613 mov r3, r2
|
|
8002e04: 813b strh r3, [r7, #8]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
/* initialize ep structure*/
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
8002e06: 897b ldrh r3, [r7, #10]
|
|
8002e08: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
8002e0c: b29b uxth r3, r3
|
|
8002e0e: 2b00 cmp r3, #0
|
|
8002e10: d00b beq.n 8002e2a <HAL_PCDEx_PMAConfig+0x36>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8002e12: 897b ldrh r3, [r7, #10]
|
|
8002e14: f003 0307 and.w r3, r3, #7
|
|
8002e18: 1c5a adds r2, r3, #1
|
|
8002e1a: 4613 mov r3, r2
|
|
8002e1c: 009b lsls r3, r3, #2
|
|
8002e1e: 4413 add r3, r2
|
|
8002e20: 00db lsls r3, r3, #3
|
|
8002e22: 68fa ldr r2, [r7, #12]
|
|
8002e24: 4413 add r3, r2
|
|
8002e26: 617b str r3, [r7, #20]
|
|
8002e28: e009 b.n 8002e3e <HAL_PCDEx_PMAConfig+0x4a>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr];
|
|
8002e2a: 897a ldrh r2, [r7, #10]
|
|
8002e2c: 4613 mov r3, r2
|
|
8002e2e: 009b lsls r3, r3, #2
|
|
8002e30: 4413 add r3, r2
|
|
8002e32: 00db lsls r3, r3, #3
|
|
8002e34: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
8002e38: 68fa ldr r2, [r7, #12]
|
|
8002e3a: 4413 add r3, r2
|
|
8002e3c: 617b str r3, [r7, #20]
|
|
}
|
|
|
|
/* Here we check if the endpoint is single or double Buffer*/
|
|
if (ep_kind == PCD_SNG_BUF)
|
|
8002e3e: 893b ldrh r3, [r7, #8]
|
|
8002e40: 2b00 cmp r3, #0
|
|
8002e42: d107 bne.n 8002e54 <HAL_PCDEx_PMAConfig+0x60>
|
|
{
|
|
/* Single Buffer */
|
|
ep->doublebuffer = 0U;
|
|
8002e44: 697b ldr r3, [r7, #20]
|
|
8002e46: 2200 movs r2, #0
|
|
8002e48: 731a strb r2, [r3, #12]
|
|
/* Configure the PMA */
|
|
ep->pmaadress = (uint16_t)pmaadress;
|
|
8002e4a: 687b ldr r3, [r7, #4]
|
|
8002e4c: b29a uxth r2, r3
|
|
8002e4e: 697b ldr r3, [r7, #20]
|
|
8002e50: 80da strh r2, [r3, #6]
|
|
8002e52: e00b b.n 8002e6c <HAL_PCDEx_PMAConfig+0x78>
|
|
}
|
|
else /* USB_DBL_BUF */
|
|
{
|
|
/* Double Buffer Endpoint */
|
|
ep->doublebuffer = 1U;
|
|
8002e54: 697b ldr r3, [r7, #20]
|
|
8002e56: 2201 movs r2, #1
|
|
8002e58: 731a strb r2, [r3, #12]
|
|
/* Configure the PMA */
|
|
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
|
|
8002e5a: 687b ldr r3, [r7, #4]
|
|
8002e5c: b29a uxth r2, r3
|
|
8002e5e: 697b ldr r3, [r7, #20]
|
|
8002e60: 811a strh r2, [r3, #8]
|
|
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
|
|
8002e62: 687b ldr r3, [r7, #4]
|
|
8002e64: 0c1b lsrs r3, r3, #16
|
|
8002e66: b29a uxth r2, r3
|
|
8002e68: 697b ldr r3, [r7, #20]
|
|
8002e6a: 815a strh r2, [r3, #10]
|
|
}
|
|
|
|
return HAL_OK;
|
|
8002e6c: 2300 movs r3, #0
|
|
}
|
|
8002e6e: 4618 mov r0, r3
|
|
8002e70: 371c adds r7, #28
|
|
8002e72: 46bd mov sp, r7
|
|
8002e74: bc80 pop {r7}
|
|
8002e76: 4770 bx lr
|
|
|
|
08002e78 <HAL_RCC_OscConfig>:
|
|
* supported by this macro. User should request a transition to HSE Off
|
|
* first and then HSE On or HSE Bypass.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
8002e78: b580 push {r7, lr}
|
|
8002e7a: b086 sub sp, #24
|
|
8002e7c: af00 add r7, sp, #0
|
|
8002e7e: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart;
|
|
uint32_t pll_config;
|
|
|
|
/* Check Null pointer */
|
|
if (RCC_OscInitStruct == NULL)
|
|
8002e80: 687b ldr r3, [r7, #4]
|
|
8002e82: 2b00 cmp r3, #0
|
|
8002e84: d101 bne.n 8002e8a <HAL_RCC_OscConfig+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8002e86: 2301 movs r3, #1
|
|
8002e88: e26c b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
8002e8a: 687b ldr r3, [r7, #4]
|
|
8002e8c: 681b ldr r3, [r3, #0]
|
|
8002e8e: f003 0301 and.w r3, r3, #1
|
|
8002e92: 2b00 cmp r3, #0
|
|
8002e94: f000 8087 beq.w 8002fa6 <HAL_RCC_OscConfig+0x12e>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
|
8002e98: 4b92 ldr r3, [pc, #584] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002e9a: 685b ldr r3, [r3, #4]
|
|
8002e9c: f003 030c and.w r3, r3, #12
|
|
8002ea0: 2b04 cmp r3, #4
|
|
8002ea2: d00c beq.n 8002ebe <HAL_RCC_OscConfig+0x46>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
|
8002ea4: 4b8f ldr r3, [pc, #572] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002ea6: 685b ldr r3, [r3, #4]
|
|
8002ea8: f003 030c and.w r3, r3, #12
|
|
8002eac: 2b08 cmp r3, #8
|
|
8002eae: d112 bne.n 8002ed6 <HAL_RCC_OscConfig+0x5e>
|
|
8002eb0: 4b8c ldr r3, [pc, #560] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002eb2: 685b ldr r3, [r3, #4]
|
|
8002eb4: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8002eb8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
|
8002ebc: d10b bne.n 8002ed6 <HAL_RCC_OscConfig+0x5e>
|
|
{
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8002ebe: 4b89 ldr r3, [pc, #548] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002ec0: 681b ldr r3, [r3, #0]
|
|
8002ec2: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8002ec6: 2b00 cmp r3, #0
|
|
8002ec8: d06c beq.n 8002fa4 <HAL_RCC_OscConfig+0x12c>
|
|
8002eca: 687b ldr r3, [r7, #4]
|
|
8002ecc: 685b ldr r3, [r3, #4]
|
|
8002ece: 2b00 cmp r3, #0
|
|
8002ed0: d168 bne.n 8002fa4 <HAL_RCC_OscConfig+0x12c>
|
|
{
|
|
return HAL_ERROR;
|
|
8002ed2: 2301 movs r3, #1
|
|
8002ed4: e246 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
8002ed6: 687b ldr r3, [r7, #4]
|
|
8002ed8: 685b ldr r3, [r3, #4]
|
|
8002eda: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
|
8002ede: d106 bne.n 8002eee <HAL_RCC_OscConfig+0x76>
|
|
8002ee0: 4b80 ldr r3, [pc, #512] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002ee2: 681b ldr r3, [r3, #0]
|
|
8002ee4: 4a7f ldr r2, [pc, #508] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002ee6: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
|
8002eea: 6013 str r3, [r2, #0]
|
|
8002eec: e02e b.n 8002f4c <HAL_RCC_OscConfig+0xd4>
|
|
8002eee: 687b ldr r3, [r7, #4]
|
|
8002ef0: 685b ldr r3, [r3, #4]
|
|
8002ef2: 2b00 cmp r3, #0
|
|
8002ef4: d10c bne.n 8002f10 <HAL_RCC_OscConfig+0x98>
|
|
8002ef6: 4b7b ldr r3, [pc, #492] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002ef8: 681b ldr r3, [r3, #0]
|
|
8002efa: 4a7a ldr r2, [pc, #488] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002efc: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
|
8002f00: 6013 str r3, [r2, #0]
|
|
8002f02: 4b78 ldr r3, [pc, #480] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f04: 681b ldr r3, [r3, #0]
|
|
8002f06: 4a77 ldr r2, [pc, #476] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f08: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
|
8002f0c: 6013 str r3, [r2, #0]
|
|
8002f0e: e01d b.n 8002f4c <HAL_RCC_OscConfig+0xd4>
|
|
8002f10: 687b ldr r3, [r7, #4]
|
|
8002f12: 685b ldr r3, [r3, #4]
|
|
8002f14: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
|
8002f18: d10c bne.n 8002f34 <HAL_RCC_OscConfig+0xbc>
|
|
8002f1a: 4b72 ldr r3, [pc, #456] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f1c: 681b ldr r3, [r3, #0]
|
|
8002f1e: 4a71 ldr r2, [pc, #452] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f20: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
|
8002f24: 6013 str r3, [r2, #0]
|
|
8002f26: 4b6f ldr r3, [pc, #444] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f28: 681b ldr r3, [r3, #0]
|
|
8002f2a: 4a6e ldr r2, [pc, #440] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f2c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
|
8002f30: 6013 str r3, [r2, #0]
|
|
8002f32: e00b b.n 8002f4c <HAL_RCC_OscConfig+0xd4>
|
|
8002f34: 4b6b ldr r3, [pc, #428] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f36: 681b ldr r3, [r3, #0]
|
|
8002f38: 4a6a ldr r2, [pc, #424] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f3a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
|
8002f3e: 6013 str r3, [r2, #0]
|
|
8002f40: 4b68 ldr r3, [pc, #416] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f42: 681b ldr r3, [r3, #0]
|
|
8002f44: 4a67 ldr r2, [pc, #412] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f46: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
|
8002f4a: 6013 str r3, [r2, #0]
|
|
|
|
|
|
/* Check the HSE State */
|
|
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
|
8002f4c: 687b ldr r3, [r7, #4]
|
|
8002f4e: 685b ldr r3, [r3, #4]
|
|
8002f50: 2b00 cmp r3, #0
|
|
8002f52: d013 beq.n 8002f7c <HAL_RCC_OscConfig+0x104>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002f54: f7fd fcfe bl 8000954 <HAL_GetTick>
|
|
8002f58: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8002f5a: e008 b.n 8002f6e <HAL_RCC_OscConfig+0xf6>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
|
8002f5c: f7fd fcfa bl 8000954 <HAL_GetTick>
|
|
8002f60: 4602 mov r2, r0
|
|
8002f62: 693b ldr r3, [r7, #16]
|
|
8002f64: 1ad3 subs r3, r2, r3
|
|
8002f66: 2b64 cmp r3, #100 ; 0x64
|
|
8002f68: d901 bls.n 8002f6e <HAL_RCC_OscConfig+0xf6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002f6a: 2303 movs r3, #3
|
|
8002f6c: e1fa b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8002f6e: 4b5d ldr r3, [pc, #372] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f70: 681b ldr r3, [r3, #0]
|
|
8002f72: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8002f76: 2b00 cmp r3, #0
|
|
8002f78: d0f0 beq.n 8002f5c <HAL_RCC_OscConfig+0xe4>
|
|
8002f7a: e014 b.n 8002fa6 <HAL_RCC_OscConfig+0x12e>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002f7c: f7fd fcea bl 8000954 <HAL_GetTick>
|
|
8002f80: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSE is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8002f82: e008 b.n 8002f96 <HAL_RCC_OscConfig+0x11e>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
|
8002f84: f7fd fce6 bl 8000954 <HAL_GetTick>
|
|
8002f88: 4602 mov r2, r0
|
|
8002f8a: 693b ldr r3, [r7, #16]
|
|
8002f8c: 1ad3 subs r3, r2, r3
|
|
8002f8e: 2b64 cmp r3, #100 ; 0x64
|
|
8002f90: d901 bls.n 8002f96 <HAL_RCC_OscConfig+0x11e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002f92: 2303 movs r3, #3
|
|
8002f94: e1e6 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8002f96: 4b53 ldr r3, [pc, #332] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002f98: 681b ldr r3, [r3, #0]
|
|
8002f9a: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8002f9e: 2b00 cmp r3, #0
|
|
8002fa0: d1f0 bne.n 8002f84 <HAL_RCC_OscConfig+0x10c>
|
|
8002fa2: e000 b.n 8002fa6 <HAL_RCC_OscConfig+0x12e>
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8002fa4: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
8002fa6: 687b ldr r3, [r7, #4]
|
|
8002fa8: 681b ldr r3, [r3, #0]
|
|
8002faa: f003 0302 and.w r3, r3, #2
|
|
8002fae: 2b00 cmp r3, #0
|
|
8002fb0: d063 beq.n 800307a <HAL_RCC_OscConfig+0x202>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
|
8002fb2: 4b4c ldr r3, [pc, #304] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002fb4: 685b ldr r3, [r3, #4]
|
|
8002fb6: f003 030c and.w r3, r3, #12
|
|
8002fba: 2b00 cmp r3, #0
|
|
8002fbc: d00b beq.n 8002fd6 <HAL_RCC_OscConfig+0x15e>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
|
8002fbe: 4b49 ldr r3, [pc, #292] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002fc0: 685b ldr r3, [r3, #4]
|
|
8002fc2: f003 030c and.w r3, r3, #12
|
|
8002fc6: 2b08 cmp r3, #8
|
|
8002fc8: d11c bne.n 8003004 <HAL_RCC_OscConfig+0x18c>
|
|
8002fca: 4b46 ldr r3, [pc, #280] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002fcc: 685b ldr r3, [r3, #4]
|
|
8002fce: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8002fd2: 2b00 cmp r3, #0
|
|
8002fd4: d116 bne.n 8003004 <HAL_RCC_OscConfig+0x18c>
|
|
{
|
|
/* When HSI is used as system clock it will not disabled */
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
8002fd6: 4b43 ldr r3, [pc, #268] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002fd8: 681b ldr r3, [r3, #0]
|
|
8002fda: f003 0302 and.w r3, r3, #2
|
|
8002fde: 2b00 cmp r3, #0
|
|
8002fe0: d005 beq.n 8002fee <HAL_RCC_OscConfig+0x176>
|
|
8002fe2: 687b ldr r3, [r7, #4]
|
|
8002fe4: 691b ldr r3, [r3, #16]
|
|
8002fe6: 2b01 cmp r3, #1
|
|
8002fe8: d001 beq.n 8002fee <HAL_RCC_OscConfig+0x176>
|
|
{
|
|
return HAL_ERROR;
|
|
8002fea: 2301 movs r3, #1
|
|
8002fec: e1ba b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
/* Otherwise, just the calibration is allowed */
|
|
else
|
|
{
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8002fee: 4b3d ldr r3, [pc, #244] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002ff0: 681b ldr r3, [r3, #0]
|
|
8002ff2: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
|
8002ff6: 687b ldr r3, [r7, #4]
|
|
8002ff8: 695b ldr r3, [r3, #20]
|
|
8002ffa: 00db lsls r3, r3, #3
|
|
8002ffc: 4939 ldr r1, [pc, #228] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002ffe: 4313 orrs r3, r2
|
|
8003000: 600b str r3, [r1, #0]
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
8003002: e03a b.n 800307a <HAL_RCC_OscConfig+0x202>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
|
8003004: 687b ldr r3, [r7, #4]
|
|
8003006: 691b ldr r3, [r3, #16]
|
|
8003008: 2b00 cmp r3, #0
|
|
800300a: d020 beq.n 800304e <HAL_RCC_OscConfig+0x1d6>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
800300c: 4b36 ldr r3, [pc, #216] ; (80030e8 <HAL_RCC_OscConfig+0x270>)
|
|
800300e: 2201 movs r2, #1
|
|
8003010: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003012: f7fd fc9f bl 8000954 <HAL_GetTick>
|
|
8003016: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSI is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8003018: e008 b.n 800302c <HAL_RCC_OscConfig+0x1b4>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
|
800301a: f7fd fc9b bl 8000954 <HAL_GetTick>
|
|
800301e: 4602 mov r2, r0
|
|
8003020: 693b ldr r3, [r7, #16]
|
|
8003022: 1ad3 subs r3, r2, r3
|
|
8003024: 2b02 cmp r3, #2
|
|
8003026: d901 bls.n 800302c <HAL_RCC_OscConfig+0x1b4>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003028: 2303 movs r3, #3
|
|
800302a: e19b b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
800302c: 4b2d ldr r3, [pc, #180] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
800302e: 681b ldr r3, [r3, #0]
|
|
8003030: f003 0302 and.w r3, r3, #2
|
|
8003034: 2b00 cmp r3, #0
|
|
8003036: d0f0 beq.n 800301a <HAL_RCC_OscConfig+0x1a2>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8003038: 4b2a ldr r3, [pc, #168] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
800303a: 681b ldr r3, [r3, #0]
|
|
800303c: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
|
8003040: 687b ldr r3, [r7, #4]
|
|
8003042: 695b ldr r3, [r3, #20]
|
|
8003044: 00db lsls r3, r3, #3
|
|
8003046: 4927 ldr r1, [pc, #156] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8003048: 4313 orrs r3, r2
|
|
800304a: 600b str r3, [r1, #0]
|
|
800304c: e015 b.n 800307a <HAL_RCC_OscConfig+0x202>
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_DISABLE();
|
|
800304e: 4b26 ldr r3, [pc, #152] ; (80030e8 <HAL_RCC_OscConfig+0x270>)
|
|
8003050: 2200 movs r2, #0
|
|
8003052: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003054: f7fd fc7e bl 8000954 <HAL_GetTick>
|
|
8003058: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSI is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
800305a: e008 b.n 800306e <HAL_RCC_OscConfig+0x1f6>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
|
800305c: f7fd fc7a bl 8000954 <HAL_GetTick>
|
|
8003060: 4602 mov r2, r0
|
|
8003062: 693b ldr r3, [r7, #16]
|
|
8003064: 1ad3 subs r3, r2, r3
|
|
8003066: 2b02 cmp r3, #2
|
|
8003068: d901 bls.n 800306e <HAL_RCC_OscConfig+0x1f6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800306a: 2303 movs r3, #3
|
|
800306c: e17a b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
800306e: 4b1d ldr r3, [pc, #116] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
8003070: 681b ldr r3, [r3, #0]
|
|
8003072: f003 0302 and.w r3, r3, #2
|
|
8003076: 2b00 cmp r3, #0
|
|
8003078: d1f0 bne.n 800305c <HAL_RCC_OscConfig+0x1e4>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
800307a: 687b ldr r3, [r7, #4]
|
|
800307c: 681b ldr r3, [r3, #0]
|
|
800307e: f003 0308 and.w r3, r3, #8
|
|
8003082: 2b00 cmp r3, #0
|
|
8003084: d03a beq.n 80030fc <HAL_RCC_OscConfig+0x284>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
|
8003086: 687b ldr r3, [r7, #4]
|
|
8003088: 699b ldr r3, [r3, #24]
|
|
800308a: 2b00 cmp r3, #0
|
|
800308c: d019 beq.n 80030c2 <HAL_RCC_OscConfig+0x24a>
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
800308e: 4b17 ldr r3, [pc, #92] ; (80030ec <HAL_RCC_OscConfig+0x274>)
|
|
8003090: 2201 movs r2, #1
|
|
8003092: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003094: f7fd fc5e bl 8000954 <HAL_GetTick>
|
|
8003098: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSI is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
800309a: e008 b.n 80030ae <HAL_RCC_OscConfig+0x236>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
|
800309c: f7fd fc5a bl 8000954 <HAL_GetTick>
|
|
80030a0: 4602 mov r2, r0
|
|
80030a2: 693b ldr r3, [r7, #16]
|
|
80030a4: 1ad3 subs r3, r2, r3
|
|
80030a6: 2b02 cmp r3, #2
|
|
80030a8: d901 bls.n 80030ae <HAL_RCC_OscConfig+0x236>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80030aa: 2303 movs r3, #3
|
|
80030ac: e15a b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
80030ae: 4b0d ldr r3, [pc, #52] ; (80030e4 <HAL_RCC_OscConfig+0x26c>)
|
|
80030b0: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80030b2: f003 0302 and.w r3, r3, #2
|
|
80030b6: 2b00 cmp r3, #0
|
|
80030b8: d0f0 beq.n 800309c <HAL_RCC_OscConfig+0x224>
|
|
}
|
|
}
|
|
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
|
should be added.*/
|
|
RCC_Delay(1);
|
|
80030ba: 2001 movs r0, #1
|
|
80030bc: f000 fac8 bl 8003650 <RCC_Delay>
|
|
80030c0: e01c b.n 80030fc <HAL_RCC_OscConfig+0x284>
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
80030c2: 4b0a ldr r3, [pc, #40] ; (80030ec <HAL_RCC_OscConfig+0x274>)
|
|
80030c4: 2200 movs r2, #0
|
|
80030c6: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80030c8: f7fd fc44 bl 8000954 <HAL_GetTick>
|
|
80030cc: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSI is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
80030ce: e00f b.n 80030f0 <HAL_RCC_OscConfig+0x278>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
|
80030d0: f7fd fc40 bl 8000954 <HAL_GetTick>
|
|
80030d4: 4602 mov r2, r0
|
|
80030d6: 693b ldr r3, [r7, #16]
|
|
80030d8: 1ad3 subs r3, r2, r3
|
|
80030da: 2b02 cmp r3, #2
|
|
80030dc: d908 bls.n 80030f0 <HAL_RCC_OscConfig+0x278>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80030de: 2303 movs r3, #3
|
|
80030e0: e140 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
80030e2: bf00 nop
|
|
80030e4: 40021000 .word 0x40021000
|
|
80030e8: 42420000 .word 0x42420000
|
|
80030ec: 42420480 .word 0x42420480
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
80030f0: 4b9e ldr r3, [pc, #632] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80030f2: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80030f4: f003 0302 and.w r3, r3, #2
|
|
80030f8: 2b00 cmp r3, #0
|
|
80030fa: d1e9 bne.n 80030d0 <HAL_RCC_OscConfig+0x258>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
80030fc: 687b ldr r3, [r7, #4]
|
|
80030fe: 681b ldr r3, [r3, #0]
|
|
8003100: f003 0304 and.w r3, r3, #4
|
|
8003104: 2b00 cmp r3, #0
|
|
8003106: f000 80a6 beq.w 8003256 <HAL_RCC_OscConfig+0x3de>
|
|
{
|
|
FlagStatus pwrclkchanged = RESET;
|
|
800310a: 2300 movs r3, #0
|
|
800310c: 75fb strb r3, [r7, #23]
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
800310e: 4b97 ldr r3, [pc, #604] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003110: 69db ldr r3, [r3, #28]
|
|
8003112: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8003116: 2b00 cmp r3, #0
|
|
8003118: d10d bne.n 8003136 <HAL_RCC_OscConfig+0x2be>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
800311a: 4b94 ldr r3, [pc, #592] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
800311c: 69db ldr r3, [r3, #28]
|
|
800311e: 4a93 ldr r2, [pc, #588] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003120: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
8003124: 61d3 str r3, [r2, #28]
|
|
8003126: 4b91 ldr r3, [pc, #580] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003128: 69db ldr r3, [r3, #28]
|
|
800312a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
800312e: 60bb str r3, [r7, #8]
|
|
8003130: 68bb ldr r3, [r7, #8]
|
|
pwrclkchanged = SET;
|
|
8003132: 2301 movs r3, #1
|
|
8003134: 75fb strb r3, [r7, #23]
|
|
}
|
|
|
|
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8003136: 4b8e ldr r3, [pc, #568] ; (8003370 <HAL_RCC_OscConfig+0x4f8>)
|
|
8003138: 681b ldr r3, [r3, #0]
|
|
800313a: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
800313e: 2b00 cmp r3, #0
|
|
8003140: d118 bne.n 8003174 <HAL_RCC_OscConfig+0x2fc>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8003142: 4b8b ldr r3, [pc, #556] ; (8003370 <HAL_RCC_OscConfig+0x4f8>)
|
|
8003144: 681b ldr r3, [r3, #0]
|
|
8003146: 4a8a ldr r2, [pc, #552] ; (8003370 <HAL_RCC_OscConfig+0x4f8>)
|
|
8003148: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
800314c: 6013 str r3, [r2, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
800314e: f7fd fc01 bl 8000954 <HAL_GetTick>
|
|
8003152: 6138 str r0, [r7, #16]
|
|
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8003154: e008 b.n 8003168 <HAL_RCC_OscConfig+0x2f0>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8003156: f7fd fbfd bl 8000954 <HAL_GetTick>
|
|
800315a: 4602 mov r2, r0
|
|
800315c: 693b ldr r3, [r7, #16]
|
|
800315e: 1ad3 subs r3, r2, r3
|
|
8003160: 2b64 cmp r3, #100 ; 0x64
|
|
8003162: d901 bls.n 8003168 <HAL_RCC_OscConfig+0x2f0>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003164: 2303 movs r3, #3
|
|
8003166: e0fd b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8003168: 4b81 ldr r3, [pc, #516] ; (8003370 <HAL_RCC_OscConfig+0x4f8>)
|
|
800316a: 681b ldr r3, [r3, #0]
|
|
800316c: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8003170: 2b00 cmp r3, #0
|
|
8003172: d0f0 beq.n 8003156 <HAL_RCC_OscConfig+0x2de>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8003174: 687b ldr r3, [r7, #4]
|
|
8003176: 68db ldr r3, [r3, #12]
|
|
8003178: 2b01 cmp r3, #1
|
|
800317a: d106 bne.n 800318a <HAL_RCC_OscConfig+0x312>
|
|
800317c: 4b7b ldr r3, [pc, #492] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
800317e: 6a1b ldr r3, [r3, #32]
|
|
8003180: 4a7a ldr r2, [pc, #488] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003182: f043 0301 orr.w r3, r3, #1
|
|
8003186: 6213 str r3, [r2, #32]
|
|
8003188: e02d b.n 80031e6 <HAL_RCC_OscConfig+0x36e>
|
|
800318a: 687b ldr r3, [r7, #4]
|
|
800318c: 68db ldr r3, [r3, #12]
|
|
800318e: 2b00 cmp r3, #0
|
|
8003190: d10c bne.n 80031ac <HAL_RCC_OscConfig+0x334>
|
|
8003192: 4b76 ldr r3, [pc, #472] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003194: 6a1b ldr r3, [r3, #32]
|
|
8003196: 4a75 ldr r2, [pc, #468] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003198: f023 0301 bic.w r3, r3, #1
|
|
800319c: 6213 str r3, [r2, #32]
|
|
800319e: 4b73 ldr r3, [pc, #460] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031a0: 6a1b ldr r3, [r3, #32]
|
|
80031a2: 4a72 ldr r2, [pc, #456] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031a4: f023 0304 bic.w r3, r3, #4
|
|
80031a8: 6213 str r3, [r2, #32]
|
|
80031aa: e01c b.n 80031e6 <HAL_RCC_OscConfig+0x36e>
|
|
80031ac: 687b ldr r3, [r7, #4]
|
|
80031ae: 68db ldr r3, [r3, #12]
|
|
80031b0: 2b05 cmp r3, #5
|
|
80031b2: d10c bne.n 80031ce <HAL_RCC_OscConfig+0x356>
|
|
80031b4: 4b6d ldr r3, [pc, #436] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031b6: 6a1b ldr r3, [r3, #32]
|
|
80031b8: 4a6c ldr r2, [pc, #432] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031ba: f043 0304 orr.w r3, r3, #4
|
|
80031be: 6213 str r3, [r2, #32]
|
|
80031c0: 4b6a ldr r3, [pc, #424] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031c2: 6a1b ldr r3, [r3, #32]
|
|
80031c4: 4a69 ldr r2, [pc, #420] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031c6: f043 0301 orr.w r3, r3, #1
|
|
80031ca: 6213 str r3, [r2, #32]
|
|
80031cc: e00b b.n 80031e6 <HAL_RCC_OscConfig+0x36e>
|
|
80031ce: 4b67 ldr r3, [pc, #412] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031d0: 6a1b ldr r3, [r3, #32]
|
|
80031d2: 4a66 ldr r2, [pc, #408] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031d4: f023 0301 bic.w r3, r3, #1
|
|
80031d8: 6213 str r3, [r2, #32]
|
|
80031da: 4b64 ldr r3, [pc, #400] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031dc: 6a1b ldr r3, [r3, #32]
|
|
80031de: 4a63 ldr r2, [pc, #396] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80031e0: f023 0304 bic.w r3, r3, #4
|
|
80031e4: 6213 str r3, [r2, #32]
|
|
/* Check the LSE State */
|
|
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
|
80031e6: 687b ldr r3, [r7, #4]
|
|
80031e8: 68db ldr r3, [r3, #12]
|
|
80031ea: 2b00 cmp r3, #0
|
|
80031ec: d015 beq.n 800321a <HAL_RCC_OscConfig+0x3a2>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80031ee: f7fd fbb1 bl 8000954 <HAL_GetTick>
|
|
80031f2: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
80031f4: e00a b.n 800320c <HAL_RCC_OscConfig+0x394>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
80031f6: f7fd fbad bl 8000954 <HAL_GetTick>
|
|
80031fa: 4602 mov r2, r0
|
|
80031fc: 693b ldr r3, [r7, #16]
|
|
80031fe: 1ad3 subs r3, r2, r3
|
|
8003200: f241 3288 movw r2, #5000 ; 0x1388
|
|
8003204: 4293 cmp r3, r2
|
|
8003206: d901 bls.n 800320c <HAL_RCC_OscConfig+0x394>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003208: 2303 movs r3, #3
|
|
800320a: e0ab b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
800320c: 4b57 ldr r3, [pc, #348] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
800320e: 6a1b ldr r3, [r3, #32]
|
|
8003210: f003 0302 and.w r3, r3, #2
|
|
8003214: 2b00 cmp r3, #0
|
|
8003216: d0ee beq.n 80031f6 <HAL_RCC_OscConfig+0x37e>
|
|
8003218: e014 b.n 8003244 <HAL_RCC_OscConfig+0x3cc>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800321a: f7fd fb9b bl 8000954 <HAL_GetTick>
|
|
800321e: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8003220: e00a b.n 8003238 <HAL_RCC_OscConfig+0x3c0>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
8003222: f7fd fb97 bl 8000954 <HAL_GetTick>
|
|
8003226: 4602 mov r2, r0
|
|
8003228: 693b ldr r3, [r7, #16]
|
|
800322a: 1ad3 subs r3, r2, r3
|
|
800322c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8003230: 4293 cmp r3, r2
|
|
8003232: d901 bls.n 8003238 <HAL_RCC_OscConfig+0x3c0>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003234: 2303 movs r3, #3
|
|
8003236: e095 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8003238: 4b4c ldr r3, [pc, #304] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
800323a: 6a1b ldr r3, [r3, #32]
|
|
800323c: f003 0302 and.w r3, r3, #2
|
|
8003240: 2b00 cmp r3, #0
|
|
8003242: d1ee bne.n 8003222 <HAL_RCC_OscConfig+0x3aa>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if (pwrclkchanged == SET)
|
|
8003244: 7dfb ldrb r3, [r7, #23]
|
|
8003246: 2b01 cmp r3, #1
|
|
8003248: d105 bne.n 8003256 <HAL_RCC_OscConfig+0x3de>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
800324a: 4b48 ldr r3, [pc, #288] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
800324c: 69db ldr r3, [r3, #28]
|
|
800324e: 4a47 ldr r2, [pc, #284] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003250: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
|
8003254: 61d3 str r3, [r2, #28]
|
|
|
|
#endif /* RCC_CR_PLL2ON */
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
8003256: 687b ldr r3, [r7, #4]
|
|
8003258: 69db ldr r3, [r3, #28]
|
|
800325a: 2b00 cmp r3, #0
|
|
800325c: f000 8081 beq.w 8003362 <HAL_RCC_OscConfig+0x4ea>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
|
8003260: 4b42 ldr r3, [pc, #264] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003262: 685b ldr r3, [r3, #4]
|
|
8003264: f003 030c and.w r3, r3, #12
|
|
8003268: 2b08 cmp r3, #8
|
|
800326a: d061 beq.n 8003330 <HAL_RCC_OscConfig+0x4b8>
|
|
{
|
|
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
800326c: 687b ldr r3, [r7, #4]
|
|
800326e: 69db ldr r3, [r3, #28]
|
|
8003270: 2b02 cmp r3, #2
|
|
8003272: d146 bne.n 8003302 <HAL_RCC_OscConfig+0x48a>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
|
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
|
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8003274: 4b3f ldr r3, [pc, #252] ; (8003374 <HAL_RCC_OscConfig+0x4fc>)
|
|
8003276: 2200 movs r2, #0
|
|
8003278: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800327a: f7fd fb6b bl 8000954 <HAL_GetTick>
|
|
800327e: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8003280: e008 b.n 8003294 <HAL_RCC_OscConfig+0x41c>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
8003282: f7fd fb67 bl 8000954 <HAL_GetTick>
|
|
8003286: 4602 mov r2, r0
|
|
8003288: 693b ldr r3, [r7, #16]
|
|
800328a: 1ad3 subs r3, r2, r3
|
|
800328c: 2b02 cmp r3, #2
|
|
800328e: d901 bls.n 8003294 <HAL_RCC_OscConfig+0x41c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003290: 2303 movs r3, #3
|
|
8003292: e067 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8003294: 4b35 ldr r3, [pc, #212] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003296: 681b ldr r3, [r3, #0]
|
|
8003298: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
800329c: 2b00 cmp r3, #0
|
|
800329e: d1f0 bne.n 8003282 <HAL_RCC_OscConfig+0x40a>
|
|
}
|
|
}
|
|
|
|
/* Configure the HSE prediv factor --------------------------------*/
|
|
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
|
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
|
80032a0: 687b ldr r3, [r7, #4]
|
|
80032a2: 6a1b ldr r3, [r3, #32]
|
|
80032a4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
|
80032a8: d108 bne.n 80032bc <HAL_RCC_OscConfig+0x444>
|
|
/* Set PREDIV1 source */
|
|
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
|
#endif /* RCC_CFGR2_PREDIV1SRC */
|
|
|
|
/* Set PREDIV1 Value */
|
|
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
|
80032aa: 4b30 ldr r3, [pc, #192] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80032ac: 685b ldr r3, [r3, #4]
|
|
80032ae: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
|
80032b2: 687b ldr r3, [r7, #4]
|
|
80032b4: 689b ldr r3, [r3, #8]
|
|
80032b6: 492d ldr r1, [pc, #180] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80032b8: 4313 orrs r3, r2
|
|
80032ba: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/* Configure the main PLL clock source and multiplication factors. */
|
|
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
|
80032bc: 4b2b ldr r3, [pc, #172] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80032be: 685b ldr r3, [r3, #4]
|
|
80032c0: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
|
80032c4: 687b ldr r3, [r7, #4]
|
|
80032c6: 6a19 ldr r1, [r3, #32]
|
|
80032c8: 687b ldr r3, [r7, #4]
|
|
80032ca: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80032cc: 430b orrs r3, r1
|
|
80032ce: 4927 ldr r1, [pc, #156] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80032d0: 4313 orrs r3, r2
|
|
80032d2: 604b str r3, [r1, #4]
|
|
RCC_OscInitStruct->PLL.PLLMUL);
|
|
/* Enable the main PLL. */
|
|
__HAL_RCC_PLL_ENABLE();
|
|
80032d4: 4b27 ldr r3, [pc, #156] ; (8003374 <HAL_RCC_OscConfig+0x4fc>)
|
|
80032d6: 2201 movs r2, #1
|
|
80032d8: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80032da: f7fd fb3b bl 8000954 <HAL_GetTick>
|
|
80032de: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80032e0: e008 b.n 80032f4 <HAL_RCC_OscConfig+0x47c>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
80032e2: f7fd fb37 bl 8000954 <HAL_GetTick>
|
|
80032e6: 4602 mov r2, r0
|
|
80032e8: 693b ldr r3, [r7, #16]
|
|
80032ea: 1ad3 subs r3, r2, r3
|
|
80032ec: 2b02 cmp r3, #2
|
|
80032ee: d901 bls.n 80032f4 <HAL_RCC_OscConfig+0x47c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80032f0: 2303 movs r3, #3
|
|
80032f2: e037 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80032f4: 4b1d ldr r3, [pc, #116] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
80032f6: 681b ldr r3, [r3, #0]
|
|
80032f8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
80032fc: 2b00 cmp r3, #0
|
|
80032fe: d0f0 beq.n 80032e2 <HAL_RCC_OscConfig+0x46a>
|
|
8003300: e02f b.n 8003362 <HAL_RCC_OscConfig+0x4ea>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8003302: 4b1c ldr r3, [pc, #112] ; (8003374 <HAL_RCC_OscConfig+0x4fc>)
|
|
8003304: 2200 movs r2, #0
|
|
8003306: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003308: f7fd fb24 bl 8000954 <HAL_GetTick>
|
|
800330c: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
800330e: e008 b.n 8003322 <HAL_RCC_OscConfig+0x4aa>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
8003310: f7fd fb20 bl 8000954 <HAL_GetTick>
|
|
8003314: 4602 mov r2, r0
|
|
8003316: 693b ldr r3, [r7, #16]
|
|
8003318: 1ad3 subs r3, r2, r3
|
|
800331a: 2b02 cmp r3, #2
|
|
800331c: d901 bls.n 8003322 <HAL_RCC_OscConfig+0x4aa>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800331e: 2303 movs r3, #3
|
|
8003320: e020 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8003322: 4b12 ldr r3, [pc, #72] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
8003324: 681b ldr r3, [r3, #0]
|
|
8003326: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
800332a: 2b00 cmp r3, #0
|
|
800332c: d1f0 bne.n 8003310 <HAL_RCC_OscConfig+0x498>
|
|
800332e: e018 b.n 8003362 <HAL_RCC_OscConfig+0x4ea>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check if there is a request to disable the PLL used as System clock source */
|
|
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
8003330: 687b ldr r3, [r7, #4]
|
|
8003332: 69db ldr r3, [r3, #28]
|
|
8003334: 2b01 cmp r3, #1
|
|
8003336: d101 bne.n 800333c <HAL_RCC_OscConfig+0x4c4>
|
|
{
|
|
return HAL_ERROR;
|
|
8003338: 2301 movs r3, #1
|
|
800333a: e013 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
else
|
|
{
|
|
/* Do not return HAL_ERROR if request repeats the current configuration */
|
|
pll_config = RCC->CFGR;
|
|
800333c: 4b0b ldr r3, [pc, #44] ; (800336c <HAL_RCC_OscConfig+0x4f4>)
|
|
800333e: 685b ldr r3, [r3, #4]
|
|
8003340: 60fb str r3, [r7, #12]
|
|
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8003342: 68fb ldr r3, [r7, #12]
|
|
8003344: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
|
8003348: 687b ldr r3, [r7, #4]
|
|
800334a: 6a1b ldr r3, [r3, #32]
|
|
800334c: 429a cmp r2, r3
|
|
800334e: d106 bne.n 800335e <HAL_RCC_OscConfig+0x4e6>
|
|
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
|
8003350: 68fb ldr r3, [r7, #12]
|
|
8003352: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
|
8003356: 687b ldr r3, [r7, #4]
|
|
8003358: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
800335a: 429a cmp r2, r3
|
|
800335c: d001 beq.n 8003362 <HAL_RCC_OscConfig+0x4ea>
|
|
{
|
|
return HAL_ERROR;
|
|
800335e: 2301 movs r3, #1
|
|
8003360: e000 b.n 8003364 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8003362: 2300 movs r3, #0
|
|
}
|
|
8003364: 4618 mov r0, r3
|
|
8003366: 3718 adds r7, #24
|
|
8003368: 46bd mov sp, r7
|
|
800336a: bd80 pop {r7, pc}
|
|
800336c: 40021000 .word 0x40021000
|
|
8003370: 40007000 .word 0x40007000
|
|
8003374: 42420060 .word 0x42420060
|
|
|
|
08003378 <HAL_RCC_ClockConfig>:
|
|
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
|
* currently used as system clock source.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
|
{
|
|
8003378: b580 push {r7, lr}
|
|
800337a: b084 sub sp, #16
|
|
800337c: af00 add r7, sp, #0
|
|
800337e: 6078 str r0, [r7, #4]
|
|
8003380: 6039 str r1, [r7, #0]
|
|
uint32_t tickstart;
|
|
|
|
/* Check Null pointer */
|
|
if (RCC_ClkInitStruct == NULL)
|
|
8003382: 687b ldr r3, [r7, #4]
|
|
8003384: 2b00 cmp r3, #0
|
|
8003386: d101 bne.n 800338c <HAL_RCC_ClockConfig+0x14>
|
|
{
|
|
return HAL_ERROR;
|
|
8003388: 2301 movs r3, #1
|
|
800338a: e0d0 b.n 800352e <HAL_RCC_ClockConfig+0x1b6>
|
|
must be correctly programmed according to the frequency of the CPU clock
|
|
(HCLK) of the device. */
|
|
|
|
#if defined(FLASH_ACR_LATENCY)
|
|
/* Increasing the number of wait states because of higher CPU frequency */
|
|
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
|
800338c: 4b6a ldr r3, [pc, #424] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
800338e: 681b ldr r3, [r3, #0]
|
|
8003390: f003 0307 and.w r3, r3, #7
|
|
8003394: 683a ldr r2, [r7, #0]
|
|
8003396: 429a cmp r2, r3
|
|
8003398: d910 bls.n 80033bc <HAL_RCC_ClockConfig+0x44>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
800339a: 4b67 ldr r3, [pc, #412] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
800339c: 681b ldr r3, [r3, #0]
|
|
800339e: f023 0207 bic.w r2, r3, #7
|
|
80033a2: 4965 ldr r1, [pc, #404] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
80033a4: 683b ldr r3, [r7, #0]
|
|
80033a6: 4313 orrs r3, r2
|
|
80033a8: 600b str r3, [r1, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
80033aa: 4b63 ldr r3, [pc, #396] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
80033ac: 681b ldr r3, [r3, #0]
|
|
80033ae: f003 0307 and.w r3, r3, #7
|
|
80033b2: 683a ldr r2, [r7, #0]
|
|
80033b4: 429a cmp r2, r3
|
|
80033b6: d001 beq.n 80033bc <HAL_RCC_ClockConfig+0x44>
|
|
{
|
|
return HAL_ERROR;
|
|
80033b8: 2301 movs r3, #1
|
|
80033ba: e0b8 b.n 800352e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
|
|
#endif /* FLASH_ACR_LATENCY */
|
|
/*-------------------------- HCLK Configuration --------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
80033bc: 687b ldr r3, [r7, #4]
|
|
80033be: 681b ldr r3, [r3, #0]
|
|
80033c0: f003 0302 and.w r3, r3, #2
|
|
80033c4: 2b00 cmp r3, #0
|
|
80033c6: d020 beq.n 800340a <HAL_RCC_ClockConfig+0x92>
|
|
{
|
|
/* Set the highest APBx dividers in order to ensure that we do not go through
|
|
a non-spec phase whatever we decrease or increase HCLK. */
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
80033c8: 687b ldr r3, [r7, #4]
|
|
80033ca: 681b ldr r3, [r3, #0]
|
|
80033cc: f003 0304 and.w r3, r3, #4
|
|
80033d0: 2b00 cmp r3, #0
|
|
80033d2: d005 beq.n 80033e0 <HAL_RCC_ClockConfig+0x68>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
|
80033d4: 4b59 ldr r3, [pc, #356] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80033d6: 685b ldr r3, [r3, #4]
|
|
80033d8: 4a58 ldr r2, [pc, #352] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80033da: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
|
80033de: 6053 str r3, [r2, #4]
|
|
}
|
|
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
80033e0: 687b ldr r3, [r7, #4]
|
|
80033e2: 681b ldr r3, [r3, #0]
|
|
80033e4: f003 0308 and.w r3, r3, #8
|
|
80033e8: 2b00 cmp r3, #0
|
|
80033ea: d005 beq.n 80033f8 <HAL_RCC_ClockConfig+0x80>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
|
80033ec: 4b53 ldr r3, [pc, #332] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80033ee: 685b ldr r3, [r3, #4]
|
|
80033f0: 4a52 ldr r2, [pc, #328] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80033f2: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
|
80033f6: 6053 str r3, [r2, #4]
|
|
}
|
|
|
|
/* Set the new HCLK clock divider */
|
|
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
80033f8: 4b50 ldr r3, [pc, #320] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80033fa: 685b ldr r3, [r3, #4]
|
|
80033fc: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
|
8003400: 687b ldr r3, [r7, #4]
|
|
8003402: 689b ldr r3, [r3, #8]
|
|
8003404: 494d ldr r1, [pc, #308] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003406: 4313 orrs r3, r2
|
|
8003408: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/*------------------------- SYSCLK Configuration ---------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
800340a: 687b ldr r3, [r7, #4]
|
|
800340c: 681b ldr r3, [r3, #0]
|
|
800340e: f003 0301 and.w r3, r3, #1
|
|
8003412: 2b00 cmp r3, #0
|
|
8003414: d040 beq.n 8003498 <HAL_RCC_ClockConfig+0x120>
|
|
{
|
|
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
|
|
|
/* HSE is selected as System Clock Source */
|
|
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
8003416: 687b ldr r3, [r7, #4]
|
|
8003418: 685b ldr r3, [r3, #4]
|
|
800341a: 2b01 cmp r3, #1
|
|
800341c: d107 bne.n 800342e <HAL_RCC_ClockConfig+0xb6>
|
|
{
|
|
/* Check the HSE ready flag */
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
800341e: 4b47 ldr r3, [pc, #284] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003420: 681b ldr r3, [r3, #0]
|
|
8003422: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8003426: 2b00 cmp r3, #0
|
|
8003428: d115 bne.n 8003456 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
800342a: 2301 movs r3, #1
|
|
800342c: e07f b.n 800352e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
/* PLL is selected as System Clock Source */
|
|
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
|
800342e: 687b ldr r3, [r7, #4]
|
|
8003430: 685b ldr r3, [r3, #4]
|
|
8003432: 2b02 cmp r3, #2
|
|
8003434: d107 bne.n 8003446 <HAL_RCC_ClockConfig+0xce>
|
|
{
|
|
/* Check the PLL ready flag */
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8003436: 4b41 ldr r3, [pc, #260] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003438: 681b ldr r3, [r3, #0]
|
|
800343a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
800343e: 2b00 cmp r3, #0
|
|
8003440: d109 bne.n 8003456 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
8003442: 2301 movs r3, #1
|
|
8003444: e073 b.n 800352e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
/* HSI is selected as System Clock Source */
|
|
else
|
|
{
|
|
/* Check the HSI ready flag */
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8003446: 4b3d ldr r3, [pc, #244] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003448: 681b ldr r3, [r3, #0]
|
|
800344a: f003 0302 and.w r3, r3, #2
|
|
800344e: 2b00 cmp r3, #0
|
|
8003450: d101 bne.n 8003456 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
8003452: 2301 movs r3, #1
|
|
8003454: e06b b.n 800352e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
8003456: 4b39 ldr r3, [pc, #228] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003458: 685b ldr r3, [r3, #4]
|
|
800345a: f023 0203 bic.w r2, r3, #3
|
|
800345e: 687b ldr r3, [r7, #4]
|
|
8003460: 685b ldr r3, [r3, #4]
|
|
8003462: 4936 ldr r1, [pc, #216] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003464: 4313 orrs r3, r2
|
|
8003466: 604b str r3, [r1, #4]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003468: f7fd fa74 bl 8000954 <HAL_GetTick>
|
|
800346c: 60f8 str r0, [r7, #12]
|
|
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
800346e: e00a b.n 8003486 <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
8003470: f7fd fa70 bl 8000954 <HAL_GetTick>
|
|
8003474: 4602 mov r2, r0
|
|
8003476: 68fb ldr r3, [r7, #12]
|
|
8003478: 1ad3 subs r3, r2, r3
|
|
800347a: f241 3288 movw r2, #5000 ; 0x1388
|
|
800347e: 4293 cmp r3, r2
|
|
8003480: d901 bls.n 8003486 <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003482: 2303 movs r3, #3
|
|
8003484: e053 b.n 800352e <HAL_RCC_ClockConfig+0x1b6>
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8003486: 4b2d ldr r3, [pc, #180] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003488: 685b ldr r3, [r3, #4]
|
|
800348a: f003 020c and.w r2, r3, #12
|
|
800348e: 687b ldr r3, [r7, #4]
|
|
8003490: 685b ldr r3, [r3, #4]
|
|
8003492: 009b lsls r3, r3, #2
|
|
8003494: 429a cmp r2, r3
|
|
8003496: d1eb bne.n 8003470 <HAL_RCC_ClockConfig+0xf8>
|
|
}
|
|
}
|
|
|
|
#if defined(FLASH_ACR_LATENCY)
|
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
|
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
|
8003498: 4b27 ldr r3, [pc, #156] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
800349a: 681b ldr r3, [r3, #0]
|
|
800349c: f003 0307 and.w r3, r3, #7
|
|
80034a0: 683a ldr r2, [r7, #0]
|
|
80034a2: 429a cmp r2, r3
|
|
80034a4: d210 bcs.n 80034c8 <HAL_RCC_ClockConfig+0x150>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
80034a6: 4b24 ldr r3, [pc, #144] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
80034a8: 681b ldr r3, [r3, #0]
|
|
80034aa: f023 0207 bic.w r2, r3, #7
|
|
80034ae: 4922 ldr r1, [pc, #136] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
80034b0: 683b ldr r3, [r7, #0]
|
|
80034b2: 4313 orrs r3, r2
|
|
80034b4: 600b str r3, [r1, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
80034b6: 4b20 ldr r3, [pc, #128] ; (8003538 <HAL_RCC_ClockConfig+0x1c0>)
|
|
80034b8: 681b ldr r3, [r3, #0]
|
|
80034ba: f003 0307 and.w r3, r3, #7
|
|
80034be: 683a ldr r2, [r7, #0]
|
|
80034c0: 429a cmp r2, r3
|
|
80034c2: d001 beq.n 80034c8 <HAL_RCC_ClockConfig+0x150>
|
|
{
|
|
return HAL_ERROR;
|
|
80034c4: 2301 movs r3, #1
|
|
80034c6: e032 b.n 800352e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
#endif /* FLASH_ACR_LATENCY */
|
|
|
|
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
80034c8: 687b ldr r3, [r7, #4]
|
|
80034ca: 681b ldr r3, [r3, #0]
|
|
80034cc: f003 0304 and.w r3, r3, #4
|
|
80034d0: 2b00 cmp r3, #0
|
|
80034d2: d008 beq.n 80034e6 <HAL_RCC_ClockConfig+0x16e>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
|
80034d4: 4b19 ldr r3, [pc, #100] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80034d6: 685b ldr r3, [r3, #4]
|
|
80034d8: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
|
80034dc: 687b ldr r3, [r7, #4]
|
|
80034de: 68db ldr r3, [r3, #12]
|
|
80034e0: 4916 ldr r1, [pc, #88] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80034e2: 4313 orrs r3, r2
|
|
80034e4: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
80034e6: 687b ldr r3, [r7, #4]
|
|
80034e8: 681b ldr r3, [r3, #0]
|
|
80034ea: f003 0308 and.w r3, r3, #8
|
|
80034ee: 2b00 cmp r3, #0
|
|
80034f0: d009 beq.n 8003506 <HAL_RCC_ClockConfig+0x18e>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
|
80034f2: 4b12 ldr r3, [pc, #72] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
80034f4: 685b ldr r3, [r3, #4]
|
|
80034f6: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
|
80034fa: 687b ldr r3, [r7, #4]
|
|
80034fc: 691b ldr r3, [r3, #16]
|
|
80034fe: 00db lsls r3, r3, #3
|
|
8003500: 490e ldr r1, [pc, #56] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8003502: 4313 orrs r3, r2
|
|
8003504: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/* Update the SystemCoreClock global variable */
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
|
8003506: f000 f821 bl 800354c <HAL_RCC_GetSysClockFreq>
|
|
800350a: 4601 mov r1, r0
|
|
800350c: 4b0b ldr r3, [pc, #44] ; (800353c <HAL_RCC_ClockConfig+0x1c4>)
|
|
800350e: 685b ldr r3, [r3, #4]
|
|
8003510: 091b lsrs r3, r3, #4
|
|
8003512: f003 030f and.w r3, r3, #15
|
|
8003516: 4a0a ldr r2, [pc, #40] ; (8003540 <HAL_RCC_ClockConfig+0x1c8>)
|
|
8003518: 5cd3 ldrb r3, [r2, r3]
|
|
800351a: fa21 f303 lsr.w r3, r1, r3
|
|
800351e: 4a09 ldr r2, [pc, #36] ; (8003544 <HAL_RCC_ClockConfig+0x1cc>)
|
|
8003520: 6013 str r3, [r2, #0]
|
|
|
|
/* Configure the source of time base considering new system clocks settings*/
|
|
HAL_InitTick(uwTickPrio);
|
|
8003522: 4b09 ldr r3, [pc, #36] ; (8003548 <HAL_RCC_ClockConfig+0x1d0>)
|
|
8003524: 681b ldr r3, [r3, #0]
|
|
8003526: 4618 mov r0, r3
|
|
8003528: f7fd f9d2 bl 80008d0 <HAL_InitTick>
|
|
|
|
return HAL_OK;
|
|
800352c: 2300 movs r3, #0
|
|
}
|
|
800352e: 4618 mov r0, r3
|
|
8003530: 3710 adds r7, #16
|
|
8003532: 46bd mov sp, r7
|
|
8003534: bd80 pop {r7, pc}
|
|
8003536: bf00 nop
|
|
8003538: 40022000 .word 0x40022000
|
|
800353c: 40021000 .word 0x40021000
|
|
8003540: 0800a6a8 .word 0x0800a6a8
|
|
8003544: 20000004 .word 0x20000004
|
|
8003548: 20000008 .word 0x20000008
|
|
|
|
0800354c <HAL_RCC_GetSysClockFreq>:
|
|
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
800354c: b490 push {r4, r7}
|
|
800354e: b08a sub sp, #40 ; 0x28
|
|
8003550: af00 add r7, sp, #0
|
|
#if defined(RCC_CFGR2_PREDIV1SRC)
|
|
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
|
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
|
#else
|
|
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
|
8003552: 4b2a ldr r3, [pc, #168] ; (80035fc <HAL_RCC_GetSysClockFreq+0xb0>)
|
|
8003554: 1d3c adds r4, r7, #4
|
|
8003556: cb0f ldmia r3, {r0, r1, r2, r3}
|
|
8003558: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
|
#if defined(RCC_CFGR2_PREDIV1)
|
|
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
|
#else
|
|
const uint8_t aPredivFactorTable[2] = {1, 2};
|
|
800355c: 4b28 ldr r3, [pc, #160] ; (8003600 <HAL_RCC_GetSysClockFreq+0xb4>)
|
|
800355e: 881b ldrh r3, [r3, #0]
|
|
8003560: 803b strh r3, [r7, #0]
|
|
#endif /*RCC_CFGR2_PREDIV1*/
|
|
|
|
#endif
|
|
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
|
8003562: 2300 movs r3, #0
|
|
8003564: 61fb str r3, [r7, #28]
|
|
8003566: 2300 movs r3, #0
|
|
8003568: 61bb str r3, [r7, #24]
|
|
800356a: 2300 movs r3, #0
|
|
800356c: 627b str r3, [r7, #36] ; 0x24
|
|
800356e: 2300 movs r3, #0
|
|
8003570: 617b str r3, [r7, #20]
|
|
uint32_t sysclockfreq = 0U;
|
|
8003572: 2300 movs r3, #0
|
|
8003574: 623b str r3, [r7, #32]
|
|
#if defined(RCC_CFGR2_PREDIV1SRC)
|
|
uint32_t prediv2 = 0U, pll2mul = 0U;
|
|
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
|
|
|
tmpreg = RCC->CFGR;
|
|
8003576: 4b23 ldr r3, [pc, #140] ; (8003604 <HAL_RCC_GetSysClockFreq+0xb8>)
|
|
8003578: 685b ldr r3, [r3, #4]
|
|
800357a: 61fb str r3, [r7, #28]
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (tmpreg & RCC_CFGR_SWS)
|
|
800357c: 69fb ldr r3, [r7, #28]
|
|
800357e: f003 030c and.w r3, r3, #12
|
|
8003582: 2b04 cmp r3, #4
|
|
8003584: d002 beq.n 800358c <HAL_RCC_GetSysClockFreq+0x40>
|
|
8003586: 2b08 cmp r3, #8
|
|
8003588: d003 beq.n 8003592 <HAL_RCC_GetSysClockFreq+0x46>
|
|
800358a: e02d b.n 80035e8 <HAL_RCC_GetSysClockFreq+0x9c>
|
|
{
|
|
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
|
{
|
|
sysclockfreq = HSE_VALUE;
|
|
800358c: 4b1e ldr r3, [pc, #120] ; (8003608 <HAL_RCC_GetSysClockFreq+0xbc>)
|
|
800358e: 623b str r3, [r7, #32]
|
|
break;
|
|
8003590: e02d b.n 80035ee <HAL_RCC_GetSysClockFreq+0xa2>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
|
{
|
|
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
|
8003592: 69fb ldr r3, [r7, #28]
|
|
8003594: 0c9b lsrs r3, r3, #18
|
|
8003596: f003 030f and.w r3, r3, #15
|
|
800359a: f107 0228 add.w r2, r7, #40 ; 0x28
|
|
800359e: 4413 add r3, r2
|
|
80035a0: f813 3c24 ldrb.w r3, [r3, #-36]
|
|
80035a4: 617b str r3, [r7, #20]
|
|
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
|
80035a6: 69fb ldr r3, [r7, #28]
|
|
80035a8: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
80035ac: 2b00 cmp r3, #0
|
|
80035ae: d013 beq.n 80035d8 <HAL_RCC_GetSysClockFreq+0x8c>
|
|
{
|
|
#if defined(RCC_CFGR2_PREDIV1)
|
|
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
|
#else
|
|
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
|
80035b0: 4b14 ldr r3, [pc, #80] ; (8003604 <HAL_RCC_GetSysClockFreq+0xb8>)
|
|
80035b2: 685b ldr r3, [r3, #4]
|
|
80035b4: 0c5b lsrs r3, r3, #17
|
|
80035b6: f003 0301 and.w r3, r3, #1
|
|
80035ba: f107 0228 add.w r2, r7, #40 ; 0x28
|
|
80035be: 4413 add r3, r2
|
|
80035c0: f813 3c28 ldrb.w r3, [r3, #-40]
|
|
80035c4: 61bb str r3, [r7, #24]
|
|
{
|
|
pllclk = pllclk / 2;
|
|
}
|
|
#else
|
|
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
|
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
|
80035c6: 697b ldr r3, [r7, #20]
|
|
80035c8: 4a0f ldr r2, [pc, #60] ; (8003608 <HAL_RCC_GetSysClockFreq+0xbc>)
|
|
80035ca: fb02 f203 mul.w r2, r2, r3
|
|
80035ce: 69bb ldr r3, [r7, #24]
|
|
80035d0: fbb2 f3f3 udiv r3, r2, r3
|
|
80035d4: 627b str r3, [r7, #36] ; 0x24
|
|
80035d6: e004 b.n 80035e2 <HAL_RCC_GetSysClockFreq+0x96>
|
|
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
|
}
|
|
else
|
|
{
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
|
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
|
80035d8: 697b ldr r3, [r7, #20]
|
|
80035da: 4a0c ldr r2, [pc, #48] ; (800360c <HAL_RCC_GetSysClockFreq+0xc0>)
|
|
80035dc: fb02 f303 mul.w r3, r2, r3
|
|
80035e0: 627b str r3, [r7, #36] ; 0x24
|
|
}
|
|
sysclockfreq = pllclk;
|
|
80035e2: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80035e4: 623b str r3, [r7, #32]
|
|
break;
|
|
80035e6: e002 b.n 80035ee <HAL_RCC_GetSysClockFreq+0xa2>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
|
default: /* HSI used as system clock */
|
|
{
|
|
sysclockfreq = HSI_VALUE;
|
|
80035e8: 4b09 ldr r3, [pc, #36] ; (8003610 <HAL_RCC_GetSysClockFreq+0xc4>)
|
|
80035ea: 623b str r3, [r7, #32]
|
|
break;
|
|
80035ec: bf00 nop
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
80035ee: 6a3b ldr r3, [r7, #32]
|
|
}
|
|
80035f0: 4618 mov r0, r3
|
|
80035f2: 3728 adds r7, #40 ; 0x28
|
|
80035f4: 46bd mov sp, r7
|
|
80035f6: bc90 pop {r4, r7}
|
|
80035f8: 4770 bx lr
|
|
80035fa: bf00 nop
|
|
80035fc: 0800a650 .word 0x0800a650
|
|
8003600: 0800a660 .word 0x0800a660
|
|
8003604: 40021000 .word 0x40021000
|
|
8003608: 00f42400 .word 0x00f42400
|
|
800360c: 003d0900 .word 0x003d0900
|
|
8003610: 007a1200 .word 0x007a1200
|
|
|
|
08003614 <HAL_RCC_GetHCLKFreq>:
|
|
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
|
|
* and updated within this function
|
|
* @retval HCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetHCLKFreq(void)
|
|
{
|
|
8003614: b480 push {r7}
|
|
8003616: af00 add r7, sp, #0
|
|
return SystemCoreClock;
|
|
8003618: 4b02 ldr r3, [pc, #8] ; (8003624 <HAL_RCC_GetHCLKFreq+0x10>)
|
|
800361a: 681b ldr r3, [r3, #0]
|
|
}
|
|
800361c: 4618 mov r0, r3
|
|
800361e: 46bd mov sp, r7
|
|
8003620: bc80 pop {r7}
|
|
8003622: 4770 bx lr
|
|
8003624: 20000004 .word 0x20000004
|
|
|
|
08003628 <HAL_RCC_GetPCLK1Freq>:
|
|
* @note Each time PCLK1 changes, this function must be called to update the
|
|
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK1 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
|
{
|
|
8003628: b580 push {r7, lr}
|
|
800362a: af00 add r7, sp, #0
|
|
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
|
|
800362c: f7ff fff2 bl 8003614 <HAL_RCC_GetHCLKFreq>
|
|
8003630: 4601 mov r1, r0
|
|
8003632: 4b05 ldr r3, [pc, #20] ; (8003648 <HAL_RCC_GetPCLK1Freq+0x20>)
|
|
8003634: 685b ldr r3, [r3, #4]
|
|
8003636: 0a1b lsrs r3, r3, #8
|
|
8003638: f003 0307 and.w r3, r3, #7
|
|
800363c: 4a03 ldr r2, [pc, #12] ; (800364c <HAL_RCC_GetPCLK1Freq+0x24>)
|
|
800363e: 5cd3 ldrb r3, [r2, r3]
|
|
8003640: fa21 f303 lsr.w r3, r1, r3
|
|
}
|
|
8003644: 4618 mov r0, r3
|
|
8003646: bd80 pop {r7, pc}
|
|
8003648: 40021000 .word 0x40021000
|
|
800364c: 0800a6b8 .word 0x0800a6b8
|
|
|
|
08003650 <RCC_Delay>:
|
|
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
|
* @param mdelay: specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
static void RCC_Delay(uint32_t mdelay)
|
|
{
|
|
8003650: b480 push {r7}
|
|
8003652: b085 sub sp, #20
|
|
8003654: af00 add r7, sp, #0
|
|
8003656: 6078 str r0, [r7, #4]
|
|
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
|
8003658: 4b0a ldr r3, [pc, #40] ; (8003684 <RCC_Delay+0x34>)
|
|
800365a: 681b ldr r3, [r3, #0]
|
|
800365c: 4a0a ldr r2, [pc, #40] ; (8003688 <RCC_Delay+0x38>)
|
|
800365e: fba2 2303 umull r2, r3, r2, r3
|
|
8003662: 0a5b lsrs r3, r3, #9
|
|
8003664: 687a ldr r2, [r7, #4]
|
|
8003666: fb02 f303 mul.w r3, r2, r3
|
|
800366a: 60fb str r3, [r7, #12]
|
|
do
|
|
{
|
|
__NOP();
|
|
800366c: bf00 nop
|
|
}
|
|
while (Delay --);
|
|
800366e: 68fb ldr r3, [r7, #12]
|
|
8003670: 1e5a subs r2, r3, #1
|
|
8003672: 60fa str r2, [r7, #12]
|
|
8003674: 2b00 cmp r3, #0
|
|
8003676: d1f9 bne.n 800366c <RCC_Delay+0x1c>
|
|
}
|
|
8003678: bf00 nop
|
|
800367a: 3714 adds r7, #20
|
|
800367c: 46bd mov sp, r7
|
|
800367e: bc80 pop {r7}
|
|
8003680: 4770 bx lr
|
|
8003682: bf00 nop
|
|
8003684: 20000004 .word 0x20000004
|
|
8003688: 10624dd3 .word 0x10624dd3
|
|
|
|
0800368c <HAL_RCCEx_PeriphCLKConfig>:
|
|
* manually disable it.
|
|
*
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
|
|
{
|
|
800368c: b580 push {r7, lr}
|
|
800368e: b086 sub sp, #24
|
|
8003690: af00 add r7, sp, #0
|
|
8003692: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U, temp_reg = 0U;
|
|
8003694: 2300 movs r3, #0
|
|
8003696: 613b str r3, [r7, #16]
|
|
8003698: 2300 movs r3, #0
|
|
800369a: 60fb str r3, [r7, #12]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
|
|
|
|
/*------------------------------- RTC/LCD Configuration ------------------------*/
|
|
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
|
|
800369c: 687b ldr r3, [r7, #4]
|
|
800369e: 681b ldr r3, [r3, #0]
|
|
80036a0: f003 0301 and.w r3, r3, #1
|
|
80036a4: 2b00 cmp r3, #0
|
|
80036a6: d07d beq.n 80037a4 <HAL_RCCEx_PeriphCLKConfig+0x118>
|
|
{
|
|
/* check for RTC Parameters used to output RTCCLK */
|
|
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
|
|
|
|
FlagStatus pwrclkchanged = RESET;
|
|
80036a8: 2300 movs r3, #0
|
|
80036aa: 75fb strb r3, [r7, #23]
|
|
|
|
/* As soon as function is called to change RTC clock source, activation of the
|
|
power domain is done. */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
80036ac: 4b4f ldr r3, [pc, #316] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80036ae: 69db ldr r3, [r3, #28]
|
|
80036b0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
80036b4: 2b00 cmp r3, #0
|
|
80036b6: d10d bne.n 80036d4 <HAL_RCCEx_PeriphCLKConfig+0x48>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
80036b8: 4b4c ldr r3, [pc, #304] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80036ba: 69db ldr r3, [r3, #28]
|
|
80036bc: 4a4b ldr r2, [pc, #300] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80036be: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
80036c2: 61d3 str r3, [r2, #28]
|
|
80036c4: 4b49 ldr r3, [pc, #292] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80036c6: 69db ldr r3, [r3, #28]
|
|
80036c8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
80036cc: 60bb str r3, [r7, #8]
|
|
80036ce: 68bb ldr r3, [r7, #8]
|
|
pwrclkchanged = SET;
|
|
80036d0: 2301 movs r3, #1
|
|
80036d2: 75fb strb r3, [r7, #23]
|
|
}
|
|
|
|
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
80036d4: 4b46 ldr r3, [pc, #280] ; (80037f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
80036d6: 681b ldr r3, [r3, #0]
|
|
80036d8: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
80036dc: 2b00 cmp r3, #0
|
|
80036de: d118 bne.n 8003712 <HAL_RCCEx_PeriphCLKConfig+0x86>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
80036e0: 4b43 ldr r3, [pc, #268] ; (80037f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
80036e2: 681b ldr r3, [r3, #0]
|
|
80036e4: 4a42 ldr r2, [pc, #264] ; (80037f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
80036e6: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
80036ea: 6013 str r3, [r2, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
80036ec: f7fd f932 bl 8000954 <HAL_GetTick>
|
|
80036f0: 6138 str r0, [r7, #16]
|
|
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
80036f2: e008 b.n 8003706 <HAL_RCCEx_PeriphCLKConfig+0x7a>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
80036f4: f7fd f92e bl 8000954 <HAL_GetTick>
|
|
80036f8: 4602 mov r2, r0
|
|
80036fa: 693b ldr r3, [r7, #16]
|
|
80036fc: 1ad3 subs r3, r2, r3
|
|
80036fe: 2b64 cmp r3, #100 ; 0x64
|
|
8003700: d901 bls.n 8003706 <HAL_RCCEx_PeriphCLKConfig+0x7a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003702: 2303 movs r3, #3
|
|
8003704: e06d b.n 80037e2 <HAL_RCCEx_PeriphCLKConfig+0x156>
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8003706: 4b3a ldr r3, [pc, #232] ; (80037f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8003708: 681b ldr r3, [r3, #0]
|
|
800370a: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
800370e: 2b00 cmp r3, #0
|
|
8003710: d0f0 beq.n 80036f4 <HAL_RCCEx_PeriphCLKConfig+0x68>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
|
|
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
|
|
8003712: 4b36 ldr r3, [pc, #216] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003714: 6a1b ldr r3, [r3, #32]
|
|
8003716: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
800371a: 60fb str r3, [r7, #12]
|
|
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
|
|
800371c: 68fb ldr r3, [r7, #12]
|
|
800371e: 2b00 cmp r3, #0
|
|
8003720: d02e beq.n 8003780 <HAL_RCCEx_PeriphCLKConfig+0xf4>
|
|
8003722: 687b ldr r3, [r7, #4]
|
|
8003724: 685b ldr r3, [r3, #4]
|
|
8003726: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
800372a: 68fa ldr r2, [r7, #12]
|
|
800372c: 429a cmp r2, r3
|
|
800372e: d027 beq.n 8003780 <HAL_RCCEx_PeriphCLKConfig+0xf4>
|
|
{
|
|
/* Store the content of BDCR register before the reset of Backup Domain */
|
|
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
|
|
8003730: 4b2e ldr r3, [pc, #184] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003732: 6a1b ldr r3, [r3, #32]
|
|
8003734: f423 7340 bic.w r3, r3, #768 ; 0x300
|
|
8003738: 60fb str r3, [r7, #12]
|
|
/* RTC Clock selection can be changed only if the Backup Domain is reset */
|
|
__HAL_RCC_BACKUPRESET_FORCE();
|
|
800373a: 4b2e ldr r3, [pc, #184] ; (80037f4 <HAL_RCCEx_PeriphCLKConfig+0x168>)
|
|
800373c: 2201 movs r2, #1
|
|
800373e: 601a str r2, [r3, #0]
|
|
__HAL_RCC_BACKUPRESET_RELEASE();
|
|
8003740: 4b2c ldr r3, [pc, #176] ; (80037f4 <HAL_RCCEx_PeriphCLKConfig+0x168>)
|
|
8003742: 2200 movs r2, #0
|
|
8003744: 601a str r2, [r3, #0]
|
|
/* Restore the Content of BDCR register */
|
|
RCC->BDCR = temp_reg;
|
|
8003746: 4a29 ldr r2, [pc, #164] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003748: 68fb ldr r3, [r7, #12]
|
|
800374a: 6213 str r3, [r2, #32]
|
|
|
|
/* Wait for LSERDY if LSE was enabled */
|
|
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
|
|
800374c: 68fb ldr r3, [r7, #12]
|
|
800374e: f003 0301 and.w r3, r3, #1
|
|
8003752: 2b00 cmp r3, #0
|
|
8003754: d014 beq.n 8003780 <HAL_RCCEx_PeriphCLKConfig+0xf4>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003756: f7fd f8fd bl 8000954 <HAL_GetTick>
|
|
800375a: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
800375c: e00a b.n 8003774 <HAL_RCCEx_PeriphCLKConfig+0xe8>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
800375e: f7fd f8f9 bl 8000954 <HAL_GetTick>
|
|
8003762: 4602 mov r2, r0
|
|
8003764: 693b ldr r3, [r7, #16]
|
|
8003766: 1ad3 subs r3, r2, r3
|
|
8003768: f241 3288 movw r2, #5000 ; 0x1388
|
|
800376c: 4293 cmp r3, r2
|
|
800376e: d901 bls.n 8003774 <HAL_RCCEx_PeriphCLKConfig+0xe8>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003770: 2303 movs r3, #3
|
|
8003772: e036 b.n 80037e2 <HAL_RCCEx_PeriphCLKConfig+0x156>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8003774: 4b1d ldr r3, [pc, #116] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003776: 6a1b ldr r3, [r3, #32]
|
|
8003778: f003 0302 and.w r3, r3, #2
|
|
800377c: 2b00 cmp r3, #0
|
|
800377e: d0ee beq.n 800375e <HAL_RCCEx_PeriphCLKConfig+0xd2>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
|
|
8003780: 4b1a ldr r3, [pc, #104] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003782: 6a1b ldr r3, [r3, #32]
|
|
8003784: f423 7240 bic.w r2, r3, #768 ; 0x300
|
|
8003788: 687b ldr r3, [r7, #4]
|
|
800378a: 685b ldr r3, [r3, #4]
|
|
800378c: 4917 ldr r1, [pc, #92] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
800378e: 4313 orrs r3, r2
|
|
8003790: 620b str r3, [r1, #32]
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if (pwrclkchanged == SET)
|
|
8003792: 7dfb ldrb r3, [r7, #23]
|
|
8003794: 2b01 cmp r3, #1
|
|
8003796: d105 bne.n 80037a4 <HAL_RCCEx_PeriphCLKConfig+0x118>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8003798: 4b14 ldr r3, [pc, #80] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
800379a: 69db ldr r3, [r3, #28]
|
|
800379c: 4a13 ldr r2, [pc, #76] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
800379e: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
|
80037a2: 61d3 str r3, [r2, #28]
|
|
}
|
|
}
|
|
|
|
/*------------------------------ ADC clock Configuration ------------------*/
|
|
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
|
|
80037a4: 687b ldr r3, [r7, #4]
|
|
80037a6: 681b ldr r3, [r3, #0]
|
|
80037a8: f003 0302 and.w r3, r3, #2
|
|
80037ac: 2b00 cmp r3, #0
|
|
80037ae: d008 beq.n 80037c2 <HAL_RCCEx_PeriphCLKConfig+0x136>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
|
|
|
|
/* Configure the ADC clock source */
|
|
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
|
|
80037b0: 4b0e ldr r3, [pc, #56] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80037b2: 685b ldr r3, [r3, #4]
|
|
80037b4: f423 4240 bic.w r2, r3, #49152 ; 0xc000
|
|
80037b8: 687b ldr r3, [r7, #4]
|
|
80037ba: 689b ldr r3, [r3, #8]
|
|
80037bc: 490b ldr r1, [pc, #44] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80037be: 4313 orrs r3, r2
|
|
80037c0: 604b str r3, [r1, #4]
|
|
|
|
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|
|
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|
|
|| defined(STM32F105xC) || defined(STM32F107xC)
|
|
/*------------------------------ USB clock Configuration ------------------*/
|
|
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
|
|
80037c2: 687b ldr r3, [r7, #4]
|
|
80037c4: 681b ldr r3, [r3, #0]
|
|
80037c6: f003 0310 and.w r3, r3, #16
|
|
80037ca: 2b00 cmp r3, #0
|
|
80037cc: d008 beq.n 80037e0 <HAL_RCCEx_PeriphCLKConfig+0x154>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
|
|
|
|
/* Configure the USB clock source */
|
|
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
|
|
80037ce: 4b07 ldr r3, [pc, #28] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80037d0: 685b ldr r3, [r3, #4]
|
|
80037d2: f423 0280 bic.w r2, r3, #4194304 ; 0x400000
|
|
80037d6: 687b ldr r3, [r7, #4]
|
|
80037d8: 695b ldr r3, [r3, #20]
|
|
80037da: 4904 ldr r1, [pc, #16] ; (80037ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80037dc: 4313 orrs r3, r2
|
|
80037de: 604b str r3, [r1, #4]
|
|
}
|
|
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
|
|
|
|
return HAL_OK;
|
|
80037e0: 2300 movs r3, #0
|
|
}
|
|
80037e2: 4618 mov r0, r3
|
|
80037e4: 3718 adds r7, #24
|
|
80037e6: 46bd mov sp, r7
|
|
80037e8: bd80 pop {r7, pc}
|
|
80037ea: bf00 nop
|
|
80037ec: 40021000 .word 0x40021000
|
|
80037f0: 40007000 .word 0x40007000
|
|
80037f4: 42420440 .word 0x42420440
|
|
|
|
080037f8 <HAL_SD_Init>:
|
|
SD_HandleTypeDef and create the associated handle.
|
|
* @param hsd: Pointer to the SD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd)
|
|
{
|
|
80037f8: b580 push {r7, lr}
|
|
80037fa: b082 sub sp, #8
|
|
80037fc: af00 add r7, sp, #0
|
|
80037fe: 6078 str r0, [r7, #4]
|
|
/* Check the SD handle allocation */
|
|
if(hsd == NULL)
|
|
8003800: 687b ldr r3, [r7, #4]
|
|
8003802: 2b00 cmp r3, #0
|
|
8003804: d101 bne.n 800380a <HAL_SD_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8003806: 2301 movs r3, #1
|
|
8003808: e022 b.n 8003850 <HAL_SD_Init+0x58>
|
|
assert_param(IS_SDIO_CLOCK_POWER_SAVE(hsd->Init.ClockPowerSave));
|
|
assert_param(IS_SDIO_BUS_WIDE(hsd->Init.BusWide));
|
|
assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(hsd->Init.HardwareFlowControl));
|
|
assert_param(IS_SDIO_CLKDIV(hsd->Init.ClockDiv));
|
|
|
|
if(hsd->State == HAL_SD_STATE_RESET)
|
|
800380a: 687b ldr r3, [r7, #4]
|
|
800380c: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
|
|
8003810: b2db uxtb r3, r3
|
|
8003812: 2b00 cmp r3, #0
|
|
8003814: d105 bne.n 8003822 <HAL_SD_Init+0x2a>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hsd->Lock = HAL_UNLOCKED;
|
|
8003816: 687b ldr r3, [r7, #4]
|
|
8003818: 2200 movs r2, #0
|
|
800381a: 771a strb r2, [r3, #28]
|
|
|
|
/* Init the low level hardware */
|
|
hsd->MspInitCallback(hsd);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
|
|
HAL_SD_MspInit(hsd);
|
|
800381c: 6878 ldr r0, [r7, #4]
|
|
800381e: f7fc ff65 bl 80006ec <HAL_SD_MspInit>
|
|
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hsd->State = HAL_SD_STATE_BUSY;
|
|
8003822: 687b ldr r3, [r7, #4]
|
|
8003824: 2203 movs r2, #3
|
|
8003826: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
/* Initialize the Card parameters */
|
|
if (HAL_SD_InitCard(hsd) != HAL_OK)
|
|
800382a: 6878 ldr r0, [r7, #4]
|
|
800382c: f000 f814 bl 8003858 <HAL_SD_InitCard>
|
|
8003830: 4603 mov r3, r0
|
|
8003832: 2b00 cmp r3, #0
|
|
8003834: d001 beq.n 800383a <HAL_SD_Init+0x42>
|
|
{
|
|
return HAL_ERROR;
|
|
8003836: 2301 movs r3, #1
|
|
8003838: e00a b.n 8003850 <HAL_SD_Init+0x58>
|
|
}
|
|
|
|
/* Initialize the error code */
|
|
hsd->ErrorCode = HAL_SD_ERROR_NONE;
|
|
800383a: 687b ldr r3, [r7, #4]
|
|
800383c: 2200 movs r2, #0
|
|
800383e: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
/* Initialize the SD operation */
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003840: 687b ldr r3, [r7, #4]
|
|
8003842: 2200 movs r2, #0
|
|
8003844: 631a str r2, [r3, #48] ; 0x30
|
|
|
|
/* Initialize the SD state */
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003846: 687b ldr r3, [r7, #4]
|
|
8003848: 2201 movs r2, #1
|
|
800384a: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
return HAL_OK;
|
|
800384e: 2300 movs r3, #0
|
|
}
|
|
8003850: 4618 mov r0, r3
|
|
8003852: 3708 adds r7, #8
|
|
8003854: 46bd mov sp, r7
|
|
8003856: bd80 pop {r7, pc}
|
|
|
|
08003858 <HAL_SD_InitCard>:
|
|
* @note This function initializes the SD card. It could be used when a card
|
|
re-initialization is needed.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
|
|
{
|
|
8003858: b5b0 push {r4, r5, r7, lr}
|
|
800385a: b08e sub sp, #56 ; 0x38
|
|
800385c: af04 add r7, sp, #16
|
|
800385e: 6078 str r0, [r7, #4]
|
|
uint32_t errorstate;
|
|
HAL_StatusTypeDef status;
|
|
SD_InitTypeDef Init;
|
|
|
|
/* Default SDIO peripheral configuration for SD card initialization */
|
|
Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
|
|
8003860: 2300 movs r3, #0
|
|
8003862: 60bb str r3, [r7, #8]
|
|
Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
|
|
8003864: 2300 movs r3, #0
|
|
8003866: 60fb str r3, [r7, #12]
|
|
Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
|
|
8003868: 2300 movs r3, #0
|
|
800386a: 613b str r3, [r7, #16]
|
|
Init.BusWide = SDIO_BUS_WIDE_1B;
|
|
800386c: 2300 movs r3, #0
|
|
800386e: 617b str r3, [r7, #20]
|
|
Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
|
|
8003870: 2300 movs r3, #0
|
|
8003872: 61bb str r3, [r7, #24]
|
|
Init.ClockDiv = SDIO_INIT_CLK_DIV;
|
|
8003874: 2376 movs r3, #118 ; 0x76
|
|
8003876: 61fb str r3, [r7, #28]
|
|
|
|
/* Initialize SDIO peripheral interface with default configuration */
|
|
status = SDIO_Init(hsd->Instance, Init);
|
|
8003878: 687b ldr r3, [r7, #4]
|
|
800387a: 681d ldr r5, [r3, #0]
|
|
800387c: 466c mov r4, sp
|
|
800387e: f107 0314 add.w r3, r7, #20
|
|
8003882: e893 0007 ldmia.w r3, {r0, r1, r2}
|
|
8003886: e884 0007 stmia.w r4, {r0, r1, r2}
|
|
800388a: f107 0308 add.w r3, r7, #8
|
|
800388e: cb0e ldmia r3, {r1, r2, r3}
|
|
8003890: 4628 mov r0, r5
|
|
8003892: f001 f95a bl 8004b4a <SDIO_Init>
|
|
8003896: 4603 mov r3, r0
|
|
8003898: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
|
if(status != HAL_OK)
|
|
800389c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
|
|
80038a0: 2b00 cmp r3, #0
|
|
80038a2: d001 beq.n 80038a8 <HAL_SD_InitCard+0x50>
|
|
{
|
|
return HAL_ERROR;
|
|
80038a4: 2301 movs r3, #1
|
|
80038a6: e031 b.n 800390c <HAL_SD_InitCard+0xb4>
|
|
}
|
|
|
|
/* Disable SDIO Clock */
|
|
__HAL_SD_DISABLE(hsd);
|
|
80038a8: 4b1a ldr r3, [pc, #104] ; (8003914 <HAL_SD_InitCard+0xbc>)
|
|
80038aa: 2200 movs r2, #0
|
|
80038ac: 601a str r2, [r3, #0]
|
|
|
|
/* Set Power State to ON */
|
|
(void)SDIO_PowerState_ON(hsd->Instance);
|
|
80038ae: 687b ldr r3, [r7, #4]
|
|
80038b0: 681b ldr r3, [r3, #0]
|
|
80038b2: 4618 mov r0, r3
|
|
80038b4: f001 f98f bl 8004bd6 <SDIO_PowerState_ON>
|
|
|
|
/* Enable SDIO Clock */
|
|
__HAL_SD_ENABLE(hsd);
|
|
80038b8: 4b16 ldr r3, [pc, #88] ; (8003914 <HAL_SD_InitCard+0xbc>)
|
|
80038ba: 2201 movs r2, #1
|
|
80038bc: 601a str r2, [r3, #0]
|
|
|
|
/* Identify card operating voltage */
|
|
errorstate = SD_PowerON(hsd);
|
|
80038be: 6878 ldr r0, [r7, #4]
|
|
80038c0: f000 ff20 bl 8004704 <SD_PowerON>
|
|
80038c4: 6238 str r0, [r7, #32]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80038c6: 6a3b ldr r3, [r7, #32]
|
|
80038c8: 2b00 cmp r3, #0
|
|
80038ca: d00b beq.n 80038e4 <HAL_SD_InitCard+0x8c>
|
|
{
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
80038cc: 687b ldr r3, [r7, #4]
|
|
80038ce: 2201 movs r2, #1
|
|
80038d0: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->ErrorCode |= errorstate;
|
|
80038d4: 687b ldr r3, [r7, #4]
|
|
80038d6: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
80038d8: 6a3b ldr r3, [r7, #32]
|
|
80038da: 431a orrs r2, r3
|
|
80038dc: 687b ldr r3, [r7, #4]
|
|
80038de: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
80038e0: 2301 movs r3, #1
|
|
80038e2: e013 b.n 800390c <HAL_SD_InitCard+0xb4>
|
|
}
|
|
|
|
/* Card initialization */
|
|
errorstate = SD_InitCard(hsd);
|
|
80038e4: 6878 ldr r0, [r7, #4]
|
|
80038e6: f000 fe3f bl 8004568 <SD_InitCard>
|
|
80038ea: 6238 str r0, [r7, #32]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80038ec: 6a3b ldr r3, [r7, #32]
|
|
80038ee: 2b00 cmp r3, #0
|
|
80038f0: d00b beq.n 800390a <HAL_SD_InitCard+0xb2>
|
|
{
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
80038f2: 687b ldr r3, [r7, #4]
|
|
80038f4: 2201 movs r2, #1
|
|
80038f6: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->ErrorCode |= errorstate;
|
|
80038fa: 687b ldr r3, [r7, #4]
|
|
80038fc: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
80038fe: 6a3b ldr r3, [r7, #32]
|
|
8003900: 431a orrs r2, r3
|
|
8003902: 687b ldr r3, [r7, #4]
|
|
8003904: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
8003906: 2301 movs r3, #1
|
|
8003908: e000 b.n 800390c <HAL_SD_InitCard+0xb4>
|
|
}
|
|
|
|
return HAL_OK;
|
|
800390a: 2300 movs r3, #0
|
|
}
|
|
800390c: 4618 mov r0, r3
|
|
800390e: 3728 adds r7, #40 ; 0x28
|
|
8003910: 46bd mov sp, r7
|
|
8003912: bdb0 pop {r4, r5, r7, pc}
|
|
8003914: 423000a0 .word 0x423000a0
|
|
|
|
08003918 <HAL_SD_DeInit>:
|
|
* @brief De-Initializes the SD card.
|
|
* @param hsd: Pointer to SD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd)
|
|
{
|
|
8003918: b580 push {r7, lr}
|
|
800391a: b082 sub sp, #8
|
|
800391c: af00 add r7, sp, #0
|
|
800391e: 6078 str r0, [r7, #4]
|
|
/* Check the SD handle allocation */
|
|
if(hsd == NULL)
|
|
8003920: 687b ldr r3, [r7, #4]
|
|
8003922: 2b00 cmp r3, #0
|
|
8003924: d101 bne.n 800392a <HAL_SD_DeInit+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8003926: 2301 movs r3, #1
|
|
8003928: e011 b.n 800394e <HAL_SD_DeInit+0x36>
|
|
}
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_SDIO_ALL_INSTANCE(hsd->Instance));
|
|
|
|
hsd->State = HAL_SD_STATE_BUSY;
|
|
800392a: 687b ldr r3, [r7, #4]
|
|
800392c: 2203 movs r2, #3
|
|
800392e: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
/* Set SD power state to off */
|
|
SD_PowerOFF(hsd);
|
|
8003932: 6878 ldr r0, [r7, #4]
|
|
8003934: f000 ff74 bl 8004820 <SD_PowerOFF>
|
|
|
|
/* DeInit the low level hardware */
|
|
hsd->MspDeInitCallback(hsd);
|
|
#else
|
|
/* De-Initialize the MSP layer */
|
|
HAL_SD_MspDeInit(hsd);
|
|
8003938: 6878 ldr r0, [r7, #4]
|
|
800393a: f7fc ff31 bl 80007a0 <HAL_SD_MspDeInit>
|
|
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
|
|
|
|
hsd->ErrorCode = HAL_SD_ERROR_NONE;
|
|
800393e: 687b ldr r3, [r7, #4]
|
|
8003940: 2200 movs r2, #0
|
|
8003942: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_RESET;
|
|
8003944: 687b ldr r3, [r7, #4]
|
|
8003946: 2200 movs r2, #0
|
|
8003948: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
return HAL_OK;
|
|
800394c: 2300 movs r3, #0
|
|
}
|
|
800394e: 4618 mov r0, r3
|
|
8003950: 3708 adds r7, #8
|
|
8003952: 46bd mov sp, r7
|
|
8003954: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08003958 <HAL_SD_ReadBlocks>:
|
|
* @param NumberOfBlocks: Number of SD blocks to read
|
|
* @param Timeout: Specify timeout value
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
|
|
{
|
|
8003958: b580 push {r7, lr}
|
|
800395a: b092 sub sp, #72 ; 0x48
|
|
800395c: af00 add r7, sp, #0
|
|
800395e: 60f8 str r0, [r7, #12]
|
|
8003960: 60b9 str r1, [r7, #8]
|
|
8003962: 607a str r2, [r7, #4]
|
|
8003964: 603b str r3, [r7, #0]
|
|
SDIO_DataInitTypeDef config;
|
|
uint32_t errorstate;
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8003966: f7fc fff5 bl 8000954 <HAL_GetTick>
|
|
800396a: 6338 str r0, [r7, #48] ; 0x30
|
|
uint32_t count, data, dataremaining;
|
|
uint32_t add = BlockAdd;
|
|
800396c: 687b ldr r3, [r7, #4]
|
|
800396e: 63bb str r3, [r7, #56] ; 0x38
|
|
uint8_t *tempbuff = pData;
|
|
8003970: 68bb ldr r3, [r7, #8]
|
|
8003972: 637b str r3, [r7, #52] ; 0x34
|
|
|
|
if(NULL == pData)
|
|
8003974: 68bb ldr r3, [r7, #8]
|
|
8003976: 2b00 cmp r3, #0
|
|
8003978: d107 bne.n 800398a <HAL_SD_ReadBlocks+0x32>
|
|
{
|
|
hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
|
|
800397a: 68fb ldr r3, [r7, #12]
|
|
800397c: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
800397e: f043 6200 orr.w r2, r3, #134217728 ; 0x8000000
|
|
8003982: 68fb ldr r3, [r7, #12]
|
|
8003984: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
8003986: 2301 movs r3, #1
|
|
8003988: e1d9 b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
|
|
if(hsd->State == HAL_SD_STATE_READY)
|
|
800398a: 68fb ldr r3, [r7, #12]
|
|
800398c: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
|
|
8003990: b2db uxtb r3, r3
|
|
8003992: 2b01 cmp r3, #1
|
|
8003994: f040 81cc bne.w 8003d30 <HAL_SD_ReadBlocks+0x3d8>
|
|
{
|
|
hsd->ErrorCode = HAL_SD_ERROR_NONE;
|
|
8003998: 68fb ldr r3, [r7, #12]
|
|
800399a: 2200 movs r2, #0
|
|
800399c: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
if((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
|
|
800399e: 6bba ldr r2, [r7, #56] ; 0x38
|
|
80039a0: 683b ldr r3, [r7, #0]
|
|
80039a2: 441a add r2, r3
|
|
80039a4: 68fb ldr r3, [r7, #12]
|
|
80039a6: 6ddb ldr r3, [r3, #92] ; 0x5c
|
|
80039a8: 429a cmp r2, r3
|
|
80039aa: d907 bls.n 80039bc <HAL_SD_ReadBlocks+0x64>
|
|
{
|
|
hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
|
|
80039ac: 68fb ldr r3, [r7, #12]
|
|
80039ae: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
80039b0: f043 7200 orr.w r2, r3, #33554432 ; 0x2000000
|
|
80039b4: 68fb ldr r3, [r7, #12]
|
|
80039b6: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
80039b8: 2301 movs r3, #1
|
|
80039ba: e1c0 b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
|
|
hsd->State = HAL_SD_STATE_BUSY;
|
|
80039bc: 68fb ldr r3, [r7, #12]
|
|
80039be: 2203 movs r2, #3
|
|
80039c0: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
/* Initialize data control register */
|
|
hsd->Instance->DCTRL = 0U;
|
|
80039c4: 68fb ldr r3, [r7, #12]
|
|
80039c6: 681b ldr r3, [r3, #0]
|
|
80039c8: 2200 movs r2, #0
|
|
80039ca: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
|
|
80039cc: 68fb ldr r3, [r7, #12]
|
|
80039ce: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
80039d0: 2b01 cmp r3, #1
|
|
80039d2: d002 beq.n 80039da <HAL_SD_ReadBlocks+0x82>
|
|
{
|
|
add *= 512U;
|
|
80039d4: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
80039d6: 025b lsls r3, r3, #9
|
|
80039d8: 63bb str r3, [r7, #56] ; 0x38
|
|
}
|
|
|
|
/* Set Block Size for Card */
|
|
errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
|
|
80039da: 68fb ldr r3, [r7, #12]
|
|
80039dc: 681b ldr r3, [r3, #0]
|
|
80039de: f44f 7100 mov.w r1, #512 ; 0x200
|
|
80039e2: 4618 mov r0, r3
|
|
80039e4: f001 f992 bl 8004d0c <SDMMC_CmdBlockLength>
|
|
80039e8: 6478 str r0, [r7, #68] ; 0x44
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80039ea: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
80039ec: 2b00 cmp r3, #0
|
|
80039ee: d00f beq.n 8003a10 <HAL_SD_ReadBlocks+0xb8>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
80039f0: 68fb ldr r3, [r7, #12]
|
|
80039f2: 681b ldr r3, [r3, #0]
|
|
80039f4: 4a9b ldr r2, [pc, #620] ; (8003c64 <HAL_SD_ReadBlocks+0x30c>)
|
|
80039f6: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= errorstate;
|
|
80039f8: 68fb ldr r3, [r7, #12]
|
|
80039fa: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
80039fc: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
80039fe: 431a orrs r2, r3
|
|
8003a00: 68fb ldr r3, [r7, #12]
|
|
8003a02: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003a04: 68fb ldr r3, [r7, #12]
|
|
8003a06: 2201 movs r2, #1
|
|
8003a08: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
return HAL_ERROR;
|
|
8003a0c: 2301 movs r3, #1
|
|
8003a0e: e196 b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
|
|
/* Configure the SD DPSM (Data Path State Machine) */
|
|
config.DataTimeOut = SDMMC_DATATIMEOUT;
|
|
8003a10: f04f 33ff mov.w r3, #4294967295
|
|
8003a14: 617b str r3, [r7, #20]
|
|
config.DataLength = NumberOfBlocks * BLOCKSIZE;
|
|
8003a16: 683b ldr r3, [r7, #0]
|
|
8003a18: 025b lsls r3, r3, #9
|
|
8003a1a: 61bb str r3, [r7, #24]
|
|
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
|
|
8003a1c: 2390 movs r3, #144 ; 0x90
|
|
8003a1e: 61fb str r3, [r7, #28]
|
|
config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
|
|
8003a20: 2302 movs r3, #2
|
|
8003a22: 623b str r3, [r7, #32]
|
|
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
|
|
8003a24: 2300 movs r3, #0
|
|
8003a26: 627b str r3, [r7, #36] ; 0x24
|
|
config.DPSM = SDIO_DPSM_ENABLE;
|
|
8003a28: 2301 movs r3, #1
|
|
8003a2a: 62bb str r3, [r7, #40] ; 0x28
|
|
(void)SDIO_ConfigData(hsd->Instance, &config);
|
|
8003a2c: 68fb ldr r3, [r7, #12]
|
|
8003a2e: 681b ldr r3, [r3, #0]
|
|
8003a30: f107 0214 add.w r2, r7, #20
|
|
8003a34: 4611 mov r1, r2
|
|
8003a36: 4618 mov r0, r3
|
|
8003a38: f001 f93d bl 8004cb6 <SDIO_ConfigData>
|
|
|
|
/* Read block(s) in polling mode */
|
|
if(NumberOfBlocks > 1U)
|
|
8003a3c: 683b ldr r3, [r7, #0]
|
|
8003a3e: 2b01 cmp r3, #1
|
|
8003a40: d90a bls.n 8003a58 <HAL_SD_ReadBlocks+0x100>
|
|
{
|
|
hsd->Context = SD_CONTEXT_READ_MULTIPLE_BLOCK;
|
|
8003a42: 68fb ldr r3, [r7, #12]
|
|
8003a44: 2202 movs r2, #2
|
|
8003a46: 631a str r2, [r3, #48] ; 0x30
|
|
|
|
/* Read Multi Block command */
|
|
errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add);
|
|
8003a48: 68fb ldr r3, [r7, #12]
|
|
8003a4a: 681b ldr r3, [r3, #0]
|
|
8003a4c: 6bb9 ldr r1, [r7, #56] ; 0x38
|
|
8003a4e: 4618 mov r0, r3
|
|
8003a50: f001 f9a0 bl 8004d94 <SDMMC_CmdReadMultiBlock>
|
|
8003a54: 6478 str r0, [r7, #68] ; 0x44
|
|
8003a56: e009 b.n 8003a6c <HAL_SD_ReadBlocks+0x114>
|
|
}
|
|
else
|
|
{
|
|
hsd->Context = SD_CONTEXT_READ_SINGLE_BLOCK;
|
|
8003a58: 68fb ldr r3, [r7, #12]
|
|
8003a5a: 2201 movs r2, #1
|
|
8003a5c: 631a str r2, [r3, #48] ; 0x30
|
|
|
|
/* Read Single Block command */
|
|
errorstate = SDMMC_CmdReadSingleBlock(hsd->Instance, add);
|
|
8003a5e: 68fb ldr r3, [r7, #12]
|
|
8003a60: 681b ldr r3, [r3, #0]
|
|
8003a62: 6bb9 ldr r1, [r7, #56] ; 0x38
|
|
8003a64: 4618 mov r0, r3
|
|
8003a66: f001 f973 bl 8004d50 <SDMMC_CmdReadSingleBlock>
|
|
8003a6a: 6478 str r0, [r7, #68] ; 0x44
|
|
}
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8003a6c: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003a6e: 2b00 cmp r3, #0
|
|
8003a70: d012 beq.n 8003a98 <HAL_SD_ReadBlocks+0x140>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003a72: 68fb ldr r3, [r7, #12]
|
|
8003a74: 681b ldr r3, [r3, #0]
|
|
8003a76: 4a7b ldr r2, [pc, #492] ; (8003c64 <HAL_SD_ReadBlocks+0x30c>)
|
|
8003a78: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= errorstate;
|
|
8003a7a: 68fb ldr r3, [r7, #12]
|
|
8003a7c: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8003a7e: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003a80: 431a orrs r2, r3
|
|
8003a82: 68fb ldr r3, [r7, #12]
|
|
8003a84: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003a86: 68fb ldr r3, [r7, #12]
|
|
8003a88: 2201 movs r2, #1
|
|
8003a8a: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003a8e: 68fb ldr r3, [r7, #12]
|
|
8003a90: 2200 movs r2, #0
|
|
8003a92: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003a94: 2301 movs r3, #1
|
|
8003a96: e152 b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
|
|
/* Poll on SDIO flags */
|
|
dataremaining = config.DataLength;
|
|
8003a98: 69bb ldr r3, [r7, #24]
|
|
8003a9a: 63fb str r3, [r7, #60] ; 0x3c
|
|
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
|
|
8003a9c: e061 b.n 8003b62 <HAL_SD_ReadBlocks+0x20a>
|
|
{
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXFIFOHF) && (dataremaining > 0U))
|
|
8003a9e: 68fb ldr r3, [r7, #12]
|
|
8003aa0: 681b ldr r3, [r3, #0]
|
|
8003aa2: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003aa4: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8003aa8: 2b00 cmp r3, #0
|
|
8003aaa: d03c beq.n 8003b26 <HAL_SD_ReadBlocks+0x1ce>
|
|
8003aac: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003aae: 2b00 cmp r3, #0
|
|
8003ab0: d039 beq.n 8003b26 <HAL_SD_ReadBlocks+0x1ce>
|
|
{
|
|
/* Read data from SDIO Rx FIFO */
|
|
for(count = 0U; count < 8U; count++)
|
|
8003ab2: 2300 movs r3, #0
|
|
8003ab4: 643b str r3, [r7, #64] ; 0x40
|
|
8003ab6: e033 b.n 8003b20 <HAL_SD_ReadBlocks+0x1c8>
|
|
{
|
|
data = SDIO_ReadFIFO(hsd->Instance);
|
|
8003ab8: 68fb ldr r3, [r7, #12]
|
|
8003aba: 681b ldr r3, [r3, #0]
|
|
8003abc: 4618 mov r0, r3
|
|
8003abe: f001 f86e bl 8004b9e <SDIO_ReadFIFO>
|
|
8003ac2: 62f8 str r0, [r7, #44] ; 0x2c
|
|
*tempbuff = (uint8_t)(data & 0xFFU);
|
|
8003ac4: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003ac6: b2da uxtb r2, r3
|
|
8003ac8: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003aca: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003acc: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ace: 3301 adds r3, #1
|
|
8003ad0: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003ad2: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003ad4: 3b01 subs r3, #1
|
|
8003ad6: 63fb str r3, [r7, #60] ; 0x3c
|
|
*tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
|
|
8003ad8: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003ada: 0a1b lsrs r3, r3, #8
|
|
8003adc: b2da uxtb r2, r3
|
|
8003ade: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ae0: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003ae2: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ae4: 3301 adds r3, #1
|
|
8003ae6: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003ae8: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003aea: 3b01 subs r3, #1
|
|
8003aec: 63fb str r3, [r7, #60] ; 0x3c
|
|
*tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
|
|
8003aee: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003af0: 0c1b lsrs r3, r3, #16
|
|
8003af2: b2da uxtb r2, r3
|
|
8003af4: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003af6: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003af8: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003afa: 3301 adds r3, #1
|
|
8003afc: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003afe: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003b00: 3b01 subs r3, #1
|
|
8003b02: 63fb str r3, [r7, #60] ; 0x3c
|
|
*tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
|
|
8003b04: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003b06: 0e1b lsrs r3, r3, #24
|
|
8003b08: b2da uxtb r2, r3
|
|
8003b0a: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003b0c: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003b0e: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003b10: 3301 adds r3, #1
|
|
8003b12: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003b14: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003b16: 3b01 subs r3, #1
|
|
8003b18: 63fb str r3, [r7, #60] ; 0x3c
|
|
for(count = 0U; count < 8U; count++)
|
|
8003b1a: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8003b1c: 3301 adds r3, #1
|
|
8003b1e: 643b str r3, [r7, #64] ; 0x40
|
|
8003b20: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8003b22: 2b07 cmp r3, #7
|
|
8003b24: d9c8 bls.n 8003ab8 <HAL_SD_ReadBlocks+0x160>
|
|
}
|
|
}
|
|
|
|
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
|
|
8003b26: f7fc ff15 bl 8000954 <HAL_GetTick>
|
|
8003b2a: 4602 mov r2, r0
|
|
8003b2c: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8003b2e: 1ad3 subs r3, r2, r3
|
|
8003b30: 6d3a ldr r2, [r7, #80] ; 0x50
|
|
8003b32: 429a cmp r2, r3
|
|
8003b34: d902 bls.n 8003b3c <HAL_SD_ReadBlocks+0x1e4>
|
|
8003b36: 6d3b ldr r3, [r7, #80] ; 0x50
|
|
8003b38: 2b00 cmp r3, #0
|
|
8003b3a: d112 bne.n 8003b62 <HAL_SD_ReadBlocks+0x20a>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003b3c: 68fb ldr r3, [r7, #12]
|
|
8003b3e: 681b ldr r3, [r3, #0]
|
|
8003b40: 4a48 ldr r2, [pc, #288] ; (8003c64 <HAL_SD_ReadBlocks+0x30c>)
|
|
8003b42: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_TIMEOUT;
|
|
8003b44: 68fb ldr r3, [r7, #12]
|
|
8003b46: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003b48: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000
|
|
8003b4c: 68fb ldr r3, [r7, #12]
|
|
8003b4e: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State= HAL_SD_STATE_READY;
|
|
8003b50: 68fb ldr r3, [r7, #12]
|
|
8003b52: 2201 movs r2, #1
|
|
8003b54: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003b58: 68fb ldr r3, [r7, #12]
|
|
8003b5a: 2200 movs r2, #0
|
|
8003b5c: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_TIMEOUT;
|
|
8003b5e: 2303 movs r3, #3
|
|
8003b60: e0ed b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
|
|
8003b62: 68fb ldr r3, [r7, #12]
|
|
8003b64: 681b ldr r3, [r3, #0]
|
|
8003b66: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
8003b68: f240 332a movw r3, #810 ; 0x32a
|
|
8003b6c: 4013 ands r3, r2
|
|
8003b6e: 2b00 cmp r3, #0
|
|
8003b70: d095 beq.n 8003a9e <HAL_SD_ReadBlocks+0x146>
|
|
}
|
|
}
|
|
|
|
/* Send stop transmission command in case of multiblock read */
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DATAEND) && (NumberOfBlocks > 1U))
|
|
8003b72: 68fb ldr r3, [r7, #12]
|
|
8003b74: 681b ldr r3, [r3, #0]
|
|
8003b76: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003b78: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8003b7c: 2b00 cmp r3, #0
|
|
8003b7e: d022 beq.n 8003bc6 <HAL_SD_ReadBlocks+0x26e>
|
|
8003b80: 683b ldr r3, [r7, #0]
|
|
8003b82: 2b01 cmp r3, #1
|
|
8003b84: d91f bls.n 8003bc6 <HAL_SD_ReadBlocks+0x26e>
|
|
{
|
|
if(hsd->SdCard.CardType != CARD_SECURED)
|
|
8003b86: 68fb ldr r3, [r7, #12]
|
|
8003b88: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8003b8a: 2b03 cmp r3, #3
|
|
8003b8c: d01b beq.n 8003bc6 <HAL_SD_ReadBlocks+0x26e>
|
|
{
|
|
/* Send stop transmission command */
|
|
errorstate = SDMMC_CmdStopTransfer(hsd->Instance);
|
|
8003b8e: 68fb ldr r3, [r7, #12]
|
|
8003b90: 681b ldr r3, [r3, #0]
|
|
8003b92: 4618 mov r0, r3
|
|
8003b94: f001 f964 bl 8004e60 <SDMMC_CmdStopTransfer>
|
|
8003b98: 6478 str r0, [r7, #68] ; 0x44
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8003b9a: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003b9c: 2b00 cmp r3, #0
|
|
8003b9e: d012 beq.n 8003bc6 <HAL_SD_ReadBlocks+0x26e>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003ba0: 68fb ldr r3, [r7, #12]
|
|
8003ba2: 681b ldr r3, [r3, #0]
|
|
8003ba4: 4a2f ldr r2, [pc, #188] ; (8003c64 <HAL_SD_ReadBlocks+0x30c>)
|
|
8003ba6: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= errorstate;
|
|
8003ba8: 68fb ldr r3, [r7, #12]
|
|
8003baa: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8003bac: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003bae: 431a orrs r2, r3
|
|
8003bb0: 68fb ldr r3, [r7, #12]
|
|
8003bb2: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003bb4: 68fb ldr r3, [r7, #12]
|
|
8003bb6: 2201 movs r2, #1
|
|
8003bb8: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003bbc: 68fb ldr r3, [r7, #12]
|
|
8003bbe: 2200 movs r2, #0
|
|
8003bc0: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003bc2: 2301 movs r3, #1
|
|
8003bc4: e0bb b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Get error state */
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
|
|
8003bc6: 68fb ldr r3, [r7, #12]
|
|
8003bc8: 681b ldr r3, [r3, #0]
|
|
8003bca: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003bcc: f003 0308 and.w r3, r3, #8
|
|
8003bd0: 2b00 cmp r3, #0
|
|
8003bd2: d012 beq.n 8003bfa <HAL_SD_ReadBlocks+0x2a2>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003bd4: 68fb ldr r3, [r7, #12]
|
|
8003bd6: 681b ldr r3, [r3, #0]
|
|
8003bd8: 4a22 ldr r2, [pc, #136] ; (8003c64 <HAL_SD_ReadBlocks+0x30c>)
|
|
8003bda: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_DATA_TIMEOUT;
|
|
8003bdc: 68fb ldr r3, [r7, #12]
|
|
8003bde: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003be0: f043 0208 orr.w r2, r3, #8
|
|
8003be4: 68fb ldr r3, [r7, #12]
|
|
8003be6: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003be8: 68fb ldr r3, [r7, #12]
|
|
8003bea: 2201 movs r2, #1
|
|
8003bec: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003bf0: 68fb ldr r3, [r7, #12]
|
|
8003bf2: 2200 movs r2, #0
|
|
8003bf4: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003bf6: 2301 movs r3, #1
|
|
8003bf8: e0a1 b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DCRCFAIL))
|
|
8003bfa: 68fb ldr r3, [r7, #12]
|
|
8003bfc: 681b ldr r3, [r3, #0]
|
|
8003bfe: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003c00: f003 0302 and.w r3, r3, #2
|
|
8003c04: 2b00 cmp r3, #0
|
|
8003c06: d012 beq.n 8003c2e <HAL_SD_ReadBlocks+0x2d6>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003c08: 68fb ldr r3, [r7, #12]
|
|
8003c0a: 681b ldr r3, [r3, #0]
|
|
8003c0c: 4a15 ldr r2, [pc, #84] ; (8003c64 <HAL_SD_ReadBlocks+0x30c>)
|
|
8003c0e: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_DATA_CRC_FAIL;
|
|
8003c10: 68fb ldr r3, [r7, #12]
|
|
8003c12: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003c14: f043 0202 orr.w r2, r3, #2
|
|
8003c18: 68fb ldr r3, [r7, #12]
|
|
8003c1a: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003c1c: 68fb ldr r3, [r7, #12]
|
|
8003c1e: 2201 movs r2, #1
|
|
8003c20: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003c24: 68fb ldr r3, [r7, #12]
|
|
8003c26: 2200 movs r2, #0
|
|
8003c28: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003c2a: 2301 movs r3, #1
|
|
8003c2c: e087 b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR))
|
|
8003c2e: 68fb ldr r3, [r7, #12]
|
|
8003c30: 681b ldr r3, [r3, #0]
|
|
8003c32: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003c34: f003 0320 and.w r3, r3, #32
|
|
8003c38: 2b00 cmp r3, #0
|
|
8003c3a: d064 beq.n 8003d06 <HAL_SD_ReadBlocks+0x3ae>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003c3c: 68fb ldr r3, [r7, #12]
|
|
8003c3e: 681b ldr r3, [r3, #0]
|
|
8003c40: 4a08 ldr r2, [pc, #32] ; (8003c64 <HAL_SD_ReadBlocks+0x30c>)
|
|
8003c42: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_RX_OVERRUN;
|
|
8003c44: 68fb ldr r3, [r7, #12]
|
|
8003c46: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003c48: f043 0220 orr.w r2, r3, #32
|
|
8003c4c: 68fb ldr r3, [r7, #12]
|
|
8003c4e: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003c50: 68fb ldr r3, [r7, #12]
|
|
8003c52: 2201 movs r2, #1
|
|
8003c54: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003c58: 68fb ldr r3, [r7, #12]
|
|
8003c5a: 2200 movs r2, #0
|
|
8003c5c: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003c5e: 2301 movs r3, #1
|
|
8003c60: e06d b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
8003c62: bf00 nop
|
|
8003c64: 004005ff .word 0x004005ff
|
|
}
|
|
|
|
/* Empty FIFO if there is still any data */
|
|
while ((__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXDAVL)) && (dataremaining > 0U))
|
|
{
|
|
data = SDIO_ReadFIFO(hsd->Instance);
|
|
8003c68: 68fb ldr r3, [r7, #12]
|
|
8003c6a: 681b ldr r3, [r3, #0]
|
|
8003c6c: 4618 mov r0, r3
|
|
8003c6e: f000 ff96 bl 8004b9e <SDIO_ReadFIFO>
|
|
8003c72: 62f8 str r0, [r7, #44] ; 0x2c
|
|
*tempbuff = (uint8_t)(data & 0xFFU);
|
|
8003c74: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003c76: b2da uxtb r2, r3
|
|
8003c78: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003c7a: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003c7c: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003c7e: 3301 adds r3, #1
|
|
8003c80: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003c82: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003c84: 3b01 subs r3, #1
|
|
8003c86: 63fb str r3, [r7, #60] ; 0x3c
|
|
*tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
|
|
8003c88: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003c8a: 0a1b lsrs r3, r3, #8
|
|
8003c8c: b2da uxtb r2, r3
|
|
8003c8e: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003c90: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003c92: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003c94: 3301 adds r3, #1
|
|
8003c96: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003c98: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003c9a: 3b01 subs r3, #1
|
|
8003c9c: 63fb str r3, [r7, #60] ; 0x3c
|
|
*tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
|
|
8003c9e: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003ca0: 0c1b lsrs r3, r3, #16
|
|
8003ca2: b2da uxtb r2, r3
|
|
8003ca4: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ca6: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003ca8: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003caa: 3301 adds r3, #1
|
|
8003cac: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003cae: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003cb0: 3b01 subs r3, #1
|
|
8003cb2: 63fb str r3, [r7, #60] ; 0x3c
|
|
*tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
|
|
8003cb4: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8003cb6: 0e1b lsrs r3, r3, #24
|
|
8003cb8: b2da uxtb r2, r3
|
|
8003cba: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003cbc: 701a strb r2, [r3, #0]
|
|
tempbuff++;
|
|
8003cbe: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003cc0: 3301 adds r3, #1
|
|
8003cc2: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003cc4: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003cc6: 3b01 subs r3, #1
|
|
8003cc8: 63fb str r3, [r7, #60] ; 0x3c
|
|
|
|
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
|
|
8003cca: f7fc fe43 bl 8000954 <HAL_GetTick>
|
|
8003cce: 4602 mov r2, r0
|
|
8003cd0: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8003cd2: 1ad3 subs r3, r2, r3
|
|
8003cd4: 6d3a ldr r2, [r7, #80] ; 0x50
|
|
8003cd6: 429a cmp r2, r3
|
|
8003cd8: d902 bls.n 8003ce0 <HAL_SD_ReadBlocks+0x388>
|
|
8003cda: 6d3b ldr r3, [r7, #80] ; 0x50
|
|
8003cdc: 2b00 cmp r3, #0
|
|
8003cde: d112 bne.n 8003d06 <HAL_SD_ReadBlocks+0x3ae>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003ce0: 68fb ldr r3, [r7, #12]
|
|
8003ce2: 681b ldr r3, [r3, #0]
|
|
8003ce4: 4a18 ldr r2, [pc, #96] ; (8003d48 <HAL_SD_ReadBlocks+0x3f0>)
|
|
8003ce6: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_TIMEOUT;
|
|
8003ce8: 68fb ldr r3, [r7, #12]
|
|
8003cea: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003cec: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000
|
|
8003cf0: 68fb ldr r3, [r7, #12]
|
|
8003cf2: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State= HAL_SD_STATE_READY;
|
|
8003cf4: 68fb ldr r3, [r7, #12]
|
|
8003cf6: 2201 movs r2, #1
|
|
8003cf8: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003cfc: 68fb ldr r3, [r7, #12]
|
|
8003cfe: 2200 movs r2, #0
|
|
8003d00: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003d02: 2301 movs r3, #1
|
|
8003d04: e01b b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
while ((__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXDAVL)) && (dataremaining > 0U))
|
|
8003d06: 68fb ldr r3, [r7, #12]
|
|
8003d08: 681b ldr r3, [r3, #0]
|
|
8003d0a: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003d0c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
8003d10: 2b00 cmp r3, #0
|
|
8003d12: d002 beq.n 8003d1a <HAL_SD_ReadBlocks+0x3c2>
|
|
8003d14: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003d16: 2b00 cmp r3, #0
|
|
8003d18: d1a6 bne.n 8003c68 <HAL_SD_ReadBlocks+0x310>
|
|
}
|
|
}
|
|
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
|
|
8003d1a: 68fb ldr r3, [r7, #12]
|
|
8003d1c: 681b ldr r3, [r3, #0]
|
|
8003d1e: f240 523a movw r2, #1338 ; 0x53a
|
|
8003d22: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003d24: 68fb ldr r3, [r7, #12]
|
|
8003d26: 2201 movs r2, #1
|
|
8003d28: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
return HAL_OK;
|
|
8003d2c: 2300 movs r3, #0
|
|
8003d2e: e006 b.n 8003d3e <HAL_SD_ReadBlocks+0x3e6>
|
|
}
|
|
else
|
|
{
|
|
hsd->ErrorCode |= HAL_SD_ERROR_BUSY;
|
|
8003d30: 68fb ldr r3, [r7, #12]
|
|
8003d32: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003d34: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000
|
|
8003d38: 68fb ldr r3, [r7, #12]
|
|
8003d3a: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
8003d3c: 2301 movs r3, #1
|
|
}
|
|
}
|
|
8003d3e: 4618 mov r0, r3
|
|
8003d40: 3748 adds r7, #72 ; 0x48
|
|
8003d42: 46bd mov sp, r7
|
|
8003d44: bd80 pop {r7, pc}
|
|
8003d46: bf00 nop
|
|
8003d48: 004005ff .word 0x004005ff
|
|
|
|
08003d4c <HAL_SD_WriteBlocks>:
|
|
* @param NumberOfBlocks: Number of SD blocks to write
|
|
* @param Timeout: Specify timeout value
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
|
|
{
|
|
8003d4c: b580 push {r7, lr}
|
|
8003d4e: b092 sub sp, #72 ; 0x48
|
|
8003d50: af00 add r7, sp, #0
|
|
8003d52: 60f8 str r0, [r7, #12]
|
|
8003d54: 60b9 str r1, [r7, #8]
|
|
8003d56: 607a str r2, [r7, #4]
|
|
8003d58: 603b str r3, [r7, #0]
|
|
SDIO_DataInitTypeDef config;
|
|
uint32_t errorstate;
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8003d5a: f7fc fdfb bl 8000954 <HAL_GetTick>
|
|
8003d5e: 6338 str r0, [r7, #48] ; 0x30
|
|
uint32_t count, data, dataremaining;
|
|
uint32_t add = BlockAdd;
|
|
8003d60: 687b ldr r3, [r7, #4]
|
|
8003d62: 63bb str r3, [r7, #56] ; 0x38
|
|
uint8_t *tempbuff = pData;
|
|
8003d64: 68bb ldr r3, [r7, #8]
|
|
8003d66: 637b str r3, [r7, #52] ; 0x34
|
|
|
|
if(NULL == pData)
|
|
8003d68: 68bb ldr r3, [r7, #8]
|
|
8003d6a: 2b00 cmp r3, #0
|
|
8003d6c: d107 bne.n 8003d7e <HAL_SD_WriteBlocks+0x32>
|
|
{
|
|
hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
|
|
8003d6e: 68fb ldr r3, [r7, #12]
|
|
8003d70: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003d72: f043 6200 orr.w r2, r3, #134217728 ; 0x8000000
|
|
8003d76: 68fb ldr r3, [r7, #12]
|
|
8003d78: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
8003d7a: 2301 movs r3, #1
|
|
8003d7c: e184 b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
|
|
if(hsd->State == HAL_SD_STATE_READY)
|
|
8003d7e: 68fb ldr r3, [r7, #12]
|
|
8003d80: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
|
|
8003d84: b2db uxtb r3, r3
|
|
8003d86: 2b01 cmp r3, #1
|
|
8003d88: f040 8177 bne.w 800407a <HAL_SD_WriteBlocks+0x32e>
|
|
{
|
|
hsd->ErrorCode = HAL_SD_ERROR_NONE;
|
|
8003d8c: 68fb ldr r3, [r7, #12]
|
|
8003d8e: 2200 movs r2, #0
|
|
8003d90: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
if((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
|
|
8003d92: 6bba ldr r2, [r7, #56] ; 0x38
|
|
8003d94: 683b ldr r3, [r7, #0]
|
|
8003d96: 441a add r2, r3
|
|
8003d98: 68fb ldr r3, [r7, #12]
|
|
8003d9a: 6ddb ldr r3, [r3, #92] ; 0x5c
|
|
8003d9c: 429a cmp r2, r3
|
|
8003d9e: d907 bls.n 8003db0 <HAL_SD_WriteBlocks+0x64>
|
|
{
|
|
hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
|
|
8003da0: 68fb ldr r3, [r7, #12]
|
|
8003da2: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003da4: f043 7200 orr.w r2, r3, #33554432 ; 0x2000000
|
|
8003da8: 68fb ldr r3, [r7, #12]
|
|
8003daa: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
8003dac: 2301 movs r3, #1
|
|
8003dae: e16b b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
|
|
hsd->State = HAL_SD_STATE_BUSY;
|
|
8003db0: 68fb ldr r3, [r7, #12]
|
|
8003db2: 2203 movs r2, #3
|
|
8003db4: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
/* Initialize data control register */
|
|
hsd->Instance->DCTRL = 0U;
|
|
8003db8: 68fb ldr r3, [r7, #12]
|
|
8003dba: 681b ldr r3, [r3, #0]
|
|
8003dbc: 2200 movs r2, #0
|
|
8003dbe: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
|
|
8003dc0: 68fb ldr r3, [r7, #12]
|
|
8003dc2: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8003dc4: 2b01 cmp r3, #1
|
|
8003dc6: d002 beq.n 8003dce <HAL_SD_WriteBlocks+0x82>
|
|
{
|
|
add *= 512U;
|
|
8003dc8: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8003dca: 025b lsls r3, r3, #9
|
|
8003dcc: 63bb str r3, [r7, #56] ; 0x38
|
|
}
|
|
|
|
/* Set Block Size for Card */
|
|
errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
|
|
8003dce: 68fb ldr r3, [r7, #12]
|
|
8003dd0: 681b ldr r3, [r3, #0]
|
|
8003dd2: f44f 7100 mov.w r1, #512 ; 0x200
|
|
8003dd6: 4618 mov r0, r3
|
|
8003dd8: f000 ff98 bl 8004d0c <SDMMC_CmdBlockLength>
|
|
8003ddc: 6478 str r0, [r7, #68] ; 0x44
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8003dde: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003de0: 2b00 cmp r3, #0
|
|
8003de2: d00f beq.n 8003e04 <HAL_SD_WriteBlocks+0xb8>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003de4: 68fb ldr r3, [r7, #12]
|
|
8003de6: 681b ldr r3, [r3, #0]
|
|
8003de8: 4a9d ldr r2, [pc, #628] ; (8004060 <HAL_SD_WriteBlocks+0x314>)
|
|
8003dea: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= errorstate;
|
|
8003dec: 68fb ldr r3, [r7, #12]
|
|
8003dee: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8003df0: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003df2: 431a orrs r2, r3
|
|
8003df4: 68fb ldr r3, [r7, #12]
|
|
8003df6: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003df8: 68fb ldr r3, [r7, #12]
|
|
8003dfa: 2201 movs r2, #1
|
|
8003dfc: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
return HAL_ERROR;
|
|
8003e00: 2301 movs r3, #1
|
|
8003e02: e141 b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
|
|
/* Configure the SD DPSM (Data Path State Machine) */
|
|
config.DataTimeOut = SDMMC_DATATIMEOUT;
|
|
8003e04: f04f 33ff mov.w r3, #4294967295
|
|
8003e08: 61bb str r3, [r7, #24]
|
|
config.DataLength = NumberOfBlocks * BLOCKSIZE;
|
|
8003e0a: 683b ldr r3, [r7, #0]
|
|
8003e0c: 025b lsls r3, r3, #9
|
|
8003e0e: 61fb str r3, [r7, #28]
|
|
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
|
|
8003e10: 2390 movs r3, #144 ; 0x90
|
|
8003e12: 623b str r3, [r7, #32]
|
|
config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD;
|
|
8003e14: 2300 movs r3, #0
|
|
8003e16: 627b str r3, [r7, #36] ; 0x24
|
|
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
|
|
8003e18: 2300 movs r3, #0
|
|
8003e1a: 62bb str r3, [r7, #40] ; 0x28
|
|
config.DPSM = SDIO_DPSM_ENABLE;
|
|
8003e1c: 2301 movs r3, #1
|
|
8003e1e: 62fb str r3, [r7, #44] ; 0x2c
|
|
(void)SDIO_ConfigData(hsd->Instance, &config);
|
|
8003e20: 68fb ldr r3, [r7, #12]
|
|
8003e22: 681b ldr r3, [r3, #0]
|
|
8003e24: f107 0218 add.w r2, r7, #24
|
|
8003e28: 4611 mov r1, r2
|
|
8003e2a: 4618 mov r0, r3
|
|
8003e2c: f000 ff43 bl 8004cb6 <SDIO_ConfigData>
|
|
|
|
/* Write Blocks in Polling mode */
|
|
if(NumberOfBlocks > 1U)
|
|
8003e30: 683b ldr r3, [r7, #0]
|
|
8003e32: 2b01 cmp r3, #1
|
|
8003e34: d90a bls.n 8003e4c <HAL_SD_WriteBlocks+0x100>
|
|
{
|
|
hsd->Context = SD_CONTEXT_WRITE_MULTIPLE_BLOCK;
|
|
8003e36: 68fb ldr r3, [r7, #12]
|
|
8003e38: 2220 movs r2, #32
|
|
8003e3a: 631a str r2, [r3, #48] ; 0x30
|
|
|
|
/* Write Multi Block command */
|
|
errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
|
|
8003e3c: 68fb ldr r3, [r7, #12]
|
|
8003e3e: 681b ldr r3, [r3, #0]
|
|
8003e40: 6bb9 ldr r1, [r7, #56] ; 0x38
|
|
8003e42: 4618 mov r0, r3
|
|
8003e44: f000 ffea bl 8004e1c <SDMMC_CmdWriteMultiBlock>
|
|
8003e48: 6478 str r0, [r7, #68] ; 0x44
|
|
8003e4a: e009 b.n 8003e60 <HAL_SD_WriteBlocks+0x114>
|
|
}
|
|
else
|
|
{
|
|
hsd->Context = SD_CONTEXT_WRITE_SINGLE_BLOCK;
|
|
8003e4c: 68fb ldr r3, [r7, #12]
|
|
8003e4e: 2210 movs r2, #16
|
|
8003e50: 631a str r2, [r3, #48] ; 0x30
|
|
|
|
/* Write Single Block command */
|
|
errorstate = SDMMC_CmdWriteSingleBlock(hsd->Instance, add);
|
|
8003e52: 68fb ldr r3, [r7, #12]
|
|
8003e54: 681b ldr r3, [r3, #0]
|
|
8003e56: 6bb9 ldr r1, [r7, #56] ; 0x38
|
|
8003e58: 4618 mov r0, r3
|
|
8003e5a: f000 ffbd bl 8004dd8 <SDMMC_CmdWriteSingleBlock>
|
|
8003e5e: 6478 str r0, [r7, #68] ; 0x44
|
|
}
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8003e60: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003e62: 2b00 cmp r3, #0
|
|
8003e64: d012 beq.n 8003e8c <HAL_SD_WriteBlocks+0x140>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003e66: 68fb ldr r3, [r7, #12]
|
|
8003e68: 681b ldr r3, [r3, #0]
|
|
8003e6a: 4a7d ldr r2, [pc, #500] ; (8004060 <HAL_SD_WriteBlocks+0x314>)
|
|
8003e6c: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= errorstate;
|
|
8003e6e: 68fb ldr r3, [r7, #12]
|
|
8003e70: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8003e72: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003e74: 431a orrs r2, r3
|
|
8003e76: 68fb ldr r3, [r7, #12]
|
|
8003e78: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003e7a: 68fb ldr r3, [r7, #12]
|
|
8003e7c: 2201 movs r2, #1
|
|
8003e7e: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003e82: 68fb ldr r3, [r7, #12]
|
|
8003e84: 2200 movs r2, #0
|
|
8003e86: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003e88: 2301 movs r3, #1
|
|
8003e8a: e0fd b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
|
|
/* Write block(s) in polling mode */
|
|
dataremaining = config.DataLength;
|
|
8003e8c: 69fb ldr r3, [r7, #28]
|
|
8003e8e: 63fb str r3, [r7, #60] ; 0x3c
|
|
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
|
|
8003e90: e065 b.n 8003f5e <HAL_SD_WriteBlocks+0x212>
|
|
{
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXFIFOHE) && (dataremaining > 0U))
|
|
8003e92: 68fb ldr r3, [r7, #12]
|
|
8003e94: 681b ldr r3, [r3, #0]
|
|
8003e96: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003e98: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8003e9c: 2b00 cmp r3, #0
|
|
8003e9e: d040 beq.n 8003f22 <HAL_SD_WriteBlocks+0x1d6>
|
|
8003ea0: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003ea2: 2b00 cmp r3, #0
|
|
8003ea4: d03d beq.n 8003f22 <HAL_SD_WriteBlocks+0x1d6>
|
|
{
|
|
/* Write data to SDIO Tx FIFO */
|
|
for(count = 0U; count < 8U; count++)
|
|
8003ea6: 2300 movs r3, #0
|
|
8003ea8: 643b str r3, [r7, #64] ; 0x40
|
|
8003eaa: e037 b.n 8003f1c <HAL_SD_WriteBlocks+0x1d0>
|
|
{
|
|
data = (uint32_t)(*tempbuff);
|
|
8003eac: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003eae: 781b ldrb r3, [r3, #0]
|
|
8003eb0: 617b str r3, [r7, #20]
|
|
tempbuff++;
|
|
8003eb2: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003eb4: 3301 adds r3, #1
|
|
8003eb6: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003eb8: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003eba: 3b01 subs r3, #1
|
|
8003ebc: 63fb str r3, [r7, #60] ; 0x3c
|
|
data |= ((uint32_t)(*tempbuff) << 8U);
|
|
8003ebe: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ec0: 781b ldrb r3, [r3, #0]
|
|
8003ec2: 021a lsls r2, r3, #8
|
|
8003ec4: 697b ldr r3, [r7, #20]
|
|
8003ec6: 4313 orrs r3, r2
|
|
8003ec8: 617b str r3, [r7, #20]
|
|
tempbuff++;
|
|
8003eca: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ecc: 3301 adds r3, #1
|
|
8003ece: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003ed0: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003ed2: 3b01 subs r3, #1
|
|
8003ed4: 63fb str r3, [r7, #60] ; 0x3c
|
|
data |= ((uint32_t)(*tempbuff) << 16U);
|
|
8003ed6: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ed8: 781b ldrb r3, [r3, #0]
|
|
8003eda: 041a lsls r2, r3, #16
|
|
8003edc: 697b ldr r3, [r7, #20]
|
|
8003ede: 4313 orrs r3, r2
|
|
8003ee0: 617b str r3, [r7, #20]
|
|
tempbuff++;
|
|
8003ee2: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ee4: 3301 adds r3, #1
|
|
8003ee6: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003ee8: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003eea: 3b01 subs r3, #1
|
|
8003eec: 63fb str r3, [r7, #60] ; 0x3c
|
|
data |= ((uint32_t)(*tempbuff) << 24U);
|
|
8003eee: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003ef0: 781b ldrb r3, [r3, #0]
|
|
8003ef2: 061a lsls r2, r3, #24
|
|
8003ef4: 697b ldr r3, [r7, #20]
|
|
8003ef6: 4313 orrs r3, r2
|
|
8003ef8: 617b str r3, [r7, #20]
|
|
tempbuff++;
|
|
8003efa: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8003efc: 3301 adds r3, #1
|
|
8003efe: 637b str r3, [r7, #52] ; 0x34
|
|
dataremaining--;
|
|
8003f00: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8003f02: 3b01 subs r3, #1
|
|
8003f04: 63fb str r3, [r7, #60] ; 0x3c
|
|
(void)SDIO_WriteFIFO(hsd->Instance, &data);
|
|
8003f06: 68fb ldr r3, [r7, #12]
|
|
8003f08: 681b ldr r3, [r3, #0]
|
|
8003f0a: f107 0214 add.w r2, r7, #20
|
|
8003f0e: 4611 mov r1, r2
|
|
8003f10: 4618 mov r0, r3
|
|
8003f12: f000 fe50 bl 8004bb6 <SDIO_WriteFIFO>
|
|
for(count = 0U; count < 8U; count++)
|
|
8003f16: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8003f18: 3301 adds r3, #1
|
|
8003f1a: 643b str r3, [r7, #64] ; 0x40
|
|
8003f1c: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
8003f1e: 2b07 cmp r3, #7
|
|
8003f20: d9c4 bls.n 8003eac <HAL_SD_WriteBlocks+0x160>
|
|
}
|
|
}
|
|
|
|
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
|
|
8003f22: f7fc fd17 bl 8000954 <HAL_GetTick>
|
|
8003f26: 4602 mov r2, r0
|
|
8003f28: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8003f2a: 1ad3 subs r3, r2, r3
|
|
8003f2c: 6d3a ldr r2, [r7, #80] ; 0x50
|
|
8003f2e: 429a cmp r2, r3
|
|
8003f30: d902 bls.n 8003f38 <HAL_SD_WriteBlocks+0x1ec>
|
|
8003f32: 6d3b ldr r3, [r7, #80] ; 0x50
|
|
8003f34: 2b00 cmp r3, #0
|
|
8003f36: d112 bne.n 8003f5e <HAL_SD_WriteBlocks+0x212>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003f38: 68fb ldr r3, [r7, #12]
|
|
8003f3a: 681b ldr r3, [r3, #0]
|
|
8003f3c: 4a48 ldr r2, [pc, #288] ; (8004060 <HAL_SD_WriteBlocks+0x314>)
|
|
8003f3e: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= errorstate;
|
|
8003f40: 68fb ldr r3, [r7, #12]
|
|
8003f42: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8003f44: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003f46: 431a orrs r2, r3
|
|
8003f48: 68fb ldr r3, [r7, #12]
|
|
8003f4a: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003f4c: 68fb ldr r3, [r7, #12]
|
|
8003f4e: 2201 movs r2, #1
|
|
8003f50: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003f54: 68fb ldr r3, [r7, #12]
|
|
8003f56: 2200 movs r2, #0
|
|
8003f58: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_TIMEOUT;
|
|
8003f5a: 2303 movs r3, #3
|
|
8003f5c: e094 b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
|
|
8003f5e: 68fb ldr r3, [r7, #12]
|
|
8003f60: 681b ldr r3, [r3, #0]
|
|
8003f62: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
8003f64: f240 331a movw r3, #794 ; 0x31a
|
|
8003f68: 4013 ands r3, r2
|
|
8003f6a: 2b00 cmp r3, #0
|
|
8003f6c: d091 beq.n 8003e92 <HAL_SD_WriteBlocks+0x146>
|
|
}
|
|
}
|
|
|
|
/* Send stop transmission command in case of multiblock write */
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DATAEND) && (NumberOfBlocks > 1U))
|
|
8003f6e: 68fb ldr r3, [r7, #12]
|
|
8003f70: 681b ldr r3, [r3, #0]
|
|
8003f72: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003f74: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8003f78: 2b00 cmp r3, #0
|
|
8003f7a: d022 beq.n 8003fc2 <HAL_SD_WriteBlocks+0x276>
|
|
8003f7c: 683b ldr r3, [r7, #0]
|
|
8003f7e: 2b01 cmp r3, #1
|
|
8003f80: d91f bls.n 8003fc2 <HAL_SD_WriteBlocks+0x276>
|
|
{
|
|
if(hsd->SdCard.CardType != CARD_SECURED)
|
|
8003f82: 68fb ldr r3, [r7, #12]
|
|
8003f84: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8003f86: 2b03 cmp r3, #3
|
|
8003f88: d01b beq.n 8003fc2 <HAL_SD_WriteBlocks+0x276>
|
|
{
|
|
/* Send stop transmission command */
|
|
errorstate = SDMMC_CmdStopTransfer(hsd->Instance);
|
|
8003f8a: 68fb ldr r3, [r7, #12]
|
|
8003f8c: 681b ldr r3, [r3, #0]
|
|
8003f8e: 4618 mov r0, r3
|
|
8003f90: f000 ff66 bl 8004e60 <SDMMC_CmdStopTransfer>
|
|
8003f94: 6478 str r0, [r7, #68] ; 0x44
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8003f96: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003f98: 2b00 cmp r3, #0
|
|
8003f9a: d012 beq.n 8003fc2 <HAL_SD_WriteBlocks+0x276>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003f9c: 68fb ldr r3, [r7, #12]
|
|
8003f9e: 681b ldr r3, [r3, #0]
|
|
8003fa0: 4a2f ldr r2, [pc, #188] ; (8004060 <HAL_SD_WriteBlocks+0x314>)
|
|
8003fa2: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= errorstate;
|
|
8003fa4: 68fb ldr r3, [r7, #12]
|
|
8003fa6: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8003fa8: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8003faa: 431a orrs r2, r3
|
|
8003fac: 68fb ldr r3, [r7, #12]
|
|
8003fae: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003fb0: 68fb ldr r3, [r7, #12]
|
|
8003fb2: 2201 movs r2, #1
|
|
8003fb4: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003fb8: 68fb ldr r3, [r7, #12]
|
|
8003fba: 2200 movs r2, #0
|
|
8003fbc: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003fbe: 2301 movs r3, #1
|
|
8003fc0: e062 b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Get error state */
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
|
|
8003fc2: 68fb ldr r3, [r7, #12]
|
|
8003fc4: 681b ldr r3, [r3, #0]
|
|
8003fc6: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003fc8: f003 0308 and.w r3, r3, #8
|
|
8003fcc: 2b00 cmp r3, #0
|
|
8003fce: d012 beq.n 8003ff6 <HAL_SD_WriteBlocks+0x2aa>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8003fd0: 68fb ldr r3, [r7, #12]
|
|
8003fd2: 681b ldr r3, [r3, #0]
|
|
8003fd4: 4a22 ldr r2, [pc, #136] ; (8004060 <HAL_SD_WriteBlocks+0x314>)
|
|
8003fd6: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_DATA_TIMEOUT;
|
|
8003fd8: 68fb ldr r3, [r7, #12]
|
|
8003fda: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8003fdc: f043 0208 orr.w r2, r3, #8
|
|
8003fe0: 68fb ldr r3, [r7, #12]
|
|
8003fe2: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8003fe4: 68fb ldr r3, [r7, #12]
|
|
8003fe6: 2201 movs r2, #1
|
|
8003fe8: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8003fec: 68fb ldr r3, [r7, #12]
|
|
8003fee: 2200 movs r2, #0
|
|
8003ff0: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8003ff2: 2301 movs r3, #1
|
|
8003ff4: e048 b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DCRCFAIL))
|
|
8003ff6: 68fb ldr r3, [r7, #12]
|
|
8003ff8: 681b ldr r3, [r3, #0]
|
|
8003ffa: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8003ffc: f003 0302 and.w r3, r3, #2
|
|
8004000: 2b00 cmp r3, #0
|
|
8004002: d012 beq.n 800402a <HAL_SD_WriteBlocks+0x2de>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8004004: 68fb ldr r3, [r7, #12]
|
|
8004006: 681b ldr r3, [r3, #0]
|
|
8004008: 4a15 ldr r2, [pc, #84] ; (8004060 <HAL_SD_WriteBlocks+0x314>)
|
|
800400a: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_DATA_CRC_FAIL;
|
|
800400c: 68fb ldr r3, [r7, #12]
|
|
800400e: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8004010: f043 0202 orr.w r2, r3, #2
|
|
8004014: 68fb ldr r3, [r7, #12]
|
|
8004016: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8004018: 68fb ldr r3, [r7, #12]
|
|
800401a: 2201 movs r2, #1
|
|
800401c: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8004020: 68fb ldr r3, [r7, #12]
|
|
8004022: 2200 movs r2, #0
|
|
8004024: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
8004026: 2301 movs r3, #1
|
|
8004028: e02e b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXUNDERR))
|
|
800402a: 68fb ldr r3, [r7, #12]
|
|
800402c: 681b ldr r3, [r3, #0]
|
|
800402e: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8004030: f003 0310 and.w r3, r3, #16
|
|
8004034: 2b00 cmp r3, #0
|
|
8004036: d015 beq.n 8004064 <HAL_SD_WriteBlocks+0x318>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
8004038: 68fb ldr r3, [r7, #12]
|
|
800403a: 681b ldr r3, [r3, #0]
|
|
800403c: 4a08 ldr r2, [pc, #32] ; (8004060 <HAL_SD_WriteBlocks+0x314>)
|
|
800403e: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_TX_UNDERRUN;
|
|
8004040: 68fb ldr r3, [r7, #12]
|
|
8004042: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8004044: f043 0210 orr.w r2, r3, #16
|
|
8004048: 68fb ldr r3, [r7, #12]
|
|
800404a: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
800404c: 68fb ldr r3, [r7, #12]
|
|
800404e: 2201 movs r2, #1
|
|
8004050: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
hsd->Context = SD_CONTEXT_NONE;
|
|
8004054: 68fb ldr r3, [r7, #12]
|
|
8004056: 2200 movs r2, #0
|
|
8004058: 631a str r2, [r3, #48] ; 0x30
|
|
return HAL_ERROR;
|
|
800405a: 2301 movs r3, #1
|
|
800405c: e014 b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
800405e: bf00 nop
|
|
8004060: 004005ff .word 0x004005ff
|
|
{
|
|
/* Nothing to do */
|
|
}
|
|
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
|
|
8004064: 68fb ldr r3, [r7, #12]
|
|
8004066: 681b ldr r3, [r3, #0]
|
|
8004068: f240 523a movw r2, #1338 ; 0x53a
|
|
800406c: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
800406e: 68fb ldr r3, [r7, #12]
|
|
8004070: 2201 movs r2, #1
|
|
8004072: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
return HAL_OK;
|
|
8004076: 2300 movs r3, #0
|
|
8004078: e006 b.n 8004088 <HAL_SD_WriteBlocks+0x33c>
|
|
}
|
|
else
|
|
{
|
|
hsd->ErrorCode |= HAL_SD_ERROR_BUSY;
|
|
800407a: 68fb ldr r3, [r7, #12]
|
|
800407c: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
800407e: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000
|
|
8004082: 68fb ldr r3, [r7, #12]
|
|
8004084: 639a str r2, [r3, #56] ; 0x38
|
|
return HAL_ERROR;
|
|
8004086: 2301 movs r3, #1
|
|
}
|
|
}
|
|
8004088: 4618 mov r0, r3
|
|
800408a: 3748 adds r7, #72 ; 0x48
|
|
800408c: 46bd mov sp, r7
|
|
800408e: bd80 pop {r7, pc}
|
|
|
|
08004090 <HAL_SD_GetCardCSD>:
|
|
* @param pCSD: Pointer to a HAL_SD_CardCSDTypeDef structure that
|
|
* contains all CSD register parameters
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD)
|
|
{
|
|
8004090: b480 push {r7}
|
|
8004092: b083 sub sp, #12
|
|
8004094: af00 add r7, sp, #0
|
|
8004096: 6078 str r0, [r7, #4]
|
|
8004098: 6039 str r1, [r7, #0]
|
|
pCSD->CSDStruct = (uint8_t)((hsd->CSD[0] & 0xC0000000U) >> 30U);
|
|
800409a: 687b ldr r3, [r7, #4]
|
|
800409c: 6e5b ldr r3, [r3, #100] ; 0x64
|
|
800409e: 0f9b lsrs r3, r3, #30
|
|
80040a0: b2da uxtb r2, r3
|
|
80040a2: 683b ldr r3, [r7, #0]
|
|
80040a4: 701a strb r2, [r3, #0]
|
|
|
|
pCSD->SysSpecVersion = (uint8_t)((hsd->CSD[0] & 0x3C000000U) >> 26U);
|
|
80040a6: 687b ldr r3, [r7, #4]
|
|
80040a8: 6e5b ldr r3, [r3, #100] ; 0x64
|
|
80040aa: 0e9b lsrs r3, r3, #26
|
|
80040ac: b2db uxtb r3, r3
|
|
80040ae: f003 030f and.w r3, r3, #15
|
|
80040b2: b2da uxtb r2, r3
|
|
80040b4: 683b ldr r3, [r7, #0]
|
|
80040b6: 705a strb r2, [r3, #1]
|
|
|
|
pCSD->Reserved1 = (uint8_t)((hsd->CSD[0] & 0x03000000U) >> 24U);
|
|
80040b8: 687b ldr r3, [r7, #4]
|
|
80040ba: 6e5b ldr r3, [r3, #100] ; 0x64
|
|
80040bc: 0e1b lsrs r3, r3, #24
|
|
80040be: b2db uxtb r3, r3
|
|
80040c0: f003 0303 and.w r3, r3, #3
|
|
80040c4: b2da uxtb r2, r3
|
|
80040c6: 683b ldr r3, [r7, #0]
|
|
80040c8: 709a strb r2, [r3, #2]
|
|
|
|
pCSD->TAAC = (uint8_t)((hsd->CSD[0] & 0x00FF0000U) >> 16U);
|
|
80040ca: 687b ldr r3, [r7, #4]
|
|
80040cc: 6e5b ldr r3, [r3, #100] ; 0x64
|
|
80040ce: 0c1b lsrs r3, r3, #16
|
|
80040d0: b2da uxtb r2, r3
|
|
80040d2: 683b ldr r3, [r7, #0]
|
|
80040d4: 70da strb r2, [r3, #3]
|
|
|
|
pCSD->NSAC = (uint8_t)((hsd->CSD[0] & 0x0000FF00U) >> 8U);
|
|
80040d6: 687b ldr r3, [r7, #4]
|
|
80040d8: 6e5b ldr r3, [r3, #100] ; 0x64
|
|
80040da: 0a1b lsrs r3, r3, #8
|
|
80040dc: b2da uxtb r2, r3
|
|
80040de: 683b ldr r3, [r7, #0]
|
|
80040e0: 711a strb r2, [r3, #4]
|
|
|
|
pCSD->MaxBusClkFrec = (uint8_t)(hsd->CSD[0] & 0x000000FFU);
|
|
80040e2: 687b ldr r3, [r7, #4]
|
|
80040e4: 6e5b ldr r3, [r3, #100] ; 0x64
|
|
80040e6: b2da uxtb r2, r3
|
|
80040e8: 683b ldr r3, [r7, #0]
|
|
80040ea: 715a strb r2, [r3, #5]
|
|
|
|
pCSD->CardComdClasses = (uint16_t)((hsd->CSD[1] & 0xFFF00000U) >> 20U);
|
|
80040ec: 687b ldr r3, [r7, #4]
|
|
80040ee: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
80040f0: 0d1b lsrs r3, r3, #20
|
|
80040f2: b29a uxth r2, r3
|
|
80040f4: 683b ldr r3, [r7, #0]
|
|
80040f6: 80da strh r2, [r3, #6]
|
|
|
|
pCSD->RdBlockLen = (uint8_t)((hsd->CSD[1] & 0x000F0000U) >> 16U);
|
|
80040f8: 687b ldr r3, [r7, #4]
|
|
80040fa: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
80040fc: 0c1b lsrs r3, r3, #16
|
|
80040fe: b2db uxtb r3, r3
|
|
8004100: f003 030f and.w r3, r3, #15
|
|
8004104: b2da uxtb r2, r3
|
|
8004106: 683b ldr r3, [r7, #0]
|
|
8004108: 721a strb r2, [r3, #8]
|
|
|
|
pCSD->PartBlockRead = (uint8_t)((hsd->CSD[1] & 0x00008000U) >> 15U);
|
|
800410a: 687b ldr r3, [r7, #4]
|
|
800410c: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
800410e: 0bdb lsrs r3, r3, #15
|
|
8004110: b2db uxtb r3, r3
|
|
8004112: f003 0301 and.w r3, r3, #1
|
|
8004116: b2da uxtb r2, r3
|
|
8004118: 683b ldr r3, [r7, #0]
|
|
800411a: 725a strb r2, [r3, #9]
|
|
|
|
pCSD->WrBlockMisalign = (uint8_t)((hsd->CSD[1] & 0x00004000U) >> 14U);
|
|
800411c: 687b ldr r3, [r7, #4]
|
|
800411e: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
8004120: 0b9b lsrs r3, r3, #14
|
|
8004122: b2db uxtb r3, r3
|
|
8004124: f003 0301 and.w r3, r3, #1
|
|
8004128: b2da uxtb r2, r3
|
|
800412a: 683b ldr r3, [r7, #0]
|
|
800412c: 729a strb r2, [r3, #10]
|
|
|
|
pCSD->RdBlockMisalign = (uint8_t)((hsd->CSD[1] & 0x00002000U) >> 13U);
|
|
800412e: 687b ldr r3, [r7, #4]
|
|
8004130: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
8004132: 0b5b lsrs r3, r3, #13
|
|
8004134: b2db uxtb r3, r3
|
|
8004136: f003 0301 and.w r3, r3, #1
|
|
800413a: b2da uxtb r2, r3
|
|
800413c: 683b ldr r3, [r7, #0]
|
|
800413e: 72da strb r2, [r3, #11]
|
|
|
|
pCSD->DSRImpl = (uint8_t)((hsd->CSD[1] & 0x00001000U) >> 12U);
|
|
8004140: 687b ldr r3, [r7, #4]
|
|
8004142: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
8004144: 0b1b lsrs r3, r3, #12
|
|
8004146: b2db uxtb r3, r3
|
|
8004148: f003 0301 and.w r3, r3, #1
|
|
800414c: b2da uxtb r2, r3
|
|
800414e: 683b ldr r3, [r7, #0]
|
|
8004150: 731a strb r2, [r3, #12]
|
|
|
|
pCSD->Reserved2 = 0U; /*!< Reserved */
|
|
8004152: 683b ldr r3, [r7, #0]
|
|
8004154: 2200 movs r2, #0
|
|
8004156: 735a strb r2, [r3, #13]
|
|
|
|
if(hsd->SdCard.CardType == CARD_SDSC)
|
|
8004158: 687b ldr r3, [r7, #4]
|
|
800415a: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
800415c: 2b00 cmp r3, #0
|
|
800415e: d163 bne.n 8004228 <HAL_SD_GetCardCSD+0x198>
|
|
{
|
|
pCSD->DeviceSize = (((hsd->CSD[1] & 0x000003FFU) << 2U) | ((hsd->CSD[2] & 0xC0000000U) >> 30U));
|
|
8004160: 687b ldr r3, [r7, #4]
|
|
8004162: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
8004164: 009a lsls r2, r3, #2
|
|
8004166: f640 73fc movw r3, #4092 ; 0xffc
|
|
800416a: 4013 ands r3, r2
|
|
800416c: 687a ldr r2, [r7, #4]
|
|
800416e: 6ed2 ldr r2, [r2, #108] ; 0x6c
|
|
8004170: 0f92 lsrs r2, r2, #30
|
|
8004172: 431a orrs r2, r3
|
|
8004174: 683b ldr r3, [r7, #0]
|
|
8004176: 611a str r2, [r3, #16]
|
|
|
|
pCSD->MaxRdCurrentVDDMin = (uint8_t)((hsd->CSD[2] & 0x38000000U) >> 27U);
|
|
8004178: 687b ldr r3, [r7, #4]
|
|
800417a: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
800417c: 0edb lsrs r3, r3, #27
|
|
800417e: b2db uxtb r3, r3
|
|
8004180: f003 0307 and.w r3, r3, #7
|
|
8004184: b2da uxtb r2, r3
|
|
8004186: 683b ldr r3, [r7, #0]
|
|
8004188: 751a strb r2, [r3, #20]
|
|
|
|
pCSD->MaxRdCurrentVDDMax = (uint8_t)((hsd->CSD[2] & 0x07000000U) >> 24U);
|
|
800418a: 687b ldr r3, [r7, #4]
|
|
800418c: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
800418e: 0e1b lsrs r3, r3, #24
|
|
8004190: b2db uxtb r3, r3
|
|
8004192: f003 0307 and.w r3, r3, #7
|
|
8004196: b2da uxtb r2, r3
|
|
8004198: 683b ldr r3, [r7, #0]
|
|
800419a: 755a strb r2, [r3, #21]
|
|
|
|
pCSD->MaxWrCurrentVDDMin = (uint8_t)((hsd->CSD[2] & 0x00E00000U) >> 21U);
|
|
800419c: 687b ldr r3, [r7, #4]
|
|
800419e: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
80041a0: 0d5b lsrs r3, r3, #21
|
|
80041a2: b2db uxtb r3, r3
|
|
80041a4: f003 0307 and.w r3, r3, #7
|
|
80041a8: b2da uxtb r2, r3
|
|
80041aa: 683b ldr r3, [r7, #0]
|
|
80041ac: 759a strb r2, [r3, #22]
|
|
|
|
pCSD->MaxWrCurrentVDDMax = (uint8_t)((hsd->CSD[2] & 0x001C0000U) >> 18U);
|
|
80041ae: 687b ldr r3, [r7, #4]
|
|
80041b0: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
80041b2: 0c9b lsrs r3, r3, #18
|
|
80041b4: b2db uxtb r3, r3
|
|
80041b6: f003 0307 and.w r3, r3, #7
|
|
80041ba: b2da uxtb r2, r3
|
|
80041bc: 683b ldr r3, [r7, #0]
|
|
80041be: 75da strb r2, [r3, #23]
|
|
|
|
pCSD->DeviceSizeMul = (uint8_t)((hsd->CSD[2] & 0x00038000U) >> 15U);
|
|
80041c0: 687b ldr r3, [r7, #4]
|
|
80041c2: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
80041c4: 0bdb lsrs r3, r3, #15
|
|
80041c6: b2db uxtb r3, r3
|
|
80041c8: f003 0307 and.w r3, r3, #7
|
|
80041cc: b2da uxtb r2, r3
|
|
80041ce: 683b ldr r3, [r7, #0]
|
|
80041d0: 761a strb r2, [r3, #24]
|
|
|
|
hsd->SdCard.BlockNbr = (pCSD->DeviceSize + 1U) ;
|
|
80041d2: 683b ldr r3, [r7, #0]
|
|
80041d4: 691b ldr r3, [r3, #16]
|
|
80041d6: 1c5a adds r2, r3, #1
|
|
80041d8: 687b ldr r3, [r7, #4]
|
|
80041da: 655a str r2, [r3, #84] ; 0x54
|
|
hsd->SdCard.BlockNbr *= (1UL << ((pCSD->DeviceSizeMul & 0x07U) + 2U));
|
|
80041dc: 683b ldr r3, [r7, #0]
|
|
80041de: 7e1b ldrb r3, [r3, #24]
|
|
80041e0: b2db uxtb r3, r3
|
|
80041e2: f003 0307 and.w r3, r3, #7
|
|
80041e6: 3302 adds r3, #2
|
|
80041e8: 2201 movs r2, #1
|
|
80041ea: fa02 f303 lsl.w r3, r2, r3
|
|
80041ee: 687a ldr r2, [r7, #4]
|
|
80041f0: 6d52 ldr r2, [r2, #84] ; 0x54
|
|
80041f2: fb02 f203 mul.w r2, r2, r3
|
|
80041f6: 687b ldr r3, [r7, #4]
|
|
80041f8: 655a str r2, [r3, #84] ; 0x54
|
|
hsd->SdCard.BlockSize = (1UL << (pCSD->RdBlockLen & 0x0FU));
|
|
80041fa: 683b ldr r3, [r7, #0]
|
|
80041fc: 7a1b ldrb r3, [r3, #8]
|
|
80041fe: b2db uxtb r3, r3
|
|
8004200: f003 030f and.w r3, r3, #15
|
|
8004204: 2201 movs r2, #1
|
|
8004206: 409a lsls r2, r3
|
|
8004208: 687b ldr r3, [r7, #4]
|
|
800420a: 659a str r2, [r3, #88] ; 0x58
|
|
|
|
hsd->SdCard.LogBlockNbr = (hsd->SdCard.BlockNbr) * ((hsd->SdCard.BlockSize) / 512U);
|
|
800420c: 687b ldr r3, [r7, #4]
|
|
800420e: 6d5b ldr r3, [r3, #84] ; 0x54
|
|
8004210: 687a ldr r2, [r7, #4]
|
|
8004212: 6d92 ldr r2, [r2, #88] ; 0x58
|
|
8004214: 0a52 lsrs r2, r2, #9
|
|
8004216: fb02 f203 mul.w r2, r2, r3
|
|
800421a: 687b ldr r3, [r7, #4]
|
|
800421c: 65da str r2, [r3, #92] ; 0x5c
|
|
hsd->SdCard.LogBlockSize = 512U;
|
|
800421e: 687b ldr r3, [r7, #4]
|
|
8004220: f44f 7200 mov.w r2, #512 ; 0x200
|
|
8004224: 661a str r2, [r3, #96] ; 0x60
|
|
8004226: e031 b.n 800428c <HAL_SD_GetCardCSD+0x1fc>
|
|
}
|
|
else if(hsd->SdCard.CardType == CARD_SDHC_SDXC)
|
|
8004228: 687b ldr r3, [r7, #4]
|
|
800422a: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
800422c: 2b01 cmp r3, #1
|
|
800422e: d11d bne.n 800426c <HAL_SD_GetCardCSD+0x1dc>
|
|
{
|
|
/* Byte 7 */
|
|
pCSD->DeviceSize = (((hsd->CSD[1] & 0x0000003FU) << 16U) | ((hsd->CSD[2] & 0xFFFF0000U) >> 16U));
|
|
8004230: 687b ldr r3, [r7, #4]
|
|
8004232: 6e9b ldr r3, [r3, #104] ; 0x68
|
|
8004234: 041b lsls r3, r3, #16
|
|
8004236: f403 127c and.w r2, r3, #4128768 ; 0x3f0000
|
|
800423a: 687b ldr r3, [r7, #4]
|
|
800423c: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
800423e: 0c1b lsrs r3, r3, #16
|
|
8004240: 431a orrs r2, r3
|
|
8004242: 683b ldr r3, [r7, #0]
|
|
8004244: 611a str r2, [r3, #16]
|
|
|
|
hsd->SdCard.BlockNbr = ((pCSD->DeviceSize + 1U) * 1024U);
|
|
8004246: 683b ldr r3, [r7, #0]
|
|
8004248: 691b ldr r3, [r3, #16]
|
|
800424a: 3301 adds r3, #1
|
|
800424c: 029a lsls r2, r3, #10
|
|
800424e: 687b ldr r3, [r7, #4]
|
|
8004250: 655a str r2, [r3, #84] ; 0x54
|
|
hsd->SdCard.LogBlockNbr = hsd->SdCard.BlockNbr;
|
|
8004252: 687b ldr r3, [r7, #4]
|
|
8004254: 6d5a ldr r2, [r3, #84] ; 0x54
|
|
8004256: 687b ldr r3, [r7, #4]
|
|
8004258: 65da str r2, [r3, #92] ; 0x5c
|
|
hsd->SdCard.BlockSize = 512U;
|
|
800425a: 687b ldr r3, [r7, #4]
|
|
800425c: f44f 7200 mov.w r2, #512 ; 0x200
|
|
8004260: 659a str r2, [r3, #88] ; 0x58
|
|
hsd->SdCard.LogBlockSize = hsd->SdCard.BlockSize;
|
|
8004262: 687b ldr r3, [r7, #4]
|
|
8004264: 6d9a ldr r2, [r3, #88] ; 0x58
|
|
8004266: 687b ldr r3, [r7, #4]
|
|
8004268: 661a str r2, [r3, #96] ; 0x60
|
|
800426a: e00f b.n 800428c <HAL_SD_GetCardCSD+0x1fc>
|
|
}
|
|
else
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
800426c: 687b ldr r3, [r7, #4]
|
|
800426e: 681b ldr r3, [r3, #0]
|
|
8004270: 4a58 ldr r2, [pc, #352] ; (80043d4 <HAL_SD_GetCardCSD+0x344>)
|
|
8004272: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE;
|
|
8004274: 687b ldr r3, [r7, #4]
|
|
8004276: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8004278: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000
|
|
800427c: 687b ldr r3, [r7, #4]
|
|
800427e: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8004280: 687b ldr r3, [r7, #4]
|
|
8004282: 2201 movs r2, #1
|
|
8004284: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
return HAL_ERROR;
|
|
8004288: 2301 movs r3, #1
|
|
800428a: e09d b.n 80043c8 <HAL_SD_GetCardCSD+0x338>
|
|
}
|
|
|
|
pCSD->EraseGrSize = (uint8_t)((hsd->CSD[2] & 0x00004000U) >> 14U);
|
|
800428c: 687b ldr r3, [r7, #4]
|
|
800428e: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
8004290: 0b9b lsrs r3, r3, #14
|
|
8004292: b2db uxtb r3, r3
|
|
8004294: f003 0301 and.w r3, r3, #1
|
|
8004298: b2da uxtb r2, r3
|
|
800429a: 683b ldr r3, [r7, #0]
|
|
800429c: 765a strb r2, [r3, #25]
|
|
|
|
pCSD->EraseGrMul = (uint8_t)((hsd->CSD[2] & 0x00003F80U) >> 7U);
|
|
800429e: 687b ldr r3, [r7, #4]
|
|
80042a0: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
80042a2: 09db lsrs r3, r3, #7
|
|
80042a4: b2db uxtb r3, r3
|
|
80042a6: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
80042aa: b2da uxtb r2, r3
|
|
80042ac: 683b ldr r3, [r7, #0]
|
|
80042ae: 769a strb r2, [r3, #26]
|
|
|
|
pCSD->WrProtectGrSize = (uint8_t)(hsd->CSD[2] & 0x0000007FU);
|
|
80042b0: 687b ldr r3, [r7, #4]
|
|
80042b2: 6edb ldr r3, [r3, #108] ; 0x6c
|
|
80042b4: b2db uxtb r3, r3
|
|
80042b6: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
80042ba: b2da uxtb r2, r3
|
|
80042bc: 683b ldr r3, [r7, #0]
|
|
80042be: 76da strb r2, [r3, #27]
|
|
|
|
pCSD->WrProtectGrEnable = (uint8_t)((hsd->CSD[3] & 0x80000000U) >> 31U);
|
|
80042c0: 687b ldr r3, [r7, #4]
|
|
80042c2: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80042c4: 0fdb lsrs r3, r3, #31
|
|
80042c6: b2da uxtb r2, r3
|
|
80042c8: 683b ldr r3, [r7, #0]
|
|
80042ca: 771a strb r2, [r3, #28]
|
|
|
|
pCSD->ManDeflECC = (uint8_t)((hsd->CSD[3] & 0x60000000U) >> 29U);
|
|
80042cc: 687b ldr r3, [r7, #4]
|
|
80042ce: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80042d0: 0f5b lsrs r3, r3, #29
|
|
80042d2: b2db uxtb r3, r3
|
|
80042d4: f003 0303 and.w r3, r3, #3
|
|
80042d8: b2da uxtb r2, r3
|
|
80042da: 683b ldr r3, [r7, #0]
|
|
80042dc: 775a strb r2, [r3, #29]
|
|
|
|
pCSD->WrSpeedFact = (uint8_t)((hsd->CSD[3] & 0x1C000000U) >> 26U);
|
|
80042de: 687b ldr r3, [r7, #4]
|
|
80042e0: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80042e2: 0e9b lsrs r3, r3, #26
|
|
80042e4: b2db uxtb r3, r3
|
|
80042e6: f003 0307 and.w r3, r3, #7
|
|
80042ea: b2da uxtb r2, r3
|
|
80042ec: 683b ldr r3, [r7, #0]
|
|
80042ee: 779a strb r2, [r3, #30]
|
|
|
|
pCSD->MaxWrBlockLen= (uint8_t)((hsd->CSD[3] & 0x03C00000U) >> 22U);
|
|
80042f0: 687b ldr r3, [r7, #4]
|
|
80042f2: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80042f4: 0d9b lsrs r3, r3, #22
|
|
80042f6: b2db uxtb r3, r3
|
|
80042f8: f003 030f and.w r3, r3, #15
|
|
80042fc: b2da uxtb r2, r3
|
|
80042fe: 683b ldr r3, [r7, #0]
|
|
8004300: 77da strb r2, [r3, #31]
|
|
|
|
pCSD->WriteBlockPaPartial = (uint8_t)((hsd->CSD[3] & 0x00200000U) >> 21U);
|
|
8004302: 687b ldr r3, [r7, #4]
|
|
8004304: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8004306: 0d5b lsrs r3, r3, #21
|
|
8004308: b2db uxtb r3, r3
|
|
800430a: f003 0301 and.w r3, r3, #1
|
|
800430e: b2da uxtb r2, r3
|
|
8004310: 683b ldr r3, [r7, #0]
|
|
8004312: f883 2020 strb.w r2, [r3, #32]
|
|
|
|
pCSD->Reserved3 = 0;
|
|
8004316: 683b ldr r3, [r7, #0]
|
|
8004318: 2200 movs r2, #0
|
|
800431a: f883 2021 strb.w r2, [r3, #33] ; 0x21
|
|
|
|
pCSD->ContentProtectAppli = (uint8_t)((hsd->CSD[3] & 0x00010000U) >> 16U);
|
|
800431e: 687b ldr r3, [r7, #4]
|
|
8004320: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8004322: 0c1b lsrs r3, r3, #16
|
|
8004324: b2db uxtb r3, r3
|
|
8004326: f003 0301 and.w r3, r3, #1
|
|
800432a: b2da uxtb r2, r3
|
|
800432c: 683b ldr r3, [r7, #0]
|
|
800432e: f883 2022 strb.w r2, [r3, #34] ; 0x22
|
|
|
|
pCSD->FileFormatGroup = (uint8_t)((hsd->CSD[3] & 0x00008000U) >> 15U);
|
|
8004332: 687b ldr r3, [r7, #4]
|
|
8004334: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8004336: 0bdb lsrs r3, r3, #15
|
|
8004338: b2db uxtb r3, r3
|
|
800433a: f003 0301 and.w r3, r3, #1
|
|
800433e: b2da uxtb r2, r3
|
|
8004340: 683b ldr r3, [r7, #0]
|
|
8004342: f883 2023 strb.w r2, [r3, #35] ; 0x23
|
|
|
|
pCSD->CopyFlag = (uint8_t)((hsd->CSD[3] & 0x00004000U) >> 14U);
|
|
8004346: 687b ldr r3, [r7, #4]
|
|
8004348: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
800434a: 0b9b lsrs r3, r3, #14
|
|
800434c: b2db uxtb r3, r3
|
|
800434e: f003 0301 and.w r3, r3, #1
|
|
8004352: b2da uxtb r2, r3
|
|
8004354: 683b ldr r3, [r7, #0]
|
|
8004356: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
|
|
pCSD->PermWrProtect = (uint8_t)((hsd->CSD[3] & 0x00002000U) >> 13U);
|
|
800435a: 687b ldr r3, [r7, #4]
|
|
800435c: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
800435e: 0b5b lsrs r3, r3, #13
|
|
8004360: b2db uxtb r3, r3
|
|
8004362: f003 0301 and.w r3, r3, #1
|
|
8004366: b2da uxtb r2, r3
|
|
8004368: 683b ldr r3, [r7, #0]
|
|
800436a: f883 2025 strb.w r2, [r3, #37] ; 0x25
|
|
|
|
pCSD->TempWrProtect = (uint8_t)((hsd->CSD[3] & 0x00001000U) >> 12U);
|
|
800436e: 687b ldr r3, [r7, #4]
|
|
8004370: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8004372: 0b1b lsrs r3, r3, #12
|
|
8004374: b2db uxtb r3, r3
|
|
8004376: f003 0301 and.w r3, r3, #1
|
|
800437a: b2da uxtb r2, r3
|
|
800437c: 683b ldr r3, [r7, #0]
|
|
800437e: f883 2026 strb.w r2, [r3, #38] ; 0x26
|
|
|
|
pCSD->FileFormat = (uint8_t)((hsd->CSD[3] & 0x00000C00U) >> 10U);
|
|
8004382: 687b ldr r3, [r7, #4]
|
|
8004384: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8004386: 0a9b lsrs r3, r3, #10
|
|
8004388: b2db uxtb r3, r3
|
|
800438a: f003 0303 and.w r3, r3, #3
|
|
800438e: b2da uxtb r2, r3
|
|
8004390: 683b ldr r3, [r7, #0]
|
|
8004392: f883 2027 strb.w r2, [r3, #39] ; 0x27
|
|
|
|
pCSD->ECC= (uint8_t)((hsd->CSD[3] & 0x00000300U) >> 8U);
|
|
8004396: 687b ldr r3, [r7, #4]
|
|
8004398: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
800439a: 0a1b lsrs r3, r3, #8
|
|
800439c: b2db uxtb r3, r3
|
|
800439e: f003 0303 and.w r3, r3, #3
|
|
80043a2: b2da uxtb r2, r3
|
|
80043a4: 683b ldr r3, [r7, #0]
|
|
80043a6: f883 2028 strb.w r2, [r3, #40] ; 0x28
|
|
|
|
pCSD->CSD_CRC = (uint8_t)((hsd->CSD[3] & 0x000000FEU) >> 1U);
|
|
80043aa: 687b ldr r3, [r7, #4]
|
|
80043ac: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80043ae: 085b lsrs r3, r3, #1
|
|
80043b0: b2db uxtb r3, r3
|
|
80043b2: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
80043b6: b2da uxtb r2, r3
|
|
80043b8: 683b ldr r3, [r7, #0]
|
|
80043ba: f883 2029 strb.w r2, [r3, #41] ; 0x29
|
|
|
|
pCSD->Reserved4 = 1;
|
|
80043be: 683b ldr r3, [r7, #0]
|
|
80043c0: 2201 movs r2, #1
|
|
80043c2: f883 202a strb.w r2, [r3, #42] ; 0x2a
|
|
|
|
return HAL_OK;
|
|
80043c6: 2300 movs r3, #0
|
|
}
|
|
80043c8: 4618 mov r0, r3
|
|
80043ca: 370c adds r7, #12
|
|
80043cc: 46bd mov sp, r7
|
|
80043ce: bc80 pop {r7}
|
|
80043d0: 4770 bx lr
|
|
80043d2: bf00 nop
|
|
80043d4: 004005ff .word 0x004005ff
|
|
|
|
080043d8 <HAL_SD_GetCardInfo>:
|
|
* @param pCardInfo: Pointer to the HAL_SD_CardInfoTypeDef structure that
|
|
* will contain the SD card status information
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo)
|
|
{
|
|
80043d8: b480 push {r7}
|
|
80043da: b083 sub sp, #12
|
|
80043dc: af00 add r7, sp, #0
|
|
80043de: 6078 str r0, [r7, #4]
|
|
80043e0: 6039 str r1, [r7, #0]
|
|
pCardInfo->CardType = (uint32_t)(hsd->SdCard.CardType);
|
|
80043e2: 687b ldr r3, [r7, #4]
|
|
80043e4: 6c5a ldr r2, [r3, #68] ; 0x44
|
|
80043e6: 683b ldr r3, [r7, #0]
|
|
80043e8: 601a str r2, [r3, #0]
|
|
pCardInfo->CardVersion = (uint32_t)(hsd->SdCard.CardVersion);
|
|
80043ea: 687b ldr r3, [r7, #4]
|
|
80043ec: 6c9a ldr r2, [r3, #72] ; 0x48
|
|
80043ee: 683b ldr r3, [r7, #0]
|
|
80043f0: 605a str r2, [r3, #4]
|
|
pCardInfo->Class = (uint32_t)(hsd->SdCard.Class);
|
|
80043f2: 687b ldr r3, [r7, #4]
|
|
80043f4: 6cda ldr r2, [r3, #76] ; 0x4c
|
|
80043f6: 683b ldr r3, [r7, #0]
|
|
80043f8: 609a str r2, [r3, #8]
|
|
pCardInfo->RelCardAdd = (uint32_t)(hsd->SdCard.RelCardAdd);
|
|
80043fa: 687b ldr r3, [r7, #4]
|
|
80043fc: 6d1a ldr r2, [r3, #80] ; 0x50
|
|
80043fe: 683b ldr r3, [r7, #0]
|
|
8004400: 60da str r2, [r3, #12]
|
|
pCardInfo->BlockNbr = (uint32_t)(hsd->SdCard.BlockNbr);
|
|
8004402: 687b ldr r3, [r7, #4]
|
|
8004404: 6d5a ldr r2, [r3, #84] ; 0x54
|
|
8004406: 683b ldr r3, [r7, #0]
|
|
8004408: 611a str r2, [r3, #16]
|
|
pCardInfo->BlockSize = (uint32_t)(hsd->SdCard.BlockSize);
|
|
800440a: 687b ldr r3, [r7, #4]
|
|
800440c: 6d9a ldr r2, [r3, #88] ; 0x58
|
|
800440e: 683b ldr r3, [r7, #0]
|
|
8004410: 615a str r2, [r3, #20]
|
|
pCardInfo->LogBlockNbr = (uint32_t)(hsd->SdCard.LogBlockNbr);
|
|
8004412: 687b ldr r3, [r7, #4]
|
|
8004414: 6dda ldr r2, [r3, #92] ; 0x5c
|
|
8004416: 683b ldr r3, [r7, #0]
|
|
8004418: 619a str r2, [r3, #24]
|
|
pCardInfo->LogBlockSize = (uint32_t)(hsd->SdCard.LogBlockSize);
|
|
800441a: 687b ldr r3, [r7, #4]
|
|
800441c: 6e1a ldr r2, [r3, #96] ; 0x60
|
|
800441e: 683b ldr r3, [r7, #0]
|
|
8004420: 61da str r2, [r3, #28]
|
|
|
|
return HAL_OK;
|
|
8004422: 2300 movs r3, #0
|
|
}
|
|
8004424: 4618 mov r0, r3
|
|
8004426: 370c adds r7, #12
|
|
8004428: 46bd mov sp, r7
|
|
800442a: bc80 pop {r7}
|
|
800442c: 4770 bx lr
|
|
...
|
|
|
|
08004430 <HAL_SD_ConfigWideBusOperation>:
|
|
* @arg SDIO_BUS_WIDE_4B: 4-bit data transfer
|
|
* @arg SDIO_BUS_WIDE_1B: 1-bit data transfer
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode)
|
|
{
|
|
8004430: b5b0 push {r4, r5, r7, lr}
|
|
8004432: b08e sub sp, #56 ; 0x38
|
|
8004434: af04 add r7, sp, #16
|
|
8004436: 6078 str r0, [r7, #4]
|
|
8004438: 6039 str r1, [r7, #0]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_SDIO_BUS_WIDE(WideMode));
|
|
|
|
/* Change State */
|
|
hsd->State = HAL_SD_STATE_BUSY;
|
|
800443a: 687b ldr r3, [r7, #4]
|
|
800443c: 2203 movs r2, #3
|
|
800443e: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
if(hsd->SdCard.CardType != CARD_SECURED)
|
|
8004442: 687b ldr r3, [r7, #4]
|
|
8004444: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8004446: 2b03 cmp r3, #3
|
|
8004448: d02e beq.n 80044a8 <HAL_SD_ConfigWideBusOperation+0x78>
|
|
{
|
|
if(WideMode == SDIO_BUS_WIDE_8B)
|
|
800444a: 683b ldr r3, [r7, #0]
|
|
800444c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
|
|
8004450: d106 bne.n 8004460 <HAL_SD_ConfigWideBusOperation+0x30>
|
|
{
|
|
hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE;
|
|
8004452: 687b ldr r3, [r7, #4]
|
|
8004454: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8004456: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000
|
|
800445a: 687b ldr r3, [r7, #4]
|
|
800445c: 639a str r2, [r3, #56] ; 0x38
|
|
800445e: e029 b.n 80044b4 <HAL_SD_ConfigWideBusOperation+0x84>
|
|
}
|
|
else if(WideMode == SDIO_BUS_WIDE_4B)
|
|
8004460: 683b ldr r3, [r7, #0]
|
|
8004462: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
|
8004466: d10a bne.n 800447e <HAL_SD_ConfigWideBusOperation+0x4e>
|
|
{
|
|
errorstate = SD_WideBus_Enable(hsd);
|
|
8004468: 6878 ldr r0, [r7, #4]
|
|
800446a: f000 fa0e bl 800488a <SD_WideBus_Enable>
|
|
800446e: 6278 str r0, [r7, #36] ; 0x24
|
|
|
|
hsd->ErrorCode |= errorstate;
|
|
8004470: 687b ldr r3, [r7, #4]
|
|
8004472: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8004474: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8004476: 431a orrs r2, r3
|
|
8004478: 687b ldr r3, [r7, #4]
|
|
800447a: 639a str r2, [r3, #56] ; 0x38
|
|
800447c: e01a b.n 80044b4 <HAL_SD_ConfigWideBusOperation+0x84>
|
|
}
|
|
else if(WideMode == SDIO_BUS_WIDE_1B)
|
|
800447e: 683b ldr r3, [r7, #0]
|
|
8004480: 2b00 cmp r3, #0
|
|
8004482: d10a bne.n 800449a <HAL_SD_ConfigWideBusOperation+0x6a>
|
|
{
|
|
errorstate = SD_WideBus_Disable(hsd);
|
|
8004484: 6878 ldr r0, [r7, #4]
|
|
8004486: f000 fa4b bl 8004920 <SD_WideBus_Disable>
|
|
800448a: 6278 str r0, [r7, #36] ; 0x24
|
|
|
|
hsd->ErrorCode |= errorstate;
|
|
800448c: 687b ldr r3, [r7, #4]
|
|
800448e: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
8004490: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8004492: 431a orrs r2, r3
|
|
8004494: 687b ldr r3, [r7, #4]
|
|
8004496: 639a str r2, [r3, #56] ; 0x38
|
|
8004498: e00c b.n 80044b4 <HAL_SD_ConfigWideBusOperation+0x84>
|
|
}
|
|
else
|
|
{
|
|
/* WideMode is not a valid argument*/
|
|
hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
|
|
800449a: 687b ldr r3, [r7, #4]
|
|
800449c: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
800449e: f043 6200 orr.w r2, r3, #134217728 ; 0x8000000
|
|
80044a2: 687b ldr r3, [r7, #4]
|
|
80044a4: 639a str r2, [r3, #56] ; 0x38
|
|
80044a6: e005 b.n 80044b4 <HAL_SD_ConfigWideBusOperation+0x84>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* MMC Card does not support this feature */
|
|
hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE;
|
|
80044a8: 687b ldr r3, [r7, #4]
|
|
80044aa: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
80044ac: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000
|
|
80044b0: 687b ldr r3, [r7, #4]
|
|
80044b2: 639a str r2, [r3, #56] ; 0x38
|
|
}
|
|
|
|
if(hsd->ErrorCode != HAL_SD_ERROR_NONE)
|
|
80044b4: 687b ldr r3, [r7, #4]
|
|
80044b6: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
80044b8: 2b00 cmp r3, #0
|
|
80044ba: d009 beq.n 80044d0 <HAL_SD_ConfigWideBusOperation+0xa0>
|
|
{
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
|
|
80044bc: 687b ldr r3, [r7, #4]
|
|
80044be: 681b ldr r3, [r3, #0]
|
|
80044c0: 4a18 ldr r2, [pc, #96] ; (8004524 <HAL_SD_ConfigWideBusOperation+0xf4>)
|
|
80044c2: 639a str r2, [r3, #56] ; 0x38
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
80044c4: 687b ldr r3, [r7, #4]
|
|
80044c6: 2201 movs r2, #1
|
|
80044c8: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
return HAL_ERROR;
|
|
80044cc: 2301 movs r3, #1
|
|
80044ce: e024 b.n 800451a <HAL_SD_ConfigWideBusOperation+0xea>
|
|
}
|
|
else
|
|
{
|
|
/* Configure the SDIO peripheral */
|
|
Init.ClockEdge = hsd->Init.ClockEdge;
|
|
80044d0: 687b ldr r3, [r7, #4]
|
|
80044d2: 685b ldr r3, [r3, #4]
|
|
80044d4: 60fb str r3, [r7, #12]
|
|
Init.ClockBypass = hsd->Init.ClockBypass;
|
|
80044d6: 687b ldr r3, [r7, #4]
|
|
80044d8: 689b ldr r3, [r3, #8]
|
|
80044da: 613b str r3, [r7, #16]
|
|
Init.ClockPowerSave = hsd->Init.ClockPowerSave;
|
|
80044dc: 687b ldr r3, [r7, #4]
|
|
80044de: 68db ldr r3, [r3, #12]
|
|
80044e0: 617b str r3, [r7, #20]
|
|
Init.BusWide = WideMode;
|
|
80044e2: 683b ldr r3, [r7, #0]
|
|
80044e4: 61bb str r3, [r7, #24]
|
|
Init.HardwareFlowControl = hsd->Init.HardwareFlowControl;
|
|
80044e6: 687b ldr r3, [r7, #4]
|
|
80044e8: 695b ldr r3, [r3, #20]
|
|
80044ea: 61fb str r3, [r7, #28]
|
|
Init.ClockDiv = hsd->Init.ClockDiv;
|
|
80044ec: 687b ldr r3, [r7, #4]
|
|
80044ee: 699b ldr r3, [r3, #24]
|
|
80044f0: 623b str r3, [r7, #32]
|
|
(void)SDIO_Init(hsd->Instance, Init);
|
|
80044f2: 687b ldr r3, [r7, #4]
|
|
80044f4: 681d ldr r5, [r3, #0]
|
|
80044f6: 466c mov r4, sp
|
|
80044f8: f107 0318 add.w r3, r7, #24
|
|
80044fc: e893 0007 ldmia.w r3, {r0, r1, r2}
|
|
8004500: e884 0007 stmia.w r4, {r0, r1, r2}
|
|
8004504: f107 030c add.w r3, r7, #12
|
|
8004508: cb0e ldmia r3, {r1, r2, r3}
|
|
800450a: 4628 mov r0, r5
|
|
800450c: f000 fb1d bl 8004b4a <SDIO_Init>
|
|
}
|
|
|
|
/* Change State */
|
|
hsd->State = HAL_SD_STATE_READY;
|
|
8004510: 687b ldr r3, [r7, #4]
|
|
8004512: 2201 movs r2, #1
|
|
8004514: f883 2034 strb.w r2, [r3, #52] ; 0x34
|
|
|
|
return HAL_OK;
|
|
8004518: 2300 movs r3, #0
|
|
}
|
|
800451a: 4618 mov r0, r3
|
|
800451c: 3728 adds r7, #40 ; 0x28
|
|
800451e: 46bd mov sp, r7
|
|
8004520: bdb0 pop {r4, r5, r7, pc}
|
|
8004522: bf00 nop
|
|
8004524: 004005ff .word 0x004005ff
|
|
|
|
08004528 <HAL_SD_GetCardState>:
|
|
* @brief Gets the current sd card data state.
|
|
* @param hsd: pointer to SD handle
|
|
* @retval Card state
|
|
*/
|
|
HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd)
|
|
{
|
|
8004528: b580 push {r7, lr}
|
|
800452a: b086 sub sp, #24
|
|
800452c: af00 add r7, sp, #0
|
|
800452e: 6078 str r0, [r7, #4]
|
|
uint32_t cardstate;
|
|
uint32_t errorstate;
|
|
uint32_t resp1 = 0;
|
|
8004530: 2300 movs r3, #0
|
|
8004532: 60fb str r3, [r7, #12]
|
|
|
|
errorstate = SD_SendStatus(hsd, &resp1);
|
|
8004534: f107 030c add.w r3, r7, #12
|
|
8004538: 4619 mov r1, r3
|
|
800453a: 6878 ldr r0, [r7, #4]
|
|
800453c: f000 f97d bl 800483a <SD_SendStatus>
|
|
8004540: 6178 str r0, [r7, #20]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004542: 697b ldr r3, [r7, #20]
|
|
8004544: 2b00 cmp r3, #0
|
|
8004546: d005 beq.n 8004554 <HAL_SD_GetCardState+0x2c>
|
|
{
|
|
hsd->ErrorCode |= errorstate;
|
|
8004548: 687b ldr r3, [r7, #4]
|
|
800454a: 6b9a ldr r2, [r3, #56] ; 0x38
|
|
800454c: 697b ldr r3, [r7, #20]
|
|
800454e: 431a orrs r2, r3
|
|
8004550: 687b ldr r3, [r7, #4]
|
|
8004552: 639a str r2, [r3, #56] ; 0x38
|
|
}
|
|
|
|
cardstate = ((resp1 >> 9U) & 0x0FU);
|
|
8004554: 68fb ldr r3, [r7, #12]
|
|
8004556: 0a5b lsrs r3, r3, #9
|
|
8004558: f003 030f and.w r3, r3, #15
|
|
800455c: 613b str r3, [r7, #16]
|
|
|
|
return (HAL_SD_CardStateTypeDef)cardstate;
|
|
800455e: 693b ldr r3, [r7, #16]
|
|
}
|
|
8004560: 4618 mov r0, r3
|
|
8004562: 3718 adds r7, #24
|
|
8004564: 46bd mov sp, r7
|
|
8004566: bd80 pop {r7, pc}
|
|
|
|
08004568 <SD_InitCard>:
|
|
* @brief Initializes the sd card.
|
|
* @param hsd: Pointer to SD handle
|
|
* @retval SD Card error state
|
|
*/
|
|
static uint32_t SD_InitCard(SD_HandleTypeDef *hsd)
|
|
{
|
|
8004568: b5b0 push {r4, r5, r7, lr}
|
|
800456a: b094 sub sp, #80 ; 0x50
|
|
800456c: af04 add r7, sp, #16
|
|
800456e: 6078 str r0, [r7, #4]
|
|
HAL_SD_CardCSDTypeDef CSD;
|
|
uint32_t errorstate;
|
|
uint16_t sd_rca = 1U;
|
|
8004570: 2301 movs r3, #1
|
|
8004572: 81fb strh r3, [r7, #14]
|
|
|
|
/* Check the power State */
|
|
if(SDIO_GetPowerState(hsd->Instance) == 0U)
|
|
8004574: 687b ldr r3, [r7, #4]
|
|
8004576: 681b ldr r3, [r3, #0]
|
|
8004578: 4618 mov r0, r3
|
|
800457a: f000 fb48 bl 8004c0e <SDIO_GetPowerState>
|
|
800457e: 4603 mov r3, r0
|
|
8004580: 2b00 cmp r3, #0
|
|
8004582: d102 bne.n 800458a <SD_InitCard+0x22>
|
|
{
|
|
/* Power off */
|
|
return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE;
|
|
8004584: f04f 6380 mov.w r3, #67108864 ; 0x4000000
|
|
8004588: e0b7 b.n 80046fa <SD_InitCard+0x192>
|
|
}
|
|
|
|
if(hsd->SdCard.CardType != CARD_SECURED)
|
|
800458a: 687b ldr r3, [r7, #4]
|
|
800458c: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
800458e: 2b03 cmp r3, #3
|
|
8004590: d02f beq.n 80045f2 <SD_InitCard+0x8a>
|
|
{
|
|
/* Send CMD2 ALL_SEND_CID */
|
|
errorstate = SDMMC_CmdSendCID(hsd->Instance);
|
|
8004592: 687b ldr r3, [r7, #4]
|
|
8004594: 681b ldr r3, [r3, #0]
|
|
8004596: 4618 mov r0, r3
|
|
8004598: f000 fd6c bl 8005074 <SDMMC_CmdSendCID>
|
|
800459c: 63f8 str r0, [r7, #60] ; 0x3c
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
800459e: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
80045a0: 2b00 cmp r3, #0
|
|
80045a2: d001 beq.n 80045a8 <SD_InitCard+0x40>
|
|
{
|
|
return errorstate;
|
|
80045a4: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
80045a6: e0a8 b.n 80046fa <SD_InitCard+0x192>
|
|
}
|
|
else
|
|
{
|
|
/* Get Card identification number data */
|
|
hsd->CID[0U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP1);
|
|
80045a8: 687b ldr r3, [r7, #4]
|
|
80045aa: 681b ldr r3, [r3, #0]
|
|
80045ac: 2100 movs r1, #0
|
|
80045ae: 4618 mov r0, r3
|
|
80045b0: f000 fb6f bl 8004c92 <SDIO_GetResponse>
|
|
80045b4: 4602 mov r2, r0
|
|
80045b6: 687b ldr r3, [r7, #4]
|
|
80045b8: 675a str r2, [r3, #116] ; 0x74
|
|
hsd->CID[1U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP2);
|
|
80045ba: 687b ldr r3, [r7, #4]
|
|
80045bc: 681b ldr r3, [r3, #0]
|
|
80045be: 2104 movs r1, #4
|
|
80045c0: 4618 mov r0, r3
|
|
80045c2: f000 fb66 bl 8004c92 <SDIO_GetResponse>
|
|
80045c6: 4602 mov r2, r0
|
|
80045c8: 687b ldr r3, [r7, #4]
|
|
80045ca: 679a str r2, [r3, #120] ; 0x78
|
|
hsd->CID[2U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP3);
|
|
80045cc: 687b ldr r3, [r7, #4]
|
|
80045ce: 681b ldr r3, [r3, #0]
|
|
80045d0: 2108 movs r1, #8
|
|
80045d2: 4618 mov r0, r3
|
|
80045d4: f000 fb5d bl 8004c92 <SDIO_GetResponse>
|
|
80045d8: 4602 mov r2, r0
|
|
80045da: 687b ldr r3, [r7, #4]
|
|
80045dc: 67da str r2, [r3, #124] ; 0x7c
|
|
hsd->CID[3U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP4);
|
|
80045de: 687b ldr r3, [r7, #4]
|
|
80045e0: 681b ldr r3, [r3, #0]
|
|
80045e2: 210c movs r1, #12
|
|
80045e4: 4618 mov r0, r3
|
|
80045e6: f000 fb54 bl 8004c92 <SDIO_GetResponse>
|
|
80045ea: 4602 mov r2, r0
|
|
80045ec: 687b ldr r3, [r7, #4]
|
|
80045ee: f8c3 2080 str.w r2, [r3, #128] ; 0x80
|
|
}
|
|
}
|
|
|
|
if(hsd->SdCard.CardType != CARD_SECURED)
|
|
80045f2: 687b ldr r3, [r7, #4]
|
|
80045f4: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
80045f6: 2b03 cmp r3, #3
|
|
80045f8: d00d beq.n 8004616 <SD_InitCard+0xae>
|
|
{
|
|
/* Send CMD3 SET_REL_ADDR with argument 0 */
|
|
/* SD Card publishes its RCA. */
|
|
errorstate = SDMMC_CmdSetRelAdd(hsd->Instance, &sd_rca);
|
|
80045fa: 687b ldr r3, [r7, #4]
|
|
80045fc: 681b ldr r3, [r3, #0]
|
|
80045fe: f107 020e add.w r2, r7, #14
|
|
8004602: 4611 mov r1, r2
|
|
8004604: 4618 mov r0, r3
|
|
8004606: f000 fd72 bl 80050ee <SDMMC_CmdSetRelAdd>
|
|
800460a: 63f8 str r0, [r7, #60] ; 0x3c
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
800460c: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
800460e: 2b00 cmp r3, #0
|
|
8004610: d001 beq.n 8004616 <SD_InitCard+0xae>
|
|
{
|
|
return errorstate;
|
|
8004612: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8004614: e071 b.n 80046fa <SD_InitCard+0x192>
|
|
}
|
|
}
|
|
if(hsd->SdCard.CardType != CARD_SECURED)
|
|
8004616: 687b ldr r3, [r7, #4]
|
|
8004618: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
800461a: 2b03 cmp r3, #3
|
|
800461c: d036 beq.n 800468c <SD_InitCard+0x124>
|
|
{
|
|
/* Get the SD card RCA */
|
|
hsd->SdCard.RelCardAdd = sd_rca;
|
|
800461e: 89fb ldrh r3, [r7, #14]
|
|
8004620: 461a mov r2, r3
|
|
8004622: 687b ldr r3, [r7, #4]
|
|
8004624: 651a str r2, [r3, #80] ; 0x50
|
|
|
|
/* Send CMD9 SEND_CSD with argument as card's RCA */
|
|
errorstate = SDMMC_CmdSendCSD(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U));
|
|
8004626: 687b ldr r3, [r7, #4]
|
|
8004628: 681a ldr r2, [r3, #0]
|
|
800462a: 687b ldr r3, [r7, #4]
|
|
800462c: 6d1b ldr r3, [r3, #80] ; 0x50
|
|
800462e: 041b lsls r3, r3, #16
|
|
8004630: 4619 mov r1, r3
|
|
8004632: 4610 mov r0, r2
|
|
8004634: f000 fd3c bl 80050b0 <SDMMC_CmdSendCSD>
|
|
8004638: 63f8 str r0, [r7, #60] ; 0x3c
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
800463a: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
800463c: 2b00 cmp r3, #0
|
|
800463e: d001 beq.n 8004644 <SD_InitCard+0xdc>
|
|
{
|
|
return errorstate;
|
|
8004640: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8004642: e05a b.n 80046fa <SD_InitCard+0x192>
|
|
}
|
|
else
|
|
{
|
|
/* Get Card Specific Data */
|
|
hsd->CSD[0U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP1);
|
|
8004644: 687b ldr r3, [r7, #4]
|
|
8004646: 681b ldr r3, [r3, #0]
|
|
8004648: 2100 movs r1, #0
|
|
800464a: 4618 mov r0, r3
|
|
800464c: f000 fb21 bl 8004c92 <SDIO_GetResponse>
|
|
8004650: 4602 mov r2, r0
|
|
8004652: 687b ldr r3, [r7, #4]
|
|
8004654: 665a str r2, [r3, #100] ; 0x64
|
|
hsd->CSD[1U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP2);
|
|
8004656: 687b ldr r3, [r7, #4]
|
|
8004658: 681b ldr r3, [r3, #0]
|
|
800465a: 2104 movs r1, #4
|
|
800465c: 4618 mov r0, r3
|
|
800465e: f000 fb18 bl 8004c92 <SDIO_GetResponse>
|
|
8004662: 4602 mov r2, r0
|
|
8004664: 687b ldr r3, [r7, #4]
|
|
8004666: 669a str r2, [r3, #104] ; 0x68
|
|
hsd->CSD[2U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP3);
|
|
8004668: 687b ldr r3, [r7, #4]
|
|
800466a: 681b ldr r3, [r3, #0]
|
|
800466c: 2108 movs r1, #8
|
|
800466e: 4618 mov r0, r3
|
|
8004670: f000 fb0f bl 8004c92 <SDIO_GetResponse>
|
|
8004674: 4602 mov r2, r0
|
|
8004676: 687b ldr r3, [r7, #4]
|
|
8004678: 66da str r2, [r3, #108] ; 0x6c
|
|
hsd->CSD[3U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP4);
|
|
800467a: 687b ldr r3, [r7, #4]
|
|
800467c: 681b ldr r3, [r3, #0]
|
|
800467e: 210c movs r1, #12
|
|
8004680: 4618 mov r0, r3
|
|
8004682: f000 fb06 bl 8004c92 <SDIO_GetResponse>
|
|
8004686: 4602 mov r2, r0
|
|
8004688: 687b ldr r3, [r7, #4]
|
|
800468a: 671a str r2, [r3, #112] ; 0x70
|
|
}
|
|
}
|
|
|
|
/* Get the Card Class */
|
|
hsd->SdCard.Class = (SDIO_GetResponse(hsd->Instance, SDIO_RESP2) >> 20U);
|
|
800468c: 687b ldr r3, [r7, #4]
|
|
800468e: 681b ldr r3, [r3, #0]
|
|
8004690: 2104 movs r1, #4
|
|
8004692: 4618 mov r0, r3
|
|
8004694: f000 fafd bl 8004c92 <SDIO_GetResponse>
|
|
8004698: 4603 mov r3, r0
|
|
800469a: 0d1a lsrs r2, r3, #20
|
|
800469c: 687b ldr r3, [r7, #4]
|
|
800469e: 64da str r2, [r3, #76] ; 0x4c
|
|
|
|
/* Get CSD parameters */
|
|
if (HAL_SD_GetCardCSD(hsd, &CSD) != HAL_OK)
|
|
80046a0: f107 0310 add.w r3, r7, #16
|
|
80046a4: 4619 mov r1, r3
|
|
80046a6: 6878 ldr r0, [r7, #4]
|
|
80046a8: f7ff fcf2 bl 8004090 <HAL_SD_GetCardCSD>
|
|
80046ac: 4603 mov r3, r0
|
|
80046ae: 2b00 cmp r3, #0
|
|
80046b0: d002 beq.n 80046b8 <SD_InitCard+0x150>
|
|
{
|
|
return HAL_SD_ERROR_UNSUPPORTED_FEATURE;
|
|
80046b2: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
|
80046b6: e020 b.n 80046fa <SD_InitCard+0x192>
|
|
}
|
|
|
|
/* Select the Card */
|
|
errorstate = SDMMC_CmdSelDesel(hsd->Instance, (uint32_t)(((uint32_t)hsd->SdCard.RelCardAdd) << 16U));
|
|
80046b8: 687b ldr r3, [r7, #4]
|
|
80046ba: 6819 ldr r1, [r3, #0]
|
|
80046bc: 687b ldr r3, [r7, #4]
|
|
80046be: 6d1b ldr r3, [r3, #80] ; 0x50
|
|
80046c0: 041b lsls r3, r3, #16
|
|
80046c2: f04f 0400 mov.w r4, #0
|
|
80046c6: 461a mov r2, r3
|
|
80046c8: 4623 mov r3, r4
|
|
80046ca: 4608 mov r0, r1
|
|
80046cc: f000 fbea bl 8004ea4 <SDMMC_CmdSelDesel>
|
|
80046d0: 63f8 str r0, [r7, #60] ; 0x3c
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80046d2: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
80046d4: 2b00 cmp r3, #0
|
|
80046d6: d001 beq.n 80046dc <SD_InitCard+0x174>
|
|
{
|
|
return errorstate;
|
|
80046d8: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
80046da: e00e b.n 80046fa <SD_InitCard+0x192>
|
|
}
|
|
|
|
/* Configure SDIO peripheral interface */
|
|
(void)SDIO_Init(hsd->Instance, hsd->Init);
|
|
80046dc: 687b ldr r3, [r7, #4]
|
|
80046de: 681d ldr r5, [r3, #0]
|
|
80046e0: 687b ldr r3, [r7, #4]
|
|
80046e2: 466c mov r4, sp
|
|
80046e4: f103 0210 add.w r2, r3, #16
|
|
80046e8: ca07 ldmia r2, {r0, r1, r2}
|
|
80046ea: e884 0007 stmia.w r4, {r0, r1, r2}
|
|
80046ee: 3304 adds r3, #4
|
|
80046f0: cb0e ldmia r3, {r1, r2, r3}
|
|
80046f2: 4628 mov r0, r5
|
|
80046f4: f000 fa29 bl 8004b4a <SDIO_Init>
|
|
|
|
/* All cards are initialized */
|
|
return HAL_SD_ERROR_NONE;
|
|
80046f8: 2300 movs r3, #0
|
|
}
|
|
80046fa: 4618 mov r0, r3
|
|
80046fc: 3740 adds r7, #64 ; 0x40
|
|
80046fe: 46bd mov sp, r7
|
|
8004700: bdb0 pop {r4, r5, r7, pc}
|
|
...
|
|
|
|
08004704 <SD_PowerON>:
|
|
* in the SD handle.
|
|
* @param hsd: Pointer to SD handle
|
|
* @retval error state
|
|
*/
|
|
static uint32_t SD_PowerON(SD_HandleTypeDef *hsd)
|
|
{
|
|
8004704: b580 push {r7, lr}
|
|
8004706: b086 sub sp, #24
|
|
8004708: af00 add r7, sp, #0
|
|
800470a: 6078 str r0, [r7, #4]
|
|
__IO uint32_t count = 0U;
|
|
800470c: 2300 movs r3, #0
|
|
800470e: 60bb str r3, [r7, #8]
|
|
uint32_t response = 0U, validvoltage = 0U;
|
|
8004710: 2300 movs r3, #0
|
|
8004712: 617b str r3, [r7, #20]
|
|
8004714: 2300 movs r3, #0
|
|
8004716: 613b str r3, [r7, #16]
|
|
uint32_t errorstate;
|
|
|
|
/* CMD0: GO_IDLE_STATE */
|
|
errorstate = SDMMC_CmdGoIdleState(hsd->Instance);
|
|
8004718: 687b ldr r3, [r7, #4]
|
|
800471a: 681b ldr r3, [r3, #0]
|
|
800471c: 4618 mov r0, r3
|
|
800471e: f000 fbe4 bl 8004eea <SDMMC_CmdGoIdleState>
|
|
8004722: 60f8 str r0, [r7, #12]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004724: 68fb ldr r3, [r7, #12]
|
|
8004726: 2b00 cmp r3, #0
|
|
8004728: d001 beq.n 800472e <SD_PowerON+0x2a>
|
|
{
|
|
return errorstate;
|
|
800472a: 68fb ldr r3, [r7, #12]
|
|
800472c: e072 b.n 8004814 <SD_PowerON+0x110>
|
|
}
|
|
|
|
/* CMD8: SEND_IF_COND: Command available only on V2.0 cards */
|
|
errorstate = SDMMC_CmdOperCond(hsd->Instance);
|
|
800472e: 687b ldr r3, [r7, #4]
|
|
8004730: 681b ldr r3, [r3, #0]
|
|
8004732: 4618 mov r0, r3
|
|
8004734: f000 fbf7 bl 8004f26 <SDMMC_CmdOperCond>
|
|
8004738: 60f8 str r0, [r7, #12]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
800473a: 68fb ldr r3, [r7, #12]
|
|
800473c: 2b00 cmp r3, #0
|
|
800473e: d00d beq.n 800475c <SD_PowerON+0x58>
|
|
{
|
|
hsd->SdCard.CardVersion = CARD_V1_X;
|
|
8004740: 687b ldr r3, [r7, #4]
|
|
8004742: 2200 movs r2, #0
|
|
8004744: 649a str r2, [r3, #72] ; 0x48
|
|
/* CMD0: GO_IDLE_STATE */
|
|
errorstate = SDMMC_CmdGoIdleState(hsd->Instance);
|
|
8004746: 687b ldr r3, [r7, #4]
|
|
8004748: 681b ldr r3, [r3, #0]
|
|
800474a: 4618 mov r0, r3
|
|
800474c: f000 fbcd bl 8004eea <SDMMC_CmdGoIdleState>
|
|
8004750: 60f8 str r0, [r7, #12]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004752: 68fb ldr r3, [r7, #12]
|
|
8004754: 2b00 cmp r3, #0
|
|
8004756: d004 beq.n 8004762 <SD_PowerON+0x5e>
|
|
{
|
|
return errorstate;
|
|
8004758: 68fb ldr r3, [r7, #12]
|
|
800475a: e05b b.n 8004814 <SD_PowerON+0x110>
|
|
}
|
|
|
|
}
|
|
else
|
|
{
|
|
hsd->SdCard.CardVersion = CARD_V2_X;
|
|
800475c: 687b ldr r3, [r7, #4]
|
|
800475e: 2201 movs r2, #1
|
|
8004760: 649a str r2, [r3, #72] ; 0x48
|
|
}
|
|
|
|
if( hsd->SdCard.CardVersion == CARD_V2_X)
|
|
8004762: 687b ldr r3, [r7, #4]
|
|
8004764: 6c9b ldr r3, [r3, #72] ; 0x48
|
|
8004766: 2b01 cmp r3, #1
|
|
8004768: d137 bne.n 80047da <SD_PowerON+0xd6>
|
|
{
|
|
/* SEND CMD55 APP_CMD with RCA as 0 */
|
|
errorstate = SDMMC_CmdAppCommand(hsd->Instance, 0);
|
|
800476a: 687b ldr r3, [r7, #4]
|
|
800476c: 681b ldr r3, [r3, #0]
|
|
800476e: 2100 movs r1, #0
|
|
8004770: 4618 mov r0, r3
|
|
8004772: f000 fbf7 bl 8004f64 <SDMMC_CmdAppCommand>
|
|
8004776: 60f8 str r0, [r7, #12]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004778: 68fb ldr r3, [r7, #12]
|
|
800477a: 2b00 cmp r3, #0
|
|
800477c: d02d beq.n 80047da <SD_PowerON+0xd6>
|
|
{
|
|
return HAL_SD_ERROR_UNSUPPORTED_FEATURE;
|
|
800477e: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
|
8004782: e047 b.n 8004814 <SD_PowerON+0x110>
|
|
/* SD CARD */
|
|
/* Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */
|
|
while((count < SDMMC_MAX_VOLT_TRIAL) && (validvoltage == 0U))
|
|
{
|
|
/* SEND CMD55 APP_CMD with RCA as 0 */
|
|
errorstate = SDMMC_CmdAppCommand(hsd->Instance, 0);
|
|
8004784: 687b ldr r3, [r7, #4]
|
|
8004786: 681b ldr r3, [r3, #0]
|
|
8004788: 2100 movs r1, #0
|
|
800478a: 4618 mov r0, r3
|
|
800478c: f000 fbea bl 8004f64 <SDMMC_CmdAppCommand>
|
|
8004790: 60f8 str r0, [r7, #12]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004792: 68fb ldr r3, [r7, #12]
|
|
8004794: 2b00 cmp r3, #0
|
|
8004796: d001 beq.n 800479c <SD_PowerON+0x98>
|
|
{
|
|
return errorstate;
|
|
8004798: 68fb ldr r3, [r7, #12]
|
|
800479a: e03b b.n 8004814 <SD_PowerON+0x110>
|
|
}
|
|
|
|
/* Send CMD41 */
|
|
errorstate = SDMMC_CmdAppOperCommand(hsd->Instance, SDMMC_VOLTAGE_WINDOW_SD | SDMMC_HIGH_CAPACITY | SD_SWITCH_1_8V_CAPACITY);
|
|
800479c: 687b ldr r3, [r7, #4]
|
|
800479e: 681b ldr r3, [r3, #0]
|
|
80047a0: 491e ldr r1, [pc, #120] ; (800481c <SD_PowerON+0x118>)
|
|
80047a2: 4618 mov r0, r3
|
|
80047a4: f000 fc00 bl 8004fa8 <SDMMC_CmdAppOperCommand>
|
|
80047a8: 60f8 str r0, [r7, #12]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80047aa: 68fb ldr r3, [r7, #12]
|
|
80047ac: 2b00 cmp r3, #0
|
|
80047ae: d002 beq.n 80047b6 <SD_PowerON+0xb2>
|
|
{
|
|
return HAL_SD_ERROR_UNSUPPORTED_FEATURE;
|
|
80047b0: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
|
80047b4: e02e b.n 8004814 <SD_PowerON+0x110>
|
|
}
|
|
|
|
/* Get command response */
|
|
response = SDIO_GetResponse(hsd->Instance, SDIO_RESP1);
|
|
80047b6: 687b ldr r3, [r7, #4]
|
|
80047b8: 681b ldr r3, [r3, #0]
|
|
80047ba: 2100 movs r1, #0
|
|
80047bc: 4618 mov r0, r3
|
|
80047be: f000 fa68 bl 8004c92 <SDIO_GetResponse>
|
|
80047c2: 6178 str r0, [r7, #20]
|
|
|
|
/* Get operating voltage*/
|
|
validvoltage = (((response >> 31U) == 1U) ? 1U : 0U);
|
|
80047c4: 697b ldr r3, [r7, #20]
|
|
80047c6: 0fdb lsrs r3, r3, #31
|
|
80047c8: 2b01 cmp r3, #1
|
|
80047ca: d101 bne.n 80047d0 <SD_PowerON+0xcc>
|
|
80047cc: 2301 movs r3, #1
|
|
80047ce: e000 b.n 80047d2 <SD_PowerON+0xce>
|
|
80047d0: 2300 movs r3, #0
|
|
80047d2: 613b str r3, [r7, #16]
|
|
|
|
count++;
|
|
80047d4: 68bb ldr r3, [r7, #8]
|
|
80047d6: 3301 adds r3, #1
|
|
80047d8: 60bb str r3, [r7, #8]
|
|
while((count < SDMMC_MAX_VOLT_TRIAL) && (validvoltage == 0U))
|
|
80047da: 68bb ldr r3, [r7, #8]
|
|
80047dc: f64f 72fe movw r2, #65534 ; 0xfffe
|
|
80047e0: 4293 cmp r3, r2
|
|
80047e2: d802 bhi.n 80047ea <SD_PowerON+0xe6>
|
|
80047e4: 693b ldr r3, [r7, #16]
|
|
80047e6: 2b00 cmp r3, #0
|
|
80047e8: d0cc beq.n 8004784 <SD_PowerON+0x80>
|
|
}
|
|
|
|
if(count >= SDMMC_MAX_VOLT_TRIAL)
|
|
80047ea: 68bb ldr r3, [r7, #8]
|
|
80047ec: f64f 72fe movw r2, #65534 ; 0xfffe
|
|
80047f0: 4293 cmp r3, r2
|
|
80047f2: d902 bls.n 80047fa <SD_PowerON+0xf6>
|
|
{
|
|
return HAL_SD_ERROR_INVALID_VOLTRANGE;
|
|
80047f4: f04f 7380 mov.w r3, #16777216 ; 0x1000000
|
|
80047f8: e00c b.n 8004814 <SD_PowerON+0x110>
|
|
}
|
|
|
|
if((response & SDMMC_HIGH_CAPACITY) == SDMMC_HIGH_CAPACITY) /* (response &= SD_HIGH_CAPACITY) */
|
|
80047fa: 697b ldr r3, [r7, #20]
|
|
80047fc: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000
|
|
8004800: 2b00 cmp r3, #0
|
|
8004802: d003 beq.n 800480c <SD_PowerON+0x108>
|
|
{
|
|
hsd->SdCard.CardType = CARD_SDHC_SDXC;
|
|
8004804: 687b ldr r3, [r7, #4]
|
|
8004806: 2201 movs r2, #1
|
|
8004808: 645a str r2, [r3, #68] ; 0x44
|
|
800480a: e002 b.n 8004812 <SD_PowerON+0x10e>
|
|
}
|
|
else
|
|
{
|
|
hsd->SdCard.CardType = CARD_SDSC;
|
|
800480c: 687b ldr r3, [r7, #4]
|
|
800480e: 2200 movs r2, #0
|
|
8004810: 645a str r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
|
|
return HAL_SD_ERROR_NONE;
|
|
8004812: 2300 movs r3, #0
|
|
}
|
|
8004814: 4618 mov r0, r3
|
|
8004816: 3718 adds r7, #24
|
|
8004818: 46bd mov sp, r7
|
|
800481a: bd80 pop {r7, pc}
|
|
800481c: c1100000 .word 0xc1100000
|
|
|
|
08004820 <SD_PowerOFF>:
|
|
* @brief Turns the SDIO output signals off.
|
|
* @param hsd: Pointer to SD handle
|
|
* @retval None
|
|
*/
|
|
static void SD_PowerOFF(SD_HandleTypeDef *hsd)
|
|
{
|
|
8004820: b580 push {r7, lr}
|
|
8004822: b082 sub sp, #8
|
|
8004824: af00 add r7, sp, #0
|
|
8004826: 6078 str r0, [r7, #4]
|
|
/* Set Power State to OFF */
|
|
(void)SDIO_PowerState_OFF(hsd->Instance);
|
|
8004828: 687b ldr r3, [r7, #4]
|
|
800482a: 681b ldr r3, [r3, #0]
|
|
800482c: 4618 mov r0, r3
|
|
800482e: f000 f9e1 bl 8004bf4 <SDIO_PowerState_OFF>
|
|
}
|
|
8004832: bf00 nop
|
|
8004834: 3708 adds r7, #8
|
|
8004836: 46bd mov sp, r7
|
|
8004838: bd80 pop {r7, pc}
|
|
|
|
0800483a <SD_SendStatus>:
|
|
* @param pCardStatus: pointer to the buffer that will contain the SD card
|
|
* status (Card Status register)
|
|
* @retval error state
|
|
*/
|
|
static uint32_t SD_SendStatus(SD_HandleTypeDef *hsd, uint32_t *pCardStatus)
|
|
{
|
|
800483a: b580 push {r7, lr}
|
|
800483c: b084 sub sp, #16
|
|
800483e: af00 add r7, sp, #0
|
|
8004840: 6078 str r0, [r7, #4]
|
|
8004842: 6039 str r1, [r7, #0]
|
|
uint32_t errorstate;
|
|
|
|
if(pCardStatus == NULL)
|
|
8004844: 683b ldr r3, [r7, #0]
|
|
8004846: 2b00 cmp r3, #0
|
|
8004848: d102 bne.n 8004850 <SD_SendStatus+0x16>
|
|
{
|
|
return HAL_SD_ERROR_PARAM;
|
|
800484a: f04f 6300 mov.w r3, #134217728 ; 0x8000000
|
|
800484e: e018 b.n 8004882 <SD_SendStatus+0x48>
|
|
}
|
|
|
|
/* Send Status command */
|
|
errorstate = SDMMC_CmdSendStatus(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U));
|
|
8004850: 687b ldr r3, [r7, #4]
|
|
8004852: 681a ldr r2, [r3, #0]
|
|
8004854: 687b ldr r3, [r7, #4]
|
|
8004856: 6d1b ldr r3, [r3, #80] ; 0x50
|
|
8004858: 041b lsls r3, r3, #16
|
|
800485a: 4619 mov r1, r3
|
|
800485c: 4610 mov r0, r2
|
|
800485e: f000 fc67 bl 8005130 <SDMMC_CmdSendStatus>
|
|
8004862: 60f8 str r0, [r7, #12]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004864: 68fb ldr r3, [r7, #12]
|
|
8004866: 2b00 cmp r3, #0
|
|
8004868: d001 beq.n 800486e <SD_SendStatus+0x34>
|
|
{
|
|
return errorstate;
|
|
800486a: 68fb ldr r3, [r7, #12]
|
|
800486c: e009 b.n 8004882 <SD_SendStatus+0x48>
|
|
}
|
|
|
|
/* Get SD card status */
|
|
*pCardStatus = SDIO_GetResponse(hsd->Instance, SDIO_RESP1);
|
|
800486e: 687b ldr r3, [r7, #4]
|
|
8004870: 681b ldr r3, [r3, #0]
|
|
8004872: 2100 movs r1, #0
|
|
8004874: 4618 mov r0, r3
|
|
8004876: f000 fa0c bl 8004c92 <SDIO_GetResponse>
|
|
800487a: 4602 mov r2, r0
|
|
800487c: 683b ldr r3, [r7, #0]
|
|
800487e: 601a str r2, [r3, #0]
|
|
|
|
return HAL_SD_ERROR_NONE;
|
|
8004880: 2300 movs r3, #0
|
|
}
|
|
8004882: 4618 mov r0, r3
|
|
8004884: 3710 adds r7, #16
|
|
8004886: 46bd mov sp, r7
|
|
8004888: bd80 pop {r7, pc}
|
|
|
|
0800488a <SD_WideBus_Enable>:
|
|
* @brief Enables the SDIO wide bus mode.
|
|
* @param hsd: pointer to SD handle
|
|
* @retval error state
|
|
*/
|
|
static uint32_t SD_WideBus_Enable(SD_HandleTypeDef *hsd)
|
|
{
|
|
800488a: b580 push {r7, lr}
|
|
800488c: b086 sub sp, #24
|
|
800488e: af00 add r7, sp, #0
|
|
8004890: 6078 str r0, [r7, #4]
|
|
uint32_t scr[2U] = {0U, 0U};
|
|
8004892: 2300 movs r3, #0
|
|
8004894: 60fb str r3, [r7, #12]
|
|
8004896: 2300 movs r3, #0
|
|
8004898: 613b str r3, [r7, #16]
|
|
uint32_t errorstate;
|
|
|
|
if((SDIO_GetResponse(hsd->Instance, SDIO_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED)
|
|
800489a: 687b ldr r3, [r7, #4]
|
|
800489c: 681b ldr r3, [r3, #0]
|
|
800489e: 2100 movs r1, #0
|
|
80048a0: 4618 mov r0, r3
|
|
80048a2: f000 f9f6 bl 8004c92 <SDIO_GetResponse>
|
|
80048a6: 4603 mov r3, r0
|
|
80048a8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
80048ac: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
|
|
80048b0: d102 bne.n 80048b8 <SD_WideBus_Enable+0x2e>
|
|
{
|
|
return HAL_SD_ERROR_LOCK_UNLOCK_FAILED;
|
|
80048b2: f44f 6300 mov.w r3, #2048 ; 0x800
|
|
80048b6: e02f b.n 8004918 <SD_WideBus_Enable+0x8e>
|
|
}
|
|
|
|
/* Get SCR Register */
|
|
errorstate = SD_FindSCR(hsd, scr);
|
|
80048b8: f107 030c add.w r3, r7, #12
|
|
80048bc: 4619 mov r1, r3
|
|
80048be: 6878 ldr r0, [r7, #4]
|
|
80048c0: f000 f879 bl 80049b6 <SD_FindSCR>
|
|
80048c4: 6178 str r0, [r7, #20]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80048c6: 697b ldr r3, [r7, #20]
|
|
80048c8: 2b00 cmp r3, #0
|
|
80048ca: d001 beq.n 80048d0 <SD_WideBus_Enable+0x46>
|
|
{
|
|
return errorstate;
|
|
80048cc: 697b ldr r3, [r7, #20]
|
|
80048ce: e023 b.n 8004918 <SD_WideBus_Enable+0x8e>
|
|
}
|
|
|
|
/* If requested card supports wide bus operation */
|
|
if((scr[1U] & SDMMC_WIDE_BUS_SUPPORT) != SDMMC_ALLZERO)
|
|
80048d0: 693b ldr r3, [r7, #16]
|
|
80048d2: f403 2380 and.w r3, r3, #262144 ; 0x40000
|
|
80048d6: 2b00 cmp r3, #0
|
|
80048d8: d01c beq.n 8004914 <SD_WideBus_Enable+0x8a>
|
|
{
|
|
/* Send CMD55 APP_CMD with argument as card's RCA.*/
|
|
errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U));
|
|
80048da: 687b ldr r3, [r7, #4]
|
|
80048dc: 681a ldr r2, [r3, #0]
|
|
80048de: 687b ldr r3, [r7, #4]
|
|
80048e0: 6d1b ldr r3, [r3, #80] ; 0x50
|
|
80048e2: 041b lsls r3, r3, #16
|
|
80048e4: 4619 mov r1, r3
|
|
80048e6: 4610 mov r0, r2
|
|
80048e8: f000 fb3c bl 8004f64 <SDMMC_CmdAppCommand>
|
|
80048ec: 6178 str r0, [r7, #20]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80048ee: 697b ldr r3, [r7, #20]
|
|
80048f0: 2b00 cmp r3, #0
|
|
80048f2: d001 beq.n 80048f8 <SD_WideBus_Enable+0x6e>
|
|
{
|
|
return errorstate;
|
|
80048f4: 697b ldr r3, [r7, #20]
|
|
80048f6: e00f b.n 8004918 <SD_WideBus_Enable+0x8e>
|
|
}
|
|
|
|
/* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */
|
|
errorstate = SDMMC_CmdBusWidth(hsd->Instance, 2U);
|
|
80048f8: 687b ldr r3, [r7, #4]
|
|
80048fa: 681b ldr r3, [r3, #0]
|
|
80048fc: 2102 movs r1, #2
|
|
80048fe: 4618 mov r0, r3
|
|
8004900: f000 fb75 bl 8004fee <SDMMC_CmdBusWidth>
|
|
8004904: 6178 str r0, [r7, #20]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004906: 697b ldr r3, [r7, #20]
|
|
8004908: 2b00 cmp r3, #0
|
|
800490a: d001 beq.n 8004910 <SD_WideBus_Enable+0x86>
|
|
{
|
|
return errorstate;
|
|
800490c: 697b ldr r3, [r7, #20]
|
|
800490e: e003 b.n 8004918 <SD_WideBus_Enable+0x8e>
|
|
}
|
|
|
|
return HAL_SD_ERROR_NONE;
|
|
8004910: 2300 movs r3, #0
|
|
8004912: e001 b.n 8004918 <SD_WideBus_Enable+0x8e>
|
|
}
|
|
else
|
|
{
|
|
return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE;
|
|
8004914: f04f 6380 mov.w r3, #67108864 ; 0x4000000
|
|
}
|
|
}
|
|
8004918: 4618 mov r0, r3
|
|
800491a: 3718 adds r7, #24
|
|
800491c: 46bd mov sp, r7
|
|
800491e: bd80 pop {r7, pc}
|
|
|
|
08004920 <SD_WideBus_Disable>:
|
|
* @brief Disables the SDIO wide bus mode.
|
|
* @param hsd: Pointer to SD handle
|
|
* @retval error state
|
|
*/
|
|
static uint32_t SD_WideBus_Disable(SD_HandleTypeDef *hsd)
|
|
{
|
|
8004920: b580 push {r7, lr}
|
|
8004922: b086 sub sp, #24
|
|
8004924: af00 add r7, sp, #0
|
|
8004926: 6078 str r0, [r7, #4]
|
|
uint32_t scr[2U] = {0U, 0U};
|
|
8004928: 2300 movs r3, #0
|
|
800492a: 60fb str r3, [r7, #12]
|
|
800492c: 2300 movs r3, #0
|
|
800492e: 613b str r3, [r7, #16]
|
|
uint32_t errorstate;
|
|
|
|
if((SDIO_GetResponse(hsd->Instance, SDIO_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED)
|
|
8004930: 687b ldr r3, [r7, #4]
|
|
8004932: 681b ldr r3, [r3, #0]
|
|
8004934: 2100 movs r1, #0
|
|
8004936: 4618 mov r0, r3
|
|
8004938: f000 f9ab bl 8004c92 <SDIO_GetResponse>
|
|
800493c: 4603 mov r3, r0
|
|
800493e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8004942: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
|
|
8004946: d102 bne.n 800494e <SD_WideBus_Disable+0x2e>
|
|
{
|
|
return HAL_SD_ERROR_LOCK_UNLOCK_FAILED;
|
|
8004948: f44f 6300 mov.w r3, #2048 ; 0x800
|
|
800494c: e02f b.n 80049ae <SD_WideBus_Disable+0x8e>
|
|
}
|
|
|
|
/* Get SCR Register */
|
|
errorstate = SD_FindSCR(hsd, scr);
|
|
800494e: f107 030c add.w r3, r7, #12
|
|
8004952: 4619 mov r1, r3
|
|
8004954: 6878 ldr r0, [r7, #4]
|
|
8004956: f000 f82e bl 80049b6 <SD_FindSCR>
|
|
800495a: 6178 str r0, [r7, #20]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
800495c: 697b ldr r3, [r7, #20]
|
|
800495e: 2b00 cmp r3, #0
|
|
8004960: d001 beq.n 8004966 <SD_WideBus_Disable+0x46>
|
|
{
|
|
return errorstate;
|
|
8004962: 697b ldr r3, [r7, #20]
|
|
8004964: e023 b.n 80049ae <SD_WideBus_Disable+0x8e>
|
|
}
|
|
|
|
/* If requested card supports 1 bit mode operation */
|
|
if((scr[1U] & SDMMC_SINGLE_BUS_SUPPORT) != SDMMC_ALLZERO)
|
|
8004966: 693b ldr r3, [r7, #16]
|
|
8004968: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
800496c: 2b00 cmp r3, #0
|
|
800496e: d01c beq.n 80049aa <SD_WideBus_Disable+0x8a>
|
|
{
|
|
/* Send CMD55 APP_CMD with argument as card's RCA */
|
|
errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U));
|
|
8004970: 687b ldr r3, [r7, #4]
|
|
8004972: 681a ldr r2, [r3, #0]
|
|
8004974: 687b ldr r3, [r7, #4]
|
|
8004976: 6d1b ldr r3, [r3, #80] ; 0x50
|
|
8004978: 041b lsls r3, r3, #16
|
|
800497a: 4619 mov r1, r3
|
|
800497c: 4610 mov r0, r2
|
|
800497e: f000 faf1 bl 8004f64 <SDMMC_CmdAppCommand>
|
|
8004982: 6178 str r0, [r7, #20]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004984: 697b ldr r3, [r7, #20]
|
|
8004986: 2b00 cmp r3, #0
|
|
8004988: d001 beq.n 800498e <SD_WideBus_Disable+0x6e>
|
|
{
|
|
return errorstate;
|
|
800498a: 697b ldr r3, [r7, #20]
|
|
800498c: e00f b.n 80049ae <SD_WideBus_Disable+0x8e>
|
|
}
|
|
|
|
/* Send ACMD6 APP_CMD with argument as 0 for single bus mode */
|
|
errorstate = SDMMC_CmdBusWidth(hsd->Instance, 0U);
|
|
800498e: 687b ldr r3, [r7, #4]
|
|
8004990: 681b ldr r3, [r3, #0]
|
|
8004992: 2100 movs r1, #0
|
|
8004994: 4618 mov r0, r3
|
|
8004996: f000 fb2a bl 8004fee <SDMMC_CmdBusWidth>
|
|
800499a: 6178 str r0, [r7, #20]
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
800499c: 697b ldr r3, [r7, #20]
|
|
800499e: 2b00 cmp r3, #0
|
|
80049a0: d001 beq.n 80049a6 <SD_WideBus_Disable+0x86>
|
|
{
|
|
return errorstate;
|
|
80049a2: 697b ldr r3, [r7, #20]
|
|
80049a4: e003 b.n 80049ae <SD_WideBus_Disable+0x8e>
|
|
}
|
|
|
|
return HAL_SD_ERROR_NONE;
|
|
80049a6: 2300 movs r3, #0
|
|
80049a8: e001 b.n 80049ae <SD_WideBus_Disable+0x8e>
|
|
}
|
|
else
|
|
{
|
|
return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE;
|
|
80049aa: f04f 6380 mov.w r3, #67108864 ; 0x4000000
|
|
}
|
|
}
|
|
80049ae: 4618 mov r0, r3
|
|
80049b0: 3718 adds r7, #24
|
|
80049b2: 46bd mov sp, r7
|
|
80049b4: bd80 pop {r7, pc}
|
|
|
|
080049b6 <SD_FindSCR>:
|
|
* @param hsd: Pointer to SD handle
|
|
* @param pSCR: pointer to the buffer that will contain the SCR value
|
|
* @retval error state
|
|
*/
|
|
static uint32_t SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR)
|
|
{
|
|
80049b6: b590 push {r4, r7, lr}
|
|
80049b8: b08f sub sp, #60 ; 0x3c
|
|
80049ba: af00 add r7, sp, #0
|
|
80049bc: 6078 str r0, [r7, #4]
|
|
80049be: 6039 str r1, [r7, #0]
|
|
SDIO_DataInitTypeDef config;
|
|
uint32_t errorstate;
|
|
uint32_t tickstart = HAL_GetTick();
|
|
80049c0: f7fb ffc8 bl 8000954 <HAL_GetTick>
|
|
80049c4: 6338 str r0, [r7, #48] ; 0x30
|
|
uint32_t index = 0U;
|
|
80049c6: 2300 movs r3, #0
|
|
80049c8: 637b str r3, [r7, #52] ; 0x34
|
|
uint32_t tempscr[2U] = {0U, 0U};
|
|
80049ca: 2300 movs r3, #0
|
|
80049cc: 60bb str r3, [r7, #8]
|
|
80049ce: 2300 movs r3, #0
|
|
80049d0: 60fb str r3, [r7, #12]
|
|
uint32_t *scr = pSCR;
|
|
80049d2: 683b ldr r3, [r7, #0]
|
|
80049d4: 62fb str r3, [r7, #44] ; 0x2c
|
|
|
|
/* Set Block Size To 8 Bytes */
|
|
errorstate = SDMMC_CmdBlockLength(hsd->Instance, 8U);
|
|
80049d6: 687b ldr r3, [r7, #4]
|
|
80049d8: 681b ldr r3, [r3, #0]
|
|
80049da: 2108 movs r1, #8
|
|
80049dc: 4618 mov r0, r3
|
|
80049de: f000 f995 bl 8004d0c <SDMMC_CmdBlockLength>
|
|
80049e2: 62b8 str r0, [r7, #40] ; 0x28
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
80049e4: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80049e6: 2b00 cmp r3, #0
|
|
80049e8: d001 beq.n 80049ee <SD_FindSCR+0x38>
|
|
{
|
|
return errorstate;
|
|
80049ea: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80049ec: e0a9 b.n 8004b42 <SD_FindSCR+0x18c>
|
|
}
|
|
|
|
/* Send CMD55 APP_CMD with argument as card's RCA */
|
|
errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)((hsd->SdCard.RelCardAdd) << 16U));
|
|
80049ee: 687b ldr r3, [r7, #4]
|
|
80049f0: 681a ldr r2, [r3, #0]
|
|
80049f2: 687b ldr r3, [r7, #4]
|
|
80049f4: 6d1b ldr r3, [r3, #80] ; 0x50
|
|
80049f6: 041b lsls r3, r3, #16
|
|
80049f8: 4619 mov r1, r3
|
|
80049fa: 4610 mov r0, r2
|
|
80049fc: f000 fab2 bl 8004f64 <SDMMC_CmdAppCommand>
|
|
8004a00: 62b8 str r0, [r7, #40] ; 0x28
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004a02: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8004a04: 2b00 cmp r3, #0
|
|
8004a06: d001 beq.n 8004a0c <SD_FindSCR+0x56>
|
|
{
|
|
return errorstate;
|
|
8004a08: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8004a0a: e09a b.n 8004b42 <SD_FindSCR+0x18c>
|
|
}
|
|
|
|
config.DataTimeOut = SDMMC_DATATIMEOUT;
|
|
8004a0c: f04f 33ff mov.w r3, #4294967295
|
|
8004a10: 613b str r3, [r7, #16]
|
|
config.DataLength = 8U;
|
|
8004a12: 2308 movs r3, #8
|
|
8004a14: 617b str r3, [r7, #20]
|
|
config.DataBlockSize = SDIO_DATABLOCK_SIZE_8B;
|
|
8004a16: 2330 movs r3, #48 ; 0x30
|
|
8004a18: 61bb str r3, [r7, #24]
|
|
config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
|
|
8004a1a: 2302 movs r3, #2
|
|
8004a1c: 61fb str r3, [r7, #28]
|
|
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
|
|
8004a1e: 2300 movs r3, #0
|
|
8004a20: 623b str r3, [r7, #32]
|
|
config.DPSM = SDIO_DPSM_ENABLE;
|
|
8004a22: 2301 movs r3, #1
|
|
8004a24: 627b str r3, [r7, #36] ; 0x24
|
|
(void)SDIO_ConfigData(hsd->Instance, &config);
|
|
8004a26: 687b ldr r3, [r7, #4]
|
|
8004a28: 681b ldr r3, [r3, #0]
|
|
8004a2a: f107 0210 add.w r2, r7, #16
|
|
8004a2e: 4611 mov r1, r2
|
|
8004a30: 4618 mov r0, r3
|
|
8004a32: f000 f940 bl 8004cb6 <SDIO_ConfigData>
|
|
|
|
/* Send ACMD51 SD_APP_SEND_SCR with argument as 0 */
|
|
errorstate = SDMMC_CmdSendSCR(hsd->Instance);
|
|
8004a36: 687b ldr r3, [r7, #4]
|
|
8004a38: 681b ldr r3, [r3, #0]
|
|
8004a3a: 4618 mov r0, r3
|
|
8004a3c: f000 faf9 bl 8005032 <SDMMC_CmdSendSCR>
|
|
8004a40: 62b8 str r0, [r7, #40] ; 0x28
|
|
if(errorstate != HAL_SD_ERROR_NONE)
|
|
8004a42: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8004a44: 2b00 cmp r3, #0
|
|
8004a46: d022 beq.n 8004a8e <SD_FindSCR+0xd8>
|
|
{
|
|
return errorstate;
|
|
8004a48: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8004a4a: e07a b.n 8004b42 <SD_FindSCR+0x18c>
|
|
}
|
|
|
|
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND))
|
|
{
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXDAVL))
|
|
8004a4c: 687b ldr r3, [r7, #4]
|
|
8004a4e: 681b ldr r3, [r3, #0]
|
|
8004a50: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8004a52: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
8004a56: 2b00 cmp r3, #0
|
|
8004a58: d00e beq.n 8004a78 <SD_FindSCR+0xc2>
|
|
{
|
|
*(tempscr + index) = SDIO_ReadFIFO(hsd->Instance);
|
|
8004a5a: 687b ldr r3, [r7, #4]
|
|
8004a5c: 6819 ldr r1, [r3, #0]
|
|
8004a5e: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8004a60: 009b lsls r3, r3, #2
|
|
8004a62: f107 0208 add.w r2, r7, #8
|
|
8004a66: 18d4 adds r4, r2, r3
|
|
8004a68: 4608 mov r0, r1
|
|
8004a6a: f000 f898 bl 8004b9e <SDIO_ReadFIFO>
|
|
8004a6e: 4603 mov r3, r0
|
|
8004a70: 6023 str r3, [r4, #0]
|
|
index++;
|
|
8004a72: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8004a74: 3301 adds r3, #1
|
|
8004a76: 637b str r3, [r7, #52] ; 0x34
|
|
}
|
|
|
|
if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
|
|
8004a78: f7fb ff6c bl 8000954 <HAL_GetTick>
|
|
8004a7c: 4602 mov r2, r0
|
|
8004a7e: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8004a80: 1ad3 subs r3, r2, r3
|
|
8004a82: f1b3 3fff cmp.w r3, #4294967295
|
|
8004a86: d102 bne.n 8004a8e <SD_FindSCR+0xd8>
|
|
{
|
|
return HAL_SD_ERROR_TIMEOUT;
|
|
8004a88: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
|
|
8004a8c: e059 b.n 8004b42 <SD_FindSCR+0x18c>
|
|
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND))
|
|
8004a8e: 687b ldr r3, [r7, #4]
|
|
8004a90: 681b ldr r3, [r3, #0]
|
|
8004a92: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
8004a94: f240 432a movw r3, #1066 ; 0x42a
|
|
8004a98: 4013 ands r3, r2
|
|
8004a9a: 2b00 cmp r3, #0
|
|
8004a9c: d0d6 beq.n 8004a4c <SD_FindSCR+0x96>
|
|
}
|
|
}
|
|
|
|
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
|
|
8004a9e: 687b ldr r3, [r7, #4]
|
|
8004aa0: 681b ldr r3, [r3, #0]
|
|
8004aa2: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8004aa4: f003 0308 and.w r3, r3, #8
|
|
8004aa8: 2b00 cmp r3, #0
|
|
8004aaa: d005 beq.n 8004ab8 <SD_FindSCR+0x102>
|
|
{
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_FLAG_DTIMEOUT);
|
|
8004aac: 687b ldr r3, [r7, #4]
|
|
8004aae: 681b ldr r3, [r3, #0]
|
|
8004ab0: 2208 movs r2, #8
|
|
8004ab2: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return HAL_SD_ERROR_DATA_TIMEOUT;
|
|
8004ab4: 2308 movs r3, #8
|
|
8004ab6: e044 b.n 8004b42 <SD_FindSCR+0x18c>
|
|
}
|
|
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DCRCFAIL))
|
|
8004ab8: 687b ldr r3, [r7, #4]
|
|
8004aba: 681b ldr r3, [r3, #0]
|
|
8004abc: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8004abe: f003 0302 and.w r3, r3, #2
|
|
8004ac2: 2b00 cmp r3, #0
|
|
8004ac4: d005 beq.n 8004ad2 <SD_FindSCR+0x11c>
|
|
{
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_FLAG_DCRCFAIL);
|
|
8004ac6: 687b ldr r3, [r7, #4]
|
|
8004ac8: 681b ldr r3, [r3, #0]
|
|
8004aca: 2202 movs r2, #2
|
|
8004acc: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return HAL_SD_ERROR_DATA_CRC_FAIL;
|
|
8004ace: 2302 movs r3, #2
|
|
8004ad0: e037 b.n 8004b42 <SD_FindSCR+0x18c>
|
|
}
|
|
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR))
|
|
8004ad2: 687b ldr r3, [r7, #4]
|
|
8004ad4: 681b ldr r3, [r3, #0]
|
|
8004ad6: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8004ad8: f003 0320 and.w r3, r3, #32
|
|
8004adc: 2b00 cmp r3, #0
|
|
8004ade: d005 beq.n 8004aec <SD_FindSCR+0x136>
|
|
{
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_FLAG_RXOVERR);
|
|
8004ae0: 687b ldr r3, [r7, #4]
|
|
8004ae2: 681b ldr r3, [r3, #0]
|
|
8004ae4: 2220 movs r2, #32
|
|
8004ae6: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return HAL_SD_ERROR_RX_OVERRUN;
|
|
8004ae8: 2320 movs r3, #32
|
|
8004aea: e02a b.n 8004b42 <SD_FindSCR+0x18c>
|
|
}
|
|
else
|
|
{
|
|
/* No error flag set */
|
|
/* Clear all the static flags */
|
|
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
|
|
8004aec: 687b ldr r3, [r7, #4]
|
|
8004aee: 681b ldr r3, [r3, #0]
|
|
8004af0: f240 523a movw r2, #1338 ; 0x53a
|
|
8004af4: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
*scr = (((tempscr[1] & SDMMC_0TO7BITS) << 24) | ((tempscr[1] & SDMMC_8TO15BITS) << 8) |\
|
|
8004af6: 68fb ldr r3, [r7, #12]
|
|
8004af8: 061a lsls r2, r3, #24
|
|
8004afa: 68fb ldr r3, [r7, #12]
|
|
8004afc: 021b lsls r3, r3, #8
|
|
8004afe: f403 037f and.w r3, r3, #16711680 ; 0xff0000
|
|
8004b02: 431a orrs r2, r3
|
|
((tempscr[1] & SDMMC_16TO23BITS) >> 8) | ((tempscr[1] & SDMMC_24TO31BITS) >> 24));
|
|
8004b04: 68fb ldr r3, [r7, #12]
|
|
8004b06: 0a1b lsrs r3, r3, #8
|
|
8004b08: f403 437f and.w r3, r3, #65280 ; 0xff00
|
|
*scr = (((tempscr[1] & SDMMC_0TO7BITS) << 24) | ((tempscr[1] & SDMMC_8TO15BITS) << 8) |\
|
|
8004b0c: 431a orrs r2, r3
|
|
((tempscr[1] & SDMMC_16TO23BITS) >> 8) | ((tempscr[1] & SDMMC_24TO31BITS) >> 24));
|
|
8004b0e: 68fb ldr r3, [r7, #12]
|
|
8004b10: 0e1b lsrs r3, r3, #24
|
|
8004b12: 431a orrs r2, r3
|
|
*scr = (((tempscr[1] & SDMMC_0TO7BITS) << 24) | ((tempscr[1] & SDMMC_8TO15BITS) << 8) |\
|
|
8004b14: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8004b16: 601a str r2, [r3, #0]
|
|
scr++;
|
|
8004b18: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8004b1a: 3304 adds r3, #4
|
|
8004b1c: 62fb str r3, [r7, #44] ; 0x2c
|
|
*scr = (((tempscr[0] & SDMMC_0TO7BITS) << 24) | ((tempscr[0] & SDMMC_8TO15BITS) << 8) |\
|
|
8004b1e: 68bb ldr r3, [r7, #8]
|
|
8004b20: 061a lsls r2, r3, #24
|
|
8004b22: 68bb ldr r3, [r7, #8]
|
|
8004b24: 021b lsls r3, r3, #8
|
|
8004b26: f403 037f and.w r3, r3, #16711680 ; 0xff0000
|
|
8004b2a: 431a orrs r2, r3
|
|
((tempscr[0] & SDMMC_16TO23BITS) >> 8) | ((tempscr[0] & SDMMC_24TO31BITS) >> 24));
|
|
8004b2c: 68bb ldr r3, [r7, #8]
|
|
8004b2e: 0a1b lsrs r3, r3, #8
|
|
8004b30: f403 437f and.w r3, r3, #65280 ; 0xff00
|
|
*scr = (((tempscr[0] & SDMMC_0TO7BITS) << 24) | ((tempscr[0] & SDMMC_8TO15BITS) << 8) |\
|
|
8004b34: 431a orrs r2, r3
|
|
((tempscr[0] & SDMMC_16TO23BITS) >> 8) | ((tempscr[0] & SDMMC_24TO31BITS) >> 24));
|
|
8004b36: 68bb ldr r3, [r7, #8]
|
|
8004b38: 0e1b lsrs r3, r3, #24
|
|
8004b3a: 431a orrs r2, r3
|
|
*scr = (((tempscr[0] & SDMMC_0TO7BITS) << 24) | ((tempscr[0] & SDMMC_8TO15BITS) << 8) |\
|
|
8004b3c: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8004b3e: 601a str r2, [r3, #0]
|
|
|
|
}
|
|
|
|
return HAL_SD_ERROR_NONE;
|
|
8004b40: 2300 movs r3, #0
|
|
}
|
|
8004b42: 4618 mov r0, r3
|
|
8004b44: 373c adds r7, #60 ; 0x3c
|
|
8004b46: 46bd mov sp, r7
|
|
8004b48: bd90 pop {r4, r7, pc}
|
|
|
|
08004b4a <SDIO_Init>:
|
|
* @param SDIOx: Pointer to SDMMC register base
|
|
* @param Init: SDMMC initialization structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
|
|
{
|
|
8004b4a: b084 sub sp, #16
|
|
8004b4c: b480 push {r7}
|
|
8004b4e: b085 sub sp, #20
|
|
8004b50: af00 add r7, sp, #0
|
|
8004b52: 6078 str r0, [r7, #4]
|
|
8004b54: f107 001c add.w r0, r7, #28
|
|
8004b58: e880 000e stmia.w r0, {r1, r2, r3}
|
|
uint32_t tmpreg = 0;
|
|
8004b5c: 2300 movs r3, #0
|
|
8004b5e: 60fb str r3, [r7, #12]
|
|
assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
|
|
assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
|
|
assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
|
|
|
|
/* Set SDMMC configuration parameters */
|
|
tmpreg |= (Init.ClockEdge |\
|
|
8004b60: 69fa ldr r2, [r7, #28]
|
|
Init.ClockBypass |\
|
|
8004b62: 6a3b ldr r3, [r7, #32]
|
|
tmpreg |= (Init.ClockEdge |\
|
|
8004b64: 431a orrs r2, r3
|
|
Init.ClockPowerSave |\
|
|
8004b66: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
Init.ClockBypass |\
|
|
8004b68: 431a orrs r2, r3
|
|
Init.BusWide |\
|
|
8004b6a: 6abb ldr r3, [r7, #40] ; 0x28
|
|
Init.ClockPowerSave |\
|
|
8004b6c: 431a orrs r2, r3
|
|
Init.HardwareFlowControl |\
|
|
8004b6e: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
Init.BusWide |\
|
|
8004b70: 431a orrs r2, r3
|
|
Init.ClockDiv
|
|
8004b72: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
Init.HardwareFlowControl |\
|
|
8004b74: 4313 orrs r3, r2
|
|
tmpreg |= (Init.ClockEdge |\
|
|
8004b76: 68fa ldr r2, [r7, #12]
|
|
8004b78: 4313 orrs r3, r2
|
|
8004b7a: 60fb str r3, [r7, #12]
|
|
);
|
|
|
|
/* Write to SDMMC CLKCR */
|
|
MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
|
|
8004b7c: 687b ldr r3, [r7, #4]
|
|
8004b7e: 685b ldr r3, [r3, #4]
|
|
8004b80: f423 43fd bic.w r3, r3, #32384 ; 0x7e80
|
|
8004b84: f023 037f bic.w r3, r3, #127 ; 0x7f
|
|
8004b88: 68fa ldr r2, [r7, #12]
|
|
8004b8a: 431a orrs r2, r3
|
|
8004b8c: 687b ldr r3, [r7, #4]
|
|
8004b8e: 605a str r2, [r3, #4]
|
|
|
|
return HAL_OK;
|
|
8004b90: 2300 movs r3, #0
|
|
}
|
|
8004b92: 4618 mov r0, r3
|
|
8004b94: 3714 adds r7, #20
|
|
8004b96: 46bd mov sp, r7
|
|
8004b98: bc80 pop {r7}
|
|
8004b9a: b004 add sp, #16
|
|
8004b9c: 4770 bx lr
|
|
|
|
08004b9e <SDIO_ReadFIFO>:
|
|
* @brief Read data (word) from Rx FIFO in blocking mode (polling)
|
|
* @param SDIOx: Pointer to SDMMC register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004b9e: b480 push {r7}
|
|
8004ba0: b083 sub sp, #12
|
|
8004ba2: af00 add r7, sp, #0
|
|
8004ba4: 6078 str r0, [r7, #4]
|
|
/* Read data from Rx FIFO */
|
|
return (SDIOx->FIFO);
|
|
8004ba6: 687b ldr r3, [r7, #4]
|
|
8004ba8: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80
|
|
}
|
|
8004bac: 4618 mov r0, r3
|
|
8004bae: 370c adds r7, #12
|
|
8004bb0: 46bd mov sp, r7
|
|
8004bb2: bc80 pop {r7}
|
|
8004bb4: 4770 bx lr
|
|
|
|
08004bb6 <SDIO_WriteFIFO>:
|
|
* @param SDIOx: Pointer to SDMMC register base
|
|
* @param pWriteData: pointer to data to write
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
|
|
{
|
|
8004bb6: b480 push {r7}
|
|
8004bb8: b083 sub sp, #12
|
|
8004bba: af00 add r7, sp, #0
|
|
8004bbc: 6078 str r0, [r7, #4]
|
|
8004bbe: 6039 str r1, [r7, #0]
|
|
/* Write data to FIFO */
|
|
SDIOx->FIFO = *pWriteData;
|
|
8004bc0: 683b ldr r3, [r7, #0]
|
|
8004bc2: 681a ldr r2, [r3, #0]
|
|
8004bc4: 687b ldr r3, [r7, #4]
|
|
8004bc6: f8c3 2080 str.w r2, [r3, #128] ; 0x80
|
|
|
|
return HAL_OK;
|
|
8004bca: 2300 movs r3, #0
|
|
}
|
|
8004bcc: 4618 mov r0, r3
|
|
8004bce: 370c adds r7, #12
|
|
8004bd0: 46bd mov sp, r7
|
|
8004bd2: bc80 pop {r7}
|
|
8004bd4: 4770 bx lr
|
|
|
|
08004bd6 <SDIO_PowerState_ON>:
|
|
* @brief Set SDMMC Power state to ON.
|
|
* @param SDIOx: Pointer to SDMMC register base
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004bd6: b580 push {r7, lr}
|
|
8004bd8: b082 sub sp, #8
|
|
8004bda: af00 add r7, sp, #0
|
|
8004bdc: 6078 str r0, [r7, #4]
|
|
/* Set power state to ON */
|
|
SDIOx->POWER = SDIO_POWER_PWRCTRL;
|
|
8004bde: 687b ldr r3, [r7, #4]
|
|
8004be0: 2203 movs r2, #3
|
|
8004be2: 601a str r2, [r3, #0]
|
|
|
|
/* 1ms: required power up waiting time before starting the SD initialization
|
|
sequence */
|
|
HAL_Delay(2);
|
|
8004be4: 2002 movs r0, #2
|
|
8004be6: f7fb febf bl 8000968 <HAL_Delay>
|
|
|
|
return HAL_OK;
|
|
8004bea: 2300 movs r3, #0
|
|
}
|
|
8004bec: 4618 mov r0, r3
|
|
8004bee: 3708 adds r7, #8
|
|
8004bf0: 46bd mov sp, r7
|
|
8004bf2: bd80 pop {r7, pc}
|
|
|
|
08004bf4 <SDIO_PowerState_OFF>:
|
|
* @brief Set SDMMC Power state to OFF.
|
|
* @param SDIOx: Pointer to SDMMC register base
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004bf4: b480 push {r7}
|
|
8004bf6: b083 sub sp, #12
|
|
8004bf8: af00 add r7, sp, #0
|
|
8004bfa: 6078 str r0, [r7, #4]
|
|
/* Set power state to OFF */
|
|
SDIOx->POWER = (uint32_t)0x00000000;
|
|
8004bfc: 687b ldr r3, [r7, #4]
|
|
8004bfe: 2200 movs r2, #0
|
|
8004c00: 601a str r2, [r3, #0]
|
|
|
|
return HAL_OK;
|
|
8004c02: 2300 movs r3, #0
|
|
}
|
|
8004c04: 4618 mov r0, r3
|
|
8004c06: 370c adds r7, #12
|
|
8004c08: 46bd mov sp, r7
|
|
8004c0a: bc80 pop {r7}
|
|
8004c0c: 4770 bx lr
|
|
|
|
08004c0e <SDIO_GetPowerState>:
|
|
* - 0x00: Power OFF
|
|
* - 0x02: Power UP
|
|
* - 0x03: Power ON
|
|
*/
|
|
uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004c0e: b480 push {r7}
|
|
8004c10: b083 sub sp, #12
|
|
8004c12: af00 add r7, sp, #0
|
|
8004c14: 6078 str r0, [r7, #4]
|
|
return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
|
|
8004c16: 687b ldr r3, [r7, #4]
|
|
8004c18: 681b ldr r3, [r3, #0]
|
|
8004c1a: f003 0303 and.w r3, r3, #3
|
|
}
|
|
8004c1e: 4618 mov r0, r3
|
|
8004c20: 370c adds r7, #12
|
|
8004c22: 46bd mov sp, r7
|
|
8004c24: bc80 pop {r7}
|
|
8004c26: 4770 bx lr
|
|
|
|
08004c28 <SDIO_SendCommand>:
|
|
* @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
|
|
* the configuration information for the SDMMC command
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
|
|
{
|
|
8004c28: b480 push {r7}
|
|
8004c2a: b085 sub sp, #20
|
|
8004c2c: af00 add r7, sp, #0
|
|
8004c2e: 6078 str r0, [r7, #4]
|
|
8004c30: 6039 str r1, [r7, #0]
|
|
uint32_t tmpreg = 0;
|
|
8004c32: 2300 movs r3, #0
|
|
8004c34: 60fb str r3, [r7, #12]
|
|
assert_param(IS_SDIO_RESPONSE(Command->Response));
|
|
assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
|
|
assert_param(IS_SDIO_CPSM(Command->CPSM));
|
|
|
|
/* Set the SDMMC Argument value */
|
|
SDIOx->ARG = Command->Argument;
|
|
8004c36: 683b ldr r3, [r7, #0]
|
|
8004c38: 681a ldr r2, [r3, #0]
|
|
8004c3a: 687b ldr r3, [r7, #4]
|
|
8004c3c: 609a str r2, [r3, #8]
|
|
|
|
/* Set SDMMC command parameters */
|
|
tmpreg |= (uint32_t)(Command->CmdIndex |\
|
|
8004c3e: 683b ldr r3, [r7, #0]
|
|
8004c40: 685a ldr r2, [r3, #4]
|
|
Command->Response |\
|
|
8004c42: 683b ldr r3, [r7, #0]
|
|
8004c44: 689b ldr r3, [r3, #8]
|
|
tmpreg |= (uint32_t)(Command->CmdIndex |\
|
|
8004c46: 431a orrs r2, r3
|
|
Command->WaitForInterrupt |\
|
|
8004c48: 683b ldr r3, [r7, #0]
|
|
8004c4a: 68db ldr r3, [r3, #12]
|
|
Command->Response |\
|
|
8004c4c: 431a orrs r2, r3
|
|
Command->CPSM);
|
|
8004c4e: 683b ldr r3, [r7, #0]
|
|
8004c50: 691b ldr r3, [r3, #16]
|
|
Command->WaitForInterrupt |\
|
|
8004c52: 4313 orrs r3, r2
|
|
tmpreg |= (uint32_t)(Command->CmdIndex |\
|
|
8004c54: 68fa ldr r2, [r7, #12]
|
|
8004c56: 4313 orrs r3, r2
|
|
8004c58: 60fb str r3, [r7, #12]
|
|
|
|
/* Write to SDMMC CMD register */
|
|
MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
|
|
8004c5a: 687b ldr r3, [r7, #4]
|
|
8004c5c: 68db ldr r3, [r3, #12]
|
|
8004c5e: f423 637f bic.w r3, r3, #4080 ; 0xff0
|
|
8004c62: f023 030f bic.w r3, r3, #15
|
|
8004c66: 68fa ldr r2, [r7, #12]
|
|
8004c68: 431a orrs r2, r3
|
|
8004c6a: 687b ldr r3, [r7, #4]
|
|
8004c6c: 60da str r2, [r3, #12]
|
|
|
|
return HAL_OK;
|
|
8004c6e: 2300 movs r3, #0
|
|
}
|
|
8004c70: 4618 mov r0, r3
|
|
8004c72: 3714 adds r7, #20
|
|
8004c74: 46bd mov sp, r7
|
|
8004c76: bc80 pop {r7}
|
|
8004c78: 4770 bx lr
|
|
|
|
08004c7a <SDIO_GetCommandResponse>:
|
|
* @brief Return the command index of last command for which response received
|
|
* @param SDIOx: Pointer to SDMMC register base
|
|
* @retval Command index of the last command response received
|
|
*/
|
|
uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004c7a: b480 push {r7}
|
|
8004c7c: b083 sub sp, #12
|
|
8004c7e: af00 add r7, sp, #0
|
|
8004c80: 6078 str r0, [r7, #4]
|
|
return (uint8_t)(SDIOx->RESPCMD);
|
|
8004c82: 687b ldr r3, [r7, #4]
|
|
8004c84: 691b ldr r3, [r3, #16]
|
|
8004c86: b2db uxtb r3, r3
|
|
}
|
|
8004c88: 4618 mov r0, r3
|
|
8004c8a: 370c adds r7, #12
|
|
8004c8c: 46bd mov sp, r7
|
|
8004c8e: bc80 pop {r7}
|
|
8004c90: 4770 bx lr
|
|
|
|
08004c92 <SDIO_GetResponse>:
|
|
* @arg SDIO_RESP3: Response Register 3
|
|
* @arg SDIO_RESP4: Response Register 4
|
|
* @retval The Corresponding response register value
|
|
*/
|
|
uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
|
|
{
|
|
8004c92: b480 push {r7}
|
|
8004c94: b085 sub sp, #20
|
|
8004c96: af00 add r7, sp, #0
|
|
8004c98: 6078 str r0, [r7, #4]
|
|
8004c9a: 6039 str r1, [r7, #0]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_SDIO_RESP(Response));
|
|
|
|
/* Get the response */
|
|
tmp = (uint32_t)(&(SDIOx->RESP1)) + Response;
|
|
8004c9c: 687b ldr r3, [r7, #4]
|
|
8004c9e: 3314 adds r3, #20
|
|
8004ca0: 461a mov r2, r3
|
|
8004ca2: 683b ldr r3, [r7, #0]
|
|
8004ca4: 4413 add r3, r2
|
|
8004ca6: 60fb str r3, [r7, #12]
|
|
|
|
return (*(__IO uint32_t *) tmp);
|
|
8004ca8: 68fb ldr r3, [r7, #12]
|
|
8004caa: 681b ldr r3, [r3, #0]
|
|
}
|
|
8004cac: 4618 mov r0, r3
|
|
8004cae: 3714 adds r7, #20
|
|
8004cb0: 46bd mov sp, r7
|
|
8004cb2: bc80 pop {r7}
|
|
8004cb4: 4770 bx lr
|
|
|
|
08004cb6 <SDIO_ConfigData>:
|
|
* @param Data : pointer to a SDIO_DataInitTypeDef structure
|
|
* that contains the configuration information for the SDMMC data.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
|
|
{
|
|
8004cb6: b480 push {r7}
|
|
8004cb8: b085 sub sp, #20
|
|
8004cba: af00 add r7, sp, #0
|
|
8004cbc: 6078 str r0, [r7, #4]
|
|
8004cbe: 6039 str r1, [r7, #0]
|
|
uint32_t tmpreg = 0;
|
|
8004cc0: 2300 movs r3, #0
|
|
8004cc2: 60fb str r3, [r7, #12]
|
|
assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
|
|
assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
|
|
assert_param(IS_SDIO_DPSM(Data->DPSM));
|
|
|
|
/* Set the SDMMC Data TimeOut value */
|
|
SDIOx->DTIMER = Data->DataTimeOut;
|
|
8004cc4: 683b ldr r3, [r7, #0]
|
|
8004cc6: 681a ldr r2, [r3, #0]
|
|
8004cc8: 687b ldr r3, [r7, #4]
|
|
8004cca: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Set the SDMMC DataLength value */
|
|
SDIOx->DLEN = Data->DataLength;
|
|
8004ccc: 683b ldr r3, [r7, #0]
|
|
8004cce: 685a ldr r2, [r3, #4]
|
|
8004cd0: 687b ldr r3, [r7, #4]
|
|
8004cd2: 629a str r2, [r3, #40] ; 0x28
|
|
|
|
/* Set the SDMMC data configuration parameters */
|
|
tmpreg |= (uint32_t)(Data->DataBlockSize |\
|
|
8004cd4: 683b ldr r3, [r7, #0]
|
|
8004cd6: 689a ldr r2, [r3, #8]
|
|
Data->TransferDir |\
|
|
8004cd8: 683b ldr r3, [r7, #0]
|
|
8004cda: 68db ldr r3, [r3, #12]
|
|
tmpreg |= (uint32_t)(Data->DataBlockSize |\
|
|
8004cdc: 431a orrs r2, r3
|
|
Data->TransferMode |\
|
|
8004cde: 683b ldr r3, [r7, #0]
|
|
8004ce0: 691b ldr r3, [r3, #16]
|
|
Data->TransferDir |\
|
|
8004ce2: 431a orrs r2, r3
|
|
Data->DPSM);
|
|
8004ce4: 683b ldr r3, [r7, #0]
|
|
8004ce6: 695b ldr r3, [r3, #20]
|
|
Data->TransferMode |\
|
|
8004ce8: 4313 orrs r3, r2
|
|
tmpreg |= (uint32_t)(Data->DataBlockSize |\
|
|
8004cea: 68fa ldr r2, [r7, #12]
|
|
8004cec: 4313 orrs r3, r2
|
|
8004cee: 60fb str r3, [r7, #12]
|
|
|
|
/* Write to SDMMC DCTRL */
|
|
MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
|
|
8004cf0: 687b ldr r3, [r7, #4]
|
|
8004cf2: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8004cf4: f023 02f7 bic.w r2, r3, #247 ; 0xf7
|
|
8004cf8: 68fb ldr r3, [r7, #12]
|
|
8004cfa: 431a orrs r2, r3
|
|
8004cfc: 687b ldr r3, [r7, #4]
|
|
8004cfe: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
return HAL_OK;
|
|
8004d00: 2300 movs r3, #0
|
|
|
|
}
|
|
8004d02: 4618 mov r0, r3
|
|
8004d04: 3714 adds r7, #20
|
|
8004d06: 46bd mov sp, r7
|
|
8004d08: bc80 pop {r7}
|
|
8004d0a: 4770 bx lr
|
|
|
|
08004d0c <SDMMC_CmdBlockLength>:
|
|
* @brief Send the Data Block Lenght command and check the response
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
|
|
{
|
|
8004d0c: b580 push {r7, lr}
|
|
8004d0e: b088 sub sp, #32
|
|
8004d10: af00 add r7, sp, #0
|
|
8004d12: 6078 str r0, [r7, #4]
|
|
8004d14: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Set Block Size for Card */
|
|
sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
|
|
8004d16: 683b ldr r3, [r7, #0]
|
|
8004d18: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
|
|
8004d1a: 2310 movs r3, #16
|
|
8004d1c: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004d1e: 2340 movs r3, #64 ; 0x40
|
|
8004d20: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004d22: 2300 movs r3, #0
|
|
8004d24: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004d26: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004d2a: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004d2c: f107 0308 add.w r3, r7, #8
|
|
8004d30: 4619 mov r1, r3
|
|
8004d32: 6878 ldr r0, [r7, #4]
|
|
8004d34: f7ff ff78 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
|
|
8004d38: f241 3288 movw r2, #5000 ; 0x1388
|
|
8004d3c: 2110 movs r1, #16
|
|
8004d3e: 6878 ldr r0, [r7, #4]
|
|
8004d40: f000 fa40 bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004d44: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004d46: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004d48: 4618 mov r0, r3
|
|
8004d4a: 3720 adds r7, #32
|
|
8004d4c: 46bd mov sp, r7
|
|
8004d4e: bd80 pop {r7, pc}
|
|
|
|
08004d50 <SDMMC_CmdReadSingleBlock>:
|
|
* @brief Send the Read Single Block command and check the response
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
|
|
{
|
|
8004d50: b580 push {r7, lr}
|
|
8004d52: b088 sub sp, #32
|
|
8004d54: af00 add r7, sp, #0
|
|
8004d56: 6078 str r0, [r7, #4]
|
|
8004d58: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Set Block Size for Card */
|
|
sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
|
|
8004d5a: 683b ldr r3, [r7, #0]
|
|
8004d5c: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
|
|
8004d5e: 2311 movs r3, #17
|
|
8004d60: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004d62: 2340 movs r3, #64 ; 0x40
|
|
8004d64: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004d66: 2300 movs r3, #0
|
|
8004d68: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004d6a: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004d6e: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004d70: f107 0308 add.w r3, r7, #8
|
|
8004d74: 4619 mov r1, r3
|
|
8004d76: 6878 ldr r0, [r7, #4]
|
|
8004d78: f7ff ff56 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
|
|
8004d7c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8004d80: 2111 movs r1, #17
|
|
8004d82: 6878 ldr r0, [r7, #4]
|
|
8004d84: f000 fa1e bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004d88: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004d8a: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004d8c: 4618 mov r0, r3
|
|
8004d8e: 3720 adds r7, #32
|
|
8004d90: 46bd mov sp, r7
|
|
8004d92: bd80 pop {r7, pc}
|
|
|
|
08004d94 <SDMMC_CmdReadMultiBlock>:
|
|
* @brief Send the Read Multi Block command and check the response
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
|
|
{
|
|
8004d94: b580 push {r7, lr}
|
|
8004d96: b088 sub sp, #32
|
|
8004d98: af00 add r7, sp, #0
|
|
8004d9a: 6078 str r0, [r7, #4]
|
|
8004d9c: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Set Block Size for Card */
|
|
sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
|
|
8004d9e: 683b ldr r3, [r7, #0]
|
|
8004da0: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
|
|
8004da2: 2312 movs r3, #18
|
|
8004da4: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004da6: 2340 movs r3, #64 ; 0x40
|
|
8004da8: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004daa: 2300 movs r3, #0
|
|
8004dac: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004dae: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004db2: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004db4: f107 0308 add.w r3, r7, #8
|
|
8004db8: 4619 mov r1, r3
|
|
8004dba: 6878 ldr r0, [r7, #4]
|
|
8004dbc: f7ff ff34 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
|
|
8004dc0: f241 3288 movw r2, #5000 ; 0x1388
|
|
8004dc4: 2112 movs r1, #18
|
|
8004dc6: 6878 ldr r0, [r7, #4]
|
|
8004dc8: f000 f9fc bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004dcc: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004dce: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004dd0: 4618 mov r0, r3
|
|
8004dd2: 3720 adds r7, #32
|
|
8004dd4: 46bd mov sp, r7
|
|
8004dd6: bd80 pop {r7, pc}
|
|
|
|
08004dd8 <SDMMC_CmdWriteSingleBlock>:
|
|
* @brief Send the Write Single Block command and check the response
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
|
|
{
|
|
8004dd8: b580 push {r7, lr}
|
|
8004dda: b088 sub sp, #32
|
|
8004ddc: af00 add r7, sp, #0
|
|
8004dde: 6078 str r0, [r7, #4]
|
|
8004de0: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Set Block Size for Card */
|
|
sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
|
|
8004de2: 683b ldr r3, [r7, #0]
|
|
8004de4: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
|
|
8004de6: 2318 movs r3, #24
|
|
8004de8: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004dea: 2340 movs r3, #64 ; 0x40
|
|
8004dec: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004dee: 2300 movs r3, #0
|
|
8004df0: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004df2: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004df6: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004df8: f107 0308 add.w r3, r7, #8
|
|
8004dfc: 4619 mov r1, r3
|
|
8004dfe: 6878 ldr r0, [r7, #4]
|
|
8004e00: f7ff ff12 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
|
|
8004e04: f241 3288 movw r2, #5000 ; 0x1388
|
|
8004e08: 2118 movs r1, #24
|
|
8004e0a: 6878 ldr r0, [r7, #4]
|
|
8004e0c: f000 f9da bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004e10: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004e12: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004e14: 4618 mov r0, r3
|
|
8004e16: 3720 adds r7, #32
|
|
8004e18: 46bd mov sp, r7
|
|
8004e1a: bd80 pop {r7, pc}
|
|
|
|
08004e1c <SDMMC_CmdWriteMultiBlock>:
|
|
* @brief Send the Write Multi Block command and check the response
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
|
|
{
|
|
8004e1c: b580 push {r7, lr}
|
|
8004e1e: b088 sub sp, #32
|
|
8004e20: af00 add r7, sp, #0
|
|
8004e22: 6078 str r0, [r7, #4]
|
|
8004e24: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Set Block Size for Card */
|
|
sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
|
|
8004e26: 683b ldr r3, [r7, #0]
|
|
8004e28: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
|
|
8004e2a: 2319 movs r3, #25
|
|
8004e2c: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004e2e: 2340 movs r3, #64 ; 0x40
|
|
8004e30: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004e32: 2300 movs r3, #0
|
|
8004e34: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004e36: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004e3a: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004e3c: f107 0308 add.w r3, r7, #8
|
|
8004e40: 4619 mov r1, r3
|
|
8004e42: 6878 ldr r0, [r7, #4]
|
|
8004e44: f7ff fef0 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
|
|
8004e48: f241 3288 movw r2, #5000 ; 0x1388
|
|
8004e4c: 2119 movs r1, #25
|
|
8004e4e: 6878 ldr r0, [r7, #4]
|
|
8004e50: f000 f9b8 bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004e54: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004e56: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004e58: 4618 mov r0, r3
|
|
8004e5a: 3720 adds r7, #32
|
|
8004e5c: 46bd mov sp, r7
|
|
8004e5e: bd80 pop {r7, pc}
|
|
|
|
08004e60 <SDMMC_CmdStopTransfer>:
|
|
* @brief Send the Stop Transfer command and check the response.
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004e60: b580 push {r7, lr}
|
|
8004e62: b088 sub sp, #32
|
|
8004e64: af00 add r7, sp, #0
|
|
8004e66: 6078 str r0, [r7, #4]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Send CMD12 STOP_TRANSMISSION */
|
|
sdmmc_cmdinit.Argument = 0U;
|
|
8004e68: 2300 movs r3, #0
|
|
8004e6a: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
|
|
8004e6c: 230c movs r3, #12
|
|
8004e6e: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004e70: 2340 movs r3, #64 ; 0x40
|
|
8004e72: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004e74: 2300 movs r3, #0
|
|
8004e76: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004e78: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004e7c: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004e7e: f107 0308 add.w r3, r7, #8
|
|
8004e82: 4619 mov r1, r3
|
|
8004e84: 6878 ldr r0, [r7, #4]
|
|
8004e86: f7ff fecf bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, SDIO_STOPTRANSFERTIMEOUT);
|
|
8004e8a: 4a05 ldr r2, [pc, #20] ; (8004ea0 <SDMMC_CmdStopTransfer+0x40>)
|
|
8004e8c: 210c movs r1, #12
|
|
8004e8e: 6878 ldr r0, [r7, #4]
|
|
8004e90: f000 f998 bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004e94: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004e96: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004e98: 4618 mov r0, r3
|
|
8004e9a: 3720 adds r7, #32
|
|
8004e9c: 46bd mov sp, r7
|
|
8004e9e: bd80 pop {r7, pc}
|
|
8004ea0: 05f5e100 .word 0x05f5e100
|
|
|
|
08004ea4 <SDMMC_CmdSelDesel>:
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @param addr: Address of the card to be selected
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
|
|
{
|
|
8004ea4: b580 push {r7, lr}
|
|
8004ea6: b08a sub sp, #40 ; 0x28
|
|
8004ea8: af00 add r7, sp, #0
|
|
8004eaa: 60f8 str r0, [r7, #12]
|
|
8004eac: e9c7 2300 strd r2, r3, [r7]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Send CMD7 SDMMC_SEL_DESEL_CARD */
|
|
sdmmc_cmdinit.Argument = (uint32_t)Addr;
|
|
8004eb0: 683b ldr r3, [r7, #0]
|
|
8004eb2: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
|
|
8004eb4: 2307 movs r3, #7
|
|
8004eb6: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004eb8: 2340 movs r3, #64 ; 0x40
|
|
8004eba: 61bb str r3, [r7, #24]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004ebc: 2300 movs r3, #0
|
|
8004ebe: 61fb str r3, [r7, #28]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004ec0: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004ec4: 623b str r3, [r7, #32]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004ec6: f107 0310 add.w r3, r7, #16
|
|
8004eca: 4619 mov r1, r3
|
|
8004ecc: 68f8 ldr r0, [r7, #12]
|
|
8004ece: f7ff feab bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
|
|
8004ed2: f241 3288 movw r2, #5000 ; 0x1388
|
|
8004ed6: 2107 movs r1, #7
|
|
8004ed8: 68f8 ldr r0, [r7, #12]
|
|
8004eda: f000 f973 bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004ede: 6278 str r0, [r7, #36] ; 0x24
|
|
|
|
return errorstate;
|
|
8004ee0: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
}
|
|
8004ee2: 4618 mov r0, r3
|
|
8004ee4: 3728 adds r7, #40 ; 0x28
|
|
8004ee6: 46bd mov sp, r7
|
|
8004ee8: bd80 pop {r7, pc}
|
|
|
|
08004eea <SDMMC_CmdGoIdleState>:
|
|
* @brief Send the Go Idle State command and check the response.
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004eea: b580 push {r7, lr}
|
|
8004eec: b088 sub sp, #32
|
|
8004eee: af00 add r7, sp, #0
|
|
8004ef0: 6078 str r0, [r7, #4]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
sdmmc_cmdinit.Argument = 0U;
|
|
8004ef2: 2300 movs r3, #0
|
|
8004ef4: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
|
|
8004ef6: 2300 movs r3, #0
|
|
8004ef8: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_NO;
|
|
8004efa: 2300 movs r3, #0
|
|
8004efc: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004efe: 2300 movs r3, #0
|
|
8004f00: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004f02: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004f06: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004f08: f107 0308 add.w r3, r7, #8
|
|
8004f0c: 4619 mov r1, r3
|
|
8004f0e: 6878 ldr r0, [r7, #4]
|
|
8004f10: f7ff fe8a bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdError(SDIOx);
|
|
8004f14: 6878 ldr r0, [r7, #4]
|
|
8004f16: f000 f92d bl 8005174 <SDMMC_GetCmdError>
|
|
8004f1a: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004f1c: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004f1e: 4618 mov r0, r3
|
|
8004f20: 3720 adds r7, #32
|
|
8004f22: 46bd mov sp, r7
|
|
8004f24: bd80 pop {r7, pc}
|
|
|
|
08004f26 <SDMMC_CmdOperCond>:
|
|
* @brief Send the Operating Condition command and check the response.
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8004f26: b580 push {r7, lr}
|
|
8004f28: b088 sub sp, #32
|
|
8004f2a: af00 add r7, sp, #0
|
|
8004f2c: 6078 str r0, [r7, #4]
|
|
/* Send CMD8 to verify SD card interface operating condition */
|
|
/* Argument: - [31:12]: Reserved (shall be set to '0')
|
|
- [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
|
|
- [7:0]: Check Pattern (recommended 0xAA) */
|
|
/* CMD Response: R7 */
|
|
sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
|
|
8004f2e: f44f 73d5 mov.w r3, #426 ; 0x1aa
|
|
8004f32: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
|
|
8004f34: 2308 movs r3, #8
|
|
8004f36: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004f38: 2340 movs r3, #64 ; 0x40
|
|
8004f3a: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004f3c: 2300 movs r3, #0
|
|
8004f3e: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004f40: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004f44: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004f46: f107 0308 add.w r3, r7, #8
|
|
8004f4a: 4619 mov r1, r3
|
|
8004f4c: 6878 ldr r0, [r7, #4]
|
|
8004f4e: f7ff fe6b bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp7(SDIOx);
|
|
8004f52: 6878 ldr r0, [r7, #4]
|
|
8004f54: f000 fb16 bl 8005584 <SDMMC_GetCmdResp7>
|
|
8004f58: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004f5a: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004f5c: 4618 mov r0, r3
|
|
8004f5e: 3720 adds r7, #32
|
|
8004f60: 46bd mov sp, r7
|
|
8004f62: bd80 pop {r7, pc}
|
|
|
|
08004f64 <SDMMC_CmdAppCommand>:
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @param Argument: Command Argument
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
|
|
{
|
|
8004f64: b580 push {r7, lr}
|
|
8004f66: b088 sub sp, #32
|
|
8004f68: af00 add r7, sp, #0
|
|
8004f6a: 6078 str r0, [r7, #4]
|
|
8004f6c: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
sdmmc_cmdinit.Argument = (uint32_t)Argument;
|
|
8004f6e: 683b ldr r3, [r7, #0]
|
|
8004f70: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
|
|
8004f72: 2337 movs r3, #55 ; 0x37
|
|
8004f74: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004f76: 2340 movs r3, #64 ; 0x40
|
|
8004f78: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004f7a: 2300 movs r3, #0
|
|
8004f7c: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004f7e: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004f82: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004f84: f107 0308 add.w r3, r7, #8
|
|
8004f88: 4619 mov r1, r3
|
|
8004f8a: 6878 ldr r0, [r7, #4]
|
|
8004f8c: f7ff fe4c bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
/* If there is a HAL_ERROR, it is a MMC card, else
|
|
it is a SD card: SD card 2.0 (voltage range mismatch)
|
|
or SD card 1.x */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT);
|
|
8004f90: f241 3288 movw r2, #5000 ; 0x1388
|
|
8004f94: 2137 movs r1, #55 ; 0x37
|
|
8004f96: 6878 ldr r0, [r7, #4]
|
|
8004f98: f000 f914 bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8004f9c: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004f9e: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004fa0: 4618 mov r0, r3
|
|
8004fa2: 3720 adds r7, #32
|
|
8004fa4: 46bd mov sp, r7
|
|
8004fa6: bd80 pop {r7, pc}
|
|
|
|
08004fa8 <SDMMC_CmdAppOperCommand>:
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @param Argument: Command Argument
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
|
|
{
|
|
8004fa8: b580 push {r7, lr}
|
|
8004faa: b088 sub sp, #32
|
|
8004fac: af00 add r7, sp, #0
|
|
8004fae: 6078 str r0, [r7, #4]
|
|
8004fb0: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument;
|
|
8004fb2: 683b ldr r3, [r7, #0]
|
|
8004fb4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8004fb8: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
|
8004fbc: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
|
|
8004fbe: 2329 movs r3, #41 ; 0x29
|
|
8004fc0: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8004fc2: 2340 movs r3, #64 ; 0x40
|
|
8004fc4: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8004fc6: 2300 movs r3, #0
|
|
8004fc8: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8004fca: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8004fce: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8004fd0: f107 0308 add.w r3, r7, #8
|
|
8004fd4: 4619 mov r1, r3
|
|
8004fd6: 6878 ldr r0, [r7, #4]
|
|
8004fd8: f7ff fe26 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp3(SDIOx);
|
|
8004fdc: 6878 ldr r0, [r7, #4]
|
|
8004fde: f000 fa23 bl 8005428 <SDMMC_GetCmdResp3>
|
|
8004fe2: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8004fe4: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8004fe6: 4618 mov r0, r3
|
|
8004fe8: 3720 adds r7, #32
|
|
8004fea: 46bd mov sp, r7
|
|
8004fec: bd80 pop {r7, pc}
|
|
|
|
08004fee <SDMMC_CmdBusWidth>:
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @param BusWidth: BusWidth
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
|
|
{
|
|
8004fee: b580 push {r7, lr}
|
|
8004ff0: b088 sub sp, #32
|
|
8004ff2: af00 add r7, sp, #0
|
|
8004ff4: 6078 str r0, [r7, #4]
|
|
8004ff6: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
|
|
8004ff8: 683b ldr r3, [r7, #0]
|
|
8004ffa: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
|
|
8004ffc: 2306 movs r3, #6
|
|
8004ffe: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8005000: 2340 movs r3, #64 ; 0x40
|
|
8005002: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8005004: 2300 movs r3, #0
|
|
8005006: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8005008: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
800500c: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
800500e: f107 0308 add.w r3, r7, #8
|
|
8005012: 4619 mov r1, r3
|
|
8005014: 6878 ldr r0, [r7, #4]
|
|
8005016: f7ff fe07 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
|
|
800501a: f241 3288 movw r2, #5000 ; 0x1388
|
|
800501e: 2106 movs r1, #6
|
|
8005020: 6878 ldr r0, [r7, #4]
|
|
8005022: f000 f8cf bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8005026: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8005028: 69fb ldr r3, [r7, #28]
|
|
}
|
|
800502a: 4618 mov r0, r3
|
|
800502c: 3720 adds r7, #32
|
|
800502e: 46bd mov sp, r7
|
|
8005030: bd80 pop {r7, pc}
|
|
|
|
08005032 <SDMMC_CmdSendSCR>:
|
|
* @brief Send the Send SCR command and check the response.
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8005032: b580 push {r7, lr}
|
|
8005034: b088 sub sp, #32
|
|
8005036: af00 add r7, sp, #0
|
|
8005038: 6078 str r0, [r7, #4]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Send CMD51 SD_APP_SEND_SCR */
|
|
sdmmc_cmdinit.Argument = 0U;
|
|
800503a: 2300 movs r3, #0
|
|
800503c: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
|
|
800503e: 2333 movs r3, #51 ; 0x33
|
|
8005040: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8005042: 2340 movs r3, #64 ; 0x40
|
|
8005044: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8005046: 2300 movs r3, #0
|
|
8005048: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
800504a: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
800504e: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8005050: f107 0308 add.w r3, r7, #8
|
|
8005054: 4619 mov r1, r3
|
|
8005056: 6878 ldr r0, [r7, #4]
|
|
8005058: f7ff fde6 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
|
|
800505c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8005060: 2133 movs r1, #51 ; 0x33
|
|
8005062: 6878 ldr r0, [r7, #4]
|
|
8005064: f000 f8ae bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8005068: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
800506a: 69fb ldr r3, [r7, #28]
|
|
}
|
|
800506c: 4618 mov r0, r3
|
|
800506e: 3720 adds r7, #32
|
|
8005070: 46bd mov sp, r7
|
|
8005072: bd80 pop {r7, pc}
|
|
|
|
08005074 <SDMMC_CmdSendCID>:
|
|
* @brief Send the Send CID command and check the response.
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8005074: b580 push {r7, lr}
|
|
8005076: b088 sub sp, #32
|
|
8005078: af00 add r7, sp, #0
|
|
800507a: 6078 str r0, [r7, #4]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Send CMD2 ALL_SEND_CID */
|
|
sdmmc_cmdinit.Argument = 0U;
|
|
800507c: 2300 movs r3, #0
|
|
800507e: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
|
|
8005080: 2302 movs r3, #2
|
|
8005082: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
|
|
8005084: 23c0 movs r3, #192 ; 0xc0
|
|
8005086: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8005088: 2300 movs r3, #0
|
|
800508a: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
800508c: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8005090: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8005092: f107 0308 add.w r3, r7, #8
|
|
8005096: 4619 mov r1, r3
|
|
8005098: 6878 ldr r0, [r7, #4]
|
|
800509a: f7ff fdc5 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp2(SDIOx);
|
|
800509e: 6878 ldr r0, [r7, #4]
|
|
80050a0: f000 f97c bl 800539c <SDMMC_GetCmdResp2>
|
|
80050a4: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
80050a6: 69fb ldr r3, [r7, #28]
|
|
}
|
|
80050a8: 4618 mov r0, r3
|
|
80050aa: 3720 adds r7, #32
|
|
80050ac: 46bd mov sp, r7
|
|
80050ae: bd80 pop {r7, pc}
|
|
|
|
080050b0 <SDMMC_CmdSendCSD>:
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @param Argument: Command Argument
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
|
|
{
|
|
80050b0: b580 push {r7, lr}
|
|
80050b2: b088 sub sp, #32
|
|
80050b4: af00 add r7, sp, #0
|
|
80050b6: 6078 str r0, [r7, #4]
|
|
80050b8: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Send CMD9 SEND_CSD */
|
|
sdmmc_cmdinit.Argument = Argument;
|
|
80050ba: 683b ldr r3, [r7, #0]
|
|
80050bc: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
|
|
80050be: 2309 movs r3, #9
|
|
80050c0: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
|
|
80050c2: 23c0 movs r3, #192 ; 0xc0
|
|
80050c4: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
80050c6: 2300 movs r3, #0
|
|
80050c8: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
80050ca: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
80050ce: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
80050d0: f107 0308 add.w r3, r7, #8
|
|
80050d4: 4619 mov r1, r3
|
|
80050d6: 6878 ldr r0, [r7, #4]
|
|
80050d8: f7ff fda6 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp2(SDIOx);
|
|
80050dc: 6878 ldr r0, [r7, #4]
|
|
80050de: f000 f95d bl 800539c <SDMMC_GetCmdResp2>
|
|
80050e2: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
80050e4: 69fb ldr r3, [r7, #28]
|
|
}
|
|
80050e6: 4618 mov r0, r3
|
|
80050e8: 3720 adds r7, #32
|
|
80050ea: 46bd mov sp, r7
|
|
80050ec: bd80 pop {r7, pc}
|
|
|
|
080050ee <SDMMC_CmdSetRelAdd>:
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @param pRCA: Card RCA
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
|
|
{
|
|
80050ee: b580 push {r7, lr}
|
|
80050f0: b088 sub sp, #32
|
|
80050f2: af00 add r7, sp, #0
|
|
80050f4: 6078 str r0, [r7, #4]
|
|
80050f6: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
/* Send CMD3 SD_CMD_SET_REL_ADDR */
|
|
sdmmc_cmdinit.Argument = 0U;
|
|
80050f8: 2300 movs r3, #0
|
|
80050fa: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
|
|
80050fc: 2303 movs r3, #3
|
|
80050fe: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8005100: 2340 movs r3, #64 ; 0x40
|
|
8005102: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8005104: 2300 movs r3, #0
|
|
8005106: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
8005108: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
800510c: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
800510e: f107 0308 add.w r3, r7, #8
|
|
8005112: 4619 mov r1, r3
|
|
8005114: 6878 ldr r0, [r7, #4]
|
|
8005116: f7ff fd87 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA);
|
|
800511a: 683a ldr r2, [r7, #0]
|
|
800511c: 2103 movs r1, #3
|
|
800511e: 6878 ldr r0, [r7, #4]
|
|
8005120: f000 f9bc bl 800549c <SDMMC_GetCmdResp6>
|
|
8005124: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
8005126: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8005128: 4618 mov r0, r3
|
|
800512a: 3720 adds r7, #32
|
|
800512c: 46bd mov sp, r7
|
|
800512e: bd80 pop {r7, pc}
|
|
|
|
08005130 <SDMMC_CmdSendStatus>:
|
|
* @param SDIOx: Pointer to SDIO register base
|
|
* @param Argument: Command Argument
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
|
|
{
|
|
8005130: b580 push {r7, lr}
|
|
8005132: b088 sub sp, #32
|
|
8005134: af00 add r7, sp, #0
|
|
8005136: 6078 str r0, [r7, #4]
|
|
8005138: 6039 str r1, [r7, #0]
|
|
SDIO_CmdInitTypeDef sdmmc_cmdinit;
|
|
uint32_t errorstate;
|
|
|
|
sdmmc_cmdinit.Argument = Argument;
|
|
800513a: 683b ldr r3, [r7, #0]
|
|
800513c: 60bb str r3, [r7, #8]
|
|
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
|
|
800513e: 230d movs r3, #13
|
|
8005140: 60fb str r3, [r7, #12]
|
|
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
|
|
8005142: 2340 movs r3, #64 ; 0x40
|
|
8005144: 613b str r3, [r7, #16]
|
|
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
|
|
8005146: 2300 movs r3, #0
|
|
8005148: 617b str r3, [r7, #20]
|
|
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
|
|
800514a: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
800514e: 61bb str r3, [r7, #24]
|
|
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
|
|
8005150: f107 0308 add.w r3, r7, #8
|
|
8005154: 4619 mov r1, r3
|
|
8005156: 6878 ldr r0, [r7, #4]
|
|
8005158: f7ff fd66 bl 8004c28 <SDIO_SendCommand>
|
|
|
|
/* Check for error conditions */
|
|
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT);
|
|
800515c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8005160: 210d movs r1, #13
|
|
8005162: 6878 ldr r0, [r7, #4]
|
|
8005164: f000 f82e bl 80051c4 <SDMMC_GetCmdResp1>
|
|
8005168: 61f8 str r0, [r7, #28]
|
|
|
|
return errorstate;
|
|
800516a: 69fb ldr r3, [r7, #28]
|
|
}
|
|
800516c: 4618 mov r0, r3
|
|
800516e: 3720 adds r7, #32
|
|
8005170: 46bd mov sp, r7
|
|
8005172: bd80 pop {r7, pc}
|
|
|
|
08005174 <SDMMC_GetCmdError>:
|
|
* @brief Checks for error conditions for CMD0.
|
|
* @param hsd: SD handle
|
|
* @retval SD Card error state
|
|
*/
|
|
static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8005174: b490 push {r4, r7}
|
|
8005176: b082 sub sp, #8
|
|
8005178: af00 add r7, sp, #0
|
|
800517a: 6078 str r0, [r7, #4]
|
|
/* 8 is the number of required instructions cycles for the below loop statement.
|
|
The SDIO_CMDTIMEOUT is expressed in ms */
|
|
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
|
|
800517c: 4b0f ldr r3, [pc, #60] ; (80051bc <SDMMC_GetCmdError+0x48>)
|
|
800517e: 681b ldr r3, [r3, #0]
|
|
8005180: 4a0f ldr r2, [pc, #60] ; (80051c0 <SDMMC_GetCmdError+0x4c>)
|
|
8005182: fba2 2303 umull r2, r3, r2, r3
|
|
8005186: 0a5b lsrs r3, r3, #9
|
|
8005188: f241 3288 movw r2, #5000 ; 0x1388
|
|
800518c: fb02 f403 mul.w r4, r2, r3
|
|
|
|
do
|
|
{
|
|
if (count-- == 0U)
|
|
8005190: 4623 mov r3, r4
|
|
8005192: 1e5c subs r4, r3, #1
|
|
8005194: 2b00 cmp r3, #0
|
|
8005196: d102 bne.n 800519e <SDMMC_GetCmdError+0x2a>
|
|
{
|
|
return SDMMC_ERROR_TIMEOUT;
|
|
8005198: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
|
|
800519c: e009 b.n 80051b2 <SDMMC_GetCmdError+0x3e>
|
|
}
|
|
|
|
}while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
|
|
800519e: 687b ldr r3, [r7, #4]
|
|
80051a0: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80051a2: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
80051a6: 2b00 cmp r3, #0
|
|
80051a8: d0f2 beq.n 8005190 <SDMMC_GetCmdError+0x1c>
|
|
|
|
/* Clear all the static flags */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
|
|
80051aa: 687b ldr r3, [r7, #4]
|
|
80051ac: 22c5 movs r2, #197 ; 0xc5
|
|
80051ae: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_NONE;
|
|
80051b0: 2300 movs r3, #0
|
|
}
|
|
80051b2: 4618 mov r0, r3
|
|
80051b4: 3708 adds r7, #8
|
|
80051b6: 46bd mov sp, r7
|
|
80051b8: bc90 pop {r4, r7}
|
|
80051ba: 4770 bx lr
|
|
80051bc: 20000004 .word 0x20000004
|
|
80051c0: 10624dd3 .word 0x10624dd3
|
|
|
|
080051c4 <SDMMC_GetCmdResp1>:
|
|
* @param hsd: SD handle
|
|
* @param SD_CMD: The sent command index
|
|
* @retval SD Card error state
|
|
*/
|
|
static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
|
|
{
|
|
80051c4: b590 push {r4, r7, lr}
|
|
80051c6: b087 sub sp, #28
|
|
80051c8: af00 add r7, sp, #0
|
|
80051ca: 60f8 str r0, [r7, #12]
|
|
80051cc: 460b mov r3, r1
|
|
80051ce: 607a str r2, [r7, #4]
|
|
80051d0: 72fb strb r3, [r7, #11]
|
|
uint32_t response_r1;
|
|
uint32_t sta_reg;
|
|
|
|
/* 8 is the number of required instructions cycles for the below loop statement.
|
|
The Timeout is expressed in ms */
|
|
register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
|
|
80051d2: 4b6f ldr r3, [pc, #444] ; (8005390 <SDMMC_GetCmdResp1+0x1cc>)
|
|
80051d4: 681b ldr r3, [r3, #0]
|
|
80051d6: 4a6f ldr r2, [pc, #444] ; (8005394 <SDMMC_GetCmdResp1+0x1d0>)
|
|
80051d8: fba2 2303 umull r2, r3, r2, r3
|
|
80051dc: 0a5b lsrs r3, r3, #9
|
|
80051de: 687a ldr r2, [r7, #4]
|
|
80051e0: fb02 f403 mul.w r4, r2, r3
|
|
|
|
do
|
|
{
|
|
if (count-- == 0U)
|
|
80051e4: 4623 mov r3, r4
|
|
80051e6: 1e5c subs r4, r3, #1
|
|
80051e8: 2b00 cmp r3, #0
|
|
80051ea: d102 bne.n 80051f2 <SDMMC_GetCmdResp1+0x2e>
|
|
{
|
|
return SDMMC_ERROR_TIMEOUT;
|
|
80051ec: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
|
|
80051f0: e0c9 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
sta_reg = SDIOx->STA;
|
|
80051f2: 68fb ldr r3, [r7, #12]
|
|
80051f4: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80051f6: 617b str r3, [r7, #20]
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
80051f8: 697b ldr r3, [r7, #20]
|
|
80051fa: f003 0345 and.w r3, r3, #69 ; 0x45
|
|
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
|
|
80051fe: 2b00 cmp r3, #0
|
|
8005200: d0f0 beq.n 80051e4 <SDMMC_GetCmdResp1+0x20>
|
|
8005202: 697b ldr r3, [r7, #20]
|
|
8005204: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
8005208: 2b00 cmp r3, #0
|
|
800520a: d1eb bne.n 80051e4 <SDMMC_GetCmdResp1+0x20>
|
|
|
|
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
|
|
800520c: 68fb ldr r3, [r7, #12]
|
|
800520e: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8005210: f003 0304 and.w r3, r3, #4
|
|
8005214: 2b00 cmp r3, #0
|
|
8005216: d004 beq.n 8005222 <SDMMC_GetCmdResp1+0x5e>
|
|
{
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
|
|
8005218: 68fb ldr r3, [r7, #12]
|
|
800521a: 2204 movs r2, #4
|
|
800521c: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
|
|
800521e: 2304 movs r3, #4
|
|
8005220: e0b1 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
|
|
8005222: 68fb ldr r3, [r7, #12]
|
|
8005224: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8005226: f003 0301 and.w r3, r3, #1
|
|
800522a: 2b00 cmp r3, #0
|
|
800522c: d004 beq.n 8005238 <SDMMC_GetCmdResp1+0x74>
|
|
{
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
|
|
800522e: 68fb ldr r3, [r7, #12]
|
|
8005230: 2201 movs r2, #1
|
|
8005232: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_CRC_FAIL;
|
|
8005234: 2301 movs r3, #1
|
|
8005236: e0a6 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
{
|
|
/* Nothing to do */
|
|
}
|
|
|
|
/* Clear all the static flags */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
|
|
8005238: 68fb ldr r3, [r7, #12]
|
|
800523a: 22c5 movs r2, #197 ; 0xc5
|
|
800523c: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
/* Check response received is of desired command */
|
|
if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
|
|
800523e: 68f8 ldr r0, [r7, #12]
|
|
8005240: f7ff fd1b bl 8004c7a <SDIO_GetCommandResponse>
|
|
8005244: 4603 mov r3, r0
|
|
8005246: 461a mov r2, r3
|
|
8005248: 7afb ldrb r3, [r7, #11]
|
|
800524a: 4293 cmp r3, r2
|
|
800524c: d001 beq.n 8005252 <SDMMC_GetCmdResp1+0x8e>
|
|
{
|
|
return SDMMC_ERROR_CMD_CRC_FAIL;
|
|
800524e: 2301 movs r3, #1
|
|
8005250: e099 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
|
|
/* We have received response, retrieve it for analysis */
|
|
response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
|
|
8005252: 2100 movs r1, #0
|
|
8005254: 68f8 ldr r0, [r7, #12]
|
|
8005256: f7ff fd1c bl 8004c92 <SDIO_GetResponse>
|
|
800525a: 6138 str r0, [r7, #16]
|
|
|
|
if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
|
|
800525c: 693a ldr r2, [r7, #16]
|
|
800525e: 4b4e ldr r3, [pc, #312] ; (8005398 <SDMMC_GetCmdResp1+0x1d4>)
|
|
8005260: 4013 ands r3, r2
|
|
8005262: 2b00 cmp r3, #0
|
|
8005264: d101 bne.n 800526a <SDMMC_GetCmdResp1+0xa6>
|
|
{
|
|
return SDMMC_ERROR_NONE;
|
|
8005266: 2300 movs r3, #0
|
|
8005268: e08d b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
|
|
800526a: 693b ldr r3, [r7, #16]
|
|
800526c: 2b00 cmp r3, #0
|
|
800526e: da02 bge.n 8005276 <SDMMC_GetCmdResp1+0xb2>
|
|
{
|
|
return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
|
|
8005270: f04f 7300 mov.w r3, #33554432 ; 0x2000000
|
|
8005274: e087 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
|
|
8005276: 693b ldr r3, [r7, #16]
|
|
8005278: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000
|
|
800527c: 2b00 cmp r3, #0
|
|
800527e: d001 beq.n 8005284 <SDMMC_GetCmdResp1+0xc0>
|
|
{
|
|
return SDMMC_ERROR_ADDR_MISALIGNED;
|
|
8005280: 2340 movs r3, #64 ; 0x40
|
|
8005282: e080 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
|
|
8005284: 693b ldr r3, [r7, #16]
|
|
8005286: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
|
|
800528a: 2b00 cmp r3, #0
|
|
800528c: d001 beq.n 8005292 <SDMMC_GetCmdResp1+0xce>
|
|
{
|
|
return SDMMC_ERROR_BLOCK_LEN_ERR;
|
|
800528e: 2380 movs r3, #128 ; 0x80
|
|
8005290: e079 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
|
|
8005292: 693b ldr r3, [r7, #16]
|
|
8005294: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8005298: 2b00 cmp r3, #0
|
|
800529a: d002 beq.n 80052a2 <SDMMC_GetCmdResp1+0xde>
|
|
{
|
|
return SDMMC_ERROR_ERASE_SEQ_ERR;
|
|
800529c: f44f 7380 mov.w r3, #256 ; 0x100
|
|
80052a0: e071 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
|
|
80052a2: 693b ldr r3, [r7, #16]
|
|
80052a4: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
|
|
80052a8: 2b00 cmp r3, #0
|
|
80052aa: d002 beq.n 80052b2 <SDMMC_GetCmdResp1+0xee>
|
|
{
|
|
return SDMMC_ERROR_BAD_ERASE_PARAM;
|
|
80052ac: f44f 7300 mov.w r3, #512 ; 0x200
|
|
80052b0: e069 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
|
|
80052b2: 693b ldr r3, [r7, #16]
|
|
80052b4: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
|
|
80052b8: 2b00 cmp r3, #0
|
|
80052ba: d002 beq.n 80052c2 <SDMMC_GetCmdResp1+0xfe>
|
|
{
|
|
return SDMMC_ERROR_WRITE_PROT_VIOLATION;
|
|
80052bc: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
80052c0: e061 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
|
|
80052c2: 693b ldr r3, [r7, #16]
|
|
80052c4: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
|
|
80052c8: 2b00 cmp r3, #0
|
|
80052ca: d002 beq.n 80052d2 <SDMMC_GetCmdResp1+0x10e>
|
|
{
|
|
return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
|
|
80052cc: f44f 6300 mov.w r3, #2048 ; 0x800
|
|
80052d0: e059 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
|
|
80052d2: 693b ldr r3, [r7, #16]
|
|
80052d4: f403 0300 and.w r3, r3, #8388608 ; 0x800000
|
|
80052d8: 2b00 cmp r3, #0
|
|
80052da: d002 beq.n 80052e2 <SDMMC_GetCmdResp1+0x11e>
|
|
{
|
|
return SDMMC_ERROR_COM_CRC_FAILED;
|
|
80052dc: f44f 5380 mov.w r3, #4096 ; 0x1000
|
|
80052e0: e051 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
|
|
80052e2: 693b ldr r3, [r7, #16]
|
|
80052e4: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
|
80052e8: 2b00 cmp r3, #0
|
|
80052ea: d002 beq.n 80052f2 <SDMMC_GetCmdResp1+0x12e>
|
|
{
|
|
return SDMMC_ERROR_ILLEGAL_CMD;
|
|
80052ec: f44f 5300 mov.w r3, #8192 ; 0x2000
|
|
80052f0: e049 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
|
|
80052f2: 693b ldr r3, [r7, #16]
|
|
80052f4: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
80052f8: 2b00 cmp r3, #0
|
|
80052fa: d002 beq.n 8005302 <SDMMC_GetCmdResp1+0x13e>
|
|
{
|
|
return SDMMC_ERROR_CARD_ECC_FAILED;
|
|
80052fc: f44f 4380 mov.w r3, #16384 ; 0x4000
|
|
8005300: e041 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
|
|
8005302: 693b ldr r3, [r7, #16]
|
|
8005304: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
|
8005308: 2b00 cmp r3, #0
|
|
800530a: d002 beq.n 8005312 <SDMMC_GetCmdResp1+0x14e>
|
|
{
|
|
return SDMMC_ERROR_CC_ERR;
|
|
800530c: f44f 4300 mov.w r3, #32768 ; 0x8000
|
|
8005310: e039 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
|
|
8005312: 693b ldr r3, [r7, #16]
|
|
8005314: f403 2380 and.w r3, r3, #262144 ; 0x40000
|
|
8005318: 2b00 cmp r3, #0
|
|
800531a: d002 beq.n 8005322 <SDMMC_GetCmdResp1+0x15e>
|
|
{
|
|
return SDMMC_ERROR_STREAM_READ_UNDERRUN;
|
|
800531c: f44f 3300 mov.w r3, #131072 ; 0x20000
|
|
8005320: e031 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
|
|
8005322: 693b ldr r3, [r7, #16]
|
|
8005324: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8005328: 2b00 cmp r3, #0
|
|
800532a: d002 beq.n 8005332 <SDMMC_GetCmdResp1+0x16e>
|
|
{
|
|
return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
|
|
800532c: f44f 2380 mov.w r3, #262144 ; 0x40000
|
|
8005330: e029 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
|
|
8005332: 693b ldr r3, [r7, #16]
|
|
8005334: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8005338: 2b00 cmp r3, #0
|
|
800533a: d002 beq.n 8005342 <SDMMC_GetCmdResp1+0x17e>
|
|
{
|
|
return SDMMC_ERROR_CID_CSD_OVERWRITE;
|
|
800533c: f44f 2300 mov.w r3, #524288 ; 0x80000
|
|
8005340: e021 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
|
|
8005342: 693b ldr r3, [r7, #16]
|
|
8005344: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8005348: 2b00 cmp r3, #0
|
|
800534a: d002 beq.n 8005352 <SDMMC_GetCmdResp1+0x18e>
|
|
{
|
|
return SDMMC_ERROR_WP_ERASE_SKIP;
|
|
800534c: f44f 1380 mov.w r3, #1048576 ; 0x100000
|
|
8005350: e019 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
|
|
8005352: 693b ldr r3, [r7, #16]
|
|
8005354: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005358: 2b00 cmp r3, #0
|
|
800535a: d002 beq.n 8005362 <SDMMC_GetCmdResp1+0x19e>
|
|
{
|
|
return SDMMC_ERROR_CARD_ECC_DISABLED;
|
|
800535c: f44f 1300 mov.w r3, #2097152 ; 0x200000
|
|
8005360: e011 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
|
|
8005362: 693b ldr r3, [r7, #16]
|
|
8005364: f403 5300 and.w r3, r3, #8192 ; 0x2000
|
|
8005368: 2b00 cmp r3, #0
|
|
800536a: d002 beq.n 8005372 <SDMMC_GetCmdResp1+0x1ae>
|
|
{
|
|
return SDMMC_ERROR_ERASE_RESET;
|
|
800536c: f44f 0380 mov.w r3, #4194304 ; 0x400000
|
|
8005370: e009 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
|
|
8005372: 693b ldr r3, [r7, #16]
|
|
8005374: f003 0308 and.w r3, r3, #8
|
|
8005378: 2b00 cmp r3, #0
|
|
800537a: d002 beq.n 8005382 <SDMMC_GetCmdResp1+0x1be>
|
|
{
|
|
return SDMMC_ERROR_AKE_SEQ_ERR;
|
|
800537c: f44f 0300 mov.w r3, #8388608 ; 0x800000
|
|
8005380: e001 b.n 8005386 <SDMMC_GetCmdResp1+0x1c2>
|
|
}
|
|
else
|
|
{
|
|
return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
|
|
8005382: f44f 3380 mov.w r3, #65536 ; 0x10000
|
|
}
|
|
}
|
|
8005386: 4618 mov r0, r3
|
|
8005388: 371c adds r7, #28
|
|
800538a: 46bd mov sp, r7
|
|
800538c: bd90 pop {r4, r7, pc}
|
|
800538e: bf00 nop
|
|
8005390: 20000004 .word 0x20000004
|
|
8005394: 10624dd3 .word 0x10624dd3
|
|
8005398: fdffe008 .word 0xfdffe008
|
|
|
|
0800539c <SDMMC_GetCmdResp2>:
|
|
* @brief Checks for error conditions for R2 (CID or CSD) response.
|
|
* @param hsd: SD handle
|
|
* @retval SD Card error state
|
|
*/
|
|
static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
|
|
{
|
|
800539c: b490 push {r4, r7}
|
|
800539e: b084 sub sp, #16
|
|
80053a0: af00 add r7, sp, #0
|
|
80053a2: 6078 str r0, [r7, #4]
|
|
uint32_t sta_reg;
|
|
/* 8 is the number of required instructions cycles for the below loop statement.
|
|
The SDIO_CMDTIMEOUT is expressed in ms */
|
|
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
|
|
80053a4: 4b1e ldr r3, [pc, #120] ; (8005420 <SDMMC_GetCmdResp2+0x84>)
|
|
80053a6: 681b ldr r3, [r3, #0]
|
|
80053a8: 4a1e ldr r2, [pc, #120] ; (8005424 <SDMMC_GetCmdResp2+0x88>)
|
|
80053aa: fba2 2303 umull r2, r3, r2, r3
|
|
80053ae: 0a5b lsrs r3, r3, #9
|
|
80053b0: f241 3288 movw r2, #5000 ; 0x1388
|
|
80053b4: fb02 f403 mul.w r4, r2, r3
|
|
|
|
do
|
|
{
|
|
if (count-- == 0U)
|
|
80053b8: 4623 mov r3, r4
|
|
80053ba: 1e5c subs r4, r3, #1
|
|
80053bc: 2b00 cmp r3, #0
|
|
80053be: d102 bne.n 80053c6 <SDMMC_GetCmdResp2+0x2a>
|
|
{
|
|
return SDMMC_ERROR_TIMEOUT;
|
|
80053c0: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
|
|
80053c4: e026 b.n 8005414 <SDMMC_GetCmdResp2+0x78>
|
|
}
|
|
sta_reg = SDIOx->STA;
|
|
80053c6: 687b ldr r3, [r7, #4]
|
|
80053c8: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80053ca: 60fb str r3, [r7, #12]
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
80053cc: 68fb ldr r3, [r7, #12]
|
|
80053ce: f003 0345 and.w r3, r3, #69 ; 0x45
|
|
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
|
|
80053d2: 2b00 cmp r3, #0
|
|
80053d4: d0f0 beq.n 80053b8 <SDMMC_GetCmdResp2+0x1c>
|
|
80053d6: 68fb ldr r3, [r7, #12]
|
|
80053d8: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
80053dc: 2b00 cmp r3, #0
|
|
80053de: d1eb bne.n 80053b8 <SDMMC_GetCmdResp2+0x1c>
|
|
|
|
if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
|
|
80053e0: 687b ldr r3, [r7, #4]
|
|
80053e2: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80053e4: f003 0304 and.w r3, r3, #4
|
|
80053e8: 2b00 cmp r3, #0
|
|
80053ea: d004 beq.n 80053f6 <SDMMC_GetCmdResp2+0x5a>
|
|
{
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
|
|
80053ec: 687b ldr r3, [r7, #4]
|
|
80053ee: 2204 movs r2, #4
|
|
80053f0: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
|
|
80053f2: 2304 movs r3, #4
|
|
80053f4: e00e b.n 8005414 <SDMMC_GetCmdResp2+0x78>
|
|
}
|
|
else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
|
|
80053f6: 687b ldr r3, [r7, #4]
|
|
80053f8: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80053fa: f003 0301 and.w r3, r3, #1
|
|
80053fe: 2b00 cmp r3, #0
|
|
8005400: d004 beq.n 800540c <SDMMC_GetCmdResp2+0x70>
|
|
{
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
|
|
8005402: 687b ldr r3, [r7, #4]
|
|
8005404: 2201 movs r2, #1
|
|
8005406: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_CRC_FAIL;
|
|
8005408: 2301 movs r3, #1
|
|
800540a: e003 b.n 8005414 <SDMMC_GetCmdResp2+0x78>
|
|
}
|
|
else
|
|
{
|
|
/* No error flag set */
|
|
/* Clear all the static flags */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
|
|
800540c: 687b ldr r3, [r7, #4]
|
|
800540e: 22c5 movs r2, #197 ; 0xc5
|
|
8005410: 639a str r2, [r3, #56] ; 0x38
|
|
}
|
|
|
|
return SDMMC_ERROR_NONE;
|
|
8005412: 2300 movs r3, #0
|
|
}
|
|
8005414: 4618 mov r0, r3
|
|
8005416: 3710 adds r7, #16
|
|
8005418: 46bd mov sp, r7
|
|
800541a: bc90 pop {r4, r7}
|
|
800541c: 4770 bx lr
|
|
800541e: bf00 nop
|
|
8005420: 20000004 .word 0x20000004
|
|
8005424: 10624dd3 .word 0x10624dd3
|
|
|
|
08005428 <SDMMC_GetCmdResp3>:
|
|
* @brief Checks for error conditions for R3 (OCR) response.
|
|
* @param hsd: SD handle
|
|
* @retval SD Card error state
|
|
*/
|
|
static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8005428: b490 push {r4, r7}
|
|
800542a: b084 sub sp, #16
|
|
800542c: af00 add r7, sp, #0
|
|
800542e: 6078 str r0, [r7, #4]
|
|
uint32_t sta_reg;
|
|
/* 8 is the number of required instructions cycles for the below loop statement.
|
|
The SDIO_CMDTIMEOUT is expressed in ms */
|
|
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
|
|
8005430: 4b18 ldr r3, [pc, #96] ; (8005494 <SDMMC_GetCmdResp3+0x6c>)
|
|
8005432: 681b ldr r3, [r3, #0]
|
|
8005434: 4a18 ldr r2, [pc, #96] ; (8005498 <SDMMC_GetCmdResp3+0x70>)
|
|
8005436: fba2 2303 umull r2, r3, r2, r3
|
|
800543a: 0a5b lsrs r3, r3, #9
|
|
800543c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8005440: fb02 f403 mul.w r4, r2, r3
|
|
|
|
do
|
|
{
|
|
if (count-- == 0U)
|
|
8005444: 4623 mov r3, r4
|
|
8005446: 1e5c subs r4, r3, #1
|
|
8005448: 2b00 cmp r3, #0
|
|
800544a: d102 bne.n 8005452 <SDMMC_GetCmdResp3+0x2a>
|
|
{
|
|
return SDMMC_ERROR_TIMEOUT;
|
|
800544c: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
|
|
8005450: e01b b.n 800548a <SDMMC_GetCmdResp3+0x62>
|
|
}
|
|
sta_reg = SDIOx->STA;
|
|
8005452: 687b ldr r3, [r7, #4]
|
|
8005454: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8005456: 60fb str r3, [r7, #12]
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
8005458: 68fb ldr r3, [r7, #12]
|
|
800545a: f003 0345 and.w r3, r3, #69 ; 0x45
|
|
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
|
|
800545e: 2b00 cmp r3, #0
|
|
8005460: d0f0 beq.n 8005444 <SDMMC_GetCmdResp3+0x1c>
|
|
8005462: 68fb ldr r3, [r7, #12]
|
|
8005464: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
8005468: 2b00 cmp r3, #0
|
|
800546a: d1eb bne.n 8005444 <SDMMC_GetCmdResp3+0x1c>
|
|
|
|
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
|
|
800546c: 687b ldr r3, [r7, #4]
|
|
800546e: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8005470: f003 0304 and.w r3, r3, #4
|
|
8005474: 2b00 cmp r3, #0
|
|
8005476: d004 beq.n 8005482 <SDMMC_GetCmdResp3+0x5a>
|
|
{
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
|
|
8005478: 687b ldr r3, [r7, #4]
|
|
800547a: 2204 movs r2, #4
|
|
800547c: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
|
|
800547e: 2304 movs r3, #4
|
|
8005480: e003 b.n 800548a <SDMMC_GetCmdResp3+0x62>
|
|
}
|
|
else
|
|
{
|
|
/* Clear all the static flags */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
|
|
8005482: 687b ldr r3, [r7, #4]
|
|
8005484: 22c5 movs r2, #197 ; 0xc5
|
|
8005486: 639a str r2, [r3, #56] ; 0x38
|
|
}
|
|
|
|
return SDMMC_ERROR_NONE;
|
|
8005488: 2300 movs r3, #0
|
|
}
|
|
800548a: 4618 mov r0, r3
|
|
800548c: 3710 adds r7, #16
|
|
800548e: 46bd mov sp, r7
|
|
8005490: bc90 pop {r4, r7}
|
|
8005492: 4770 bx lr
|
|
8005494: 20000004 .word 0x20000004
|
|
8005498: 10624dd3 .word 0x10624dd3
|
|
|
|
0800549c <SDMMC_GetCmdResp6>:
|
|
* @param pRCA: Pointer to the variable that will contain the SD card relative
|
|
* address RCA
|
|
* @retval SD Card error state
|
|
*/
|
|
static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
|
|
{
|
|
800549c: b590 push {r4, r7, lr}
|
|
800549e: b087 sub sp, #28
|
|
80054a0: af00 add r7, sp, #0
|
|
80054a2: 60f8 str r0, [r7, #12]
|
|
80054a4: 460b mov r3, r1
|
|
80054a6: 607a str r2, [r7, #4]
|
|
80054a8: 72fb strb r3, [r7, #11]
|
|
uint32_t response_r1;
|
|
uint32_t sta_reg;
|
|
|
|
/* 8 is the number of required instructions cycles for the below loop statement.
|
|
The SDIO_CMDTIMEOUT is expressed in ms */
|
|
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
|
|
80054aa: 4b34 ldr r3, [pc, #208] ; (800557c <SDMMC_GetCmdResp6+0xe0>)
|
|
80054ac: 681b ldr r3, [r3, #0]
|
|
80054ae: 4a34 ldr r2, [pc, #208] ; (8005580 <SDMMC_GetCmdResp6+0xe4>)
|
|
80054b0: fba2 2303 umull r2, r3, r2, r3
|
|
80054b4: 0a5b lsrs r3, r3, #9
|
|
80054b6: f241 3288 movw r2, #5000 ; 0x1388
|
|
80054ba: fb02 f403 mul.w r4, r2, r3
|
|
|
|
do
|
|
{
|
|
if (count-- == 0U)
|
|
80054be: 4623 mov r3, r4
|
|
80054c0: 1e5c subs r4, r3, #1
|
|
80054c2: 2b00 cmp r3, #0
|
|
80054c4: d102 bne.n 80054cc <SDMMC_GetCmdResp6+0x30>
|
|
{
|
|
return SDMMC_ERROR_TIMEOUT;
|
|
80054c6: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
|
|
80054ca: e052 b.n 8005572 <SDMMC_GetCmdResp6+0xd6>
|
|
}
|
|
sta_reg = SDIOx->STA;
|
|
80054cc: 68fb ldr r3, [r7, #12]
|
|
80054ce: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80054d0: 617b str r3, [r7, #20]
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
80054d2: 697b ldr r3, [r7, #20]
|
|
80054d4: f003 0345 and.w r3, r3, #69 ; 0x45
|
|
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
|
|
80054d8: 2b00 cmp r3, #0
|
|
80054da: d0f0 beq.n 80054be <SDMMC_GetCmdResp6+0x22>
|
|
80054dc: 697b ldr r3, [r7, #20]
|
|
80054de: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
80054e2: 2b00 cmp r3, #0
|
|
80054e4: d1eb bne.n 80054be <SDMMC_GetCmdResp6+0x22>
|
|
|
|
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
|
|
80054e6: 68fb ldr r3, [r7, #12]
|
|
80054e8: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80054ea: f003 0304 and.w r3, r3, #4
|
|
80054ee: 2b00 cmp r3, #0
|
|
80054f0: d004 beq.n 80054fc <SDMMC_GetCmdResp6+0x60>
|
|
{
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
|
|
80054f2: 68fb ldr r3, [r7, #12]
|
|
80054f4: 2204 movs r2, #4
|
|
80054f6: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
|
|
80054f8: 2304 movs r3, #4
|
|
80054fa: e03a b.n 8005572 <SDMMC_GetCmdResp6+0xd6>
|
|
}
|
|
else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
|
|
80054fc: 68fb ldr r3, [r7, #12]
|
|
80054fe: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8005500: f003 0301 and.w r3, r3, #1
|
|
8005504: 2b00 cmp r3, #0
|
|
8005506: d004 beq.n 8005512 <SDMMC_GetCmdResp6+0x76>
|
|
{
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
|
|
8005508: 68fb ldr r3, [r7, #12]
|
|
800550a: 2201 movs r2, #1
|
|
800550c: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_CRC_FAIL;
|
|
800550e: 2301 movs r3, #1
|
|
8005510: e02f b.n 8005572 <SDMMC_GetCmdResp6+0xd6>
|
|
{
|
|
/* Nothing to do */
|
|
}
|
|
|
|
/* Check response received is of desired command */
|
|
if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
|
|
8005512: 68f8 ldr r0, [r7, #12]
|
|
8005514: f7ff fbb1 bl 8004c7a <SDIO_GetCommandResponse>
|
|
8005518: 4603 mov r3, r0
|
|
800551a: 461a mov r2, r3
|
|
800551c: 7afb ldrb r3, [r7, #11]
|
|
800551e: 4293 cmp r3, r2
|
|
8005520: d001 beq.n 8005526 <SDMMC_GetCmdResp6+0x8a>
|
|
{
|
|
return SDMMC_ERROR_CMD_CRC_FAIL;
|
|
8005522: 2301 movs r3, #1
|
|
8005524: e025 b.n 8005572 <SDMMC_GetCmdResp6+0xd6>
|
|
}
|
|
|
|
/* Clear all the static flags */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
|
|
8005526: 68fb ldr r3, [r7, #12]
|
|
8005528: 22c5 movs r2, #197 ; 0xc5
|
|
800552a: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
/* We have received response, retrieve it. */
|
|
response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
|
|
800552c: 2100 movs r1, #0
|
|
800552e: 68f8 ldr r0, [r7, #12]
|
|
8005530: f7ff fbaf bl 8004c92 <SDIO_GetResponse>
|
|
8005534: 6138 str r0, [r7, #16]
|
|
|
|
if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
|
|
8005536: 693b ldr r3, [r7, #16]
|
|
8005538: f403 4360 and.w r3, r3, #57344 ; 0xe000
|
|
800553c: 2b00 cmp r3, #0
|
|
800553e: d106 bne.n 800554e <SDMMC_GetCmdResp6+0xb2>
|
|
{
|
|
*pRCA = (uint16_t) (response_r1 >> 16);
|
|
8005540: 693b ldr r3, [r7, #16]
|
|
8005542: 0c1b lsrs r3, r3, #16
|
|
8005544: b29a uxth r2, r3
|
|
8005546: 687b ldr r3, [r7, #4]
|
|
8005548: 801a strh r2, [r3, #0]
|
|
|
|
return SDMMC_ERROR_NONE;
|
|
800554a: 2300 movs r3, #0
|
|
800554c: e011 b.n 8005572 <SDMMC_GetCmdResp6+0xd6>
|
|
}
|
|
else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
|
|
800554e: 693b ldr r3, [r7, #16]
|
|
8005550: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005554: 2b00 cmp r3, #0
|
|
8005556: d002 beq.n 800555e <SDMMC_GetCmdResp6+0xc2>
|
|
{
|
|
return SDMMC_ERROR_ILLEGAL_CMD;
|
|
8005558: f44f 5300 mov.w r3, #8192 ; 0x2000
|
|
800555c: e009 b.n 8005572 <SDMMC_GetCmdResp6+0xd6>
|
|
}
|
|
else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
|
|
800555e: 693b ldr r3, [r7, #16]
|
|
8005560: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8005564: 2b00 cmp r3, #0
|
|
8005566: d002 beq.n 800556e <SDMMC_GetCmdResp6+0xd2>
|
|
{
|
|
return SDMMC_ERROR_COM_CRC_FAILED;
|
|
8005568: f44f 5380 mov.w r3, #4096 ; 0x1000
|
|
800556c: e001 b.n 8005572 <SDMMC_GetCmdResp6+0xd6>
|
|
}
|
|
else
|
|
{
|
|
return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
|
|
800556e: f44f 3380 mov.w r3, #65536 ; 0x10000
|
|
}
|
|
}
|
|
8005572: 4618 mov r0, r3
|
|
8005574: 371c adds r7, #28
|
|
8005576: 46bd mov sp, r7
|
|
8005578: bd90 pop {r4, r7, pc}
|
|
800557a: bf00 nop
|
|
800557c: 20000004 .word 0x20000004
|
|
8005580: 10624dd3 .word 0x10624dd3
|
|
|
|
08005584 <SDMMC_GetCmdResp7>:
|
|
* @brief Checks for error conditions for R7 response.
|
|
* @param hsd: SD handle
|
|
* @retval SD Card error state
|
|
*/
|
|
static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
|
|
{
|
|
8005584: b490 push {r4, r7}
|
|
8005586: b084 sub sp, #16
|
|
8005588: af00 add r7, sp, #0
|
|
800558a: 6078 str r0, [r7, #4]
|
|
uint32_t sta_reg;
|
|
/* 8 is the number of required instructions cycles for the below loop statement.
|
|
The SDIO_CMDTIMEOUT is expressed in ms */
|
|
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
|
|
800558c: 4b21 ldr r3, [pc, #132] ; (8005614 <SDMMC_GetCmdResp7+0x90>)
|
|
800558e: 681b ldr r3, [r3, #0]
|
|
8005590: 4a21 ldr r2, [pc, #132] ; (8005618 <SDMMC_GetCmdResp7+0x94>)
|
|
8005592: fba2 2303 umull r2, r3, r2, r3
|
|
8005596: 0a5b lsrs r3, r3, #9
|
|
8005598: f241 3288 movw r2, #5000 ; 0x1388
|
|
800559c: fb02 f403 mul.w r4, r2, r3
|
|
|
|
do
|
|
{
|
|
if (count-- == 0U)
|
|
80055a0: 4623 mov r3, r4
|
|
80055a2: 1e5c subs r4, r3, #1
|
|
80055a4: 2b00 cmp r3, #0
|
|
80055a6: d102 bne.n 80055ae <SDMMC_GetCmdResp7+0x2a>
|
|
{
|
|
return SDMMC_ERROR_TIMEOUT;
|
|
80055a8: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
|
|
80055ac: e02c b.n 8005608 <SDMMC_GetCmdResp7+0x84>
|
|
}
|
|
sta_reg = SDIOx->STA;
|
|
80055ae: 687b ldr r3, [r7, #4]
|
|
80055b0: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80055b2: 60fb str r3, [r7, #12]
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
80055b4: 68fb ldr r3, [r7, #12]
|
|
80055b6: f003 0345 and.w r3, r3, #69 ; 0x45
|
|
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
|
|
80055ba: 2b00 cmp r3, #0
|
|
80055bc: d0f0 beq.n 80055a0 <SDMMC_GetCmdResp7+0x1c>
|
|
80055be: 68fb ldr r3, [r7, #12]
|
|
80055c0: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
|
|
80055c4: 2b00 cmp r3, #0
|
|
80055c6: d1eb bne.n 80055a0 <SDMMC_GetCmdResp7+0x1c>
|
|
|
|
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
|
|
80055c8: 687b ldr r3, [r7, #4]
|
|
80055ca: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80055cc: f003 0304 and.w r3, r3, #4
|
|
80055d0: 2b00 cmp r3, #0
|
|
80055d2: d004 beq.n 80055de <SDMMC_GetCmdResp7+0x5a>
|
|
{
|
|
/* Card is SD V2.0 compliant */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
|
|
80055d4: 687b ldr r3, [r7, #4]
|
|
80055d6: 2204 movs r2, #4
|
|
80055d8: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
|
|
80055da: 2304 movs r3, #4
|
|
80055dc: e014 b.n 8005608 <SDMMC_GetCmdResp7+0x84>
|
|
}
|
|
else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
|
|
80055de: 687b ldr r3, [r7, #4]
|
|
80055e0: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80055e2: f003 0301 and.w r3, r3, #1
|
|
80055e6: 2b00 cmp r3, #0
|
|
80055e8: d004 beq.n 80055f4 <SDMMC_GetCmdResp7+0x70>
|
|
{
|
|
/* Card is SD V2.0 compliant */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
|
|
80055ea: 687b ldr r3, [r7, #4]
|
|
80055ec: 2201 movs r2, #1
|
|
80055ee: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
return SDMMC_ERROR_CMD_CRC_FAIL;
|
|
80055f0: 2301 movs r3, #1
|
|
80055f2: e009 b.n 8005608 <SDMMC_GetCmdResp7+0x84>
|
|
else
|
|
{
|
|
/* Nothing to do */
|
|
}
|
|
|
|
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
|
|
80055f4: 687b ldr r3, [r7, #4]
|
|
80055f6: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80055f8: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80055fc: 2b00 cmp r3, #0
|
|
80055fe: d002 beq.n 8005606 <SDMMC_GetCmdResp7+0x82>
|
|
{
|
|
/* Card is SD V2.0 compliant */
|
|
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
|
|
8005600: 687b ldr r3, [r7, #4]
|
|
8005602: 2240 movs r2, #64 ; 0x40
|
|
8005604: 639a str r2, [r3, #56] ; 0x38
|
|
}
|
|
|
|
return SDMMC_ERROR_NONE;
|
|
8005606: 2300 movs r3, #0
|
|
|
|
}
|
|
8005608: 4618 mov r0, r3
|
|
800560a: 3710 adds r7, #16
|
|
800560c: 46bd mov sp, r7
|
|
800560e: bc90 pop {r4, r7}
|
|
8005610: 4770 bx lr
|
|
8005612: bf00 nop
|
|
8005614: 20000004 .word 0x20000004
|
|
8005618: 10624dd3 .word 0x10624dd3
|
|
|
|
0800561c <USB_CoreInit>:
|
|
* @param cfg pointer to a USB_CfgTypeDef structure that contains
|
|
* the configuration information for the specified USBx peripheral.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
|
|
{
|
|
800561c: b084 sub sp, #16
|
|
800561e: b480 push {r7}
|
|
8005620: b083 sub sp, #12
|
|
8005622: af00 add r7, sp, #0
|
|
8005624: 6078 str r0, [r7, #4]
|
|
8005626: f107 0014 add.w r0, r7, #20
|
|
800562a: e880 000e stmia.w r0, {r1, r2, r3}
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
800562e: 2300 movs r3, #0
|
|
}
|
|
8005630: 4618 mov r0, r3
|
|
8005632: 370c adds r7, #12
|
|
8005634: 46bd mov sp, r7
|
|
8005636: bc80 pop {r7}
|
|
8005638: b004 add sp, #16
|
|
800563a: 4770 bx lr
|
|
|
|
0800563c <USB_EnableGlobalInt>:
|
|
* Enables the controller's Global Int in the AHB Config reg
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
|
|
{
|
|
800563c: b480 push {r7}
|
|
800563e: b085 sub sp, #20
|
|
8005640: af00 add r7, sp, #0
|
|
8005642: 6078 str r0, [r7, #4]
|
|
uint32_t winterruptmask;
|
|
|
|
/* Clear pending interrupts */
|
|
USBx->ISTR = 0U;
|
|
8005644: 687b ldr r3, [r7, #4]
|
|
8005646: 2200 movs r2, #0
|
|
8005648: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
/* Set winterruptmask variable */
|
|
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
|
800564c: f44f 433f mov.w r3, #48896 ; 0xbf00
|
|
8005650: 60fb str r3, [r7, #12]
|
|
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
|
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
|
USB_CNTR_RESETM;
|
|
|
|
/* Set interrupt mask */
|
|
USBx->CNTR = (uint16_t)winterruptmask;
|
|
8005652: 68fb ldr r3, [r7, #12]
|
|
8005654: b29a uxth r2, r3
|
|
8005656: 687b ldr r3, [r7, #4]
|
|
8005658: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
return HAL_OK;
|
|
800565c: 2300 movs r3, #0
|
|
}
|
|
800565e: 4618 mov r0, r3
|
|
8005660: 3714 adds r7, #20
|
|
8005662: 46bd mov sp, r7
|
|
8005664: bc80 pop {r7}
|
|
8005666: 4770 bx lr
|
|
|
|
08005668 <USB_DisableGlobalInt>:
|
|
* Disable the controller's Global Int in the AHB Config reg
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
|
|
{
|
|
8005668: b480 push {r7}
|
|
800566a: b085 sub sp, #20
|
|
800566c: af00 add r7, sp, #0
|
|
800566e: 6078 str r0, [r7, #4]
|
|
uint32_t winterruptmask;
|
|
|
|
/* Set winterruptmask variable */
|
|
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
|
8005670: f44f 433f mov.w r3, #48896 ; 0xbf00
|
|
8005674: 60fb str r3, [r7, #12]
|
|
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
|
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
|
USB_CNTR_RESETM;
|
|
|
|
/* Clear interrupt mask */
|
|
USBx->CNTR &= (uint16_t)(~winterruptmask);
|
|
8005676: 687b ldr r3, [r7, #4]
|
|
8005678: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
800567c: b29a uxth r2, r3
|
|
800567e: 68fb ldr r3, [r7, #12]
|
|
8005680: b29b uxth r3, r3
|
|
8005682: 43db mvns r3, r3
|
|
8005684: b29b uxth r3, r3
|
|
8005686: 4013 ands r3, r2
|
|
8005688: b29a uxth r2, r3
|
|
800568a: 687b ldr r3, [r7, #4]
|
|
800568c: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
return HAL_OK;
|
|
8005690: 2300 movs r3, #0
|
|
}
|
|
8005692: 4618 mov r0, r3
|
|
8005694: 3714 adds r7, #20
|
|
8005696: 46bd mov sp, r7
|
|
8005698: bc80 pop {r7}
|
|
800569a: 4770 bx lr
|
|
|
|
0800569c <USB_SetCurrentMode>:
|
|
* This parameter can be one of the these values:
|
|
* @arg USB_DEVICE_MODE Peripheral mode
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
|
|
{
|
|
800569c: b480 push {r7}
|
|
800569e: b083 sub sp, #12
|
|
80056a0: af00 add r7, sp, #0
|
|
80056a2: 6078 str r0, [r7, #4]
|
|
80056a4: 460b mov r3, r1
|
|
80056a6: 70fb strb r3, [r7, #3]
|
|
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
return HAL_OK;
|
|
80056a8: 2300 movs r3, #0
|
|
}
|
|
80056aa: 4618 mov r0, r3
|
|
80056ac: 370c adds r7, #12
|
|
80056ae: 46bd mov sp, r7
|
|
80056b0: bc80 pop {r7}
|
|
80056b2: 4770 bx lr
|
|
|
|
080056b4 <USB_DevInit>:
|
|
* @param cfg pointer to a USB_CfgTypeDef structure that contains
|
|
* the configuration information for the specified USBx peripheral.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
|
|
{
|
|
80056b4: b084 sub sp, #16
|
|
80056b6: b480 push {r7}
|
|
80056b8: b083 sub sp, #12
|
|
80056ba: af00 add r7, sp, #0
|
|
80056bc: 6078 str r0, [r7, #4]
|
|
80056be: f107 0014 add.w r0, r7, #20
|
|
80056c2: e880 000e stmia.w r0, {r1, r2, r3}
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(cfg);
|
|
|
|
/* Init Device */
|
|
/* CNTR_FRES = 1 */
|
|
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
|
|
80056c6: 687b ldr r3, [r7, #4]
|
|
80056c8: 2201 movs r2, #1
|
|
80056ca: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/* CNTR_FRES = 0 */
|
|
USBx->CNTR = 0U;
|
|
80056ce: 687b ldr r3, [r7, #4]
|
|
80056d0: 2200 movs r2, #0
|
|
80056d2: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/* Clear pending interrupts */
|
|
USBx->ISTR = 0U;
|
|
80056d6: 687b ldr r3, [r7, #4]
|
|
80056d8: 2200 movs r2, #0
|
|
80056da: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
/*Set Btable Address*/
|
|
USBx->BTABLE = BTABLE_ADDRESS;
|
|
80056de: 687b ldr r3, [r7, #4]
|
|
80056e0: 2200 movs r2, #0
|
|
80056e2: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
|
|
|
|
return HAL_OK;
|
|
80056e6: 2300 movs r3, #0
|
|
}
|
|
80056e8: 4618 mov r0, r3
|
|
80056ea: 370c adds r7, #12
|
|
80056ec: 46bd mov sp, r7
|
|
80056ee: bc80 pop {r7}
|
|
80056f0: b004 add sp, #16
|
|
80056f2: 4770 bx lr
|
|
|
|
080056f4 <USB_FlushTxFifo>:
|
|
* This parameter can be a value from 1 to 15
|
|
15 means Flush all Tx FIFOs
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num)
|
|
{
|
|
80056f4: b480 push {r7}
|
|
80056f6: b083 sub sp, #12
|
|
80056f8: af00 add r7, sp, #0
|
|
80056fa: 6078 str r0, [r7, #4]
|
|
80056fc: 6039 str r1, [r7, #0]
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
80056fe: 2300 movs r3, #0
|
|
}
|
|
8005700: 4618 mov r0, r3
|
|
8005702: 370c adds r7, #12
|
|
8005704: 46bd mov sp, r7
|
|
8005706: bc80 pop {r7}
|
|
8005708: 4770 bx lr
|
|
|
|
0800570a <USB_FlushRxFifo>:
|
|
* @brief USB_FlushRxFifo : Flush Rx FIFO
|
|
* @param USBx : Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
|
|
{
|
|
800570a: b480 push {r7}
|
|
800570c: b083 sub sp, #12
|
|
800570e: af00 add r7, sp, #0
|
|
8005710: 6078 str r0, [r7, #4]
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
8005712: 2300 movs r3, #0
|
|
}
|
|
8005714: 4618 mov r0, r3
|
|
8005716: 370c adds r7, #12
|
|
8005718: 46bd mov sp, r7
|
|
800571a: bc80 pop {r7}
|
|
800571c: 4770 bx lr
|
|
...
|
|
|
|
08005720 <USB_ActivateEndpoint>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8005720: b480 push {r7}
|
|
8005722: b09b sub sp, #108 ; 0x6c
|
|
8005724: af00 add r7, sp, #0
|
|
8005726: 6078 str r0, [r7, #4]
|
|
8005728: 6039 str r1, [r7, #0]
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
800572a: 2300 movs r3, #0
|
|
800572c: f887 3067 strb.w r3, [r7, #103] ; 0x67
|
|
uint16_t wEpRegVal;
|
|
|
|
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
|
|
8005730: 687a ldr r2, [r7, #4]
|
|
8005732: 683b ldr r3, [r7, #0]
|
|
8005734: 781b ldrb r3, [r3, #0]
|
|
8005736: 009b lsls r3, r3, #2
|
|
8005738: 4413 add r3, r2
|
|
800573a: 881b ldrh r3, [r3, #0]
|
|
800573c: b29b uxth r3, r3
|
|
800573e: f423 43ec bic.w r3, r3, #30208 ; 0x7600
|
|
8005742: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005746: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
|
|
|
|
/* initialize Endpoint */
|
|
switch (ep->type)
|
|
800574a: 683b ldr r3, [r7, #0]
|
|
800574c: 78db ldrb r3, [r3, #3]
|
|
800574e: 2b03 cmp r3, #3
|
|
8005750: d81f bhi.n 8005792 <USB_ActivateEndpoint+0x72>
|
|
8005752: a201 add r2, pc, #4 ; (adr r2, 8005758 <USB_ActivateEndpoint+0x38>)
|
|
8005754: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8005758: 08005769 .word 0x08005769
|
|
800575c: 08005785 .word 0x08005785
|
|
8005760: 0800579b .word 0x0800579b
|
|
8005764: 08005777 .word 0x08005777
|
|
{
|
|
case EP_TYPE_CTRL:
|
|
wEpRegVal |= USB_EP_CONTROL;
|
|
8005768: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
|
|
800576c: f443 7300 orr.w r3, r3, #512 ; 0x200
|
|
8005770: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
|
|
break;
|
|
8005774: e012 b.n 800579c <USB_ActivateEndpoint+0x7c>
|
|
case EP_TYPE_BULK:
|
|
wEpRegVal |= USB_EP_BULK;
|
|
break;
|
|
|
|
case EP_TYPE_INTR:
|
|
wEpRegVal |= USB_EP_INTERRUPT;
|
|
8005776: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
|
|
800577a: f443 63c0 orr.w r3, r3, #1536 ; 0x600
|
|
800577e: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
|
|
break;
|
|
8005782: e00b b.n 800579c <USB_ActivateEndpoint+0x7c>
|
|
|
|
case EP_TYPE_ISOC:
|
|
wEpRegVal |= USB_EP_ISOCHRONOUS;
|
|
8005784: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
|
|
8005788: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
|
800578c: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
|
|
break;
|
|
8005790: e004 b.n 800579c <USB_ActivateEndpoint+0x7c>
|
|
|
|
default:
|
|
ret = HAL_ERROR;
|
|
8005792: 2301 movs r3, #1
|
|
8005794: f887 3067 strb.w r3, [r7, #103] ; 0x67
|
|
break;
|
|
8005798: e000 b.n 800579c <USB_ActivateEndpoint+0x7c>
|
|
break;
|
|
800579a: bf00 nop
|
|
}
|
|
|
|
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
|
|
800579c: 687a ldr r2, [r7, #4]
|
|
800579e: 683b ldr r3, [r7, #0]
|
|
80057a0: 781b ldrb r3, [r3, #0]
|
|
80057a2: 009b lsls r3, r3, #2
|
|
80057a4: 441a add r2, r3
|
|
80057a6: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
|
|
80057aa: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80057ae: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80057b2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80057b6: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80057ba: b29b uxth r3, r3
|
|
80057bc: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
|
|
80057be: 687a ldr r2, [r7, #4]
|
|
80057c0: 683b ldr r3, [r7, #0]
|
|
80057c2: 781b ldrb r3, [r3, #0]
|
|
80057c4: 009b lsls r3, r3, #2
|
|
80057c6: 4413 add r3, r2
|
|
80057c8: 881b ldrh r3, [r3, #0]
|
|
80057ca: b29b uxth r3, r3
|
|
80057cc: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80057d0: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80057d4: b29a uxth r2, r3
|
|
80057d6: 683b ldr r3, [r7, #0]
|
|
80057d8: 781b ldrb r3, [r3, #0]
|
|
80057da: b29b uxth r3, r3
|
|
80057dc: 4313 orrs r3, r2
|
|
80057de: f8a7 305e strh.w r3, [r7, #94] ; 0x5e
|
|
80057e2: 687a ldr r2, [r7, #4]
|
|
80057e4: 683b ldr r3, [r7, #0]
|
|
80057e6: 781b ldrb r3, [r3, #0]
|
|
80057e8: 009b lsls r3, r3, #2
|
|
80057ea: 441a add r2, r3
|
|
80057ec: f8b7 305e ldrh.w r3, [r7, #94] ; 0x5e
|
|
80057f0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80057f4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80057f8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80057fc: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005800: b29b uxth r3, r3
|
|
8005802: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->doublebuffer == 0U)
|
|
8005804: 683b ldr r3, [r7, #0]
|
|
8005806: 7b1b ldrb r3, [r3, #12]
|
|
8005808: 2b00 cmp r3, #0
|
|
800580a: f040 8149 bne.w 8005aa0 <USB_ActivateEndpoint+0x380>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
800580e: 683b ldr r3, [r7, #0]
|
|
8005810: 785b ldrb r3, [r3, #1]
|
|
8005812: 2b00 cmp r3, #0
|
|
8005814: f000 8084 beq.w 8005920 <USB_ActivateEndpoint+0x200>
|
|
{
|
|
/*Set the endpoint Transmit buffer address */
|
|
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
|
8005818: 687b ldr r3, [r7, #4]
|
|
800581a: 617b str r3, [r7, #20]
|
|
800581c: 687b ldr r3, [r7, #4]
|
|
800581e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8005822: b29b uxth r3, r3
|
|
8005824: 461a mov r2, r3
|
|
8005826: 697b ldr r3, [r7, #20]
|
|
8005828: 4413 add r3, r2
|
|
800582a: 617b str r3, [r7, #20]
|
|
800582c: 683b ldr r3, [r7, #0]
|
|
800582e: 781b ldrb r3, [r3, #0]
|
|
8005830: 011a lsls r2, r3, #4
|
|
8005832: 697b ldr r3, [r7, #20]
|
|
8005834: 4413 add r3, r2
|
|
8005836: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
800583a: 613b str r3, [r7, #16]
|
|
800583c: 683b ldr r3, [r7, #0]
|
|
800583e: 88db ldrh r3, [r3, #6]
|
|
8005840: 085b lsrs r3, r3, #1
|
|
8005842: b29b uxth r3, r3
|
|
8005844: 005b lsls r3, r3, #1
|
|
8005846: b29a uxth r2, r3
|
|
8005848: 693b ldr r3, [r7, #16]
|
|
800584a: 801a strh r2, [r3, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
800584c: 687a ldr r2, [r7, #4]
|
|
800584e: 683b ldr r3, [r7, #0]
|
|
8005850: 781b ldrb r3, [r3, #0]
|
|
8005852: 009b lsls r3, r3, #2
|
|
8005854: 4413 add r3, r2
|
|
8005856: 881b ldrh r3, [r3, #0]
|
|
8005858: 81fb strh r3, [r7, #14]
|
|
800585a: 89fb ldrh r3, [r7, #14]
|
|
800585c: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005860: 2b00 cmp r3, #0
|
|
8005862: d01b beq.n 800589c <USB_ActivateEndpoint+0x17c>
|
|
8005864: 687a ldr r2, [r7, #4]
|
|
8005866: 683b ldr r3, [r7, #0]
|
|
8005868: 781b ldrb r3, [r3, #0]
|
|
800586a: 009b lsls r3, r3, #2
|
|
800586c: 4413 add r3, r2
|
|
800586e: 881b ldrh r3, [r3, #0]
|
|
8005870: b29b uxth r3, r3
|
|
8005872: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005876: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800587a: 81bb strh r3, [r7, #12]
|
|
800587c: 687a ldr r2, [r7, #4]
|
|
800587e: 683b ldr r3, [r7, #0]
|
|
8005880: 781b ldrb r3, [r3, #0]
|
|
8005882: 009b lsls r3, r3, #2
|
|
8005884: 441a add r2, r3
|
|
8005886: 89bb ldrh r3, [r7, #12]
|
|
8005888: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800588c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005890: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005894: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8005898: b29b uxth r3, r3
|
|
800589a: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
800589c: 683b ldr r3, [r7, #0]
|
|
800589e: 78db ldrb r3, [r3, #3]
|
|
80058a0: 2b01 cmp r3, #1
|
|
80058a2: d020 beq.n 80058e6 <USB_ActivateEndpoint+0x1c6>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
80058a4: 687a ldr r2, [r7, #4]
|
|
80058a6: 683b ldr r3, [r7, #0]
|
|
80058a8: 781b ldrb r3, [r3, #0]
|
|
80058aa: 009b lsls r3, r3, #2
|
|
80058ac: 4413 add r3, r2
|
|
80058ae: 881b ldrh r3, [r3, #0]
|
|
80058b0: b29b uxth r3, r3
|
|
80058b2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80058b6: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
80058ba: 813b strh r3, [r7, #8]
|
|
80058bc: 893b ldrh r3, [r7, #8]
|
|
80058be: f083 0320 eor.w r3, r3, #32
|
|
80058c2: 813b strh r3, [r7, #8]
|
|
80058c4: 687a ldr r2, [r7, #4]
|
|
80058c6: 683b ldr r3, [r7, #0]
|
|
80058c8: 781b ldrb r3, [r3, #0]
|
|
80058ca: 009b lsls r3, r3, #2
|
|
80058cc: 441a add r2, r3
|
|
80058ce: 893b ldrh r3, [r7, #8]
|
|
80058d0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80058d4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80058d8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80058dc: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80058e0: b29b uxth r3, r3
|
|
80058e2: 8013 strh r3, [r2, #0]
|
|
80058e4: e27f b.n 8005de6 <USB_ActivateEndpoint+0x6c6>
|
|
}
|
|
else
|
|
{
|
|
/* Configure TX Endpoint to disabled state */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
80058e6: 687a ldr r2, [r7, #4]
|
|
80058e8: 683b ldr r3, [r7, #0]
|
|
80058ea: 781b ldrb r3, [r3, #0]
|
|
80058ec: 009b lsls r3, r3, #2
|
|
80058ee: 4413 add r3, r2
|
|
80058f0: 881b ldrh r3, [r3, #0]
|
|
80058f2: b29b uxth r3, r3
|
|
80058f4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80058f8: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
80058fc: 817b strh r3, [r7, #10]
|
|
80058fe: 687a ldr r2, [r7, #4]
|
|
8005900: 683b ldr r3, [r7, #0]
|
|
8005902: 781b ldrb r3, [r3, #0]
|
|
8005904: 009b lsls r3, r3, #2
|
|
8005906: 441a add r2, r3
|
|
8005908: 897b ldrh r3, [r7, #10]
|
|
800590a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800590e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005912: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005916: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800591a: b29b uxth r3, r3
|
|
800591c: 8013 strh r3, [r2, #0]
|
|
800591e: e262 b.n 8005de6 <USB_ActivateEndpoint+0x6c6>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/*Set the endpoint Receive buffer address */
|
|
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
|
8005920: 687b ldr r3, [r7, #4]
|
|
8005922: 62fb str r3, [r7, #44] ; 0x2c
|
|
8005924: 687b ldr r3, [r7, #4]
|
|
8005926: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800592a: b29b uxth r3, r3
|
|
800592c: 461a mov r2, r3
|
|
800592e: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8005930: 4413 add r3, r2
|
|
8005932: 62fb str r3, [r7, #44] ; 0x2c
|
|
8005934: 683b ldr r3, [r7, #0]
|
|
8005936: 781b ldrb r3, [r3, #0]
|
|
8005938: 011a lsls r2, r3, #4
|
|
800593a: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
800593c: 4413 add r3, r2
|
|
800593e: f503 6381 add.w r3, r3, #1032 ; 0x408
|
|
8005942: 62bb str r3, [r7, #40] ; 0x28
|
|
8005944: 683b ldr r3, [r7, #0]
|
|
8005946: 88db ldrh r3, [r3, #6]
|
|
8005948: 085b lsrs r3, r3, #1
|
|
800594a: b29b uxth r3, r3
|
|
800594c: 005b lsls r3, r3, #1
|
|
800594e: b29a uxth r2, r3
|
|
8005950: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005952: 801a strh r2, [r3, #0]
|
|
|
|
/*Set the endpoint Receive buffer counter*/
|
|
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
|
|
8005954: 687b ldr r3, [r7, #4]
|
|
8005956: 627b str r3, [r7, #36] ; 0x24
|
|
8005958: 687b ldr r3, [r7, #4]
|
|
800595a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800595e: b29b uxth r3, r3
|
|
8005960: 461a mov r2, r3
|
|
8005962: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8005964: 4413 add r3, r2
|
|
8005966: 627b str r3, [r7, #36] ; 0x24
|
|
8005968: 683b ldr r3, [r7, #0]
|
|
800596a: 781b ldrb r3, [r3, #0]
|
|
800596c: 011a lsls r2, r3, #4
|
|
800596e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8005970: 4413 add r3, r2
|
|
8005972: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8005976: 623b str r3, [r7, #32]
|
|
8005978: 683b ldr r3, [r7, #0]
|
|
800597a: 691b ldr r3, [r3, #16]
|
|
800597c: 2b00 cmp r3, #0
|
|
800597e: d112 bne.n 80059a6 <USB_ActivateEndpoint+0x286>
|
|
8005980: 6a3b ldr r3, [r7, #32]
|
|
8005982: 881b ldrh r3, [r3, #0]
|
|
8005984: b29b uxth r3, r3
|
|
8005986: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
800598a: b29a uxth r2, r3
|
|
800598c: 6a3b ldr r3, [r7, #32]
|
|
800598e: 801a strh r2, [r3, #0]
|
|
8005990: 6a3b ldr r3, [r7, #32]
|
|
8005992: 881b ldrh r3, [r3, #0]
|
|
8005994: b29b uxth r3, r3
|
|
8005996: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800599a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800599e: b29a uxth r2, r3
|
|
80059a0: 6a3b ldr r3, [r7, #32]
|
|
80059a2: 801a strh r2, [r3, #0]
|
|
80059a4: e02f b.n 8005a06 <USB_ActivateEndpoint+0x2e6>
|
|
80059a6: 683b ldr r3, [r7, #0]
|
|
80059a8: 691b ldr r3, [r3, #16]
|
|
80059aa: 2b3e cmp r3, #62 ; 0x3e
|
|
80059ac: d813 bhi.n 80059d6 <USB_ActivateEndpoint+0x2b6>
|
|
80059ae: 683b ldr r3, [r7, #0]
|
|
80059b0: 691b ldr r3, [r3, #16]
|
|
80059b2: 085b lsrs r3, r3, #1
|
|
80059b4: 663b str r3, [r7, #96] ; 0x60
|
|
80059b6: 683b ldr r3, [r7, #0]
|
|
80059b8: 691b ldr r3, [r3, #16]
|
|
80059ba: f003 0301 and.w r3, r3, #1
|
|
80059be: 2b00 cmp r3, #0
|
|
80059c0: d002 beq.n 80059c8 <USB_ActivateEndpoint+0x2a8>
|
|
80059c2: 6e3b ldr r3, [r7, #96] ; 0x60
|
|
80059c4: 3301 adds r3, #1
|
|
80059c6: 663b str r3, [r7, #96] ; 0x60
|
|
80059c8: 6e3b ldr r3, [r7, #96] ; 0x60
|
|
80059ca: b29b uxth r3, r3
|
|
80059cc: 029b lsls r3, r3, #10
|
|
80059ce: b29a uxth r2, r3
|
|
80059d0: 6a3b ldr r3, [r7, #32]
|
|
80059d2: 801a strh r2, [r3, #0]
|
|
80059d4: e017 b.n 8005a06 <USB_ActivateEndpoint+0x2e6>
|
|
80059d6: 683b ldr r3, [r7, #0]
|
|
80059d8: 691b ldr r3, [r3, #16]
|
|
80059da: 095b lsrs r3, r3, #5
|
|
80059dc: 663b str r3, [r7, #96] ; 0x60
|
|
80059de: 683b ldr r3, [r7, #0]
|
|
80059e0: 691b ldr r3, [r3, #16]
|
|
80059e2: f003 031f and.w r3, r3, #31
|
|
80059e6: 2b00 cmp r3, #0
|
|
80059e8: d102 bne.n 80059f0 <USB_ActivateEndpoint+0x2d0>
|
|
80059ea: 6e3b ldr r3, [r7, #96] ; 0x60
|
|
80059ec: 3b01 subs r3, #1
|
|
80059ee: 663b str r3, [r7, #96] ; 0x60
|
|
80059f0: 6e3b ldr r3, [r7, #96] ; 0x60
|
|
80059f2: b29b uxth r3, r3
|
|
80059f4: 029b lsls r3, r3, #10
|
|
80059f6: b29b uxth r3, r3
|
|
80059f8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80059fc: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005a00: b29a uxth r2, r3
|
|
8005a02: 6a3b ldr r3, [r7, #32]
|
|
8005a04: 801a strh r2, [r3, #0]
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8005a06: 687a ldr r2, [r7, #4]
|
|
8005a08: 683b ldr r3, [r7, #0]
|
|
8005a0a: 781b ldrb r3, [r3, #0]
|
|
8005a0c: 009b lsls r3, r3, #2
|
|
8005a0e: 4413 add r3, r2
|
|
8005a10: 881b ldrh r3, [r3, #0]
|
|
8005a12: 83fb strh r3, [r7, #30]
|
|
8005a14: 8bfb ldrh r3, [r7, #30]
|
|
8005a16: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005a1a: 2b00 cmp r3, #0
|
|
8005a1c: d01b beq.n 8005a56 <USB_ActivateEndpoint+0x336>
|
|
8005a1e: 687a ldr r2, [r7, #4]
|
|
8005a20: 683b ldr r3, [r7, #0]
|
|
8005a22: 781b ldrb r3, [r3, #0]
|
|
8005a24: 009b lsls r3, r3, #2
|
|
8005a26: 4413 add r3, r2
|
|
8005a28: 881b ldrh r3, [r3, #0]
|
|
8005a2a: b29b uxth r3, r3
|
|
8005a2c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005a30: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005a34: 83bb strh r3, [r7, #28]
|
|
8005a36: 687a ldr r2, [r7, #4]
|
|
8005a38: 683b ldr r3, [r7, #0]
|
|
8005a3a: 781b ldrb r3, [r3, #0]
|
|
8005a3c: 009b lsls r3, r3, #2
|
|
8005a3e: 441a add r2, r3
|
|
8005a40: 8bbb ldrh r3, [r7, #28]
|
|
8005a42: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005a46: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005a4a: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8005a4e: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005a52: b29b uxth r3, r3
|
|
8005a54: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure VALID status for the Endpoint*/
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8005a56: 687a ldr r2, [r7, #4]
|
|
8005a58: 683b ldr r3, [r7, #0]
|
|
8005a5a: 781b ldrb r3, [r3, #0]
|
|
8005a5c: 009b lsls r3, r3, #2
|
|
8005a5e: 4413 add r3, r2
|
|
8005a60: 881b ldrh r3, [r3, #0]
|
|
8005a62: b29b uxth r3, r3
|
|
8005a64: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8005a68: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005a6c: 837b strh r3, [r7, #26]
|
|
8005a6e: 8b7b ldrh r3, [r7, #26]
|
|
8005a70: f483 5380 eor.w r3, r3, #4096 ; 0x1000
|
|
8005a74: 837b strh r3, [r7, #26]
|
|
8005a76: 8b7b ldrh r3, [r7, #26]
|
|
8005a78: f483 5300 eor.w r3, r3, #8192 ; 0x2000
|
|
8005a7c: 837b strh r3, [r7, #26]
|
|
8005a7e: 687a ldr r2, [r7, #4]
|
|
8005a80: 683b ldr r3, [r7, #0]
|
|
8005a82: 781b ldrb r3, [r3, #0]
|
|
8005a84: 009b lsls r3, r3, #2
|
|
8005a86: 441a add r2, r3
|
|
8005a88: 8b7b ldrh r3, [r7, #26]
|
|
8005a8a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005a8e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005a92: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005a96: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005a9a: b29b uxth r3, r3
|
|
8005a9c: 8013 strh r3, [r2, #0]
|
|
8005a9e: e1a2 b.n 8005de6 <USB_ActivateEndpoint+0x6c6>
|
|
}
|
|
/*Double Buffer*/
|
|
else
|
|
{
|
|
/* Set the endpoint as double buffered */
|
|
PCD_SET_EP_DBUF(USBx, ep->num);
|
|
8005aa0: 687a ldr r2, [r7, #4]
|
|
8005aa2: 683b ldr r3, [r7, #0]
|
|
8005aa4: 781b ldrb r3, [r3, #0]
|
|
8005aa6: 009b lsls r3, r3, #2
|
|
8005aa8: 4413 add r3, r2
|
|
8005aaa: 881b ldrh r3, [r3, #0]
|
|
8005aac: b29b uxth r3, r3
|
|
8005aae: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005ab2: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005ab6: f8a7 305c strh.w r3, [r7, #92] ; 0x5c
|
|
8005aba: 687a ldr r2, [r7, #4]
|
|
8005abc: 683b ldr r3, [r7, #0]
|
|
8005abe: 781b ldrb r3, [r3, #0]
|
|
8005ac0: 009b lsls r3, r3, #2
|
|
8005ac2: 441a add r2, r3
|
|
8005ac4: f8b7 305c ldrh.w r3, [r7, #92] ; 0x5c
|
|
8005ac8: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005acc: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005ad0: f443 4301 orr.w r3, r3, #33024 ; 0x8100
|
|
8005ad4: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005ad8: b29b uxth r3, r3
|
|
8005ada: 8013 strh r3, [r2, #0]
|
|
|
|
/* Set buffer address for double buffered mode */
|
|
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
|
|
8005adc: 687b ldr r3, [r7, #4]
|
|
8005ade: 65bb str r3, [r7, #88] ; 0x58
|
|
8005ae0: 687b ldr r3, [r7, #4]
|
|
8005ae2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8005ae6: b29b uxth r3, r3
|
|
8005ae8: 461a mov r2, r3
|
|
8005aea: 6dbb ldr r3, [r7, #88] ; 0x58
|
|
8005aec: 4413 add r3, r2
|
|
8005aee: 65bb str r3, [r7, #88] ; 0x58
|
|
8005af0: 683b ldr r3, [r7, #0]
|
|
8005af2: 781b ldrb r3, [r3, #0]
|
|
8005af4: 011a lsls r2, r3, #4
|
|
8005af6: 6dbb ldr r3, [r7, #88] ; 0x58
|
|
8005af8: 4413 add r3, r2
|
|
8005afa: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8005afe: 657b str r3, [r7, #84] ; 0x54
|
|
8005b00: 683b ldr r3, [r7, #0]
|
|
8005b02: 891b ldrh r3, [r3, #8]
|
|
8005b04: 085b lsrs r3, r3, #1
|
|
8005b06: b29b uxth r3, r3
|
|
8005b08: 005b lsls r3, r3, #1
|
|
8005b0a: b29a uxth r2, r3
|
|
8005b0c: 6d7b ldr r3, [r7, #84] ; 0x54
|
|
8005b0e: 801a strh r2, [r3, #0]
|
|
8005b10: 687b ldr r3, [r7, #4]
|
|
8005b12: 653b str r3, [r7, #80] ; 0x50
|
|
8005b14: 687b ldr r3, [r7, #4]
|
|
8005b16: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8005b1a: b29b uxth r3, r3
|
|
8005b1c: 461a mov r2, r3
|
|
8005b1e: 6d3b ldr r3, [r7, #80] ; 0x50
|
|
8005b20: 4413 add r3, r2
|
|
8005b22: 653b str r3, [r7, #80] ; 0x50
|
|
8005b24: 683b ldr r3, [r7, #0]
|
|
8005b26: 781b ldrb r3, [r3, #0]
|
|
8005b28: 011a lsls r2, r3, #4
|
|
8005b2a: 6d3b ldr r3, [r7, #80] ; 0x50
|
|
8005b2c: 4413 add r3, r2
|
|
8005b2e: f503 6381 add.w r3, r3, #1032 ; 0x408
|
|
8005b32: 64fb str r3, [r7, #76] ; 0x4c
|
|
8005b34: 683b ldr r3, [r7, #0]
|
|
8005b36: 895b ldrh r3, [r3, #10]
|
|
8005b38: 085b lsrs r3, r3, #1
|
|
8005b3a: b29b uxth r3, r3
|
|
8005b3c: 005b lsls r3, r3, #1
|
|
8005b3e: b29a uxth r2, r3
|
|
8005b40: 6cfb ldr r3, [r7, #76] ; 0x4c
|
|
8005b42: 801a strh r2, [r3, #0]
|
|
|
|
if (ep->is_in == 0U)
|
|
8005b44: 683b ldr r3, [r7, #0]
|
|
8005b46: 785b ldrb r3, [r3, #1]
|
|
8005b48: 2b00 cmp r3, #0
|
|
8005b4a: f040 8091 bne.w 8005c70 <USB_ActivateEndpoint+0x550>
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT */
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8005b4e: 687a ldr r2, [r7, #4]
|
|
8005b50: 683b ldr r3, [r7, #0]
|
|
8005b52: 781b ldrb r3, [r3, #0]
|
|
8005b54: 009b lsls r3, r3, #2
|
|
8005b56: 4413 add r3, r2
|
|
8005b58: 881b ldrh r3, [r3, #0]
|
|
8005b5a: 87bb strh r3, [r7, #60] ; 0x3c
|
|
8005b5c: 8fbb ldrh r3, [r7, #60] ; 0x3c
|
|
8005b5e: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005b62: 2b00 cmp r3, #0
|
|
8005b64: d01b beq.n 8005b9e <USB_ActivateEndpoint+0x47e>
|
|
8005b66: 687a ldr r2, [r7, #4]
|
|
8005b68: 683b ldr r3, [r7, #0]
|
|
8005b6a: 781b ldrb r3, [r3, #0]
|
|
8005b6c: 009b lsls r3, r3, #2
|
|
8005b6e: 4413 add r3, r2
|
|
8005b70: 881b ldrh r3, [r3, #0]
|
|
8005b72: b29b uxth r3, r3
|
|
8005b74: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005b78: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005b7c: 877b strh r3, [r7, #58] ; 0x3a
|
|
8005b7e: 687a ldr r2, [r7, #4]
|
|
8005b80: 683b ldr r3, [r7, #0]
|
|
8005b82: 781b ldrb r3, [r3, #0]
|
|
8005b84: 009b lsls r3, r3, #2
|
|
8005b86: 441a add r2, r3
|
|
8005b88: 8f7b ldrh r3, [r7, #58] ; 0x3a
|
|
8005b8a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005b8e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005b92: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8005b96: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005b9a: b29b uxth r3, r3
|
|
8005b9c: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8005b9e: 687a ldr r2, [r7, #4]
|
|
8005ba0: 683b ldr r3, [r7, #0]
|
|
8005ba2: 781b ldrb r3, [r3, #0]
|
|
8005ba4: 009b lsls r3, r3, #2
|
|
8005ba6: 4413 add r3, r2
|
|
8005ba8: 881b ldrh r3, [r3, #0]
|
|
8005baa: 873b strh r3, [r7, #56] ; 0x38
|
|
8005bac: 8f3b ldrh r3, [r7, #56] ; 0x38
|
|
8005bae: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005bb2: 2b00 cmp r3, #0
|
|
8005bb4: d01b beq.n 8005bee <USB_ActivateEndpoint+0x4ce>
|
|
8005bb6: 687a ldr r2, [r7, #4]
|
|
8005bb8: 683b ldr r3, [r7, #0]
|
|
8005bba: 781b ldrb r3, [r3, #0]
|
|
8005bbc: 009b lsls r3, r3, #2
|
|
8005bbe: 4413 add r3, r2
|
|
8005bc0: 881b ldrh r3, [r3, #0]
|
|
8005bc2: b29b uxth r3, r3
|
|
8005bc4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005bc8: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005bcc: 86fb strh r3, [r7, #54] ; 0x36
|
|
8005bce: 687a ldr r2, [r7, #4]
|
|
8005bd0: 683b ldr r3, [r7, #0]
|
|
8005bd2: 781b ldrb r3, [r3, #0]
|
|
8005bd4: 009b lsls r3, r3, #2
|
|
8005bd6: 441a add r2, r3
|
|
8005bd8: 8efb ldrh r3, [r7, #54] ; 0x36
|
|
8005bda: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005bde: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005be2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005be6: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8005bea: b29b uxth r3, r3
|
|
8005bec: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8005bee: 687a ldr r2, [r7, #4]
|
|
8005bf0: 683b ldr r3, [r7, #0]
|
|
8005bf2: 781b ldrb r3, [r3, #0]
|
|
8005bf4: 009b lsls r3, r3, #2
|
|
8005bf6: 4413 add r3, r2
|
|
8005bf8: 881b ldrh r3, [r3, #0]
|
|
8005bfa: b29b uxth r3, r3
|
|
8005bfc: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8005c00: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005c04: 86bb strh r3, [r7, #52] ; 0x34
|
|
8005c06: 8ebb ldrh r3, [r7, #52] ; 0x34
|
|
8005c08: f483 5380 eor.w r3, r3, #4096 ; 0x1000
|
|
8005c0c: 86bb strh r3, [r7, #52] ; 0x34
|
|
8005c0e: 8ebb ldrh r3, [r7, #52] ; 0x34
|
|
8005c10: f483 5300 eor.w r3, r3, #8192 ; 0x2000
|
|
8005c14: 86bb strh r3, [r7, #52] ; 0x34
|
|
8005c16: 687a ldr r2, [r7, #4]
|
|
8005c18: 683b ldr r3, [r7, #0]
|
|
8005c1a: 781b ldrb r3, [r3, #0]
|
|
8005c1c: 009b lsls r3, r3, #2
|
|
8005c1e: 441a add r2, r3
|
|
8005c20: 8ebb ldrh r3, [r7, #52] ; 0x34
|
|
8005c22: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005c26: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005c2a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005c2e: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005c32: b29b uxth r3, r3
|
|
8005c34: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8005c36: 687a ldr r2, [r7, #4]
|
|
8005c38: 683b ldr r3, [r7, #0]
|
|
8005c3a: 781b ldrb r3, [r3, #0]
|
|
8005c3c: 009b lsls r3, r3, #2
|
|
8005c3e: 4413 add r3, r2
|
|
8005c40: 881b ldrh r3, [r3, #0]
|
|
8005c42: b29b uxth r3, r3
|
|
8005c44: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005c48: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8005c4c: 867b strh r3, [r7, #50] ; 0x32
|
|
8005c4e: 687a ldr r2, [r7, #4]
|
|
8005c50: 683b ldr r3, [r7, #0]
|
|
8005c52: 781b ldrb r3, [r3, #0]
|
|
8005c54: 009b lsls r3, r3, #2
|
|
8005c56: 441a add r2, r3
|
|
8005c58: 8e7b ldrh r3, [r7, #50] ; 0x32
|
|
8005c5a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005c5e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005c62: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005c66: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005c6a: b29b uxth r3, r3
|
|
8005c6c: 8013 strh r3, [r2, #0]
|
|
8005c6e: e0ba b.n 8005de6 <USB_ActivateEndpoint+0x6c6>
|
|
}
|
|
else
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT */
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8005c70: 687a ldr r2, [r7, #4]
|
|
8005c72: 683b ldr r3, [r7, #0]
|
|
8005c74: 781b ldrb r3, [r3, #0]
|
|
8005c76: 009b lsls r3, r3, #2
|
|
8005c78: 4413 add r3, r2
|
|
8005c7a: 881b ldrh r3, [r3, #0]
|
|
8005c7c: f8a7 304a strh.w r3, [r7, #74] ; 0x4a
|
|
8005c80: f8b7 304a ldrh.w r3, [r7, #74] ; 0x4a
|
|
8005c84: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005c88: 2b00 cmp r3, #0
|
|
8005c8a: d01d beq.n 8005cc8 <USB_ActivateEndpoint+0x5a8>
|
|
8005c8c: 687a ldr r2, [r7, #4]
|
|
8005c8e: 683b ldr r3, [r7, #0]
|
|
8005c90: 781b ldrb r3, [r3, #0]
|
|
8005c92: 009b lsls r3, r3, #2
|
|
8005c94: 4413 add r3, r2
|
|
8005c96: 881b ldrh r3, [r3, #0]
|
|
8005c98: b29b uxth r3, r3
|
|
8005c9a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005c9e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005ca2: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
|
|
8005ca6: 687a ldr r2, [r7, #4]
|
|
8005ca8: 683b ldr r3, [r7, #0]
|
|
8005caa: 781b ldrb r3, [r3, #0]
|
|
8005cac: 009b lsls r3, r3, #2
|
|
8005cae: 441a add r2, r3
|
|
8005cb0: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
|
|
8005cb4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005cb8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005cbc: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8005cc0: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005cc4: b29b uxth r3, r3
|
|
8005cc6: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8005cc8: 687a ldr r2, [r7, #4]
|
|
8005cca: 683b ldr r3, [r7, #0]
|
|
8005ccc: 781b ldrb r3, [r3, #0]
|
|
8005cce: 009b lsls r3, r3, #2
|
|
8005cd0: 4413 add r3, r2
|
|
8005cd2: 881b ldrh r3, [r3, #0]
|
|
8005cd4: f8a7 3046 strh.w r3, [r7, #70] ; 0x46
|
|
8005cd8: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46
|
|
8005cdc: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005ce0: 2b00 cmp r3, #0
|
|
8005ce2: d01d beq.n 8005d20 <USB_ActivateEndpoint+0x600>
|
|
8005ce4: 687a ldr r2, [r7, #4]
|
|
8005ce6: 683b ldr r3, [r7, #0]
|
|
8005ce8: 781b ldrb r3, [r3, #0]
|
|
8005cea: 009b lsls r3, r3, #2
|
|
8005cec: 4413 add r3, r2
|
|
8005cee: 881b ldrh r3, [r3, #0]
|
|
8005cf0: b29b uxth r3, r3
|
|
8005cf2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005cf6: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005cfa: f8a7 3044 strh.w r3, [r7, #68] ; 0x44
|
|
8005cfe: 687a ldr r2, [r7, #4]
|
|
8005d00: 683b ldr r3, [r7, #0]
|
|
8005d02: 781b ldrb r3, [r3, #0]
|
|
8005d04: 009b lsls r3, r3, #2
|
|
8005d06: 441a add r2, r3
|
|
8005d08: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
|
|
8005d0c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005d10: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005d14: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005d18: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8005d1c: b29b uxth r3, r3
|
|
8005d1e: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
8005d20: 683b ldr r3, [r7, #0]
|
|
8005d22: 78db ldrb r3, [r3, #3]
|
|
8005d24: 2b01 cmp r3, #1
|
|
8005d26: d024 beq.n 8005d72 <USB_ActivateEndpoint+0x652>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
8005d28: 687a ldr r2, [r7, #4]
|
|
8005d2a: 683b ldr r3, [r7, #0]
|
|
8005d2c: 781b ldrb r3, [r3, #0]
|
|
8005d2e: 009b lsls r3, r3, #2
|
|
8005d30: 4413 add r3, r2
|
|
8005d32: 881b ldrh r3, [r3, #0]
|
|
8005d34: b29b uxth r3, r3
|
|
8005d36: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005d3a: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8005d3e: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
|
|
8005d42: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
|
|
8005d46: f083 0320 eor.w r3, r3, #32
|
|
8005d4a: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
|
|
8005d4e: 687a ldr r2, [r7, #4]
|
|
8005d50: 683b ldr r3, [r7, #0]
|
|
8005d52: 781b ldrb r3, [r3, #0]
|
|
8005d54: 009b lsls r3, r3, #2
|
|
8005d56: 441a add r2, r3
|
|
8005d58: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
|
|
8005d5c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005d60: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005d64: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005d68: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005d6c: b29b uxth r3, r3
|
|
8005d6e: 8013 strh r3, [r2, #0]
|
|
8005d70: e01d b.n 8005dae <USB_ActivateEndpoint+0x68e>
|
|
}
|
|
else
|
|
{
|
|
/* Configure TX Endpoint to disabled state */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8005d72: 687a ldr r2, [r7, #4]
|
|
8005d74: 683b ldr r3, [r7, #0]
|
|
8005d76: 781b ldrb r3, [r3, #0]
|
|
8005d78: 009b lsls r3, r3, #2
|
|
8005d7a: 4413 add r3, r2
|
|
8005d7c: 881b ldrh r3, [r3, #0]
|
|
8005d7e: b29b uxth r3, r3
|
|
8005d80: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005d84: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8005d88: f8a7 3042 strh.w r3, [r7, #66] ; 0x42
|
|
8005d8c: 687a ldr r2, [r7, #4]
|
|
8005d8e: 683b ldr r3, [r7, #0]
|
|
8005d90: 781b ldrb r3, [r3, #0]
|
|
8005d92: 009b lsls r3, r3, #2
|
|
8005d94: 441a add r2, r3
|
|
8005d96: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42
|
|
8005d9a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005d9e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005da2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005da6: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005daa: b29b uxth r3, r3
|
|
8005dac: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8005dae: 687a ldr r2, [r7, #4]
|
|
8005db0: 683b ldr r3, [r7, #0]
|
|
8005db2: 781b ldrb r3, [r3, #0]
|
|
8005db4: 009b lsls r3, r3, #2
|
|
8005db6: 4413 add r3, r2
|
|
8005db8: 881b ldrh r3, [r3, #0]
|
|
8005dba: b29b uxth r3, r3
|
|
8005dbc: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8005dc0: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005dc4: 87fb strh r3, [r7, #62] ; 0x3e
|
|
8005dc6: 687a ldr r2, [r7, #4]
|
|
8005dc8: 683b ldr r3, [r7, #0]
|
|
8005dca: 781b ldrb r3, [r3, #0]
|
|
8005dcc: 009b lsls r3, r3, #2
|
|
8005dce: 441a add r2, r3
|
|
8005dd0: 8ffb ldrh r3, [r7, #62] ; 0x3e
|
|
8005dd2: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005dd6: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005dda: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005dde: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005de2: b29b uxth r3, r3
|
|
8005de4: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
8005de6: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
|
|
}
|
|
8005dea: 4618 mov r0, r3
|
|
8005dec: 376c adds r7, #108 ; 0x6c
|
|
8005dee: 46bd mov sp, r7
|
|
8005df0: bc80 pop {r7}
|
|
8005df2: 4770 bx lr
|
|
|
|
08005df4 <USB_DeactivateEndpoint>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8005df4: b480 push {r7}
|
|
8005df6: b08d sub sp, #52 ; 0x34
|
|
8005df8: af00 add r7, sp, #0
|
|
8005dfa: 6078 str r0, [r7, #4]
|
|
8005dfc: 6039 str r1, [r7, #0]
|
|
if (ep->doublebuffer == 0U)
|
|
8005dfe: 683b ldr r3, [r7, #0]
|
|
8005e00: 7b1b ldrb r3, [r3, #12]
|
|
8005e02: 2b00 cmp r3, #0
|
|
8005e04: f040 808e bne.w 8005f24 <USB_DeactivateEndpoint+0x130>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
8005e08: 683b ldr r3, [r7, #0]
|
|
8005e0a: 785b ldrb r3, [r3, #1]
|
|
8005e0c: 2b00 cmp r3, #0
|
|
8005e0e: d044 beq.n 8005e9a <USB_DeactivateEndpoint+0xa6>
|
|
{
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8005e10: 687a ldr r2, [r7, #4]
|
|
8005e12: 683b ldr r3, [r7, #0]
|
|
8005e14: 781b ldrb r3, [r3, #0]
|
|
8005e16: 009b lsls r3, r3, #2
|
|
8005e18: 4413 add r3, r2
|
|
8005e1a: 881b ldrh r3, [r3, #0]
|
|
8005e1c: 81bb strh r3, [r7, #12]
|
|
8005e1e: 89bb ldrh r3, [r7, #12]
|
|
8005e20: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005e24: 2b00 cmp r3, #0
|
|
8005e26: d01b beq.n 8005e60 <USB_DeactivateEndpoint+0x6c>
|
|
8005e28: 687a ldr r2, [r7, #4]
|
|
8005e2a: 683b ldr r3, [r7, #0]
|
|
8005e2c: 781b ldrb r3, [r3, #0]
|
|
8005e2e: 009b lsls r3, r3, #2
|
|
8005e30: 4413 add r3, r2
|
|
8005e32: 881b ldrh r3, [r3, #0]
|
|
8005e34: b29b uxth r3, r3
|
|
8005e36: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005e3a: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005e3e: 817b strh r3, [r7, #10]
|
|
8005e40: 687a ldr r2, [r7, #4]
|
|
8005e42: 683b ldr r3, [r7, #0]
|
|
8005e44: 781b ldrb r3, [r3, #0]
|
|
8005e46: 009b lsls r3, r3, #2
|
|
8005e48: 441a add r2, r3
|
|
8005e4a: 897b ldrh r3, [r7, #10]
|
|
8005e4c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005e50: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005e54: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005e58: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8005e5c: b29b uxth r3, r3
|
|
8005e5e: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure DISABLE status for the Endpoint*/
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8005e60: 687a ldr r2, [r7, #4]
|
|
8005e62: 683b ldr r3, [r7, #0]
|
|
8005e64: 781b ldrb r3, [r3, #0]
|
|
8005e66: 009b lsls r3, r3, #2
|
|
8005e68: 4413 add r3, r2
|
|
8005e6a: 881b ldrh r3, [r3, #0]
|
|
8005e6c: b29b uxth r3, r3
|
|
8005e6e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005e72: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8005e76: 813b strh r3, [r7, #8]
|
|
8005e78: 687a ldr r2, [r7, #4]
|
|
8005e7a: 683b ldr r3, [r7, #0]
|
|
8005e7c: 781b ldrb r3, [r3, #0]
|
|
8005e7e: 009b lsls r3, r3, #2
|
|
8005e80: 441a add r2, r3
|
|
8005e82: 893b ldrh r3, [r7, #8]
|
|
8005e84: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005e88: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005e8c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005e90: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005e94: b29b uxth r3, r3
|
|
8005e96: 8013 strh r3, [r2, #0]
|
|
8005e98: e192 b.n 80061c0 <USB_DeactivateEndpoint+0x3cc>
|
|
}
|
|
else
|
|
{
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8005e9a: 687a ldr r2, [r7, #4]
|
|
8005e9c: 683b ldr r3, [r7, #0]
|
|
8005e9e: 781b ldrb r3, [r3, #0]
|
|
8005ea0: 009b lsls r3, r3, #2
|
|
8005ea2: 4413 add r3, r2
|
|
8005ea4: 881b ldrh r3, [r3, #0]
|
|
8005ea6: 827b strh r3, [r7, #18]
|
|
8005ea8: 8a7b ldrh r3, [r7, #18]
|
|
8005eaa: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005eae: 2b00 cmp r3, #0
|
|
8005eb0: d01b beq.n 8005eea <USB_DeactivateEndpoint+0xf6>
|
|
8005eb2: 687a ldr r2, [r7, #4]
|
|
8005eb4: 683b ldr r3, [r7, #0]
|
|
8005eb6: 781b ldrb r3, [r3, #0]
|
|
8005eb8: 009b lsls r3, r3, #2
|
|
8005eba: 4413 add r3, r2
|
|
8005ebc: 881b ldrh r3, [r3, #0]
|
|
8005ebe: b29b uxth r3, r3
|
|
8005ec0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005ec4: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005ec8: 823b strh r3, [r7, #16]
|
|
8005eca: 687a ldr r2, [r7, #4]
|
|
8005ecc: 683b ldr r3, [r7, #0]
|
|
8005ece: 781b ldrb r3, [r3, #0]
|
|
8005ed0: 009b lsls r3, r3, #2
|
|
8005ed2: 441a add r2, r3
|
|
8005ed4: 8a3b ldrh r3, [r7, #16]
|
|
8005ed6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005eda: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005ede: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8005ee2: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005ee6: b29b uxth r3, r3
|
|
8005ee8: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure DISABLE status for the Endpoint*/
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8005eea: 687a ldr r2, [r7, #4]
|
|
8005eec: 683b ldr r3, [r7, #0]
|
|
8005eee: 781b ldrb r3, [r3, #0]
|
|
8005ef0: 009b lsls r3, r3, #2
|
|
8005ef2: 4413 add r3, r2
|
|
8005ef4: 881b ldrh r3, [r3, #0]
|
|
8005ef6: b29b uxth r3, r3
|
|
8005ef8: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8005efc: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005f00: 81fb strh r3, [r7, #14]
|
|
8005f02: 687a ldr r2, [r7, #4]
|
|
8005f04: 683b ldr r3, [r7, #0]
|
|
8005f06: 781b ldrb r3, [r3, #0]
|
|
8005f08: 009b lsls r3, r3, #2
|
|
8005f0a: 441a add r2, r3
|
|
8005f0c: 89fb ldrh r3, [r7, #14]
|
|
8005f0e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005f12: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005f16: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005f1a: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005f1e: b29b uxth r3, r3
|
|
8005f20: 8013 strh r3, [r2, #0]
|
|
8005f22: e14d b.n 80061c0 <USB_DeactivateEndpoint+0x3cc>
|
|
}
|
|
}
|
|
/*Double Buffer*/
|
|
else
|
|
{
|
|
if (ep->is_in == 0U)
|
|
8005f24: 683b ldr r3, [r7, #0]
|
|
8005f26: 785b ldrb r3, [r3, #1]
|
|
8005f28: 2b00 cmp r3, #0
|
|
8005f2a: f040 80a5 bne.w 8006078 <USB_DeactivateEndpoint+0x284>
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8005f2e: 687a ldr r2, [r7, #4]
|
|
8005f30: 683b ldr r3, [r7, #0]
|
|
8005f32: 781b ldrb r3, [r3, #0]
|
|
8005f34: 009b lsls r3, r3, #2
|
|
8005f36: 4413 add r3, r2
|
|
8005f38: 881b ldrh r3, [r3, #0]
|
|
8005f3a: 843b strh r3, [r7, #32]
|
|
8005f3c: 8c3b ldrh r3, [r7, #32]
|
|
8005f3e: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005f42: 2b00 cmp r3, #0
|
|
8005f44: d01b beq.n 8005f7e <USB_DeactivateEndpoint+0x18a>
|
|
8005f46: 687a ldr r2, [r7, #4]
|
|
8005f48: 683b ldr r3, [r7, #0]
|
|
8005f4a: 781b ldrb r3, [r3, #0]
|
|
8005f4c: 009b lsls r3, r3, #2
|
|
8005f4e: 4413 add r3, r2
|
|
8005f50: 881b ldrh r3, [r3, #0]
|
|
8005f52: b29b uxth r3, r3
|
|
8005f54: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005f58: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005f5c: 83fb strh r3, [r7, #30]
|
|
8005f5e: 687a ldr r2, [r7, #4]
|
|
8005f60: 683b ldr r3, [r7, #0]
|
|
8005f62: 781b ldrb r3, [r3, #0]
|
|
8005f64: 009b lsls r3, r3, #2
|
|
8005f66: 441a add r2, r3
|
|
8005f68: 8bfb ldrh r3, [r7, #30]
|
|
8005f6a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005f6e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005f72: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8005f76: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8005f7a: b29b uxth r3, r3
|
|
8005f7c: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8005f7e: 687a ldr r2, [r7, #4]
|
|
8005f80: 683b ldr r3, [r7, #0]
|
|
8005f82: 781b ldrb r3, [r3, #0]
|
|
8005f84: 009b lsls r3, r3, #2
|
|
8005f86: 4413 add r3, r2
|
|
8005f88: 881b ldrh r3, [r3, #0]
|
|
8005f8a: 83bb strh r3, [r7, #28]
|
|
8005f8c: 8bbb ldrh r3, [r7, #28]
|
|
8005f8e: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005f92: 2b00 cmp r3, #0
|
|
8005f94: d01b beq.n 8005fce <USB_DeactivateEndpoint+0x1da>
|
|
8005f96: 687a ldr r2, [r7, #4]
|
|
8005f98: 683b ldr r3, [r7, #0]
|
|
8005f9a: 781b ldrb r3, [r3, #0]
|
|
8005f9c: 009b lsls r3, r3, #2
|
|
8005f9e: 4413 add r3, r2
|
|
8005fa0: 881b ldrh r3, [r3, #0]
|
|
8005fa2: b29b uxth r3, r3
|
|
8005fa4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005fa8: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005fac: 837b strh r3, [r7, #26]
|
|
8005fae: 687a ldr r2, [r7, #4]
|
|
8005fb0: 683b ldr r3, [r7, #0]
|
|
8005fb2: 781b ldrb r3, [r3, #0]
|
|
8005fb4: 009b lsls r3, r3, #2
|
|
8005fb6: 441a add r2, r3
|
|
8005fb8: 8b7b ldrh r3, [r7, #26]
|
|
8005fba: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005fbe: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005fc2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005fc6: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8005fca: b29b uxth r3, r3
|
|
8005fcc: 8013 strh r3, [r2, #0]
|
|
|
|
/* Reset value of the data toggle bits for the endpoint out*/
|
|
PCD_TX_DTOG(USBx, ep->num);
|
|
8005fce: 687a ldr r2, [r7, #4]
|
|
8005fd0: 683b ldr r3, [r7, #0]
|
|
8005fd2: 781b ldrb r3, [r3, #0]
|
|
8005fd4: 009b lsls r3, r3, #2
|
|
8005fd6: 4413 add r3, r2
|
|
8005fd8: 881b ldrh r3, [r3, #0]
|
|
8005fda: b29b uxth r3, r3
|
|
8005fdc: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005fe0: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005fe4: 833b strh r3, [r7, #24]
|
|
8005fe6: 687a ldr r2, [r7, #4]
|
|
8005fe8: 683b ldr r3, [r7, #0]
|
|
8005fea: 781b ldrb r3, [r3, #0]
|
|
8005fec: 009b lsls r3, r3, #2
|
|
8005fee: 441a add r2, r3
|
|
8005ff0: 8b3b ldrh r3, [r7, #24]
|
|
8005ff2: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8005ff6: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8005ffa: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8005ffe: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8006002: b29b uxth r3, r3
|
|
8006004: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8006006: 687a ldr r2, [r7, #4]
|
|
8006008: 683b ldr r3, [r7, #0]
|
|
800600a: 781b ldrb r3, [r3, #0]
|
|
800600c: 009b lsls r3, r3, #2
|
|
800600e: 4413 add r3, r2
|
|
8006010: 881b ldrh r3, [r3, #0]
|
|
8006012: b29b uxth r3, r3
|
|
8006014: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8006018: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800601c: 82fb strh r3, [r7, #22]
|
|
800601e: 687a ldr r2, [r7, #4]
|
|
8006020: 683b ldr r3, [r7, #0]
|
|
8006022: 781b ldrb r3, [r3, #0]
|
|
8006024: 009b lsls r3, r3, #2
|
|
8006026: 441a add r2, r3
|
|
8006028: 8afb ldrh r3, [r7, #22]
|
|
800602a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800602e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8006032: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8006036: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800603a: b29b uxth r3, r3
|
|
800603c: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
800603e: 687a ldr r2, [r7, #4]
|
|
8006040: 683b ldr r3, [r7, #0]
|
|
8006042: 781b ldrb r3, [r3, #0]
|
|
8006044: 009b lsls r3, r3, #2
|
|
8006046: 4413 add r3, r2
|
|
8006048: 881b ldrh r3, [r3, #0]
|
|
800604a: b29b uxth r3, r3
|
|
800604c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8006050: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8006054: 82bb strh r3, [r7, #20]
|
|
8006056: 687a ldr r2, [r7, #4]
|
|
8006058: 683b ldr r3, [r7, #0]
|
|
800605a: 781b ldrb r3, [r3, #0]
|
|
800605c: 009b lsls r3, r3, #2
|
|
800605e: 441a add r2, r3
|
|
8006060: 8abb ldrh r3, [r7, #20]
|
|
8006062: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8006066: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
800606a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
800606e: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8006072: b29b uxth r3, r3
|
|
8006074: 8013 strh r3, [r2, #0]
|
|
8006076: e0a3 b.n 80061c0 <USB_DeactivateEndpoint+0x3cc>
|
|
}
|
|
else
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8006078: 687a ldr r2, [r7, #4]
|
|
800607a: 683b ldr r3, [r7, #0]
|
|
800607c: 781b ldrb r3, [r3, #0]
|
|
800607e: 009b lsls r3, r3, #2
|
|
8006080: 4413 add r3, r2
|
|
8006082: 881b ldrh r3, [r3, #0]
|
|
8006084: 85fb strh r3, [r7, #46] ; 0x2e
|
|
8006086: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
|
8006088: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
800608c: 2b00 cmp r3, #0
|
|
800608e: d01b beq.n 80060c8 <USB_DeactivateEndpoint+0x2d4>
|
|
8006090: 687a ldr r2, [r7, #4]
|
|
8006092: 683b ldr r3, [r7, #0]
|
|
8006094: 781b ldrb r3, [r3, #0]
|
|
8006096: 009b lsls r3, r3, #2
|
|
8006098: 4413 add r3, r2
|
|
800609a: 881b ldrh r3, [r3, #0]
|
|
800609c: b29b uxth r3, r3
|
|
800609e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80060a2: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80060a6: 85bb strh r3, [r7, #44] ; 0x2c
|
|
80060a8: 687a ldr r2, [r7, #4]
|
|
80060aa: 683b ldr r3, [r7, #0]
|
|
80060ac: 781b ldrb r3, [r3, #0]
|
|
80060ae: 009b lsls r3, r3, #2
|
|
80060b0: 441a add r2, r3
|
|
80060b2: 8dbb ldrh r3, [r7, #44] ; 0x2c
|
|
80060b4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80060b8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80060bc: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
80060c0: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80060c4: b29b uxth r3, r3
|
|
80060c6: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
80060c8: 687a ldr r2, [r7, #4]
|
|
80060ca: 683b ldr r3, [r7, #0]
|
|
80060cc: 781b ldrb r3, [r3, #0]
|
|
80060ce: 009b lsls r3, r3, #2
|
|
80060d0: 4413 add r3, r2
|
|
80060d2: 881b ldrh r3, [r3, #0]
|
|
80060d4: 857b strh r3, [r7, #42] ; 0x2a
|
|
80060d6: 8d7b ldrh r3, [r7, #42] ; 0x2a
|
|
80060d8: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80060dc: 2b00 cmp r3, #0
|
|
80060de: d01b beq.n 8006118 <USB_DeactivateEndpoint+0x324>
|
|
80060e0: 687a ldr r2, [r7, #4]
|
|
80060e2: 683b ldr r3, [r7, #0]
|
|
80060e4: 781b ldrb r3, [r3, #0]
|
|
80060e6: 009b lsls r3, r3, #2
|
|
80060e8: 4413 add r3, r2
|
|
80060ea: 881b ldrh r3, [r3, #0]
|
|
80060ec: b29b uxth r3, r3
|
|
80060ee: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80060f2: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80060f6: 853b strh r3, [r7, #40] ; 0x28
|
|
80060f8: 687a ldr r2, [r7, #4]
|
|
80060fa: 683b ldr r3, [r7, #0]
|
|
80060fc: 781b ldrb r3, [r3, #0]
|
|
80060fe: 009b lsls r3, r3, #2
|
|
8006100: 441a add r2, r3
|
|
8006102: 8d3b ldrh r3, [r7, #40] ; 0x28
|
|
8006104: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8006108: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
800610c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8006110: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8006114: b29b uxth r3, r3
|
|
8006116: 8013 strh r3, [r2, #0]
|
|
PCD_RX_DTOG(USBx, ep->num);
|
|
8006118: 687a ldr r2, [r7, #4]
|
|
800611a: 683b ldr r3, [r7, #0]
|
|
800611c: 781b ldrb r3, [r3, #0]
|
|
800611e: 009b lsls r3, r3, #2
|
|
8006120: 4413 add r3, r2
|
|
8006122: 881b ldrh r3, [r3, #0]
|
|
8006124: b29b uxth r3, r3
|
|
8006126: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800612a: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800612e: 84fb strh r3, [r7, #38] ; 0x26
|
|
8006130: 687a ldr r2, [r7, #4]
|
|
8006132: 683b ldr r3, [r7, #0]
|
|
8006134: 781b ldrb r3, [r3, #0]
|
|
8006136: 009b lsls r3, r3, #2
|
|
8006138: 441a add r2, r3
|
|
800613a: 8cfb ldrh r3, [r7, #38] ; 0x26
|
|
800613c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8006140: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8006144: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8006148: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800614c: b29b uxth r3, r3
|
|
800614e: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure DISABLE status for the Endpoint*/
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8006150: 687a ldr r2, [r7, #4]
|
|
8006152: 683b ldr r3, [r7, #0]
|
|
8006154: 781b ldrb r3, [r3, #0]
|
|
8006156: 009b lsls r3, r3, #2
|
|
8006158: 4413 add r3, r2
|
|
800615a: 881b ldrh r3, [r3, #0]
|
|
800615c: b29b uxth r3, r3
|
|
800615e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8006162: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8006166: 84bb strh r3, [r7, #36] ; 0x24
|
|
8006168: 687a ldr r2, [r7, #4]
|
|
800616a: 683b ldr r3, [r7, #0]
|
|
800616c: 781b ldrb r3, [r3, #0]
|
|
800616e: 009b lsls r3, r3, #2
|
|
8006170: 441a add r2, r3
|
|
8006172: 8cbb ldrh r3, [r7, #36] ; 0x24
|
|
8006174: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8006178: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
800617c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8006180: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8006184: b29b uxth r3, r3
|
|
8006186: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8006188: 687a ldr r2, [r7, #4]
|
|
800618a: 683b ldr r3, [r7, #0]
|
|
800618c: 781b ldrb r3, [r3, #0]
|
|
800618e: 009b lsls r3, r3, #2
|
|
8006190: 4413 add r3, r2
|
|
8006192: 881b ldrh r3, [r3, #0]
|
|
8006194: b29b uxth r3, r3
|
|
8006196: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
800619a: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800619e: 847b strh r3, [r7, #34] ; 0x22
|
|
80061a0: 687a ldr r2, [r7, #4]
|
|
80061a2: 683b ldr r3, [r7, #0]
|
|
80061a4: 781b ldrb r3, [r3, #0]
|
|
80061a6: 009b lsls r3, r3, #2
|
|
80061a8: 441a add r2, r3
|
|
80061aa: 8c7b ldrh r3, [r7, #34] ; 0x22
|
|
80061ac: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80061b0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80061b4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80061b8: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80061bc: b29b uxth r3, r3
|
|
80061be: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
80061c0: 2300 movs r3, #0
|
|
}
|
|
80061c2: 4618 mov r0, r3
|
|
80061c4: 3734 adds r7, #52 ; 0x34
|
|
80061c6: 46bd mov sp, r7
|
|
80061c8: bc80 pop {r7}
|
|
80061ca: 4770 bx lr
|
|
|
|
080061cc <USB_EPStartXfer>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
80061cc: b580 push {r7, lr}
|
|
80061ce: b0c4 sub sp, #272 ; 0x110
|
|
80061d0: af00 add r7, sp, #0
|
|
80061d2: 1d3b adds r3, r7, #4
|
|
80061d4: 6018 str r0, [r3, #0]
|
|
80061d6: 463b mov r3, r7
|
|
80061d8: 6019 str r1, [r3, #0]
|
|
uint32_t len;
|
|
uint16_t pmabuffer;
|
|
uint16_t wEPVal;
|
|
|
|
/* IN endpoint */
|
|
if (ep->is_in == 1U)
|
|
80061da: 463b mov r3, r7
|
|
80061dc: 681b ldr r3, [r3, #0]
|
|
80061de: 785b ldrb r3, [r3, #1]
|
|
80061e0: 2b01 cmp r3, #1
|
|
80061e2: f040 8557 bne.w 8006c94 <USB_EPStartXfer+0xac8>
|
|
{
|
|
/*Multi packet transfer*/
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
80061e6: 463b mov r3, r7
|
|
80061e8: 681b ldr r3, [r3, #0]
|
|
80061ea: 699a ldr r2, [r3, #24]
|
|
80061ec: 463b mov r3, r7
|
|
80061ee: 681b ldr r3, [r3, #0]
|
|
80061f0: 691b ldr r3, [r3, #16]
|
|
80061f2: 429a cmp r2, r3
|
|
80061f4: d905 bls.n 8006202 <USB_EPStartXfer+0x36>
|
|
{
|
|
len = ep->maxpacket;
|
|
80061f6: 463b mov r3, r7
|
|
80061f8: 681b ldr r3, [r3, #0]
|
|
80061fa: 691b ldr r3, [r3, #16]
|
|
80061fc: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
8006200: e004 b.n 800620c <USB_EPStartXfer+0x40>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
8006202: 463b mov r3, r7
|
|
8006204: 681b ldr r3, [r3, #0]
|
|
8006206: 699b ldr r3, [r3, #24]
|
|
8006208: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
}
|
|
|
|
/* configure and validate Tx endpoint */
|
|
if (ep->doublebuffer == 0U)
|
|
800620c: 463b mov r3, r7
|
|
800620e: 681b ldr r3, [r3, #0]
|
|
8006210: 7b1b ldrb r3, [r3, #12]
|
|
8006212: 2b00 cmp r3, #0
|
|
8006214: d12c bne.n 8006270 <USB_EPStartXfer+0xa4>
|
|
{
|
|
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
|
|
8006216: 463b mov r3, r7
|
|
8006218: 681b ldr r3, [r3, #0]
|
|
800621a: 6959 ldr r1, [r3, #20]
|
|
800621c: 463b mov r3, r7
|
|
800621e: 681b ldr r3, [r3, #0]
|
|
8006220: 88da ldrh r2, [r3, #6]
|
|
8006222: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006226: b29b uxth r3, r3
|
|
8006228: 1d38 adds r0, r7, #4
|
|
800622a: 6800 ldr r0, [r0, #0]
|
|
800622c: f001 fa2c bl 8007688 <USB_WritePMA>
|
|
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
|
|
8006230: 1d3b adds r3, r7, #4
|
|
8006232: 681b ldr r3, [r3, #0]
|
|
8006234: 617b str r3, [r7, #20]
|
|
8006236: 1d3b adds r3, r7, #4
|
|
8006238: 681b ldr r3, [r3, #0]
|
|
800623a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800623e: b29b uxth r3, r3
|
|
8006240: 461a mov r2, r3
|
|
8006242: 697b ldr r3, [r7, #20]
|
|
8006244: 4413 add r3, r2
|
|
8006246: 617b str r3, [r7, #20]
|
|
8006248: 463b mov r3, r7
|
|
800624a: 681b ldr r3, [r3, #0]
|
|
800624c: 781b ldrb r3, [r3, #0]
|
|
800624e: 011a lsls r2, r3, #4
|
|
8006250: 697b ldr r3, [r7, #20]
|
|
8006252: 4413 add r3, r2
|
|
8006254: f203 4204 addw r2, r3, #1028 ; 0x404
|
|
8006258: f107 0310 add.w r3, r7, #16
|
|
800625c: 601a str r2, [r3, #0]
|
|
800625e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006262: b29a uxth r2, r3
|
|
8006264: f107 0310 add.w r3, r7, #16
|
|
8006268: 681b ldr r3, [r3, #0]
|
|
800626a: 801a strh r2, [r3, #0]
|
|
800626c: f000 bcdd b.w 8006c2a <USB_EPStartXfer+0xa5e>
|
|
}
|
|
else
|
|
{
|
|
/* double buffer bulk management */
|
|
if (ep->type == EP_TYPE_BULK)
|
|
8006270: 463b mov r3, r7
|
|
8006272: 681b ldr r3, [r3, #0]
|
|
8006274: 78db ldrb r3, [r3, #3]
|
|
8006276: 2b02 cmp r3, #2
|
|
8006278: f040 8347 bne.w 800690a <USB_EPStartXfer+0x73e>
|
|
{
|
|
if (ep->xfer_len_db > ep->maxpacket)
|
|
800627c: 463b mov r3, r7
|
|
800627e: 681b ldr r3, [r3, #0]
|
|
8006280: 6a1a ldr r2, [r3, #32]
|
|
8006282: 463b mov r3, r7
|
|
8006284: 681b ldr r3, [r3, #0]
|
|
8006286: 691b ldr r3, [r3, #16]
|
|
8006288: 429a cmp r2, r3
|
|
800628a: f240 82eb bls.w 8006864 <USB_EPStartXfer+0x698>
|
|
{
|
|
/* enable double buffer */
|
|
PCD_SET_EP_DBUF(USBx, ep->num);
|
|
800628e: 1d3b adds r3, r7, #4
|
|
8006290: 681a ldr r2, [r3, #0]
|
|
8006292: 463b mov r3, r7
|
|
8006294: 681b ldr r3, [r3, #0]
|
|
8006296: 781b ldrb r3, [r3, #0]
|
|
8006298: 009b lsls r3, r3, #2
|
|
800629a: 4413 add r3, r2
|
|
800629c: 881b ldrh r3, [r3, #0]
|
|
800629e: b29b uxth r3, r3
|
|
80062a0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80062a4: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80062a8: f8a7 305a strh.w r3, [r7, #90] ; 0x5a
|
|
80062ac: 1d3b adds r3, r7, #4
|
|
80062ae: 681a ldr r2, [r3, #0]
|
|
80062b0: 463b mov r3, r7
|
|
80062b2: 681b ldr r3, [r3, #0]
|
|
80062b4: 781b ldrb r3, [r3, #0]
|
|
80062b6: 009b lsls r3, r3, #2
|
|
80062b8: 441a add r2, r3
|
|
80062ba: f8b7 305a ldrh.w r3, [r7, #90] ; 0x5a
|
|
80062be: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80062c2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80062c6: f443 4301 orr.w r3, r3, #33024 ; 0x8100
|
|
80062ca: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80062ce: b29b uxth r3, r3
|
|
80062d0: 8013 strh r3, [r2, #0]
|
|
|
|
/* each Time to write in PMA xfer_len_db will */
|
|
ep->xfer_len_db -= len;
|
|
80062d2: 463b mov r3, r7
|
|
80062d4: 681b ldr r3, [r3, #0]
|
|
80062d6: 6a1a ldr r2, [r3, #32]
|
|
80062d8: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80062dc: 1ad2 subs r2, r2, r3
|
|
80062de: 463b mov r3, r7
|
|
80062e0: 681b ldr r3, [r3, #0]
|
|
80062e2: 621a str r2, [r3, #32]
|
|
|
|
/* Fill the two first buffer in the Buffer0 & Buffer1 */
|
|
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
|
|
80062e4: 1d3b adds r3, r7, #4
|
|
80062e6: 681a ldr r2, [r3, #0]
|
|
80062e8: 463b mov r3, r7
|
|
80062ea: 681b ldr r3, [r3, #0]
|
|
80062ec: 781b ldrb r3, [r3, #0]
|
|
80062ee: 009b lsls r3, r3, #2
|
|
80062f0: 4413 add r3, r2
|
|
80062f2: 881b ldrh r3, [r3, #0]
|
|
80062f4: b29b uxth r3, r3
|
|
80062f6: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80062fa: 2b00 cmp r3, #0
|
|
80062fc: f000 8159 beq.w 80065b2 <USB_EPStartXfer+0x3e6>
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
|
8006300: 1d3b adds r3, r7, #4
|
|
8006302: 681b ldr r3, [r3, #0]
|
|
8006304: 637b str r3, [r7, #52] ; 0x34
|
|
8006306: 463b mov r3, r7
|
|
8006308: 681b ldr r3, [r3, #0]
|
|
800630a: 785b ldrb r3, [r3, #1]
|
|
800630c: 2b00 cmp r3, #0
|
|
800630e: d164 bne.n 80063da <USB_EPStartXfer+0x20e>
|
|
8006310: 1d3b adds r3, r7, #4
|
|
8006312: 681b ldr r3, [r3, #0]
|
|
8006314: 62fb str r3, [r7, #44] ; 0x2c
|
|
8006316: 1d3b adds r3, r7, #4
|
|
8006318: 681b ldr r3, [r3, #0]
|
|
800631a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800631e: b29b uxth r3, r3
|
|
8006320: 461a mov r2, r3
|
|
8006322: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8006324: 4413 add r3, r2
|
|
8006326: 62fb str r3, [r7, #44] ; 0x2c
|
|
8006328: 463b mov r3, r7
|
|
800632a: 681b ldr r3, [r3, #0]
|
|
800632c: 781b ldrb r3, [r3, #0]
|
|
800632e: 011a lsls r2, r3, #4
|
|
8006330: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8006332: 4413 add r3, r2
|
|
8006334: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8006338: 62bb str r3, [r7, #40] ; 0x28
|
|
800633a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800633e: 2b00 cmp r3, #0
|
|
8006340: d112 bne.n 8006368 <USB_EPStartXfer+0x19c>
|
|
8006342: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8006344: 881b ldrh r3, [r3, #0]
|
|
8006346: b29b uxth r3, r3
|
|
8006348: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
800634c: b29a uxth r2, r3
|
|
800634e: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8006350: 801a strh r2, [r3, #0]
|
|
8006352: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8006354: 881b ldrh r3, [r3, #0]
|
|
8006356: b29b uxth r3, r3
|
|
8006358: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800635c: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006360: b29a uxth r2, r3
|
|
8006362: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8006364: 801a strh r2, [r3, #0]
|
|
8006366: e054 b.n 8006412 <USB_EPStartXfer+0x246>
|
|
8006368: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800636c: 2b3e cmp r3, #62 ; 0x3e
|
|
800636e: d817 bhi.n 80063a0 <USB_EPStartXfer+0x1d4>
|
|
8006370: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006374: 085b lsrs r3, r3, #1
|
|
8006376: f8c7 3104 str.w r3, [r7, #260] ; 0x104
|
|
800637a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800637e: f003 0301 and.w r3, r3, #1
|
|
8006382: 2b00 cmp r3, #0
|
|
8006384: d004 beq.n 8006390 <USB_EPStartXfer+0x1c4>
|
|
8006386: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
|
|
800638a: 3301 adds r3, #1
|
|
800638c: f8c7 3104 str.w r3, [r7, #260] ; 0x104
|
|
8006390: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
|
|
8006394: b29b uxth r3, r3
|
|
8006396: 029b lsls r3, r3, #10
|
|
8006398: b29a uxth r2, r3
|
|
800639a: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800639c: 801a strh r2, [r3, #0]
|
|
800639e: e038 b.n 8006412 <USB_EPStartXfer+0x246>
|
|
80063a0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80063a4: 095b lsrs r3, r3, #5
|
|
80063a6: f8c7 3104 str.w r3, [r7, #260] ; 0x104
|
|
80063aa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80063ae: f003 031f and.w r3, r3, #31
|
|
80063b2: 2b00 cmp r3, #0
|
|
80063b4: d104 bne.n 80063c0 <USB_EPStartXfer+0x1f4>
|
|
80063b6: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
|
|
80063ba: 3b01 subs r3, #1
|
|
80063bc: f8c7 3104 str.w r3, [r7, #260] ; 0x104
|
|
80063c0: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
|
|
80063c4: b29b uxth r3, r3
|
|
80063c6: 029b lsls r3, r3, #10
|
|
80063c8: b29b uxth r3, r3
|
|
80063ca: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80063ce: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80063d2: b29a uxth r2, r3
|
|
80063d4: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80063d6: 801a strh r2, [r3, #0]
|
|
80063d8: e01b b.n 8006412 <USB_EPStartXfer+0x246>
|
|
80063da: 463b mov r3, r7
|
|
80063dc: 681b ldr r3, [r3, #0]
|
|
80063de: 785b ldrb r3, [r3, #1]
|
|
80063e0: 2b01 cmp r3, #1
|
|
80063e2: d116 bne.n 8006412 <USB_EPStartXfer+0x246>
|
|
80063e4: 1d3b adds r3, r7, #4
|
|
80063e6: 681b ldr r3, [r3, #0]
|
|
80063e8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80063ec: b29b uxth r3, r3
|
|
80063ee: 461a mov r2, r3
|
|
80063f0: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
80063f2: 4413 add r3, r2
|
|
80063f4: 637b str r3, [r7, #52] ; 0x34
|
|
80063f6: 463b mov r3, r7
|
|
80063f8: 681b ldr r3, [r3, #0]
|
|
80063fa: 781b ldrb r3, [r3, #0]
|
|
80063fc: 011a lsls r2, r3, #4
|
|
80063fe: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
8006400: 4413 add r3, r2
|
|
8006402: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8006406: 633b str r3, [r7, #48] ; 0x30
|
|
8006408: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800640c: b29a uxth r2, r3
|
|
800640e: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8006410: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr1;
|
|
8006412: 463b mov r3, r7
|
|
8006414: 681b ldr r3, [r3, #0]
|
|
8006416: 895b ldrh r3, [r3, #10]
|
|
8006418: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
800641c: 463b mov r3, r7
|
|
800641e: 681b ldr r3, [r3, #0]
|
|
8006420: 6959 ldr r1, [r3, #20]
|
|
8006422: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006426: b29b uxth r3, r3
|
|
8006428: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
|
|
800642c: 1d38 adds r0, r7, #4
|
|
800642e: 6800 ldr r0, [r0, #0]
|
|
8006430: f001 f92a bl 8007688 <USB_WritePMA>
|
|
ep->xfer_buff += len;
|
|
8006434: 463b mov r3, r7
|
|
8006436: 681b ldr r3, [r3, #0]
|
|
8006438: 695a ldr r2, [r3, #20]
|
|
800643a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800643e: 441a add r2, r3
|
|
8006440: 463b mov r3, r7
|
|
8006442: 681b ldr r3, [r3, #0]
|
|
8006444: 615a str r2, [r3, #20]
|
|
|
|
if (ep->xfer_len_db > ep->maxpacket)
|
|
8006446: 463b mov r3, r7
|
|
8006448: 681b ldr r3, [r3, #0]
|
|
800644a: 6a1a ldr r2, [r3, #32]
|
|
800644c: 463b mov r3, r7
|
|
800644e: 681b ldr r3, [r3, #0]
|
|
8006450: 691b ldr r3, [r3, #16]
|
|
8006452: 429a cmp r2, r3
|
|
8006454: d909 bls.n 800646a <USB_EPStartXfer+0x29e>
|
|
{
|
|
ep->xfer_len_db -= len;
|
|
8006456: 463b mov r3, r7
|
|
8006458: 681b ldr r3, [r3, #0]
|
|
800645a: 6a1a ldr r2, [r3, #32]
|
|
800645c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006460: 1ad2 subs r2, r2, r3
|
|
8006462: 463b mov r3, r7
|
|
8006464: 681b ldr r3, [r3, #0]
|
|
8006466: 621a str r2, [r3, #32]
|
|
8006468: e008 b.n 800647c <USB_EPStartXfer+0x2b0>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
800646a: 463b mov r3, r7
|
|
800646c: 681b ldr r3, [r3, #0]
|
|
800646e: 6a1b ldr r3, [r3, #32]
|
|
8006470: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
ep->xfer_len_db = 0U;
|
|
8006474: 463b mov r3, r7
|
|
8006476: 681b ldr r3, [r3, #0]
|
|
8006478: 2200 movs r2, #0
|
|
800647a: 621a str r2, [r3, #32]
|
|
}
|
|
|
|
/* Set the Double buffer counter for pmabuffer0 */
|
|
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
|
800647c: 463b mov r3, r7
|
|
800647e: 681b ldr r3, [r3, #0]
|
|
8006480: 785b ldrb r3, [r3, #1]
|
|
8006482: 2b00 cmp r3, #0
|
|
8006484: d164 bne.n 8006550 <USB_EPStartXfer+0x384>
|
|
8006486: 1d3b adds r3, r7, #4
|
|
8006488: 681b ldr r3, [r3, #0]
|
|
800648a: 61fb str r3, [r7, #28]
|
|
800648c: 1d3b adds r3, r7, #4
|
|
800648e: 681b ldr r3, [r3, #0]
|
|
8006490: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006494: b29b uxth r3, r3
|
|
8006496: 461a mov r2, r3
|
|
8006498: 69fb ldr r3, [r7, #28]
|
|
800649a: 4413 add r3, r2
|
|
800649c: 61fb str r3, [r7, #28]
|
|
800649e: 463b mov r3, r7
|
|
80064a0: 681b ldr r3, [r3, #0]
|
|
80064a2: 781b ldrb r3, [r3, #0]
|
|
80064a4: 011a lsls r2, r3, #4
|
|
80064a6: 69fb ldr r3, [r7, #28]
|
|
80064a8: 4413 add r3, r2
|
|
80064aa: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
80064ae: 61bb str r3, [r7, #24]
|
|
80064b0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80064b4: 2b00 cmp r3, #0
|
|
80064b6: d112 bne.n 80064de <USB_EPStartXfer+0x312>
|
|
80064b8: 69bb ldr r3, [r7, #24]
|
|
80064ba: 881b ldrh r3, [r3, #0]
|
|
80064bc: b29b uxth r3, r3
|
|
80064be: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
80064c2: b29a uxth r2, r3
|
|
80064c4: 69bb ldr r3, [r7, #24]
|
|
80064c6: 801a strh r2, [r3, #0]
|
|
80064c8: 69bb ldr r3, [r7, #24]
|
|
80064ca: 881b ldrh r3, [r3, #0]
|
|
80064cc: b29b uxth r3, r3
|
|
80064ce: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80064d2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80064d6: b29a uxth r2, r3
|
|
80064d8: 69bb ldr r3, [r7, #24]
|
|
80064da: 801a strh r2, [r3, #0]
|
|
80064dc: e057 b.n 800658e <USB_EPStartXfer+0x3c2>
|
|
80064de: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80064e2: 2b3e cmp r3, #62 ; 0x3e
|
|
80064e4: d817 bhi.n 8006516 <USB_EPStartXfer+0x34a>
|
|
80064e6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80064ea: 085b lsrs r3, r3, #1
|
|
80064ec: f8c7 3100 str.w r3, [r7, #256] ; 0x100
|
|
80064f0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80064f4: f003 0301 and.w r3, r3, #1
|
|
80064f8: 2b00 cmp r3, #0
|
|
80064fa: d004 beq.n 8006506 <USB_EPStartXfer+0x33a>
|
|
80064fc: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
|
|
8006500: 3301 adds r3, #1
|
|
8006502: f8c7 3100 str.w r3, [r7, #256] ; 0x100
|
|
8006506: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
|
|
800650a: b29b uxth r3, r3
|
|
800650c: 029b lsls r3, r3, #10
|
|
800650e: b29a uxth r2, r3
|
|
8006510: 69bb ldr r3, [r7, #24]
|
|
8006512: 801a strh r2, [r3, #0]
|
|
8006514: e03b b.n 800658e <USB_EPStartXfer+0x3c2>
|
|
8006516: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800651a: 095b lsrs r3, r3, #5
|
|
800651c: f8c7 3100 str.w r3, [r7, #256] ; 0x100
|
|
8006520: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006524: f003 031f and.w r3, r3, #31
|
|
8006528: 2b00 cmp r3, #0
|
|
800652a: d104 bne.n 8006536 <USB_EPStartXfer+0x36a>
|
|
800652c: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
|
|
8006530: 3b01 subs r3, #1
|
|
8006532: f8c7 3100 str.w r3, [r7, #256] ; 0x100
|
|
8006536: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
|
|
800653a: b29b uxth r3, r3
|
|
800653c: 029b lsls r3, r3, #10
|
|
800653e: b29b uxth r3, r3
|
|
8006540: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006544: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006548: b29a uxth r2, r3
|
|
800654a: 69bb ldr r3, [r7, #24]
|
|
800654c: 801a strh r2, [r3, #0]
|
|
800654e: e01e b.n 800658e <USB_EPStartXfer+0x3c2>
|
|
8006550: 463b mov r3, r7
|
|
8006552: 681b ldr r3, [r3, #0]
|
|
8006554: 785b ldrb r3, [r3, #1]
|
|
8006556: 2b01 cmp r3, #1
|
|
8006558: d119 bne.n 800658e <USB_EPStartXfer+0x3c2>
|
|
800655a: 1d3b adds r3, r7, #4
|
|
800655c: 681b ldr r3, [r3, #0]
|
|
800655e: 627b str r3, [r7, #36] ; 0x24
|
|
8006560: 1d3b adds r3, r7, #4
|
|
8006562: 681b ldr r3, [r3, #0]
|
|
8006564: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006568: b29b uxth r3, r3
|
|
800656a: 461a mov r2, r3
|
|
800656c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800656e: 4413 add r3, r2
|
|
8006570: 627b str r3, [r7, #36] ; 0x24
|
|
8006572: 463b mov r3, r7
|
|
8006574: 681b ldr r3, [r3, #0]
|
|
8006576: 781b ldrb r3, [r3, #0]
|
|
8006578: 011a lsls r2, r3, #4
|
|
800657a: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800657c: 4413 add r3, r2
|
|
800657e: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8006582: 623b str r3, [r7, #32]
|
|
8006584: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006588: b29a uxth r2, r3
|
|
800658a: 6a3b ldr r3, [r7, #32]
|
|
800658c: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
800658e: 463b mov r3, r7
|
|
8006590: 681b ldr r3, [r3, #0]
|
|
8006592: 891b ldrh r3, [r3, #8]
|
|
8006594: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
8006598: 463b mov r3, r7
|
|
800659a: 681b ldr r3, [r3, #0]
|
|
800659c: 6959 ldr r1, [r3, #20]
|
|
800659e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80065a2: b29b uxth r3, r3
|
|
80065a4: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
|
|
80065a8: 1d38 adds r0, r7, #4
|
|
80065aa: 6800 ldr r0, [r0, #0]
|
|
80065ac: f001 f86c bl 8007688 <USB_WritePMA>
|
|
80065b0: e33b b.n 8006c2a <USB_EPStartXfer+0xa5e>
|
|
}
|
|
else
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer0 */
|
|
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
|
80065b2: 463b mov r3, r7
|
|
80065b4: 681b ldr r3, [r3, #0]
|
|
80065b6: 785b ldrb r3, [r3, #1]
|
|
80065b8: 2b00 cmp r3, #0
|
|
80065ba: d164 bne.n 8006686 <USB_EPStartXfer+0x4ba>
|
|
80065bc: 1d3b adds r3, r7, #4
|
|
80065be: 681b ldr r3, [r3, #0]
|
|
80065c0: 64fb str r3, [r7, #76] ; 0x4c
|
|
80065c2: 1d3b adds r3, r7, #4
|
|
80065c4: 681b ldr r3, [r3, #0]
|
|
80065c6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80065ca: b29b uxth r3, r3
|
|
80065cc: 461a mov r2, r3
|
|
80065ce: 6cfb ldr r3, [r7, #76] ; 0x4c
|
|
80065d0: 4413 add r3, r2
|
|
80065d2: 64fb str r3, [r7, #76] ; 0x4c
|
|
80065d4: 463b mov r3, r7
|
|
80065d6: 681b ldr r3, [r3, #0]
|
|
80065d8: 781b ldrb r3, [r3, #0]
|
|
80065da: 011a lsls r2, r3, #4
|
|
80065dc: 6cfb ldr r3, [r7, #76] ; 0x4c
|
|
80065de: 4413 add r3, r2
|
|
80065e0: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
80065e4: 64bb str r3, [r7, #72] ; 0x48
|
|
80065e6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80065ea: 2b00 cmp r3, #0
|
|
80065ec: d112 bne.n 8006614 <USB_EPStartXfer+0x448>
|
|
80065ee: 6cbb ldr r3, [r7, #72] ; 0x48
|
|
80065f0: 881b ldrh r3, [r3, #0]
|
|
80065f2: b29b uxth r3, r3
|
|
80065f4: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
80065f8: b29a uxth r2, r3
|
|
80065fa: 6cbb ldr r3, [r7, #72] ; 0x48
|
|
80065fc: 801a strh r2, [r3, #0]
|
|
80065fe: 6cbb ldr r3, [r7, #72] ; 0x48
|
|
8006600: 881b ldrh r3, [r3, #0]
|
|
8006602: b29b uxth r3, r3
|
|
8006604: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006608: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800660c: b29a uxth r2, r3
|
|
800660e: 6cbb ldr r3, [r7, #72] ; 0x48
|
|
8006610: 801a strh r2, [r3, #0]
|
|
8006612: e057 b.n 80066c4 <USB_EPStartXfer+0x4f8>
|
|
8006614: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006618: 2b3e cmp r3, #62 ; 0x3e
|
|
800661a: d817 bhi.n 800664c <USB_EPStartXfer+0x480>
|
|
800661c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006620: 085b lsrs r3, r3, #1
|
|
8006622: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
|
|
8006626: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800662a: f003 0301 and.w r3, r3, #1
|
|
800662e: 2b00 cmp r3, #0
|
|
8006630: d004 beq.n 800663c <USB_EPStartXfer+0x470>
|
|
8006632: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
|
|
8006636: 3301 adds r3, #1
|
|
8006638: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
|
|
800663c: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
|
|
8006640: b29b uxth r3, r3
|
|
8006642: 029b lsls r3, r3, #10
|
|
8006644: b29a uxth r2, r3
|
|
8006646: 6cbb ldr r3, [r7, #72] ; 0x48
|
|
8006648: 801a strh r2, [r3, #0]
|
|
800664a: e03b b.n 80066c4 <USB_EPStartXfer+0x4f8>
|
|
800664c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006650: 095b lsrs r3, r3, #5
|
|
8006652: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
|
|
8006656: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800665a: f003 031f and.w r3, r3, #31
|
|
800665e: 2b00 cmp r3, #0
|
|
8006660: d104 bne.n 800666c <USB_EPStartXfer+0x4a0>
|
|
8006662: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
|
|
8006666: 3b01 subs r3, #1
|
|
8006668: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
|
|
800666c: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
|
|
8006670: b29b uxth r3, r3
|
|
8006672: 029b lsls r3, r3, #10
|
|
8006674: b29b uxth r3, r3
|
|
8006676: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800667a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800667e: b29a uxth r2, r3
|
|
8006680: 6cbb ldr r3, [r7, #72] ; 0x48
|
|
8006682: 801a strh r2, [r3, #0]
|
|
8006684: e01e b.n 80066c4 <USB_EPStartXfer+0x4f8>
|
|
8006686: 463b mov r3, r7
|
|
8006688: 681b ldr r3, [r3, #0]
|
|
800668a: 785b ldrb r3, [r3, #1]
|
|
800668c: 2b01 cmp r3, #1
|
|
800668e: d119 bne.n 80066c4 <USB_EPStartXfer+0x4f8>
|
|
8006690: 1d3b adds r3, r7, #4
|
|
8006692: 681b ldr r3, [r3, #0]
|
|
8006694: 657b str r3, [r7, #84] ; 0x54
|
|
8006696: 1d3b adds r3, r7, #4
|
|
8006698: 681b ldr r3, [r3, #0]
|
|
800669a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800669e: b29b uxth r3, r3
|
|
80066a0: 461a mov r2, r3
|
|
80066a2: 6d7b ldr r3, [r7, #84] ; 0x54
|
|
80066a4: 4413 add r3, r2
|
|
80066a6: 657b str r3, [r7, #84] ; 0x54
|
|
80066a8: 463b mov r3, r7
|
|
80066aa: 681b ldr r3, [r3, #0]
|
|
80066ac: 781b ldrb r3, [r3, #0]
|
|
80066ae: 011a lsls r2, r3, #4
|
|
80066b0: 6d7b ldr r3, [r7, #84] ; 0x54
|
|
80066b2: 4413 add r3, r2
|
|
80066b4: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
80066b8: 653b str r3, [r7, #80] ; 0x50
|
|
80066ba: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80066be: b29a uxth r2, r3
|
|
80066c0: 6d3b ldr r3, [r7, #80] ; 0x50
|
|
80066c2: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
80066c4: 463b mov r3, r7
|
|
80066c6: 681b ldr r3, [r3, #0]
|
|
80066c8: 891b ldrh r3, [r3, #8]
|
|
80066ca: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
80066ce: 463b mov r3, r7
|
|
80066d0: 681b ldr r3, [r3, #0]
|
|
80066d2: 6959 ldr r1, [r3, #20]
|
|
80066d4: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80066d8: b29b uxth r3, r3
|
|
80066da: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
|
|
80066de: 1d38 adds r0, r7, #4
|
|
80066e0: 6800 ldr r0, [r0, #0]
|
|
80066e2: f000 ffd1 bl 8007688 <USB_WritePMA>
|
|
ep->xfer_buff += len;
|
|
80066e6: 463b mov r3, r7
|
|
80066e8: 681b ldr r3, [r3, #0]
|
|
80066ea: 695a ldr r2, [r3, #20]
|
|
80066ec: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80066f0: 441a add r2, r3
|
|
80066f2: 463b mov r3, r7
|
|
80066f4: 681b ldr r3, [r3, #0]
|
|
80066f6: 615a str r2, [r3, #20]
|
|
|
|
if (ep->xfer_len_db > ep->maxpacket)
|
|
80066f8: 463b mov r3, r7
|
|
80066fa: 681b ldr r3, [r3, #0]
|
|
80066fc: 6a1a ldr r2, [r3, #32]
|
|
80066fe: 463b mov r3, r7
|
|
8006700: 681b ldr r3, [r3, #0]
|
|
8006702: 691b ldr r3, [r3, #16]
|
|
8006704: 429a cmp r2, r3
|
|
8006706: d909 bls.n 800671c <USB_EPStartXfer+0x550>
|
|
{
|
|
ep->xfer_len_db -= len;
|
|
8006708: 463b mov r3, r7
|
|
800670a: 681b ldr r3, [r3, #0]
|
|
800670c: 6a1a ldr r2, [r3, #32]
|
|
800670e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006712: 1ad2 subs r2, r2, r3
|
|
8006714: 463b mov r3, r7
|
|
8006716: 681b ldr r3, [r3, #0]
|
|
8006718: 621a str r2, [r3, #32]
|
|
800671a: e008 b.n 800672e <USB_EPStartXfer+0x562>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
800671c: 463b mov r3, r7
|
|
800671e: 681b ldr r3, [r3, #0]
|
|
8006720: 6a1b ldr r3, [r3, #32]
|
|
8006722: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
ep->xfer_len_db = 0U;
|
|
8006726: 463b mov r3, r7
|
|
8006728: 681b ldr r3, [r3, #0]
|
|
800672a: 2200 movs r2, #0
|
|
800672c: 621a str r2, [r3, #32]
|
|
}
|
|
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
|
800672e: 1d3b adds r3, r7, #4
|
|
8006730: 681b ldr r3, [r3, #0]
|
|
8006732: 647b str r3, [r7, #68] ; 0x44
|
|
8006734: 463b mov r3, r7
|
|
8006736: 681b ldr r3, [r3, #0]
|
|
8006738: 785b ldrb r3, [r3, #1]
|
|
800673a: 2b00 cmp r3, #0
|
|
800673c: d164 bne.n 8006808 <USB_EPStartXfer+0x63c>
|
|
800673e: 1d3b adds r3, r7, #4
|
|
8006740: 681b ldr r3, [r3, #0]
|
|
8006742: 63fb str r3, [r7, #60] ; 0x3c
|
|
8006744: 1d3b adds r3, r7, #4
|
|
8006746: 681b ldr r3, [r3, #0]
|
|
8006748: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800674c: b29b uxth r3, r3
|
|
800674e: 461a mov r2, r3
|
|
8006750: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8006752: 4413 add r3, r2
|
|
8006754: 63fb str r3, [r7, #60] ; 0x3c
|
|
8006756: 463b mov r3, r7
|
|
8006758: 681b ldr r3, [r3, #0]
|
|
800675a: 781b ldrb r3, [r3, #0]
|
|
800675c: 011a lsls r2, r3, #4
|
|
800675e: 6bfb ldr r3, [r7, #60] ; 0x3c
|
|
8006760: 4413 add r3, r2
|
|
8006762: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8006766: 63bb str r3, [r7, #56] ; 0x38
|
|
8006768: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800676c: 2b00 cmp r3, #0
|
|
800676e: d112 bne.n 8006796 <USB_EPStartXfer+0x5ca>
|
|
8006770: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8006772: 881b ldrh r3, [r3, #0]
|
|
8006774: b29b uxth r3, r3
|
|
8006776: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
800677a: b29a uxth r2, r3
|
|
800677c: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
800677e: 801a strh r2, [r3, #0]
|
|
8006780: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8006782: 881b ldrh r3, [r3, #0]
|
|
8006784: b29b uxth r3, r3
|
|
8006786: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800678a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800678e: b29a uxth r2, r3
|
|
8006790: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8006792: 801a strh r2, [r3, #0]
|
|
8006794: e054 b.n 8006840 <USB_EPStartXfer+0x674>
|
|
8006796: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800679a: 2b3e cmp r3, #62 ; 0x3e
|
|
800679c: d817 bhi.n 80067ce <USB_EPStartXfer+0x602>
|
|
800679e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80067a2: 085b lsrs r3, r3, #1
|
|
80067a4: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
|
|
80067a8: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80067ac: f003 0301 and.w r3, r3, #1
|
|
80067b0: 2b00 cmp r3, #0
|
|
80067b2: d004 beq.n 80067be <USB_EPStartXfer+0x5f2>
|
|
80067b4: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
|
|
80067b8: 3301 adds r3, #1
|
|
80067ba: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
|
|
80067be: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
|
|
80067c2: b29b uxth r3, r3
|
|
80067c4: 029b lsls r3, r3, #10
|
|
80067c6: b29a uxth r2, r3
|
|
80067c8: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
80067ca: 801a strh r2, [r3, #0]
|
|
80067cc: e038 b.n 8006840 <USB_EPStartXfer+0x674>
|
|
80067ce: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80067d2: 095b lsrs r3, r3, #5
|
|
80067d4: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
|
|
80067d8: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80067dc: f003 031f and.w r3, r3, #31
|
|
80067e0: 2b00 cmp r3, #0
|
|
80067e2: d104 bne.n 80067ee <USB_EPStartXfer+0x622>
|
|
80067e4: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
|
|
80067e8: 3b01 subs r3, #1
|
|
80067ea: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
|
|
80067ee: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
|
|
80067f2: b29b uxth r3, r3
|
|
80067f4: 029b lsls r3, r3, #10
|
|
80067f6: b29b uxth r3, r3
|
|
80067f8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80067fc: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006800: b29a uxth r2, r3
|
|
8006802: 6bbb ldr r3, [r7, #56] ; 0x38
|
|
8006804: 801a strh r2, [r3, #0]
|
|
8006806: e01b b.n 8006840 <USB_EPStartXfer+0x674>
|
|
8006808: 463b mov r3, r7
|
|
800680a: 681b ldr r3, [r3, #0]
|
|
800680c: 785b ldrb r3, [r3, #1]
|
|
800680e: 2b01 cmp r3, #1
|
|
8006810: d116 bne.n 8006840 <USB_EPStartXfer+0x674>
|
|
8006812: 1d3b adds r3, r7, #4
|
|
8006814: 681b ldr r3, [r3, #0]
|
|
8006816: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800681a: b29b uxth r3, r3
|
|
800681c: 461a mov r2, r3
|
|
800681e: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
8006820: 4413 add r3, r2
|
|
8006822: 647b str r3, [r7, #68] ; 0x44
|
|
8006824: 463b mov r3, r7
|
|
8006826: 681b ldr r3, [r3, #0]
|
|
8006828: 781b ldrb r3, [r3, #0]
|
|
800682a: 011a lsls r2, r3, #4
|
|
800682c: 6c7b ldr r3, [r7, #68] ; 0x44
|
|
800682e: 4413 add r3, r2
|
|
8006830: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8006834: 643b str r3, [r7, #64] ; 0x40
|
|
8006836: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800683a: b29a uxth r2, r3
|
|
800683c: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
800683e: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr1;
|
|
8006840: 463b mov r3, r7
|
|
8006842: 681b ldr r3, [r3, #0]
|
|
8006844: 895b ldrh r3, [r3, #10]
|
|
8006846: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
800684a: 463b mov r3, r7
|
|
800684c: 681b ldr r3, [r3, #0]
|
|
800684e: 6959 ldr r1, [r3, #20]
|
|
8006850: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006854: b29b uxth r3, r3
|
|
8006856: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
|
|
800685a: 1d38 adds r0, r7, #4
|
|
800685c: 6800 ldr r0, [r0, #0]
|
|
800685e: f000 ff13 bl 8007688 <USB_WritePMA>
|
|
8006862: e1e2 b.n 8006c2a <USB_EPStartXfer+0xa5e>
|
|
}
|
|
}
|
|
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
8006864: 463b mov r3, r7
|
|
8006866: 681b ldr r3, [r3, #0]
|
|
8006868: 6a1b ldr r3, [r3, #32]
|
|
800686a: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
|
|
/* disable double buffer mode */
|
|
PCD_CLEAR_EP_DBUF(USBx, ep->num);
|
|
800686e: 1d3b adds r3, r7, #4
|
|
8006870: 681a ldr r2, [r3, #0]
|
|
8006872: 463b mov r3, r7
|
|
8006874: 681b ldr r3, [r3, #0]
|
|
8006876: 781b ldrb r3, [r3, #0]
|
|
8006878: 009b lsls r3, r3, #2
|
|
800687a: 4413 add r3, r2
|
|
800687c: 881b ldrh r3, [r3, #0]
|
|
800687e: b29b uxth r3, r3
|
|
8006880: f423 43e2 bic.w r3, r3, #28928 ; 0x7100
|
|
8006884: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8006888: f8a7 3066 strh.w r3, [r7, #102] ; 0x66
|
|
800688c: 1d3b adds r3, r7, #4
|
|
800688e: 681a ldr r2, [r3, #0]
|
|
8006890: 463b mov r3, r7
|
|
8006892: 681b ldr r3, [r3, #0]
|
|
8006894: 781b ldrb r3, [r3, #0]
|
|
8006896: 009b lsls r3, r3, #2
|
|
8006898: 441a add r2, r3
|
|
800689a: f8b7 3066 ldrh.w r3, [r7, #102] ; 0x66
|
|
800689e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80068a2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80068a6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80068aa: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80068ae: b29b uxth r3, r3
|
|
80068b0: 8013 strh r3, [r2, #0]
|
|
|
|
/* Set Tx count with nbre of byte to be transmitted */
|
|
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
|
|
80068b2: 1d3b adds r3, r7, #4
|
|
80068b4: 681b ldr r3, [r3, #0]
|
|
80068b6: 663b str r3, [r7, #96] ; 0x60
|
|
80068b8: 1d3b adds r3, r7, #4
|
|
80068ba: 681b ldr r3, [r3, #0]
|
|
80068bc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80068c0: b29b uxth r3, r3
|
|
80068c2: 461a mov r2, r3
|
|
80068c4: 6e3b ldr r3, [r7, #96] ; 0x60
|
|
80068c6: 4413 add r3, r2
|
|
80068c8: 663b str r3, [r7, #96] ; 0x60
|
|
80068ca: 463b mov r3, r7
|
|
80068cc: 681b ldr r3, [r3, #0]
|
|
80068ce: 781b ldrb r3, [r3, #0]
|
|
80068d0: 011a lsls r2, r3, #4
|
|
80068d2: 6e3b ldr r3, [r7, #96] ; 0x60
|
|
80068d4: 4413 add r3, r2
|
|
80068d6: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
80068da: 65fb str r3, [r7, #92] ; 0x5c
|
|
80068dc: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80068e0: b29a uxth r2, r3
|
|
80068e2: 6dfb ldr r3, [r7, #92] ; 0x5c
|
|
80068e4: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
80068e6: 463b mov r3, r7
|
|
80068e8: 681b ldr r3, [r3, #0]
|
|
80068ea: 891b ldrh r3, [r3, #8]
|
|
80068ec: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
80068f0: 463b mov r3, r7
|
|
80068f2: 681b ldr r3, [r3, #0]
|
|
80068f4: 6959 ldr r1, [r3, #20]
|
|
80068f6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80068fa: b29b uxth r3, r3
|
|
80068fc: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
|
|
8006900: 1d38 adds r0, r7, #4
|
|
8006902: 6800 ldr r0, [r0, #0]
|
|
8006904: f000 fec0 bl 8007688 <USB_WritePMA>
|
|
8006908: e18f b.n 8006c2a <USB_EPStartXfer+0xa5e>
|
|
|
|
/* manage isochronous double buffer IN mode */
|
|
else
|
|
{
|
|
/* Write the data to the USB endpoint */
|
|
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
|
|
800690a: 1d3b adds r3, r7, #4
|
|
800690c: 681a ldr r2, [r3, #0]
|
|
800690e: 463b mov r3, r7
|
|
8006910: 681b ldr r3, [r3, #0]
|
|
8006912: 781b ldrb r3, [r3, #0]
|
|
8006914: 009b lsls r3, r3, #2
|
|
8006916: 4413 add r3, r2
|
|
8006918: 881b ldrh r3, [r3, #0]
|
|
800691a: b29b uxth r3, r3
|
|
800691c: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8006920: 2b00 cmp r3, #0
|
|
8006922: f000 808f beq.w 8006a44 <USB_EPStartXfer+0x878>
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
|
8006926: 1d3b adds r3, r7, #4
|
|
8006928: 681b ldr r3, [r3, #0]
|
|
800692a: 67bb str r3, [r7, #120] ; 0x78
|
|
800692c: 463b mov r3, r7
|
|
800692e: 681b ldr r3, [r3, #0]
|
|
8006930: 785b ldrb r3, [r3, #1]
|
|
8006932: 2b00 cmp r3, #0
|
|
8006934: d164 bne.n 8006a00 <USB_EPStartXfer+0x834>
|
|
8006936: 1d3b adds r3, r7, #4
|
|
8006938: 681b ldr r3, [r3, #0]
|
|
800693a: 673b str r3, [r7, #112] ; 0x70
|
|
800693c: 1d3b adds r3, r7, #4
|
|
800693e: 681b ldr r3, [r3, #0]
|
|
8006940: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006944: b29b uxth r3, r3
|
|
8006946: 461a mov r2, r3
|
|
8006948: 6f3b ldr r3, [r7, #112] ; 0x70
|
|
800694a: 4413 add r3, r2
|
|
800694c: 673b str r3, [r7, #112] ; 0x70
|
|
800694e: 463b mov r3, r7
|
|
8006950: 681b ldr r3, [r3, #0]
|
|
8006952: 781b ldrb r3, [r3, #0]
|
|
8006954: 011a lsls r2, r3, #4
|
|
8006956: 6f3b ldr r3, [r7, #112] ; 0x70
|
|
8006958: 4413 add r3, r2
|
|
800695a: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
800695e: 66fb str r3, [r7, #108] ; 0x6c
|
|
8006960: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006964: 2b00 cmp r3, #0
|
|
8006966: d112 bne.n 800698e <USB_EPStartXfer+0x7c2>
|
|
8006968: 6efb ldr r3, [r7, #108] ; 0x6c
|
|
800696a: 881b ldrh r3, [r3, #0]
|
|
800696c: b29b uxth r3, r3
|
|
800696e: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8006972: b29a uxth r2, r3
|
|
8006974: 6efb ldr r3, [r7, #108] ; 0x6c
|
|
8006976: 801a strh r2, [r3, #0]
|
|
8006978: 6efb ldr r3, [r7, #108] ; 0x6c
|
|
800697a: 881b ldrh r3, [r3, #0]
|
|
800697c: b29b uxth r3, r3
|
|
800697e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006982: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006986: b29a uxth r2, r3
|
|
8006988: 6efb ldr r3, [r7, #108] ; 0x6c
|
|
800698a: 801a strh r2, [r3, #0]
|
|
800698c: e054 b.n 8006a38 <USB_EPStartXfer+0x86c>
|
|
800698e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006992: 2b3e cmp r3, #62 ; 0x3e
|
|
8006994: d817 bhi.n 80069c6 <USB_EPStartXfer+0x7fa>
|
|
8006996: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800699a: 085b lsrs r3, r3, #1
|
|
800699c: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
|
|
80069a0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80069a4: f003 0301 and.w r3, r3, #1
|
|
80069a8: 2b00 cmp r3, #0
|
|
80069aa: d004 beq.n 80069b6 <USB_EPStartXfer+0x7ea>
|
|
80069ac: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
|
|
80069b0: 3301 adds r3, #1
|
|
80069b2: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
|
|
80069b6: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
|
|
80069ba: b29b uxth r3, r3
|
|
80069bc: 029b lsls r3, r3, #10
|
|
80069be: b29a uxth r2, r3
|
|
80069c0: 6efb ldr r3, [r7, #108] ; 0x6c
|
|
80069c2: 801a strh r2, [r3, #0]
|
|
80069c4: e038 b.n 8006a38 <USB_EPStartXfer+0x86c>
|
|
80069c6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80069ca: 095b lsrs r3, r3, #5
|
|
80069cc: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
|
|
80069d0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80069d4: f003 031f and.w r3, r3, #31
|
|
80069d8: 2b00 cmp r3, #0
|
|
80069da: d104 bne.n 80069e6 <USB_EPStartXfer+0x81a>
|
|
80069dc: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
|
|
80069e0: 3b01 subs r3, #1
|
|
80069e2: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
|
|
80069e6: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
|
|
80069ea: b29b uxth r3, r3
|
|
80069ec: 029b lsls r3, r3, #10
|
|
80069ee: b29b uxth r3, r3
|
|
80069f0: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80069f4: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80069f8: b29a uxth r2, r3
|
|
80069fa: 6efb ldr r3, [r7, #108] ; 0x6c
|
|
80069fc: 801a strh r2, [r3, #0]
|
|
80069fe: e01b b.n 8006a38 <USB_EPStartXfer+0x86c>
|
|
8006a00: 463b mov r3, r7
|
|
8006a02: 681b ldr r3, [r3, #0]
|
|
8006a04: 785b ldrb r3, [r3, #1]
|
|
8006a06: 2b01 cmp r3, #1
|
|
8006a08: d116 bne.n 8006a38 <USB_EPStartXfer+0x86c>
|
|
8006a0a: 1d3b adds r3, r7, #4
|
|
8006a0c: 681b ldr r3, [r3, #0]
|
|
8006a0e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006a12: b29b uxth r3, r3
|
|
8006a14: 461a mov r2, r3
|
|
8006a16: 6fbb ldr r3, [r7, #120] ; 0x78
|
|
8006a18: 4413 add r3, r2
|
|
8006a1a: 67bb str r3, [r7, #120] ; 0x78
|
|
8006a1c: 463b mov r3, r7
|
|
8006a1e: 681b ldr r3, [r3, #0]
|
|
8006a20: 781b ldrb r3, [r3, #0]
|
|
8006a22: 011a lsls r2, r3, #4
|
|
8006a24: 6fbb ldr r3, [r7, #120] ; 0x78
|
|
8006a26: 4413 add r3, r2
|
|
8006a28: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8006a2c: 677b str r3, [r7, #116] ; 0x74
|
|
8006a2e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006a32: b29a uxth r2, r3
|
|
8006a34: 6f7b ldr r3, [r7, #116] ; 0x74
|
|
8006a36: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr1;
|
|
8006a38: 463b mov r3, r7
|
|
8006a3a: 681b ldr r3, [r3, #0]
|
|
8006a3c: 895b ldrh r3, [r3, #10]
|
|
8006a3e: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
|
|
8006a42: e097 b.n 8006b74 <USB_EPStartXfer+0x9a8>
|
|
}
|
|
else
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer0 */
|
|
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
|
8006a44: 463b mov r3, r7
|
|
8006a46: 681b ldr r3, [r3, #0]
|
|
8006a48: 785b ldrb r3, [r3, #1]
|
|
8006a4a: 2b00 cmp r3, #0
|
|
8006a4c: d168 bne.n 8006b20 <USB_EPStartXfer+0x954>
|
|
8006a4e: 1d3b adds r3, r7, #4
|
|
8006a50: 681b ldr r3, [r3, #0]
|
|
8006a52: f8c7 3080 str.w r3, [r7, #128] ; 0x80
|
|
8006a56: 1d3b adds r3, r7, #4
|
|
8006a58: 681b ldr r3, [r3, #0]
|
|
8006a5a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006a5e: b29b uxth r3, r3
|
|
8006a60: 461a mov r2, r3
|
|
8006a62: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
|
|
8006a66: 4413 add r3, r2
|
|
8006a68: f8c7 3080 str.w r3, [r7, #128] ; 0x80
|
|
8006a6c: 463b mov r3, r7
|
|
8006a6e: 681b ldr r3, [r3, #0]
|
|
8006a70: 781b ldrb r3, [r3, #0]
|
|
8006a72: 011a lsls r2, r3, #4
|
|
8006a74: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
|
|
8006a78: 4413 add r3, r2
|
|
8006a7a: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8006a7e: 67fb str r3, [r7, #124] ; 0x7c
|
|
8006a80: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006a84: 2b00 cmp r3, #0
|
|
8006a86: d112 bne.n 8006aae <USB_EPStartXfer+0x8e2>
|
|
8006a88: 6ffb ldr r3, [r7, #124] ; 0x7c
|
|
8006a8a: 881b ldrh r3, [r3, #0]
|
|
8006a8c: b29b uxth r3, r3
|
|
8006a8e: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8006a92: b29a uxth r2, r3
|
|
8006a94: 6ffb ldr r3, [r7, #124] ; 0x7c
|
|
8006a96: 801a strh r2, [r3, #0]
|
|
8006a98: 6ffb ldr r3, [r7, #124] ; 0x7c
|
|
8006a9a: 881b ldrh r3, [r3, #0]
|
|
8006a9c: b29b uxth r3, r3
|
|
8006a9e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006aa2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006aa6: b29a uxth r2, r3
|
|
8006aa8: 6ffb ldr r3, [r7, #124] ; 0x7c
|
|
8006aaa: 801a strh r2, [r3, #0]
|
|
8006aac: e05d b.n 8006b6a <USB_EPStartXfer+0x99e>
|
|
8006aae: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006ab2: 2b3e cmp r3, #62 ; 0x3e
|
|
8006ab4: d817 bhi.n 8006ae6 <USB_EPStartXfer+0x91a>
|
|
8006ab6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006aba: 085b lsrs r3, r3, #1
|
|
8006abc: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
|
|
8006ac0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006ac4: f003 0301 and.w r3, r3, #1
|
|
8006ac8: 2b00 cmp r3, #0
|
|
8006aca: d004 beq.n 8006ad6 <USB_EPStartXfer+0x90a>
|
|
8006acc: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
|
|
8006ad0: 3301 adds r3, #1
|
|
8006ad2: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
|
|
8006ad6: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
|
|
8006ada: b29b uxth r3, r3
|
|
8006adc: 029b lsls r3, r3, #10
|
|
8006ade: b29a uxth r2, r3
|
|
8006ae0: 6ffb ldr r3, [r7, #124] ; 0x7c
|
|
8006ae2: 801a strh r2, [r3, #0]
|
|
8006ae4: e041 b.n 8006b6a <USB_EPStartXfer+0x99e>
|
|
8006ae6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006aea: 095b lsrs r3, r3, #5
|
|
8006aec: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
|
|
8006af0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006af4: f003 031f and.w r3, r3, #31
|
|
8006af8: 2b00 cmp r3, #0
|
|
8006afa: d104 bne.n 8006b06 <USB_EPStartXfer+0x93a>
|
|
8006afc: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
|
|
8006b00: 3b01 subs r3, #1
|
|
8006b02: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
|
|
8006b06: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
|
|
8006b0a: b29b uxth r3, r3
|
|
8006b0c: 029b lsls r3, r3, #10
|
|
8006b0e: b29b uxth r3, r3
|
|
8006b10: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006b14: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006b18: b29a uxth r2, r3
|
|
8006b1a: 6ffb ldr r3, [r7, #124] ; 0x7c
|
|
8006b1c: 801a strh r2, [r3, #0]
|
|
8006b1e: e024 b.n 8006b6a <USB_EPStartXfer+0x99e>
|
|
8006b20: 463b mov r3, r7
|
|
8006b22: 681b ldr r3, [r3, #0]
|
|
8006b24: 785b ldrb r3, [r3, #1]
|
|
8006b26: 2b01 cmp r3, #1
|
|
8006b28: d11f bne.n 8006b6a <USB_EPStartXfer+0x99e>
|
|
8006b2a: 1d3b adds r3, r7, #4
|
|
8006b2c: 681b ldr r3, [r3, #0]
|
|
8006b2e: f8c7 3088 str.w r3, [r7, #136] ; 0x88
|
|
8006b32: 1d3b adds r3, r7, #4
|
|
8006b34: 681b ldr r3, [r3, #0]
|
|
8006b36: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006b3a: b29b uxth r3, r3
|
|
8006b3c: 461a mov r2, r3
|
|
8006b3e: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88
|
|
8006b42: 4413 add r3, r2
|
|
8006b44: f8c7 3088 str.w r3, [r7, #136] ; 0x88
|
|
8006b48: 463b mov r3, r7
|
|
8006b4a: 681b ldr r3, [r3, #0]
|
|
8006b4c: 781b ldrb r3, [r3, #0]
|
|
8006b4e: 011a lsls r2, r3, #4
|
|
8006b50: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88
|
|
8006b54: 4413 add r3, r2
|
|
8006b56: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8006b5a: f8c7 3084 str.w r3, [r7, #132] ; 0x84
|
|
8006b5e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006b62: b29a uxth r2, r3
|
|
8006b64: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
|
|
8006b68: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
8006b6a: 463b mov r3, r7
|
|
8006b6c: 681b ldr r3, [r3, #0]
|
|
8006b6e: 891b ldrh r3, [r3, #8]
|
|
8006b70: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
|
|
}
|
|
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
8006b74: 463b mov r3, r7
|
|
8006b76: 681b ldr r3, [r3, #0]
|
|
8006b78: 6959 ldr r1, [r3, #20]
|
|
8006b7a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006b7e: b29b uxth r3, r3
|
|
8006b80: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
|
|
8006b84: 1d38 adds r0, r7, #4
|
|
8006b86: 6800 ldr r0, [r0, #0]
|
|
8006b88: f000 fd7e bl 8007688 <USB_WritePMA>
|
|
PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
|
|
8006b8c: 463b mov r3, r7
|
|
8006b8e: 681b ldr r3, [r3, #0]
|
|
8006b90: 785b ldrb r3, [r3, #1]
|
|
8006b92: 2b00 cmp r3, #0
|
|
8006b94: d122 bne.n 8006bdc <USB_EPStartXfer+0xa10>
|
|
8006b96: 1d3b adds r3, r7, #4
|
|
8006b98: 681a ldr r2, [r3, #0]
|
|
8006b9a: 463b mov r3, r7
|
|
8006b9c: 681b ldr r3, [r3, #0]
|
|
8006b9e: 781b ldrb r3, [r3, #0]
|
|
8006ba0: 009b lsls r3, r3, #2
|
|
8006ba2: 4413 add r3, r2
|
|
8006ba4: 881b ldrh r3, [r3, #0]
|
|
8006ba6: b29b uxth r3, r3
|
|
8006ba8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8006bac: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8006bb0: f8a7 3068 strh.w r3, [r7, #104] ; 0x68
|
|
8006bb4: 1d3b adds r3, r7, #4
|
|
8006bb6: 681a ldr r2, [r3, #0]
|
|
8006bb8: 463b mov r3, r7
|
|
8006bba: 681b ldr r3, [r3, #0]
|
|
8006bbc: 781b ldrb r3, [r3, #0]
|
|
8006bbe: 009b lsls r3, r3, #2
|
|
8006bc0: 441a add r2, r3
|
|
8006bc2: f8b7 3068 ldrh.w r3, [r7, #104] ; 0x68
|
|
8006bc6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8006bca: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8006bce: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8006bd2: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8006bd6: b29b uxth r3, r3
|
|
8006bd8: 8013 strh r3, [r2, #0]
|
|
8006bda: e026 b.n 8006c2a <USB_EPStartXfer+0xa5e>
|
|
8006bdc: 463b mov r3, r7
|
|
8006bde: 681b ldr r3, [r3, #0]
|
|
8006be0: 785b ldrb r3, [r3, #1]
|
|
8006be2: 2b01 cmp r3, #1
|
|
8006be4: d121 bne.n 8006c2a <USB_EPStartXfer+0xa5e>
|
|
8006be6: 1d3b adds r3, r7, #4
|
|
8006be8: 681a ldr r2, [r3, #0]
|
|
8006bea: 463b mov r3, r7
|
|
8006bec: 681b ldr r3, [r3, #0]
|
|
8006bee: 781b ldrb r3, [r3, #0]
|
|
8006bf0: 009b lsls r3, r3, #2
|
|
8006bf2: 4413 add r3, r2
|
|
8006bf4: 881b ldrh r3, [r3, #0]
|
|
8006bf6: b29b uxth r3, r3
|
|
8006bf8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8006bfc: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8006c00: f8a7 306a strh.w r3, [r7, #106] ; 0x6a
|
|
8006c04: 1d3b adds r3, r7, #4
|
|
8006c06: 681a ldr r2, [r3, #0]
|
|
8006c08: 463b mov r3, r7
|
|
8006c0a: 681b ldr r3, [r3, #0]
|
|
8006c0c: 781b ldrb r3, [r3, #0]
|
|
8006c0e: 009b lsls r3, r3, #2
|
|
8006c10: 441a add r2, r3
|
|
8006c12: f8b7 306a ldrh.w r3, [r7, #106] ; 0x6a
|
|
8006c16: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8006c1a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8006c1e: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8006c22: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8006c26: b29b uxth r3, r3
|
|
8006c28: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
|
|
8006c2a: 1d3b adds r3, r7, #4
|
|
8006c2c: 681a ldr r2, [r3, #0]
|
|
8006c2e: 463b mov r3, r7
|
|
8006c30: 681b ldr r3, [r3, #0]
|
|
8006c32: 781b ldrb r3, [r3, #0]
|
|
8006c34: 009b lsls r3, r3, #2
|
|
8006c36: 4413 add r3, r2
|
|
8006c38: 881b ldrh r3, [r3, #0]
|
|
8006c3a: b29b uxth r3, r3
|
|
8006c3c: f107 020e add.w r2, r7, #14
|
|
8006c40: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8006c44: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8006c48: 8013 strh r3, [r2, #0]
|
|
8006c4a: f107 030e add.w r3, r7, #14
|
|
8006c4e: f107 020e add.w r2, r7, #14
|
|
8006c52: 8812 ldrh r2, [r2, #0]
|
|
8006c54: f082 0210 eor.w r2, r2, #16
|
|
8006c58: 801a strh r2, [r3, #0]
|
|
8006c5a: f107 030e add.w r3, r7, #14
|
|
8006c5e: f107 020e add.w r2, r7, #14
|
|
8006c62: 8812 ldrh r2, [r2, #0]
|
|
8006c64: f082 0220 eor.w r2, r2, #32
|
|
8006c68: 801a strh r2, [r3, #0]
|
|
8006c6a: 1d3b adds r3, r7, #4
|
|
8006c6c: 681a ldr r2, [r3, #0]
|
|
8006c6e: 463b mov r3, r7
|
|
8006c70: 681b ldr r3, [r3, #0]
|
|
8006c72: 781b ldrb r3, [r3, #0]
|
|
8006c74: 009b lsls r3, r3, #2
|
|
8006c76: 441a add r2, r3
|
|
8006c78: f107 030e add.w r3, r7, #14
|
|
8006c7c: 881b ldrh r3, [r3, #0]
|
|
8006c7e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8006c82: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8006c86: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8006c8a: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8006c8e: b29b uxth r3, r3
|
|
8006c90: 8013 strh r3, [r2, #0]
|
|
8006c92: e3b5 b.n 8007400 <USB_EPStartXfer+0x1234>
|
|
}
|
|
else /* OUT endpoint */
|
|
{
|
|
if (ep->doublebuffer == 0U)
|
|
8006c94: 463b mov r3, r7
|
|
8006c96: 681b ldr r3, [r3, #0]
|
|
8006c98: 7b1b ldrb r3, [r3, #12]
|
|
8006c9a: 2b00 cmp r3, #0
|
|
8006c9c: f040 8090 bne.w 8006dc0 <USB_EPStartXfer+0xbf4>
|
|
{
|
|
/* Multi packet transfer */
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
8006ca0: 463b mov r3, r7
|
|
8006ca2: 681b ldr r3, [r3, #0]
|
|
8006ca4: 699a ldr r2, [r3, #24]
|
|
8006ca6: 463b mov r3, r7
|
|
8006ca8: 681b ldr r3, [r3, #0]
|
|
8006caa: 691b ldr r3, [r3, #16]
|
|
8006cac: 429a cmp r2, r3
|
|
8006cae: d90e bls.n 8006cce <USB_EPStartXfer+0xb02>
|
|
{
|
|
len = ep->maxpacket;
|
|
8006cb0: 463b mov r3, r7
|
|
8006cb2: 681b ldr r3, [r3, #0]
|
|
8006cb4: 691b ldr r3, [r3, #16]
|
|
8006cb6: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
ep->xfer_len -= len;
|
|
8006cba: 463b mov r3, r7
|
|
8006cbc: 681b ldr r3, [r3, #0]
|
|
8006cbe: 699a ldr r2, [r3, #24]
|
|
8006cc0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006cc4: 1ad2 subs r2, r2, r3
|
|
8006cc6: 463b mov r3, r7
|
|
8006cc8: 681b ldr r3, [r3, #0]
|
|
8006cca: 619a str r2, [r3, #24]
|
|
8006ccc: e008 b.n 8006ce0 <USB_EPStartXfer+0xb14>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
8006cce: 463b mov r3, r7
|
|
8006cd0: 681b ldr r3, [r3, #0]
|
|
8006cd2: 699b ldr r3, [r3, #24]
|
|
8006cd4: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
ep->xfer_len = 0U;
|
|
8006cd8: 463b mov r3, r7
|
|
8006cda: 681b ldr r3, [r3, #0]
|
|
8006cdc: 2200 movs r2, #0
|
|
8006cde: 619a str r2, [r3, #24]
|
|
}
|
|
/* configure and validate Rx endpoint */
|
|
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
|
|
8006ce0: 1d3b adds r3, r7, #4
|
|
8006ce2: 681b ldr r3, [r3, #0]
|
|
8006ce4: f8c7 3094 str.w r3, [r7, #148] ; 0x94
|
|
8006ce8: 1d3b adds r3, r7, #4
|
|
8006cea: 681b ldr r3, [r3, #0]
|
|
8006cec: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006cf0: b29b uxth r3, r3
|
|
8006cf2: 461a mov r2, r3
|
|
8006cf4: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94
|
|
8006cf8: 4413 add r3, r2
|
|
8006cfa: f8c7 3094 str.w r3, [r7, #148] ; 0x94
|
|
8006cfe: 463b mov r3, r7
|
|
8006d00: 681b ldr r3, [r3, #0]
|
|
8006d02: 781b ldrb r3, [r3, #0]
|
|
8006d04: 011a lsls r2, r3, #4
|
|
8006d06: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94
|
|
8006d0a: 4413 add r3, r2
|
|
8006d0c: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8006d10: f8c7 3090 str.w r3, [r7, #144] ; 0x90
|
|
8006d14: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006d18: 2b00 cmp r3, #0
|
|
8006d1a: d116 bne.n 8006d4a <USB_EPStartXfer+0xb7e>
|
|
8006d1c: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
|
|
8006d20: 881b ldrh r3, [r3, #0]
|
|
8006d22: b29b uxth r3, r3
|
|
8006d24: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8006d28: b29a uxth r2, r3
|
|
8006d2a: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
|
|
8006d2e: 801a strh r2, [r3, #0]
|
|
8006d30: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
|
|
8006d34: 881b ldrh r3, [r3, #0]
|
|
8006d36: b29b uxth r3, r3
|
|
8006d38: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006d3c: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006d40: b29a uxth r2, r3
|
|
8006d42: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
|
|
8006d46: 801a strh r2, [r3, #0]
|
|
8006d48: e32c b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
8006d4a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006d4e: 2b3e cmp r3, #62 ; 0x3e
|
|
8006d50: d818 bhi.n 8006d84 <USB_EPStartXfer+0xbb8>
|
|
8006d52: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006d56: 085b lsrs r3, r3, #1
|
|
8006d58: f8c7 30ec str.w r3, [r7, #236] ; 0xec
|
|
8006d5c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006d60: f003 0301 and.w r3, r3, #1
|
|
8006d64: 2b00 cmp r3, #0
|
|
8006d66: d004 beq.n 8006d72 <USB_EPStartXfer+0xba6>
|
|
8006d68: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
|
|
8006d6c: 3301 adds r3, #1
|
|
8006d6e: f8c7 30ec str.w r3, [r7, #236] ; 0xec
|
|
8006d72: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
|
|
8006d76: b29b uxth r3, r3
|
|
8006d78: 029b lsls r3, r3, #10
|
|
8006d7a: b29a uxth r2, r3
|
|
8006d7c: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
|
|
8006d80: 801a strh r2, [r3, #0]
|
|
8006d82: e30f b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
8006d84: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006d88: 095b lsrs r3, r3, #5
|
|
8006d8a: f8c7 30ec str.w r3, [r7, #236] ; 0xec
|
|
8006d8e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8006d92: f003 031f and.w r3, r3, #31
|
|
8006d96: 2b00 cmp r3, #0
|
|
8006d98: d104 bne.n 8006da4 <USB_EPStartXfer+0xbd8>
|
|
8006d9a: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
|
|
8006d9e: 3b01 subs r3, #1
|
|
8006da0: f8c7 30ec str.w r3, [r7, #236] ; 0xec
|
|
8006da4: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
|
|
8006da8: b29b uxth r3, r3
|
|
8006daa: 029b lsls r3, r3, #10
|
|
8006dac: b29b uxth r3, r3
|
|
8006dae: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006db2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006db6: b29a uxth r2, r3
|
|
8006db8: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
|
|
8006dbc: 801a strh r2, [r3, #0]
|
|
8006dbe: e2f1 b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
}
|
|
else
|
|
{
|
|
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
|
|
/* Set the Double buffer counter */
|
|
if (ep->type == EP_TYPE_BULK)
|
|
8006dc0: 463b mov r3, r7
|
|
8006dc2: 681b ldr r3, [r3, #0]
|
|
8006dc4: 78db ldrb r3, [r3, #3]
|
|
8006dc6: 2b02 cmp r3, #2
|
|
8006dc8: f040 818f bne.w 80070ea <USB_EPStartXfer+0xf1e>
|
|
{
|
|
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
|
|
8006dcc: 463b mov r3, r7
|
|
8006dce: 681b ldr r3, [r3, #0]
|
|
8006dd0: 785b ldrb r3, [r3, #1]
|
|
8006dd2: 2b00 cmp r3, #0
|
|
8006dd4: d175 bne.n 8006ec2 <USB_EPStartXfer+0xcf6>
|
|
8006dd6: 1d3b adds r3, r7, #4
|
|
8006dd8: 681b ldr r3, [r3, #0]
|
|
8006dda: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0
|
|
8006dde: 1d3b adds r3, r7, #4
|
|
8006de0: 681b ldr r3, [r3, #0]
|
|
8006de2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006de6: b29b uxth r3, r3
|
|
8006de8: 461a mov r2, r3
|
|
8006dea: f8d7 30b0 ldr.w r3, [r7, #176] ; 0xb0
|
|
8006dee: 4413 add r3, r2
|
|
8006df0: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0
|
|
8006df4: 463b mov r3, r7
|
|
8006df6: 681b ldr r3, [r3, #0]
|
|
8006df8: 781b ldrb r3, [r3, #0]
|
|
8006dfa: 011a lsls r2, r3, #4
|
|
8006dfc: f8d7 30b0 ldr.w r3, [r7, #176] ; 0xb0
|
|
8006e00: 4413 add r3, r2
|
|
8006e02: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8006e06: f8c7 30ac str.w r3, [r7, #172] ; 0xac
|
|
8006e0a: 463b mov r3, r7
|
|
8006e0c: 681b ldr r3, [r3, #0]
|
|
8006e0e: 691b ldr r3, [r3, #16]
|
|
8006e10: 2b00 cmp r3, #0
|
|
8006e12: d116 bne.n 8006e42 <USB_EPStartXfer+0xc76>
|
|
8006e14: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
|
|
8006e18: 881b ldrh r3, [r3, #0]
|
|
8006e1a: b29b uxth r3, r3
|
|
8006e1c: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8006e20: b29a uxth r2, r3
|
|
8006e22: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
|
|
8006e26: 801a strh r2, [r3, #0]
|
|
8006e28: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
|
|
8006e2c: 881b ldrh r3, [r3, #0]
|
|
8006e2e: b29b uxth r3, r3
|
|
8006e30: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006e34: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006e38: b29a uxth r2, r3
|
|
8006e3a: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
|
|
8006e3e: 801a strh r2, [r3, #0]
|
|
8006e40: e065 b.n 8006f0e <USB_EPStartXfer+0xd42>
|
|
8006e42: 463b mov r3, r7
|
|
8006e44: 681b ldr r3, [r3, #0]
|
|
8006e46: 691b ldr r3, [r3, #16]
|
|
8006e48: 2b3e cmp r3, #62 ; 0x3e
|
|
8006e4a: d81a bhi.n 8006e82 <USB_EPStartXfer+0xcb6>
|
|
8006e4c: 463b mov r3, r7
|
|
8006e4e: 681b ldr r3, [r3, #0]
|
|
8006e50: 691b ldr r3, [r3, #16]
|
|
8006e52: 085b lsrs r3, r3, #1
|
|
8006e54: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
|
|
8006e58: 463b mov r3, r7
|
|
8006e5a: 681b ldr r3, [r3, #0]
|
|
8006e5c: 691b ldr r3, [r3, #16]
|
|
8006e5e: f003 0301 and.w r3, r3, #1
|
|
8006e62: 2b00 cmp r3, #0
|
|
8006e64: d004 beq.n 8006e70 <USB_EPStartXfer+0xca4>
|
|
8006e66: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
|
|
8006e6a: 3301 adds r3, #1
|
|
8006e6c: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
|
|
8006e70: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
|
|
8006e74: b29b uxth r3, r3
|
|
8006e76: 029b lsls r3, r3, #10
|
|
8006e78: b29a uxth r2, r3
|
|
8006e7a: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
|
|
8006e7e: 801a strh r2, [r3, #0]
|
|
8006e80: e045 b.n 8006f0e <USB_EPStartXfer+0xd42>
|
|
8006e82: 463b mov r3, r7
|
|
8006e84: 681b ldr r3, [r3, #0]
|
|
8006e86: 691b ldr r3, [r3, #16]
|
|
8006e88: 095b lsrs r3, r3, #5
|
|
8006e8a: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
|
|
8006e8e: 463b mov r3, r7
|
|
8006e90: 681b ldr r3, [r3, #0]
|
|
8006e92: 691b ldr r3, [r3, #16]
|
|
8006e94: f003 031f and.w r3, r3, #31
|
|
8006e98: 2b00 cmp r3, #0
|
|
8006e9a: d104 bne.n 8006ea6 <USB_EPStartXfer+0xcda>
|
|
8006e9c: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
|
|
8006ea0: 3b01 subs r3, #1
|
|
8006ea2: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
|
|
8006ea6: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
|
|
8006eaa: b29b uxth r3, r3
|
|
8006eac: 029b lsls r3, r3, #10
|
|
8006eae: b29b uxth r3, r3
|
|
8006eb0: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006eb4: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006eb8: b29a uxth r2, r3
|
|
8006eba: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
|
|
8006ebe: 801a strh r2, [r3, #0]
|
|
8006ec0: e025 b.n 8006f0e <USB_EPStartXfer+0xd42>
|
|
8006ec2: 463b mov r3, r7
|
|
8006ec4: 681b ldr r3, [r3, #0]
|
|
8006ec6: 785b ldrb r3, [r3, #1]
|
|
8006ec8: 2b01 cmp r3, #1
|
|
8006eca: d120 bne.n 8006f0e <USB_EPStartXfer+0xd42>
|
|
8006ecc: 1d3b adds r3, r7, #4
|
|
8006ece: 681b ldr r3, [r3, #0]
|
|
8006ed0: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
|
|
8006ed4: 1d3b adds r3, r7, #4
|
|
8006ed6: 681b ldr r3, [r3, #0]
|
|
8006ed8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006edc: b29b uxth r3, r3
|
|
8006ede: 461a mov r2, r3
|
|
8006ee0: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
|
|
8006ee4: 4413 add r3, r2
|
|
8006ee6: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
|
|
8006eea: 463b mov r3, r7
|
|
8006eec: 681b ldr r3, [r3, #0]
|
|
8006eee: 781b ldrb r3, [r3, #0]
|
|
8006ef0: 011a lsls r2, r3, #4
|
|
8006ef2: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
|
|
8006ef6: 4413 add r3, r2
|
|
8006ef8: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8006efc: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4
|
|
8006f00: 463b mov r3, r7
|
|
8006f02: 681b ldr r3, [r3, #0]
|
|
8006f04: 691b ldr r3, [r3, #16]
|
|
8006f06: b29a uxth r2, r3
|
|
8006f08: f8d7 30b4 ldr.w r3, [r7, #180] ; 0xb4
|
|
8006f0c: 801a strh r2, [r3, #0]
|
|
8006f0e: 1d3b adds r3, r7, #4
|
|
8006f10: 681b ldr r3, [r3, #0]
|
|
8006f12: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
|
|
8006f16: 463b mov r3, r7
|
|
8006f18: 681b ldr r3, [r3, #0]
|
|
8006f1a: 785b ldrb r3, [r3, #1]
|
|
8006f1c: 2b00 cmp r3, #0
|
|
8006f1e: d175 bne.n 800700c <USB_EPStartXfer+0xe40>
|
|
8006f20: 1d3b adds r3, r7, #4
|
|
8006f22: 681b ldr r3, [r3, #0]
|
|
8006f24: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
|
|
8006f28: 1d3b adds r3, r7, #4
|
|
8006f2a: 681b ldr r3, [r3, #0]
|
|
8006f2c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8006f30: b29b uxth r3, r3
|
|
8006f32: 461a mov r2, r3
|
|
8006f34: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0
|
|
8006f38: 4413 add r3, r2
|
|
8006f3a: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
|
|
8006f3e: 463b mov r3, r7
|
|
8006f40: 681b ldr r3, [r3, #0]
|
|
8006f42: 781b ldrb r3, [r3, #0]
|
|
8006f44: 011a lsls r2, r3, #4
|
|
8006f46: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0
|
|
8006f4a: 4413 add r3, r2
|
|
8006f4c: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8006f50: f8c7 309c str.w r3, [r7, #156] ; 0x9c
|
|
8006f54: 463b mov r3, r7
|
|
8006f56: 681b ldr r3, [r3, #0]
|
|
8006f58: 691b ldr r3, [r3, #16]
|
|
8006f5a: 2b00 cmp r3, #0
|
|
8006f5c: d116 bne.n 8006f8c <USB_EPStartXfer+0xdc0>
|
|
8006f5e: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
|
|
8006f62: 881b ldrh r3, [r3, #0]
|
|
8006f64: b29b uxth r3, r3
|
|
8006f66: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8006f6a: b29a uxth r2, r3
|
|
8006f6c: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
|
|
8006f70: 801a strh r2, [r3, #0]
|
|
8006f72: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
|
|
8006f76: 881b ldrh r3, [r3, #0]
|
|
8006f78: b29b uxth r3, r3
|
|
8006f7a: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006f7e: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006f82: b29a uxth r2, r3
|
|
8006f84: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
|
|
8006f88: 801a strh r2, [r3, #0]
|
|
8006f8a: e061 b.n 8007050 <USB_EPStartXfer+0xe84>
|
|
8006f8c: 463b mov r3, r7
|
|
8006f8e: 681b ldr r3, [r3, #0]
|
|
8006f90: 691b ldr r3, [r3, #16]
|
|
8006f92: 2b3e cmp r3, #62 ; 0x3e
|
|
8006f94: d81a bhi.n 8006fcc <USB_EPStartXfer+0xe00>
|
|
8006f96: 463b mov r3, r7
|
|
8006f98: 681b ldr r3, [r3, #0]
|
|
8006f9a: 691b ldr r3, [r3, #16]
|
|
8006f9c: 085b lsrs r3, r3, #1
|
|
8006f9e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
|
|
8006fa2: 463b mov r3, r7
|
|
8006fa4: 681b ldr r3, [r3, #0]
|
|
8006fa6: 691b ldr r3, [r3, #16]
|
|
8006fa8: f003 0301 and.w r3, r3, #1
|
|
8006fac: 2b00 cmp r3, #0
|
|
8006fae: d004 beq.n 8006fba <USB_EPStartXfer+0xdee>
|
|
8006fb0: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
|
|
8006fb4: 3301 adds r3, #1
|
|
8006fb6: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
|
|
8006fba: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
|
|
8006fbe: b29b uxth r3, r3
|
|
8006fc0: 029b lsls r3, r3, #10
|
|
8006fc2: b29a uxth r2, r3
|
|
8006fc4: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
|
|
8006fc8: 801a strh r2, [r3, #0]
|
|
8006fca: e041 b.n 8007050 <USB_EPStartXfer+0xe84>
|
|
8006fcc: 463b mov r3, r7
|
|
8006fce: 681b ldr r3, [r3, #0]
|
|
8006fd0: 691b ldr r3, [r3, #16]
|
|
8006fd2: 095b lsrs r3, r3, #5
|
|
8006fd4: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
|
|
8006fd8: 463b mov r3, r7
|
|
8006fda: 681b ldr r3, [r3, #0]
|
|
8006fdc: 691b ldr r3, [r3, #16]
|
|
8006fde: f003 031f and.w r3, r3, #31
|
|
8006fe2: 2b00 cmp r3, #0
|
|
8006fe4: d104 bne.n 8006ff0 <USB_EPStartXfer+0xe24>
|
|
8006fe6: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
|
|
8006fea: 3b01 subs r3, #1
|
|
8006fec: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
|
|
8006ff0: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
|
|
8006ff4: b29b uxth r3, r3
|
|
8006ff6: 029b lsls r3, r3, #10
|
|
8006ff8: b29b uxth r3, r3
|
|
8006ffa: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006ffe: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8007002: b29a uxth r2, r3
|
|
8007004: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
|
|
8007008: 801a strh r2, [r3, #0]
|
|
800700a: e021 b.n 8007050 <USB_EPStartXfer+0xe84>
|
|
800700c: 463b mov r3, r7
|
|
800700e: 681b ldr r3, [r3, #0]
|
|
8007010: 785b ldrb r3, [r3, #1]
|
|
8007012: 2b01 cmp r3, #1
|
|
8007014: d11c bne.n 8007050 <USB_EPStartXfer+0xe84>
|
|
8007016: 1d3b adds r3, r7, #4
|
|
8007018: 681b ldr r3, [r3, #0]
|
|
800701a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800701e: b29b uxth r3, r3
|
|
8007020: 461a mov r2, r3
|
|
8007022: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
|
|
8007026: 4413 add r3, r2
|
|
8007028: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
|
|
800702c: 463b mov r3, r7
|
|
800702e: 681b ldr r3, [r3, #0]
|
|
8007030: 781b ldrb r3, [r3, #0]
|
|
8007032: 011a lsls r2, r3, #4
|
|
8007034: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
|
|
8007038: 4413 add r3, r2
|
|
800703a: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
800703e: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
|
|
8007042: 463b mov r3, r7
|
|
8007044: 681b ldr r3, [r3, #0]
|
|
8007046: 691b ldr r3, [r3, #16]
|
|
8007048: b29a uxth r2, r3
|
|
800704a: f8d7 30a4 ldr.w r3, [r7, #164] ; 0xa4
|
|
800704e: 801a strh r2, [r3, #0]
|
|
|
|
/* Coming from ISR */
|
|
if (ep->xfer_count != 0U)
|
|
8007050: 463b mov r3, r7
|
|
8007052: 681b ldr r3, [r3, #0]
|
|
8007054: 69db ldr r3, [r3, #28]
|
|
8007056: 2b00 cmp r3, #0
|
|
8007058: f000 81a4 beq.w 80073a4 <USB_EPStartXfer+0x11d8>
|
|
{
|
|
/* update last value to check if there is blocking state */
|
|
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
|
|
800705c: 1d3b adds r3, r7, #4
|
|
800705e: 681a ldr r2, [r3, #0]
|
|
8007060: 463b mov r3, r7
|
|
8007062: 681b ldr r3, [r3, #0]
|
|
8007064: 781b ldrb r3, [r3, #0]
|
|
8007066: 009b lsls r3, r3, #2
|
|
8007068: 4413 add r3, r2
|
|
800706a: 881b ldrh r3, [r3, #0]
|
|
800706c: f8a7 309a strh.w r3, [r7, #154] ; 0x9a
|
|
|
|
/*Blocking State */
|
|
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
|
|
8007070: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
|
|
8007074: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8007078: 2b00 cmp r3, #0
|
|
800707a: d005 beq.n 8007088 <USB_EPStartXfer+0xebc>
|
|
800707c: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
|
|
8007080: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8007084: 2b00 cmp r3, #0
|
|
8007086: d10d bne.n 80070a4 <USB_EPStartXfer+0xed8>
|
|
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
|
|
8007088: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
|
|
800708c: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
|
|
8007090: 2b00 cmp r3, #0
|
|
8007092: f040 8187 bne.w 80073a4 <USB_EPStartXfer+0x11d8>
|
|
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
|
|
8007096: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
|
|
800709a: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
800709e: 2b00 cmp r3, #0
|
|
80070a0: f040 8180 bne.w 80073a4 <USB_EPStartXfer+0x11d8>
|
|
{
|
|
PCD_FreeUserBuffer(USBx, ep->num, 0U);
|
|
80070a4: 1d3b adds r3, r7, #4
|
|
80070a6: 681a ldr r2, [r3, #0]
|
|
80070a8: 463b mov r3, r7
|
|
80070aa: 681b ldr r3, [r3, #0]
|
|
80070ac: 781b ldrb r3, [r3, #0]
|
|
80070ae: 009b lsls r3, r3, #2
|
|
80070b0: 4413 add r3, r2
|
|
80070b2: 881b ldrh r3, [r3, #0]
|
|
80070b4: b29b uxth r3, r3
|
|
80070b6: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80070ba: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80070be: f8a7 3098 strh.w r3, [r7, #152] ; 0x98
|
|
80070c2: 1d3b adds r3, r7, #4
|
|
80070c4: 681a ldr r2, [r3, #0]
|
|
80070c6: 463b mov r3, r7
|
|
80070c8: 681b ldr r3, [r3, #0]
|
|
80070ca: 781b ldrb r3, [r3, #0]
|
|
80070cc: 009b lsls r3, r3, #2
|
|
80070ce: 441a add r2, r3
|
|
80070d0: f8b7 3098 ldrh.w r3, [r7, #152] ; 0x98
|
|
80070d4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80070d8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80070dc: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80070e0: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
80070e4: b29b uxth r3, r3
|
|
80070e6: 8013 strh r3, [r2, #0]
|
|
80070e8: e15c b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
}
|
|
}
|
|
}
|
|
/* iso out double */
|
|
else if (ep->type == EP_TYPE_ISOC)
|
|
80070ea: 463b mov r3, r7
|
|
80070ec: 681b ldr r3, [r3, #0]
|
|
80070ee: 78db ldrb r3, [r3, #3]
|
|
80070f0: 2b01 cmp r3, #1
|
|
80070f2: f040 8155 bne.w 80073a0 <USB_EPStartXfer+0x11d4>
|
|
{
|
|
/* Multi packet transfer */
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
80070f6: 463b mov r3, r7
|
|
80070f8: 681b ldr r3, [r3, #0]
|
|
80070fa: 699a ldr r2, [r3, #24]
|
|
80070fc: 463b mov r3, r7
|
|
80070fe: 681b ldr r3, [r3, #0]
|
|
8007100: 691b ldr r3, [r3, #16]
|
|
8007102: 429a cmp r2, r3
|
|
8007104: d90e bls.n 8007124 <USB_EPStartXfer+0xf58>
|
|
{
|
|
len = ep->maxpacket;
|
|
8007106: 463b mov r3, r7
|
|
8007108: 681b ldr r3, [r3, #0]
|
|
800710a: 691b ldr r3, [r3, #16]
|
|
800710c: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
ep->xfer_len -= len;
|
|
8007110: 463b mov r3, r7
|
|
8007112: 681b ldr r3, [r3, #0]
|
|
8007114: 699a ldr r2, [r3, #24]
|
|
8007116: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800711a: 1ad2 subs r2, r2, r3
|
|
800711c: 463b mov r3, r7
|
|
800711e: 681b ldr r3, [r3, #0]
|
|
8007120: 619a str r2, [r3, #24]
|
|
8007122: e008 b.n 8007136 <USB_EPStartXfer+0xf6a>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
8007124: 463b mov r3, r7
|
|
8007126: 681b ldr r3, [r3, #0]
|
|
8007128: 699b ldr r3, [r3, #24]
|
|
800712a: f8c7 310c str.w r3, [r7, #268] ; 0x10c
|
|
ep->xfer_len = 0U;
|
|
800712e: 463b mov r3, r7
|
|
8007130: 681b ldr r3, [r3, #0]
|
|
8007132: 2200 movs r2, #0
|
|
8007134: 619a str r2, [r3, #24]
|
|
}
|
|
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
|
|
8007136: 463b mov r3, r7
|
|
8007138: 681b ldr r3, [r3, #0]
|
|
800713a: 785b ldrb r3, [r3, #1]
|
|
800713c: 2b00 cmp r3, #0
|
|
800713e: d16f bne.n 8007220 <USB_EPStartXfer+0x1054>
|
|
8007140: 1d3b adds r3, r7, #4
|
|
8007142: 681b ldr r3, [r3, #0]
|
|
8007144: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0
|
|
8007148: 1d3b adds r3, r7, #4
|
|
800714a: 681b ldr r3, [r3, #0]
|
|
800714c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8007150: b29b uxth r3, r3
|
|
8007152: 461a mov r2, r3
|
|
8007154: f8d7 30d0 ldr.w r3, [r7, #208] ; 0xd0
|
|
8007158: 4413 add r3, r2
|
|
800715a: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0
|
|
800715e: 463b mov r3, r7
|
|
8007160: 681b ldr r3, [r3, #0]
|
|
8007162: 781b ldrb r3, [r3, #0]
|
|
8007164: 011a lsls r2, r3, #4
|
|
8007166: f8d7 30d0 ldr.w r3, [r7, #208] ; 0xd0
|
|
800716a: 4413 add r3, r2
|
|
800716c: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8007170: f8c7 30cc str.w r3, [r7, #204] ; 0xcc
|
|
8007174: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8007178: 2b00 cmp r3, #0
|
|
800717a: d116 bne.n 80071aa <USB_EPStartXfer+0xfde>
|
|
800717c: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
|
|
8007180: 881b ldrh r3, [r3, #0]
|
|
8007182: b29b uxth r3, r3
|
|
8007184: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8007188: b29a uxth r2, r3
|
|
800718a: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
|
|
800718e: 801a strh r2, [r3, #0]
|
|
8007190: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
|
|
8007194: 881b ldrh r3, [r3, #0]
|
|
8007196: b29b uxth r3, r3
|
|
8007198: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800719c: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80071a0: b29a uxth r2, r3
|
|
80071a2: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
|
|
80071a6: 801a strh r2, [r3, #0]
|
|
80071a8: e05f b.n 800726a <USB_EPStartXfer+0x109e>
|
|
80071aa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80071ae: 2b3e cmp r3, #62 ; 0x3e
|
|
80071b0: d818 bhi.n 80071e4 <USB_EPStartXfer+0x1018>
|
|
80071b2: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80071b6: 085b lsrs r3, r3, #1
|
|
80071b8: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
|
|
80071bc: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80071c0: f003 0301 and.w r3, r3, #1
|
|
80071c4: 2b00 cmp r3, #0
|
|
80071c6: d004 beq.n 80071d2 <USB_EPStartXfer+0x1006>
|
|
80071c8: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
|
|
80071cc: 3301 adds r3, #1
|
|
80071ce: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
|
|
80071d2: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
|
|
80071d6: b29b uxth r3, r3
|
|
80071d8: 029b lsls r3, r3, #10
|
|
80071da: b29a uxth r2, r3
|
|
80071dc: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
|
|
80071e0: 801a strh r2, [r3, #0]
|
|
80071e2: e042 b.n 800726a <USB_EPStartXfer+0x109e>
|
|
80071e4: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80071e8: 095b lsrs r3, r3, #5
|
|
80071ea: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
|
|
80071ee: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80071f2: f003 031f and.w r3, r3, #31
|
|
80071f6: 2b00 cmp r3, #0
|
|
80071f8: d104 bne.n 8007204 <USB_EPStartXfer+0x1038>
|
|
80071fa: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
|
|
80071fe: 3b01 subs r3, #1
|
|
8007200: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
|
|
8007204: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
|
|
8007208: b29b uxth r3, r3
|
|
800720a: 029b lsls r3, r3, #10
|
|
800720c: b29b uxth r3, r3
|
|
800720e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8007212: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8007216: b29a uxth r2, r3
|
|
8007218: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
|
|
800721c: 801a strh r2, [r3, #0]
|
|
800721e: e024 b.n 800726a <USB_EPStartXfer+0x109e>
|
|
8007220: 463b mov r3, r7
|
|
8007222: 681b ldr r3, [r3, #0]
|
|
8007224: 785b ldrb r3, [r3, #1]
|
|
8007226: 2b01 cmp r3, #1
|
|
8007228: d11f bne.n 800726a <USB_EPStartXfer+0x109e>
|
|
800722a: 1d3b adds r3, r7, #4
|
|
800722c: 681b ldr r3, [r3, #0]
|
|
800722e: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
|
|
8007232: 1d3b adds r3, r7, #4
|
|
8007234: 681b ldr r3, [r3, #0]
|
|
8007236: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800723a: b29b uxth r3, r3
|
|
800723c: 461a mov r2, r3
|
|
800723e: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
|
|
8007242: 4413 add r3, r2
|
|
8007244: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
|
|
8007248: 463b mov r3, r7
|
|
800724a: 681b ldr r3, [r3, #0]
|
|
800724c: 781b ldrb r3, [r3, #0]
|
|
800724e: 011a lsls r2, r3, #4
|
|
8007250: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
|
|
8007254: 4413 add r3, r2
|
|
8007256: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
800725a: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4
|
|
800725e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8007262: b29a uxth r2, r3
|
|
8007264: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4
|
|
8007268: 801a strh r2, [r3, #0]
|
|
800726a: 1d3b adds r3, r7, #4
|
|
800726c: 681b ldr r3, [r3, #0]
|
|
800726e: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8
|
|
8007272: 463b mov r3, r7
|
|
8007274: 681b ldr r3, [r3, #0]
|
|
8007276: 785b ldrb r3, [r3, #1]
|
|
8007278: 2b00 cmp r3, #0
|
|
800727a: d16f bne.n 800735c <USB_EPStartXfer+0x1190>
|
|
800727c: 1d3b adds r3, r7, #4
|
|
800727e: 681b ldr r3, [r3, #0]
|
|
8007280: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0
|
|
8007284: 1d3b adds r3, r7, #4
|
|
8007286: 681b ldr r3, [r3, #0]
|
|
8007288: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800728c: b29b uxth r3, r3
|
|
800728e: 461a mov r2, r3
|
|
8007290: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0
|
|
8007294: 4413 add r3, r2
|
|
8007296: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0
|
|
800729a: 463b mov r3, r7
|
|
800729c: 681b ldr r3, [r3, #0]
|
|
800729e: 781b ldrb r3, [r3, #0]
|
|
80072a0: 011a lsls r2, r3, #4
|
|
80072a2: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0
|
|
80072a6: 4413 add r3, r2
|
|
80072a8: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
80072ac: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
|
|
80072b0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80072b4: 2b00 cmp r3, #0
|
|
80072b6: d116 bne.n 80072e6 <USB_EPStartXfer+0x111a>
|
|
80072b8: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
|
|
80072bc: 881b ldrh r3, [r3, #0]
|
|
80072be: b29b uxth r3, r3
|
|
80072c0: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
80072c4: b29a uxth r2, r3
|
|
80072c6: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
|
|
80072ca: 801a strh r2, [r3, #0]
|
|
80072cc: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
|
|
80072d0: 881b ldrh r3, [r3, #0]
|
|
80072d2: b29b uxth r3, r3
|
|
80072d4: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80072d8: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80072dc: b29a uxth r2, r3
|
|
80072de: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
|
|
80072e2: 801a strh r2, [r3, #0]
|
|
80072e4: e05e b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
80072e6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80072ea: 2b3e cmp r3, #62 ; 0x3e
|
|
80072ec: d818 bhi.n 8007320 <USB_EPStartXfer+0x1154>
|
|
80072ee: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80072f2: 085b lsrs r3, r3, #1
|
|
80072f4: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
|
|
80072f8: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
80072fc: f003 0301 and.w r3, r3, #1
|
|
8007300: 2b00 cmp r3, #0
|
|
8007302: d004 beq.n 800730e <USB_EPStartXfer+0x1142>
|
|
8007304: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
|
|
8007308: 3301 adds r3, #1
|
|
800730a: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
|
|
800730e: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
|
|
8007312: b29b uxth r3, r3
|
|
8007314: 029b lsls r3, r3, #10
|
|
8007316: b29a uxth r2, r3
|
|
8007318: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
|
|
800731c: 801a strh r2, [r3, #0]
|
|
800731e: e041 b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
8007320: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8007324: 095b lsrs r3, r3, #5
|
|
8007326: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
|
|
800732a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
800732e: f003 031f and.w r3, r3, #31
|
|
8007332: 2b00 cmp r3, #0
|
|
8007334: d104 bne.n 8007340 <USB_EPStartXfer+0x1174>
|
|
8007336: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
|
|
800733a: 3b01 subs r3, #1
|
|
800733c: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
|
|
8007340: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
|
|
8007344: b29b uxth r3, r3
|
|
8007346: 029b lsls r3, r3, #10
|
|
8007348: b29b uxth r3, r3
|
|
800734a: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800734e: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8007352: b29a uxth r2, r3
|
|
8007354: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
|
|
8007358: 801a strh r2, [r3, #0]
|
|
800735a: e023 b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
800735c: 463b mov r3, r7
|
|
800735e: 681b ldr r3, [r3, #0]
|
|
8007360: 785b ldrb r3, [r3, #1]
|
|
8007362: 2b01 cmp r3, #1
|
|
8007364: d11e bne.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
8007366: 1d3b adds r3, r7, #4
|
|
8007368: 681b ldr r3, [r3, #0]
|
|
800736a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800736e: b29b uxth r3, r3
|
|
8007370: 461a mov r2, r3
|
|
8007372: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
|
|
8007376: 4413 add r3, r2
|
|
8007378: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8
|
|
800737c: 463b mov r3, r7
|
|
800737e: 681b ldr r3, [r3, #0]
|
|
8007380: 781b ldrb r3, [r3, #0]
|
|
8007382: 011a lsls r2, r3, #4
|
|
8007384: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
|
|
8007388: 4413 add r3, r2
|
|
800738a: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
800738e: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
|
|
8007392: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
|
|
8007396: b29a uxth r2, r3
|
|
8007398: f8d7 30c4 ldr.w r3, [r7, #196] ; 0xc4
|
|
800739c: 801a strh r2, [r3, #0]
|
|
800739e: e001 b.n 80073a4 <USB_EPStartXfer+0x11d8>
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
80073a0: 2301 movs r3, #1
|
|
80073a2: e02e b.n 8007402 <USB_EPStartXfer+0x1236>
|
|
}
|
|
}
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
80073a4: 1d3b adds r3, r7, #4
|
|
80073a6: 681a ldr r2, [r3, #0]
|
|
80073a8: 463b mov r3, r7
|
|
80073aa: 681b ldr r3, [r3, #0]
|
|
80073ac: 781b ldrb r3, [r3, #0]
|
|
80073ae: 009b lsls r3, r3, #2
|
|
80073b0: 4413 add r3, r2
|
|
80073b2: 881b ldrh r3, [r3, #0]
|
|
80073b4: b29b uxth r3, r3
|
|
80073b6: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
80073ba: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80073be: f8a7 308e strh.w r3, [r7, #142] ; 0x8e
|
|
80073c2: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e
|
|
80073c6: f483 5380 eor.w r3, r3, #4096 ; 0x1000
|
|
80073ca: f8a7 308e strh.w r3, [r7, #142] ; 0x8e
|
|
80073ce: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e
|
|
80073d2: f483 5300 eor.w r3, r3, #8192 ; 0x2000
|
|
80073d6: f8a7 308e strh.w r3, [r7, #142] ; 0x8e
|
|
80073da: 1d3b adds r3, r7, #4
|
|
80073dc: 681a ldr r2, [r3, #0]
|
|
80073de: 463b mov r3, r7
|
|
80073e0: 681b ldr r3, [r3, #0]
|
|
80073e2: 781b ldrb r3, [r3, #0]
|
|
80073e4: 009b lsls r3, r3, #2
|
|
80073e6: 441a add r2, r3
|
|
80073e8: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e
|
|
80073ec: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80073f0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80073f4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80073f8: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80073fc: b29b uxth r3, r3
|
|
80073fe: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
return HAL_OK;
|
|
8007400: 2300 movs r3, #0
|
|
}
|
|
8007402: 4618 mov r0, r3
|
|
8007404: f507 7788 add.w r7, r7, #272 ; 0x110
|
|
8007408: 46bd mov sp, r7
|
|
800740a: bd80 pop {r7, pc}
|
|
|
|
0800740c <USB_EPSetStall>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
800740c: b480 push {r7}
|
|
800740e: b085 sub sp, #20
|
|
8007410: af00 add r7, sp, #0
|
|
8007412: 6078 str r0, [r7, #4]
|
|
8007414: 6039 str r1, [r7, #0]
|
|
if (ep->is_in != 0U)
|
|
8007416: 683b ldr r3, [r7, #0]
|
|
8007418: 785b ldrb r3, [r3, #1]
|
|
800741a: 2b00 cmp r3, #0
|
|
800741c: d020 beq.n 8007460 <USB_EPSetStall+0x54>
|
|
{
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
|
|
800741e: 687a ldr r2, [r7, #4]
|
|
8007420: 683b ldr r3, [r7, #0]
|
|
8007422: 781b ldrb r3, [r3, #0]
|
|
8007424: 009b lsls r3, r3, #2
|
|
8007426: 4413 add r3, r2
|
|
8007428: 881b ldrh r3, [r3, #0]
|
|
800742a: b29b uxth r3, r3
|
|
800742c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8007430: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8007434: 81bb strh r3, [r7, #12]
|
|
8007436: 89bb ldrh r3, [r7, #12]
|
|
8007438: f083 0310 eor.w r3, r3, #16
|
|
800743c: 81bb strh r3, [r7, #12]
|
|
800743e: 687a ldr r2, [r7, #4]
|
|
8007440: 683b ldr r3, [r7, #0]
|
|
8007442: 781b ldrb r3, [r3, #0]
|
|
8007444: 009b lsls r3, r3, #2
|
|
8007446: 441a add r2, r3
|
|
8007448: 89bb ldrh r3, [r7, #12]
|
|
800744a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800744e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8007452: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8007456: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800745a: b29b uxth r3, r3
|
|
800745c: 8013 strh r3, [r2, #0]
|
|
800745e: e01f b.n 80074a0 <USB_EPSetStall+0x94>
|
|
}
|
|
else
|
|
{
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
|
|
8007460: 687a ldr r2, [r7, #4]
|
|
8007462: 683b ldr r3, [r7, #0]
|
|
8007464: 781b ldrb r3, [r3, #0]
|
|
8007466: 009b lsls r3, r3, #2
|
|
8007468: 4413 add r3, r2
|
|
800746a: 881b ldrh r3, [r3, #0]
|
|
800746c: b29b uxth r3, r3
|
|
800746e: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8007472: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8007476: 81fb strh r3, [r7, #14]
|
|
8007478: 89fb ldrh r3, [r7, #14]
|
|
800747a: f483 5380 eor.w r3, r3, #4096 ; 0x1000
|
|
800747e: 81fb strh r3, [r7, #14]
|
|
8007480: 687a ldr r2, [r7, #4]
|
|
8007482: 683b ldr r3, [r7, #0]
|
|
8007484: 781b ldrb r3, [r3, #0]
|
|
8007486: 009b lsls r3, r3, #2
|
|
8007488: 441a add r2, r3
|
|
800748a: 89fb ldrh r3, [r7, #14]
|
|
800748c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8007490: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8007494: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8007498: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800749c: b29b uxth r3, r3
|
|
800749e: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
return HAL_OK;
|
|
80074a0: 2300 movs r3, #0
|
|
}
|
|
80074a2: 4618 mov r0, r3
|
|
80074a4: 3714 adds r7, #20
|
|
80074a6: 46bd mov sp, r7
|
|
80074a8: bc80 pop {r7}
|
|
80074aa: 4770 bx lr
|
|
|
|
080074ac <USB_EPClearStall>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
80074ac: b480 push {r7}
|
|
80074ae: b087 sub sp, #28
|
|
80074b0: af00 add r7, sp, #0
|
|
80074b2: 6078 str r0, [r7, #4]
|
|
80074b4: 6039 str r1, [r7, #0]
|
|
if (ep->doublebuffer == 0U)
|
|
80074b6: 683b ldr r3, [r7, #0]
|
|
80074b8: 7b1b ldrb r3, [r3, #12]
|
|
80074ba: 2b00 cmp r3, #0
|
|
80074bc: f040 809d bne.w 80075fa <USB_EPClearStall+0x14e>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
80074c0: 683b ldr r3, [r7, #0]
|
|
80074c2: 785b ldrb r3, [r3, #1]
|
|
80074c4: 2b00 cmp r3, #0
|
|
80074c6: d04c beq.n 8007562 <USB_EPClearStall+0xb6>
|
|
{
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
80074c8: 687a ldr r2, [r7, #4]
|
|
80074ca: 683b ldr r3, [r7, #0]
|
|
80074cc: 781b ldrb r3, [r3, #0]
|
|
80074ce: 009b lsls r3, r3, #2
|
|
80074d0: 4413 add r3, r2
|
|
80074d2: 881b ldrh r3, [r3, #0]
|
|
80074d4: 823b strh r3, [r7, #16]
|
|
80074d6: 8a3b ldrh r3, [r7, #16]
|
|
80074d8: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80074dc: 2b00 cmp r3, #0
|
|
80074de: d01b beq.n 8007518 <USB_EPClearStall+0x6c>
|
|
80074e0: 687a ldr r2, [r7, #4]
|
|
80074e2: 683b ldr r3, [r7, #0]
|
|
80074e4: 781b ldrb r3, [r3, #0]
|
|
80074e6: 009b lsls r3, r3, #2
|
|
80074e8: 4413 add r3, r2
|
|
80074ea: 881b ldrh r3, [r3, #0]
|
|
80074ec: b29b uxth r3, r3
|
|
80074ee: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80074f2: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80074f6: 81fb strh r3, [r7, #14]
|
|
80074f8: 687a ldr r2, [r7, #4]
|
|
80074fa: 683b ldr r3, [r7, #0]
|
|
80074fc: 781b ldrb r3, [r3, #0]
|
|
80074fe: 009b lsls r3, r3, #2
|
|
8007500: 441a add r2, r3
|
|
8007502: 89fb ldrh r3, [r7, #14]
|
|
8007504: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8007508: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
800750c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8007510: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
|
8007514: b29b uxth r3, r3
|
|
8007516: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
8007518: 683b ldr r3, [r7, #0]
|
|
800751a: 78db ldrb r3, [r3, #3]
|
|
800751c: 2b01 cmp r3, #1
|
|
800751e: d06c beq.n 80075fa <USB_EPClearStall+0x14e>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
8007520: 687a ldr r2, [r7, #4]
|
|
8007522: 683b ldr r3, [r7, #0]
|
|
8007524: 781b ldrb r3, [r3, #0]
|
|
8007526: 009b lsls r3, r3, #2
|
|
8007528: 4413 add r3, r2
|
|
800752a: 881b ldrh r3, [r3, #0]
|
|
800752c: b29b uxth r3, r3
|
|
800752e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8007532: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8007536: 81bb strh r3, [r7, #12]
|
|
8007538: 89bb ldrh r3, [r7, #12]
|
|
800753a: f083 0320 eor.w r3, r3, #32
|
|
800753e: 81bb strh r3, [r7, #12]
|
|
8007540: 687a ldr r2, [r7, #4]
|
|
8007542: 683b ldr r3, [r7, #0]
|
|
8007544: 781b ldrb r3, [r3, #0]
|
|
8007546: 009b lsls r3, r3, #2
|
|
8007548: 441a add r2, r3
|
|
800754a: 89bb ldrh r3, [r7, #12]
|
|
800754c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
8007550: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
8007554: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8007558: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800755c: b29b uxth r3, r3
|
|
800755e: 8013 strh r3, [r2, #0]
|
|
8007560: e04b b.n 80075fa <USB_EPClearStall+0x14e>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8007562: 687a ldr r2, [r7, #4]
|
|
8007564: 683b ldr r3, [r7, #0]
|
|
8007566: 781b ldrb r3, [r3, #0]
|
|
8007568: 009b lsls r3, r3, #2
|
|
800756a: 4413 add r3, r2
|
|
800756c: 881b ldrh r3, [r3, #0]
|
|
800756e: 82fb strh r3, [r7, #22]
|
|
8007570: 8afb ldrh r3, [r7, #22]
|
|
8007572: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8007576: 2b00 cmp r3, #0
|
|
8007578: d01b beq.n 80075b2 <USB_EPClearStall+0x106>
|
|
800757a: 687a ldr r2, [r7, #4]
|
|
800757c: 683b ldr r3, [r7, #0]
|
|
800757e: 781b ldrb r3, [r3, #0]
|
|
8007580: 009b lsls r3, r3, #2
|
|
8007582: 4413 add r3, r2
|
|
8007584: 881b ldrh r3, [r3, #0]
|
|
8007586: b29b uxth r3, r3
|
|
8007588: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800758c: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8007590: 82bb strh r3, [r7, #20]
|
|
8007592: 687a ldr r2, [r7, #4]
|
|
8007594: 683b ldr r3, [r7, #0]
|
|
8007596: 781b ldrb r3, [r3, #0]
|
|
8007598: 009b lsls r3, r3, #2
|
|
800759a: 441a add r2, r3
|
|
800759c: 8abb ldrh r3, [r7, #20]
|
|
800759e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80075a2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80075a6: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
80075aa: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80075ae: b29b uxth r3, r3
|
|
80075b0: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure VALID status for the Endpoint */
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
80075b2: 687a ldr r2, [r7, #4]
|
|
80075b4: 683b ldr r3, [r7, #0]
|
|
80075b6: 781b ldrb r3, [r3, #0]
|
|
80075b8: 009b lsls r3, r3, #2
|
|
80075ba: 4413 add r3, r2
|
|
80075bc: 881b ldrh r3, [r3, #0]
|
|
80075be: b29b uxth r3, r3
|
|
80075c0: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
80075c4: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80075c8: 827b strh r3, [r7, #18]
|
|
80075ca: 8a7b ldrh r3, [r7, #18]
|
|
80075cc: f483 5380 eor.w r3, r3, #4096 ; 0x1000
|
|
80075d0: 827b strh r3, [r7, #18]
|
|
80075d2: 8a7b ldrh r3, [r7, #18]
|
|
80075d4: f483 5300 eor.w r3, r3, #8192 ; 0x2000
|
|
80075d8: 827b strh r3, [r7, #18]
|
|
80075da: 687a ldr r2, [r7, #4]
|
|
80075dc: 683b ldr r3, [r7, #0]
|
|
80075de: 781b ldrb r3, [r3, #0]
|
|
80075e0: 009b lsls r3, r3, #2
|
|
80075e2: 441a add r2, r3
|
|
80075e4: 8a7b ldrh r3, [r7, #18]
|
|
80075e6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
80075ea: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
80075ee: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80075f2: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
80075f6: b29b uxth r3, r3
|
|
80075f8: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
80075fa: 2300 movs r3, #0
|
|
}
|
|
80075fc: 4618 mov r0, r3
|
|
80075fe: 371c adds r7, #28
|
|
8007600: 46bd mov sp, r7
|
|
8007602: bc80 pop {r7}
|
|
8007604: 4770 bx lr
|
|
|
|
08007606 <USB_SetDevAddress>:
|
|
* @param address new device address to be assigned
|
|
* This parameter can be a value from 0 to 255
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
|
|
{
|
|
8007606: b480 push {r7}
|
|
8007608: b083 sub sp, #12
|
|
800760a: af00 add r7, sp, #0
|
|
800760c: 6078 str r0, [r7, #4]
|
|
800760e: 460b mov r3, r1
|
|
8007610: 70fb strb r3, [r7, #3]
|
|
if (address == 0U)
|
|
8007612: 78fb ldrb r3, [r7, #3]
|
|
8007614: 2b00 cmp r3, #0
|
|
8007616: d103 bne.n 8007620 <USB_SetDevAddress+0x1a>
|
|
{
|
|
/* set device address and enable function */
|
|
USBx->DADDR = (uint16_t)USB_DADDR_EF;
|
|
8007618: 687b ldr r3, [r7, #4]
|
|
800761a: 2280 movs r2, #128 ; 0x80
|
|
800761c: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
|
|
}
|
|
|
|
return HAL_OK;
|
|
8007620: 2300 movs r3, #0
|
|
}
|
|
8007622: 4618 mov r0, r3
|
|
8007624: 370c adds r7, #12
|
|
8007626: 46bd mov sp, r7
|
|
8007628: bc80 pop {r7}
|
|
800762a: 4770 bx lr
|
|
|
|
0800762c <USB_DevConnect>:
|
|
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
|
|
{
|
|
800762c: b480 push {r7}
|
|
800762e: b083 sub sp, #12
|
|
8007630: af00 add r7, sp, #0
|
|
8007632: 6078 str r0, [r7, #4]
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
8007634: 2300 movs r3, #0
|
|
}
|
|
8007636: 4618 mov r0, r3
|
|
8007638: 370c adds r7, #12
|
|
800763a: 46bd mov sp, r7
|
|
800763c: bc80 pop {r7}
|
|
800763e: 4770 bx lr
|
|
|
|
08007640 <USB_DevDisconnect>:
|
|
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
|
|
{
|
|
8007640: b480 push {r7}
|
|
8007642: b083 sub sp, #12
|
|
8007644: af00 add r7, sp, #0
|
|
8007646: 6078 str r0, [r7, #4]
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
8007648: 2300 movs r3, #0
|
|
}
|
|
800764a: 4618 mov r0, r3
|
|
800764c: 370c adds r7, #12
|
|
800764e: 46bd mov sp, r7
|
|
8007650: bc80 pop {r7}
|
|
8007652: 4770 bx lr
|
|
|
|
08007654 <USB_ReadInterrupts>:
|
|
* @brief USB_ReadInterrupts return the global USB interrupt status
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
|
|
{
|
|
8007654: b480 push {r7}
|
|
8007656: b085 sub sp, #20
|
|
8007658: af00 add r7, sp, #0
|
|
800765a: 6078 str r0, [r7, #4]
|
|
uint32_t tmpreg;
|
|
|
|
tmpreg = USBx->ISTR;
|
|
800765c: 687b ldr r3, [r7, #4]
|
|
800765e: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8007662: b29b uxth r3, r3
|
|
8007664: 60fb str r3, [r7, #12]
|
|
return tmpreg;
|
|
8007666: 68fb ldr r3, [r7, #12]
|
|
}
|
|
8007668: 4618 mov r0, r3
|
|
800766a: 3714 adds r7, #20
|
|
800766c: 46bd mov sp, r7
|
|
800766e: bc80 pop {r7}
|
|
8007670: 4770 bx lr
|
|
|
|
08007672 <USB_EP0_OutStart>:
|
|
* @param USBx Selected device
|
|
* @param psetup pointer to setup packet
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
|
|
{
|
|
8007672: b480 push {r7}
|
|
8007674: b083 sub sp, #12
|
|
8007676: af00 add r7, sp, #0
|
|
8007678: 6078 str r0, [r7, #4]
|
|
800767a: 6039 str r1, [r7, #0]
|
|
UNUSED(psetup);
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
return HAL_OK;
|
|
800767c: 2300 movs r3, #0
|
|
}
|
|
800767e: 4618 mov r0, r3
|
|
8007680: 370c adds r7, #12
|
|
8007682: 46bd mov sp, r7
|
|
8007684: bc80 pop {r7}
|
|
8007686: 4770 bx lr
|
|
|
|
08007688 <USB_WritePMA>:
|
|
* @param wPMABufAddr address into PMA.
|
|
* @param wNBytes no. of bytes to be copied.
|
|
* @retval None
|
|
*/
|
|
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
|
{
|
|
8007688: b480 push {r7}
|
|
800768a: b08d sub sp, #52 ; 0x34
|
|
800768c: af00 add r7, sp, #0
|
|
800768e: 60f8 str r0, [r7, #12]
|
|
8007690: 60b9 str r1, [r7, #8]
|
|
8007692: 4611 mov r1, r2
|
|
8007694: 461a mov r2, r3
|
|
8007696: 460b mov r3, r1
|
|
8007698: 80fb strh r3, [r7, #6]
|
|
800769a: 4613 mov r3, r2
|
|
800769c: 80bb strh r3, [r7, #4]
|
|
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
|
|
800769e: 88bb ldrh r3, [r7, #4]
|
|
80076a0: 3301 adds r3, #1
|
|
80076a2: 085b lsrs r3, r3, #1
|
|
80076a4: 623b str r3, [r7, #32]
|
|
uint32_t BaseAddr = (uint32_t)USBx;
|
|
80076a6: 68fb ldr r3, [r7, #12]
|
|
80076a8: 61fb str r3, [r7, #28]
|
|
uint32_t i, temp1, temp2;
|
|
__IO uint16_t *pdwVal;
|
|
uint8_t *pBuf = pbUsrBuf;
|
|
80076aa: 68bb ldr r3, [r7, #8]
|
|
80076ac: 627b str r3, [r7, #36] ; 0x24
|
|
|
|
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
|
80076ae: 88fb ldrh r3, [r7, #6]
|
|
80076b0: 005a lsls r2, r3, #1
|
|
80076b2: 69fb ldr r3, [r7, #28]
|
|
80076b4: 4413 add r3, r2
|
|
80076b6: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80076ba: 62bb str r3, [r7, #40] ; 0x28
|
|
|
|
for (i = n; i != 0U; i--)
|
|
80076bc: 6a3b ldr r3, [r7, #32]
|
|
80076be: 62fb str r3, [r7, #44] ; 0x2c
|
|
80076c0: e01e b.n 8007700 <USB_WritePMA+0x78>
|
|
{
|
|
temp1 = *pBuf;
|
|
80076c2: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80076c4: 781b ldrb r3, [r3, #0]
|
|
80076c6: 61bb str r3, [r7, #24]
|
|
pBuf++;
|
|
80076c8: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80076ca: 3301 adds r3, #1
|
|
80076cc: 627b str r3, [r7, #36] ; 0x24
|
|
temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8));
|
|
80076ce: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80076d0: 781b ldrb r3, [r3, #0]
|
|
80076d2: b29b uxth r3, r3
|
|
80076d4: 021b lsls r3, r3, #8
|
|
80076d6: b29b uxth r3, r3
|
|
80076d8: 461a mov r2, r3
|
|
80076da: 69bb ldr r3, [r7, #24]
|
|
80076dc: 4313 orrs r3, r2
|
|
80076de: 617b str r3, [r7, #20]
|
|
*pdwVal = (uint16_t)temp2;
|
|
80076e0: 697b ldr r3, [r7, #20]
|
|
80076e2: b29a uxth r2, r3
|
|
80076e4: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80076e6: 801a strh r2, [r3, #0]
|
|
pdwVal++;
|
|
80076e8: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80076ea: 3302 adds r3, #2
|
|
80076ec: 62bb str r3, [r7, #40] ; 0x28
|
|
|
|
#if PMA_ACCESS > 1U
|
|
pdwVal++;
|
|
80076ee: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80076f0: 3302 adds r3, #2
|
|
80076f2: 62bb str r3, [r7, #40] ; 0x28
|
|
#endif
|
|
|
|
pBuf++;
|
|
80076f4: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80076f6: 3301 adds r3, #1
|
|
80076f8: 627b str r3, [r7, #36] ; 0x24
|
|
for (i = n; i != 0U; i--)
|
|
80076fa: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
80076fc: 3b01 subs r3, #1
|
|
80076fe: 62fb str r3, [r7, #44] ; 0x2c
|
|
8007700: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8007702: 2b00 cmp r3, #0
|
|
8007704: d1dd bne.n 80076c2 <USB_WritePMA+0x3a>
|
|
}
|
|
}
|
|
8007706: bf00 nop
|
|
8007708: 3734 adds r7, #52 ; 0x34
|
|
800770a: 46bd mov sp, r7
|
|
800770c: bc80 pop {r7}
|
|
800770e: 4770 bx lr
|
|
|
|
08007710 <USB_ReadPMA>:
|
|
* @param wPMABufAddr address into PMA.
|
|
* @param wNBytes no. of bytes to be copied.
|
|
* @retval None
|
|
*/
|
|
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
|
{
|
|
8007710: b480 push {r7}
|
|
8007712: b08b sub sp, #44 ; 0x2c
|
|
8007714: af00 add r7, sp, #0
|
|
8007716: 60f8 str r0, [r7, #12]
|
|
8007718: 60b9 str r1, [r7, #8]
|
|
800771a: 4611 mov r1, r2
|
|
800771c: 461a mov r2, r3
|
|
800771e: 460b mov r3, r1
|
|
8007720: 80fb strh r3, [r7, #6]
|
|
8007722: 4613 mov r3, r2
|
|
8007724: 80bb strh r3, [r7, #4]
|
|
uint32_t n = (uint32_t)wNBytes >> 1;
|
|
8007726: 88bb ldrh r3, [r7, #4]
|
|
8007728: 085b lsrs r3, r3, #1
|
|
800772a: b29b uxth r3, r3
|
|
800772c: 61bb str r3, [r7, #24]
|
|
uint32_t BaseAddr = (uint32_t)USBx;
|
|
800772e: 68fb ldr r3, [r7, #12]
|
|
8007730: 617b str r3, [r7, #20]
|
|
uint32_t i, temp;
|
|
__IO uint16_t *pdwVal;
|
|
uint8_t *pBuf = pbUsrBuf;
|
|
8007732: 68bb ldr r3, [r7, #8]
|
|
8007734: 61fb str r3, [r7, #28]
|
|
|
|
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
|
8007736: 88fb ldrh r3, [r7, #6]
|
|
8007738: 005a lsls r2, r3, #1
|
|
800773a: 697b ldr r3, [r7, #20]
|
|
800773c: 4413 add r3, r2
|
|
800773e: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007742: 623b str r3, [r7, #32]
|
|
|
|
for (i = n; i != 0U; i--)
|
|
8007744: 69bb ldr r3, [r7, #24]
|
|
8007746: 627b str r3, [r7, #36] ; 0x24
|
|
8007748: e01b b.n 8007782 <USB_ReadPMA+0x72>
|
|
{
|
|
temp = *(__IO uint16_t *)pdwVal;
|
|
800774a: 6a3b ldr r3, [r7, #32]
|
|
800774c: 881b ldrh r3, [r3, #0]
|
|
800774e: b29b uxth r3, r3
|
|
8007750: 613b str r3, [r7, #16]
|
|
pdwVal++;
|
|
8007752: 6a3b ldr r3, [r7, #32]
|
|
8007754: 3302 adds r3, #2
|
|
8007756: 623b str r3, [r7, #32]
|
|
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
|
8007758: 693b ldr r3, [r7, #16]
|
|
800775a: b2da uxtb r2, r3
|
|
800775c: 69fb ldr r3, [r7, #28]
|
|
800775e: 701a strb r2, [r3, #0]
|
|
pBuf++;
|
|
8007760: 69fb ldr r3, [r7, #28]
|
|
8007762: 3301 adds r3, #1
|
|
8007764: 61fb str r3, [r7, #28]
|
|
*pBuf = (uint8_t)((temp >> 8) & 0xFFU);
|
|
8007766: 693b ldr r3, [r7, #16]
|
|
8007768: 0a1b lsrs r3, r3, #8
|
|
800776a: b2da uxtb r2, r3
|
|
800776c: 69fb ldr r3, [r7, #28]
|
|
800776e: 701a strb r2, [r3, #0]
|
|
pBuf++;
|
|
8007770: 69fb ldr r3, [r7, #28]
|
|
8007772: 3301 adds r3, #1
|
|
8007774: 61fb str r3, [r7, #28]
|
|
|
|
#if PMA_ACCESS > 1U
|
|
pdwVal++;
|
|
8007776: 6a3b ldr r3, [r7, #32]
|
|
8007778: 3302 adds r3, #2
|
|
800777a: 623b str r3, [r7, #32]
|
|
for (i = n; i != 0U; i--)
|
|
800777c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800777e: 3b01 subs r3, #1
|
|
8007780: 627b str r3, [r7, #36] ; 0x24
|
|
8007782: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8007784: 2b00 cmp r3, #0
|
|
8007786: d1e0 bne.n 800774a <USB_ReadPMA+0x3a>
|
|
#endif
|
|
}
|
|
|
|
if ((wNBytes % 2U) != 0U)
|
|
8007788: 88bb ldrh r3, [r7, #4]
|
|
800778a: f003 0301 and.w r3, r3, #1
|
|
800778e: b29b uxth r3, r3
|
|
8007790: 2b00 cmp r3, #0
|
|
8007792: d007 beq.n 80077a4 <USB_ReadPMA+0x94>
|
|
{
|
|
temp = *pdwVal;
|
|
8007794: 6a3b ldr r3, [r7, #32]
|
|
8007796: 881b ldrh r3, [r3, #0]
|
|
8007798: b29b uxth r3, r3
|
|
800779a: 613b str r3, [r7, #16]
|
|
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
|
800779c: 693b ldr r3, [r7, #16]
|
|
800779e: b2da uxtb r2, r3
|
|
80077a0: 69fb ldr r3, [r7, #28]
|
|
80077a2: 701a strb r2, [r3, #0]
|
|
}
|
|
}
|
|
80077a4: bf00 nop
|
|
80077a6: 372c adds r7, #44 ; 0x2c
|
|
80077a8: 46bd mov sp, r7
|
|
80077aa: bc80 pop {r7}
|
|
80077ac: 4770 bx lr
|
|
|
|
080077ae <USBD_MSC_Init>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: configuration index
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_MSC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
80077ae: b580 push {r7, lr}
|
|
80077b0: b082 sub sp, #8
|
|
80077b2: af00 add r7, sp, #0
|
|
80077b4: 6078 str r0, [r7, #4]
|
|
80077b6: 460b mov r3, r1
|
|
80077b8: 70fb strb r3, [r7, #3]
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
80077ba: 687b ldr r3, [r7, #4]
|
|
80077bc: 7c1b ldrb r3, [r3, #16]
|
|
80077be: 2b00 cmp r3, #0
|
|
80077c0: d115 bne.n 80077ee <USBD_MSC_Init+0x40>
|
|
{
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_HS_PACKET);
|
|
80077c2: f44f 7300 mov.w r3, #512 ; 0x200
|
|
80077c6: 2202 movs r2, #2
|
|
80077c8: 2101 movs r1, #1
|
|
80077ca: 6878 ldr r0, [r7, #4]
|
|
80077cc: f002 fd75 bl 800a2ba <USBD_LL_OpenEP>
|
|
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 1U;
|
|
80077d0: 687b ldr r3, [r7, #4]
|
|
80077d2: 2201 movs r2, #1
|
|
80077d4: f8c3 216c str.w r2, [r3, #364] ; 0x16c
|
|
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_HS_PACKET);
|
|
80077d8: f44f 7300 mov.w r3, #512 ; 0x200
|
|
80077dc: 2202 movs r2, #2
|
|
80077de: 2181 movs r1, #129 ; 0x81
|
|
80077e0: 6878 ldr r0, [r7, #4]
|
|
80077e2: f002 fd6a bl 800a2ba <USBD_LL_OpenEP>
|
|
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 1U;
|
|
80077e6: 687b ldr r3, [r7, #4]
|
|
80077e8: 2201 movs r2, #1
|
|
80077ea: 62da str r2, [r3, #44] ; 0x2c
|
|
80077ec: e012 b.n 8007814 <USBD_MSC_Init+0x66>
|
|
}
|
|
else
|
|
{
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_FS_PACKET);
|
|
80077ee: 2340 movs r3, #64 ; 0x40
|
|
80077f0: 2202 movs r2, #2
|
|
80077f2: 2101 movs r1, #1
|
|
80077f4: 6878 ldr r0, [r7, #4]
|
|
80077f6: f002 fd60 bl 800a2ba <USBD_LL_OpenEP>
|
|
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 1U;
|
|
80077fa: 687b ldr r3, [r7, #4]
|
|
80077fc: 2201 movs r2, #1
|
|
80077fe: f8c3 216c str.w r2, [r3, #364] ; 0x16c
|
|
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_FS_PACKET);
|
|
8007802: 2340 movs r3, #64 ; 0x40
|
|
8007804: 2202 movs r2, #2
|
|
8007806: 2181 movs r1, #129 ; 0x81
|
|
8007808: 6878 ldr r0, [r7, #4]
|
|
800780a: f002 fd56 bl 800a2ba <USBD_LL_OpenEP>
|
|
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 1U;
|
|
800780e: 687b ldr r3, [r7, #4]
|
|
8007810: 2201 movs r2, #1
|
|
8007812: 62da str r2, [r3, #44] ; 0x2c
|
|
}
|
|
pdev->pClassData = USBD_malloc(sizeof(USBD_MSC_BOT_HandleTypeDef));
|
|
8007814: f44f 701b mov.w r0, #620 ; 0x26c
|
|
8007818: f002 fe96 bl 800a548 <USBD_static_malloc>
|
|
800781c: 4602 mov r2, r0
|
|
800781e: 687b ldr r3, [r7, #4]
|
|
8007820: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
|
|
|
|
if (pdev->pClassData == NULL)
|
|
8007824: 687b ldr r3, [r7, #4]
|
|
8007826: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800782a: 2b00 cmp r3, #0
|
|
800782c: d101 bne.n 8007832 <USBD_MSC_Init+0x84>
|
|
{
|
|
return USBD_FAIL;
|
|
800782e: 2302 movs r3, #2
|
|
8007830: e003 b.n 800783a <USBD_MSC_Init+0x8c>
|
|
}
|
|
|
|
/* Init the BOT layer */
|
|
MSC_BOT_Init(pdev);
|
|
8007832: 6878 ldr r0, [r7, #4]
|
|
8007834: f000 f9da bl 8007bec <MSC_BOT_Init>
|
|
|
|
return USBD_OK;
|
|
8007838: 2300 movs r3, #0
|
|
}
|
|
800783a: 4618 mov r0, r3
|
|
800783c: 3708 adds r7, #8
|
|
800783e: 46bd mov sp, r7
|
|
8007840: bd80 pop {r7, pc}
|
|
|
|
08007842 <USBD_MSC_DeInit>:
|
|
* @param cfgidx: configuration index
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_MSC_DeInit(USBD_HandleTypeDef *pdev,
|
|
uint8_t cfgidx)
|
|
{
|
|
8007842: b580 push {r7, lr}
|
|
8007844: b082 sub sp, #8
|
|
8007846: af00 add r7, sp, #0
|
|
8007848: 6078 str r0, [r7, #4]
|
|
800784a: 460b mov r3, r1
|
|
800784c: 70fb strb r3, [r7, #3]
|
|
/* Close MSC EPs */
|
|
USBD_LL_CloseEP(pdev, MSC_EPOUT_ADDR);
|
|
800784e: 2101 movs r1, #1
|
|
8007850: 6878 ldr r0, [r7, #4]
|
|
8007852: f002 fd58 bl 800a306 <USBD_LL_CloseEP>
|
|
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 0U;
|
|
8007856: 687b ldr r3, [r7, #4]
|
|
8007858: 2200 movs r2, #0
|
|
800785a: f8c3 216c str.w r2, [r3, #364] ; 0x16c
|
|
|
|
/* Close EP IN */
|
|
USBD_LL_CloseEP(pdev, MSC_EPIN_ADDR);
|
|
800785e: 2181 movs r1, #129 ; 0x81
|
|
8007860: 6878 ldr r0, [r7, #4]
|
|
8007862: f002 fd50 bl 800a306 <USBD_LL_CloseEP>
|
|
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 0U;
|
|
8007866: 687b ldr r3, [r7, #4]
|
|
8007868: 2200 movs r2, #0
|
|
800786a: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* De-Init the BOT layer */
|
|
MSC_BOT_DeInit(pdev);
|
|
800786c: 6878 ldr r0, [r7, #4]
|
|
800786e: f000 fa07 bl 8007c80 <MSC_BOT_DeInit>
|
|
|
|
/* Free MSC Class Resources */
|
|
if (pdev->pClassData != NULL)
|
|
8007872: 687b ldr r3, [r7, #4]
|
|
8007874: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007878: 2b00 cmp r3, #0
|
|
800787a: d009 beq.n 8007890 <USBD_MSC_DeInit+0x4e>
|
|
{
|
|
USBD_free(pdev->pClassData);
|
|
800787c: 687b ldr r3, [r7, #4]
|
|
800787e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007882: 4618 mov r0, r3
|
|
8007884: f002 fe6c bl 800a560 <USBD_static_free>
|
|
pdev->pClassData = NULL;
|
|
8007888: 687b ldr r3, [r7, #4]
|
|
800788a: 2200 movs r2, #0
|
|
800788c: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007890: 2300 movs r3, #0
|
|
}
|
|
8007892: 4618 mov r0, r3
|
|
8007894: 3708 adds r7, #8
|
|
8007896: 46bd mov sp, r7
|
|
8007898: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800789c <USBD_MSC_Setup>:
|
|
* @param pdev: device instance
|
|
* @param req: USB request
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_MSC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
800789c: b580 push {r7, lr}
|
|
800789e: b086 sub sp, #24
|
|
80078a0: af00 add r7, sp, #0
|
|
80078a2: 6078 str r0, [r7, #4]
|
|
80078a4: 6039 str r1, [r7, #0]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
|
|
80078a6: 687b ldr r3, [r7, #4]
|
|
80078a8: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
80078ac: 613b str r3, [r7, #16]
|
|
uint8_t ret = USBD_OK;
|
|
80078ae: 2300 movs r3, #0
|
|
80078b0: 75fb strb r3, [r7, #23]
|
|
uint16_t status_info = 0U;
|
|
80078b2: 2300 movs r3, #0
|
|
80078b4: 81fb strh r3, [r7, #14]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
80078b6: 683b ldr r3, [r7, #0]
|
|
80078b8: 781b ldrb r3, [r3, #0]
|
|
80078ba: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
80078be: 2b00 cmp r3, #0
|
|
80078c0: d04d beq.n 800795e <USBD_MSC_Setup+0xc2>
|
|
80078c2: 2b20 cmp r3, #32
|
|
80078c4: f040 8113 bne.w 8007aee <USBD_MSC_Setup+0x252>
|
|
{
|
|
/* Class request */
|
|
case USB_REQ_TYPE_CLASS:
|
|
switch (req->bRequest)
|
|
80078c8: 683b ldr r3, [r7, #0]
|
|
80078ca: 785b ldrb r3, [r3, #1]
|
|
80078cc: 2bfe cmp r3, #254 ; 0xfe
|
|
80078ce: d002 beq.n 80078d6 <USBD_MSC_Setup+0x3a>
|
|
80078d0: 2bff cmp r3, #255 ; 0xff
|
|
80078d2: d024 beq.n 800791e <USBD_MSC_Setup+0x82>
|
|
80078d4: e03b b.n 800794e <USBD_MSC_Setup+0xb2>
|
|
{
|
|
case BOT_GET_MAX_LUN:
|
|
if ((req->wValue == 0U) && (req->wLength == 1U) &&
|
|
80078d6: 683b ldr r3, [r7, #0]
|
|
80078d8: 885b ldrh r3, [r3, #2]
|
|
80078da: 2b00 cmp r3, #0
|
|
80078dc: d118 bne.n 8007910 <USBD_MSC_Setup+0x74>
|
|
80078de: 683b ldr r3, [r7, #0]
|
|
80078e0: 88db ldrh r3, [r3, #6]
|
|
80078e2: 2b01 cmp r3, #1
|
|
80078e4: d114 bne.n 8007910 <USBD_MSC_Setup+0x74>
|
|
((req->bmRequest & 0x80U) == 0x80U))
|
|
80078e6: 683b ldr r3, [r7, #0]
|
|
80078e8: 781b ldrb r3, [r3, #0]
|
|
80078ea: b25b sxtb r3, r3
|
|
if ((req->wValue == 0U) && (req->wLength == 1U) &&
|
|
80078ec: 2b00 cmp r3, #0
|
|
80078ee: da0f bge.n 8007910 <USBD_MSC_Setup+0x74>
|
|
{
|
|
hmsc->max_lun = (uint32_t)((USBD_StorageTypeDef *)pdev->pUserData)->GetMaxLun();
|
|
80078f0: 687b ldr r3, [r7, #4]
|
|
80078f2: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
80078f6: 699b ldr r3, [r3, #24]
|
|
80078f8: 4798 blx r3
|
|
80078fa: 4603 mov r3, r0
|
|
80078fc: 461a mov r2, r3
|
|
80078fe: 693b ldr r3, [r7, #16]
|
|
8007900: 601a str r2, [r3, #0]
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&hmsc->max_lun, 1U);
|
|
8007902: 693b ldr r3, [r7, #16]
|
|
8007904: 2201 movs r2, #1
|
|
8007906: 4619 mov r1, r3
|
|
8007908: 6878 ldr r0, [r7, #4]
|
|
800790a: f002 f983 bl 8009c14 <USBD_CtlSendData>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
800790e: e025 b.n 800795c <USBD_MSC_Setup+0xc0>
|
|
USBD_CtlError(pdev, req);
|
|
8007910: 6839 ldr r1, [r7, #0]
|
|
8007912: 6878 ldr r0, [r7, #4]
|
|
8007914: f002 f914 bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8007918: 2302 movs r3, #2
|
|
800791a: 75fb strb r3, [r7, #23]
|
|
break;
|
|
800791c: e01e b.n 800795c <USBD_MSC_Setup+0xc0>
|
|
|
|
case BOT_RESET :
|
|
if ((req->wValue == 0U) && (req->wLength == 0U) &&
|
|
800791e: 683b ldr r3, [r7, #0]
|
|
8007920: 885b ldrh r3, [r3, #2]
|
|
8007922: 2b00 cmp r3, #0
|
|
8007924: d10c bne.n 8007940 <USBD_MSC_Setup+0xa4>
|
|
8007926: 683b ldr r3, [r7, #0]
|
|
8007928: 88db ldrh r3, [r3, #6]
|
|
800792a: 2b00 cmp r3, #0
|
|
800792c: d108 bne.n 8007940 <USBD_MSC_Setup+0xa4>
|
|
((req->bmRequest & 0x80U) != 0x80U))
|
|
800792e: 683b ldr r3, [r7, #0]
|
|
8007930: 781b ldrb r3, [r3, #0]
|
|
8007932: b25b sxtb r3, r3
|
|
if ((req->wValue == 0U) && (req->wLength == 0U) &&
|
|
8007934: 2b00 cmp r3, #0
|
|
8007936: db03 blt.n 8007940 <USBD_MSC_Setup+0xa4>
|
|
{
|
|
MSC_BOT_Reset(pdev);
|
|
8007938: 6878 ldr r0, [r7, #4]
|
|
800793a: f000 f987 bl 8007c4c <MSC_BOT_Reset>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
800793e: e00d b.n 800795c <USBD_MSC_Setup+0xc0>
|
|
USBD_CtlError(pdev, req);
|
|
8007940: 6839 ldr r1, [r7, #0]
|
|
8007942: 6878 ldr r0, [r7, #4]
|
|
8007944: f002 f8fc bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8007948: 2302 movs r3, #2
|
|
800794a: 75fb strb r3, [r7, #23]
|
|
break;
|
|
800794c: e006 b.n 800795c <USBD_MSC_Setup+0xc0>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800794e: 6839 ldr r1, [r7, #0]
|
|
8007950: 6878 ldr r0, [r7, #4]
|
|
8007952: f002 f8f5 bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8007956: 2302 movs r3, #2
|
|
8007958: 75fb strb r3, [r7, #23]
|
|
break;
|
|
800795a: bf00 nop
|
|
}
|
|
break;
|
|
800795c: e0ce b.n 8007afc <USBD_MSC_Setup+0x260>
|
|
/* Interface & Endpoint request */
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (req->bRequest)
|
|
800795e: 683b ldr r3, [r7, #0]
|
|
8007960: 785b ldrb r3, [r3, #1]
|
|
8007962: 2b0b cmp r3, #11
|
|
8007964: f200 80bb bhi.w 8007ade <USBD_MSC_Setup+0x242>
|
|
8007968: a201 add r2, pc, #4 ; (adr r2, 8007970 <USBD_MSC_Setup+0xd4>)
|
|
800796a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800796e: bf00 nop
|
|
8007970: 080079a1 .word 0x080079a1
|
|
8007974: 08007a17 .word 0x08007a17
|
|
8007978: 08007adf .word 0x08007adf
|
|
800797c: 08007adf .word 0x08007adf
|
|
8007980: 08007adf .word 0x08007adf
|
|
8007984: 08007adf .word 0x08007adf
|
|
8007988: 08007adf .word 0x08007adf
|
|
800798c: 08007adf .word 0x08007adf
|
|
8007990: 08007adf .word 0x08007adf
|
|
8007994: 08007adf .word 0x08007adf
|
|
8007998: 080079c9 .word 0x080079c9
|
|
800799c: 080079f1 .word 0x080079f1
|
|
{
|
|
case USB_REQ_GET_STATUS:
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
80079a0: 687b ldr r3, [r7, #4]
|
|
80079a2: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80079a6: 2b03 cmp r3, #3
|
|
80079a8: d107 bne.n 80079ba <USBD_MSC_Setup+0x11e>
|
|
{
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
|
|
80079aa: f107 030e add.w r3, r7, #14
|
|
80079ae: 2202 movs r2, #2
|
|
80079b0: 4619 mov r1, r3
|
|
80079b2: 6878 ldr r0, [r7, #4]
|
|
80079b4: f002 f92e bl 8009c14 <USBD_CtlSendData>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
80079b8: e098 b.n 8007aec <USBD_MSC_Setup+0x250>
|
|
USBD_CtlError(pdev, req);
|
|
80079ba: 6839 ldr r1, [r7, #0]
|
|
80079bc: 6878 ldr r0, [r7, #4]
|
|
80079be: f002 f8bf bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
80079c2: 2302 movs r3, #2
|
|
80079c4: 75fb strb r3, [r7, #23]
|
|
break;
|
|
80079c6: e091 b.n 8007aec <USBD_MSC_Setup+0x250>
|
|
|
|
case USB_REQ_GET_INTERFACE:
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
80079c8: 687b ldr r3, [r7, #4]
|
|
80079ca: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80079ce: 2b03 cmp r3, #3
|
|
80079d0: d107 bne.n 80079e2 <USBD_MSC_Setup+0x146>
|
|
{
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&hmsc->interface, 1U);
|
|
80079d2: 693b ldr r3, [r7, #16]
|
|
80079d4: 3304 adds r3, #4
|
|
80079d6: 2201 movs r2, #1
|
|
80079d8: 4619 mov r1, r3
|
|
80079da: 6878 ldr r0, [r7, #4]
|
|
80079dc: f002 f91a bl 8009c14 <USBD_CtlSendData>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
80079e0: e084 b.n 8007aec <USBD_MSC_Setup+0x250>
|
|
USBD_CtlError(pdev, req);
|
|
80079e2: 6839 ldr r1, [r7, #0]
|
|
80079e4: 6878 ldr r0, [r7, #4]
|
|
80079e6: f002 f8ab bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
80079ea: 2302 movs r3, #2
|
|
80079ec: 75fb strb r3, [r7, #23]
|
|
break;
|
|
80079ee: e07d b.n 8007aec <USBD_MSC_Setup+0x250>
|
|
|
|
case USB_REQ_SET_INTERFACE:
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
80079f0: 687b ldr r3, [r7, #4]
|
|
80079f2: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80079f6: 2b03 cmp r3, #3
|
|
80079f8: d106 bne.n 8007a08 <USBD_MSC_Setup+0x16c>
|
|
{
|
|
hmsc->interface = (uint8_t)(req->wValue);
|
|
80079fa: 683b ldr r3, [r7, #0]
|
|
80079fc: 885b ldrh r3, [r3, #2]
|
|
80079fe: b2db uxtb r3, r3
|
|
8007a00: 461a mov r2, r3
|
|
8007a02: 693b ldr r3, [r7, #16]
|
|
8007a04: 605a str r2, [r3, #4]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
8007a06: e071 b.n 8007aec <USBD_MSC_Setup+0x250>
|
|
USBD_CtlError(pdev, req);
|
|
8007a08: 6839 ldr r1, [r7, #0]
|
|
8007a0a: 6878 ldr r0, [r7, #4]
|
|
8007a0c: f002 f898 bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8007a10: 2302 movs r3, #2
|
|
8007a12: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8007a14: e06a b.n 8007aec <USBD_MSC_Setup+0x250>
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
|
|
/* Flush the FIFO and Clear the stall status */
|
|
USBD_LL_FlushEP(pdev, (uint8_t)req->wIndex);
|
|
8007a16: 683b ldr r3, [r7, #0]
|
|
8007a18: 889b ldrh r3, [r3, #4]
|
|
8007a1a: b2db uxtb r3, r3
|
|
8007a1c: 4619 mov r1, r3
|
|
8007a1e: 6878 ldr r0, [r7, #4]
|
|
8007a20: f002 fc90 bl 800a344 <USBD_LL_FlushEP>
|
|
|
|
/* Reactivate the EP */
|
|
USBD_LL_CloseEP(pdev, (uint8_t)req->wIndex);
|
|
8007a24: 683b ldr r3, [r7, #0]
|
|
8007a26: 889b ldrh r3, [r3, #4]
|
|
8007a28: b2db uxtb r3, r3
|
|
8007a2a: 4619 mov r1, r3
|
|
8007a2c: 6878 ldr r0, [r7, #4]
|
|
8007a2e: f002 fc6a bl 800a306 <USBD_LL_CloseEP>
|
|
if ((((uint8_t)req->wIndex) & 0x80U) == 0x80U)
|
|
8007a32: 683b ldr r3, [r7, #0]
|
|
8007a34: 889b ldrh r3, [r3, #4]
|
|
8007a36: b25b sxtb r3, r3
|
|
8007a38: 2b00 cmp r3, #0
|
|
8007a3a: da23 bge.n 8007a84 <USBD_MSC_Setup+0x1e8>
|
|
{
|
|
pdev->ep_in[(uint8_t)req->wIndex & 0xFU].is_used = 0U;
|
|
8007a3c: 683b ldr r3, [r7, #0]
|
|
8007a3e: 889b ldrh r3, [r3, #4]
|
|
8007a40: b2db uxtb r3, r3
|
|
8007a42: f003 020f and.w r2, r3, #15
|
|
8007a46: 6879 ldr r1, [r7, #4]
|
|
8007a48: 4613 mov r3, r2
|
|
8007a4a: 009b lsls r3, r3, #2
|
|
8007a4c: 4413 add r3, r2
|
|
8007a4e: 009b lsls r3, r3, #2
|
|
8007a50: 440b add r3, r1
|
|
8007a52: 3318 adds r3, #24
|
|
8007a54: 2200 movs r2, #0
|
|
8007a56: 601a str r2, [r3, #0]
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8007a58: 687b ldr r3, [r7, #4]
|
|
8007a5a: 7c1b ldrb r3, [r3, #16]
|
|
8007a5c: 2b00 cmp r3, #0
|
|
8007a5e: d107 bne.n 8007a70 <USBD_MSC_Setup+0x1d4>
|
|
{
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK,
|
|
8007a60: f44f 7300 mov.w r3, #512 ; 0x200
|
|
8007a64: 2202 movs r2, #2
|
|
8007a66: 2181 movs r1, #129 ; 0x81
|
|
8007a68: 6878 ldr r0, [r7, #4]
|
|
8007a6a: f002 fc26 bl 800a2ba <USBD_LL_OpenEP>
|
|
8007a6e: e005 b.n 8007a7c <USBD_MSC_Setup+0x1e0>
|
|
MSC_MAX_HS_PACKET);
|
|
}
|
|
else
|
|
{
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK,
|
|
8007a70: 2340 movs r3, #64 ; 0x40
|
|
8007a72: 2202 movs r2, #2
|
|
8007a74: 2181 movs r1, #129 ; 0x81
|
|
8007a76: 6878 ldr r0, [r7, #4]
|
|
8007a78: f002 fc1f bl 800a2ba <USBD_LL_OpenEP>
|
|
MSC_MAX_FS_PACKET);
|
|
}
|
|
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 1U;
|
|
8007a7c: 687b ldr r3, [r7, #4]
|
|
8007a7e: 2201 movs r2, #1
|
|
8007a80: 62da str r2, [r3, #44] ; 0x2c
|
|
8007a82: e024 b.n 8007ace <USBD_MSC_Setup+0x232>
|
|
}
|
|
else
|
|
{
|
|
pdev->ep_out[(uint8_t)req->wIndex & 0xFU].is_used = 0U;
|
|
8007a84: 683b ldr r3, [r7, #0]
|
|
8007a86: 889b ldrh r3, [r3, #4]
|
|
8007a88: b2db uxtb r3, r3
|
|
8007a8a: f003 020f and.w r2, r3, #15
|
|
8007a8e: 6879 ldr r1, [r7, #4]
|
|
8007a90: 4613 mov r3, r2
|
|
8007a92: 009b lsls r3, r3, #2
|
|
8007a94: 4413 add r3, r2
|
|
8007a96: 009b lsls r3, r3, #2
|
|
8007a98: 440b add r3, r1
|
|
8007a9a: f503 73ac add.w r3, r3, #344 ; 0x158
|
|
8007a9e: 2200 movs r2, #0
|
|
8007aa0: 601a str r2, [r3, #0]
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8007aa2: 687b ldr r3, [r7, #4]
|
|
8007aa4: 7c1b ldrb r3, [r3, #16]
|
|
8007aa6: 2b00 cmp r3, #0
|
|
8007aa8: d107 bne.n 8007aba <USBD_MSC_Setup+0x21e>
|
|
{
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK,
|
|
8007aaa: f44f 7300 mov.w r3, #512 ; 0x200
|
|
8007aae: 2202 movs r2, #2
|
|
8007ab0: 2101 movs r1, #1
|
|
8007ab2: 6878 ldr r0, [r7, #4]
|
|
8007ab4: f002 fc01 bl 800a2ba <USBD_LL_OpenEP>
|
|
8007ab8: e005 b.n 8007ac6 <USBD_MSC_Setup+0x22a>
|
|
MSC_MAX_HS_PACKET);
|
|
}
|
|
else
|
|
{
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK,
|
|
8007aba: 2340 movs r3, #64 ; 0x40
|
|
8007abc: 2202 movs r2, #2
|
|
8007abe: 2101 movs r1, #1
|
|
8007ac0: 6878 ldr r0, [r7, #4]
|
|
8007ac2: f002 fbfa bl 800a2ba <USBD_LL_OpenEP>
|
|
MSC_MAX_FS_PACKET);
|
|
}
|
|
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 1U;
|
|
8007ac6: 687b ldr r3, [r7, #4]
|
|
8007ac8: 2201 movs r2, #1
|
|
8007aca: f8c3 216c str.w r2, [r3, #364] ; 0x16c
|
|
}
|
|
|
|
/* Handle BOT error */
|
|
MSC_BOT_CplClrFeature(pdev, (uint8_t)req->wIndex);
|
|
8007ace: 683b ldr r3, [r7, #0]
|
|
8007ad0: 889b ldrh r3, [r3, #4]
|
|
8007ad2: b2db uxtb r3, r3
|
|
8007ad4: 4619 mov r1, r3
|
|
8007ad6: 6878 ldr r0, [r7, #4]
|
|
8007ad8: f000 fa50 bl 8007f7c <MSC_BOT_CplClrFeature>
|
|
break;
|
|
8007adc: e006 b.n 8007aec <USBD_MSC_Setup+0x250>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007ade: 6839 ldr r1, [r7, #0]
|
|
8007ae0: 6878 ldr r0, [r7, #4]
|
|
8007ae2: f002 f82d bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8007ae6: 2302 movs r3, #2
|
|
8007ae8: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8007aea: bf00 nop
|
|
}
|
|
break;
|
|
8007aec: e006 b.n 8007afc <USBD_MSC_Setup+0x260>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007aee: 6839 ldr r1, [r7, #0]
|
|
8007af0: 6878 ldr r0, [r7, #4]
|
|
8007af2: f002 f825 bl 8009b40 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8007af6: 2302 movs r3, #2
|
|
8007af8: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8007afa: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
8007afc: 7dfb ldrb r3, [r7, #23]
|
|
}
|
|
8007afe: 4618 mov r0, r3
|
|
8007b00: 3718 adds r7, #24
|
|
8007b02: 46bd mov sp, r7
|
|
8007b04: bd80 pop {r7, pc}
|
|
8007b06: bf00 nop
|
|
|
|
08007b08 <USBD_MSC_DataIn>:
|
|
* @param pdev: device instance
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_MSC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
|
|
{
|
|
8007b08: b580 push {r7, lr}
|
|
8007b0a: b082 sub sp, #8
|
|
8007b0c: af00 add r7, sp, #0
|
|
8007b0e: 6078 str r0, [r7, #4]
|
|
8007b10: 460b mov r3, r1
|
|
8007b12: 70fb strb r3, [r7, #3]
|
|
MSC_BOT_DataIn(pdev, epnum);
|
|
8007b14: 78fb ldrb r3, [r7, #3]
|
|
8007b16: 4619 mov r1, r3
|
|
8007b18: 6878 ldr r0, [r7, #4]
|
|
8007b1a: f000 f8c1 bl 8007ca0 <MSC_BOT_DataIn>
|
|
|
|
return USBD_OK;
|
|
8007b1e: 2300 movs r3, #0
|
|
}
|
|
8007b20: 4618 mov r0, r3
|
|
8007b22: 3708 adds r7, #8
|
|
8007b24: 46bd mov sp, r7
|
|
8007b26: bd80 pop {r7, pc}
|
|
|
|
08007b28 <USBD_MSC_DataOut>:
|
|
* @param pdev: device instance
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_MSC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
|
|
{
|
|
8007b28: b580 push {r7, lr}
|
|
8007b2a: b082 sub sp, #8
|
|
8007b2c: af00 add r7, sp, #0
|
|
8007b2e: 6078 str r0, [r7, #4]
|
|
8007b30: 460b mov r3, r1
|
|
8007b32: 70fb strb r3, [r7, #3]
|
|
MSC_BOT_DataOut(pdev, epnum);
|
|
8007b34: 78fb ldrb r3, [r7, #3]
|
|
8007b36: 4619 mov r1, r3
|
|
8007b38: 6878 ldr r0, [r7, #4]
|
|
8007b3a: f000 f8e2 bl 8007d02 <MSC_BOT_DataOut>
|
|
|
|
return USBD_OK;
|
|
8007b3e: 2300 movs r3, #0
|
|
}
|
|
8007b40: 4618 mov r0, r3
|
|
8007b42: 3708 adds r7, #8
|
|
8007b44: 46bd mov sp, r7
|
|
8007b46: bd80 pop {r7, pc}
|
|
|
|
08007b48 <USBD_MSC_GetHSCfgDesc>:
|
|
* return configuration descriptor
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
uint8_t *USBD_MSC_GetHSCfgDesc(uint16_t *length)
|
|
{
|
|
8007b48: b480 push {r7}
|
|
8007b4a: b083 sub sp, #12
|
|
8007b4c: af00 add r7, sp, #0
|
|
8007b4e: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_MSC_CfgHSDesc);
|
|
8007b50: 687b ldr r3, [r7, #4]
|
|
8007b52: 2220 movs r2, #32
|
|
8007b54: 801a strh r2, [r3, #0]
|
|
|
|
return USBD_MSC_CfgHSDesc;
|
|
8007b56: 4b03 ldr r3, [pc, #12] ; (8007b64 <USBD_MSC_GetHSCfgDesc+0x1c>)
|
|
}
|
|
8007b58: 4618 mov r0, r3
|
|
8007b5a: 370c adds r7, #12
|
|
8007b5c: 46bd mov sp, r7
|
|
8007b5e: bc80 pop {r7}
|
|
8007b60: 4770 bx lr
|
|
8007b62: bf00 nop
|
|
8007b64: 20000048 .word 0x20000048
|
|
|
|
08007b68 <USBD_MSC_GetFSCfgDesc>:
|
|
* return configuration descriptor
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
uint8_t *USBD_MSC_GetFSCfgDesc(uint16_t *length)
|
|
{
|
|
8007b68: b480 push {r7}
|
|
8007b6a: b083 sub sp, #12
|
|
8007b6c: af00 add r7, sp, #0
|
|
8007b6e: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_MSC_CfgFSDesc);
|
|
8007b70: 687b ldr r3, [r7, #4]
|
|
8007b72: 2220 movs r2, #32
|
|
8007b74: 801a strh r2, [r3, #0]
|
|
|
|
return USBD_MSC_CfgFSDesc;
|
|
8007b76: 4b03 ldr r3, [pc, #12] ; (8007b84 <USBD_MSC_GetFSCfgDesc+0x1c>)
|
|
}
|
|
8007b78: 4618 mov r0, r3
|
|
8007b7a: 370c adds r7, #12
|
|
8007b7c: 46bd mov sp, r7
|
|
8007b7e: bc80 pop {r7}
|
|
8007b80: 4770 bx lr
|
|
8007b82: bf00 nop
|
|
8007b84: 20000068 .word 0x20000068
|
|
|
|
08007b88 <USBD_MSC_GetOtherSpeedCfgDesc>:
|
|
* return other speed configuration descriptor
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
uint8_t *USBD_MSC_GetOtherSpeedCfgDesc(uint16_t *length)
|
|
{
|
|
8007b88: b480 push {r7}
|
|
8007b8a: b083 sub sp, #12
|
|
8007b8c: af00 add r7, sp, #0
|
|
8007b8e: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_MSC_OtherSpeedCfgDesc);
|
|
8007b90: 687b ldr r3, [r7, #4]
|
|
8007b92: 2220 movs r2, #32
|
|
8007b94: 801a strh r2, [r3, #0]
|
|
|
|
return USBD_MSC_OtherSpeedCfgDesc;
|
|
8007b96: 4b03 ldr r3, [pc, #12] ; (8007ba4 <USBD_MSC_GetOtherSpeedCfgDesc+0x1c>)
|
|
}
|
|
8007b98: 4618 mov r0, r3
|
|
8007b9a: 370c adds r7, #12
|
|
8007b9c: 46bd mov sp, r7
|
|
8007b9e: bc80 pop {r7}
|
|
8007ba0: 4770 bx lr
|
|
8007ba2: bf00 nop
|
|
8007ba4: 20000088 .word 0x20000088
|
|
|
|
08007ba8 <USBD_MSC_GetDeviceQualifierDescriptor>:
|
|
* return Device Qualifier descriptor
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
uint8_t *USBD_MSC_GetDeviceQualifierDescriptor(uint16_t *length)
|
|
{
|
|
8007ba8: b480 push {r7}
|
|
8007baa: b083 sub sp, #12
|
|
8007bac: af00 add r7, sp, #0
|
|
8007bae: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_MSC_DeviceQualifierDesc);
|
|
8007bb0: 687b ldr r3, [r7, #4]
|
|
8007bb2: 220a movs r2, #10
|
|
8007bb4: 801a strh r2, [r3, #0]
|
|
|
|
return USBD_MSC_DeviceQualifierDesc;
|
|
8007bb6: 4b03 ldr r3, [pc, #12] ; (8007bc4 <USBD_MSC_GetDeviceQualifierDescriptor+0x1c>)
|
|
}
|
|
8007bb8: 4618 mov r0, r3
|
|
8007bba: 370c adds r7, #12
|
|
8007bbc: 46bd mov sp, r7
|
|
8007bbe: bc80 pop {r7}
|
|
8007bc0: 4770 bx lr
|
|
8007bc2: bf00 nop
|
|
8007bc4: 200000a8 .word 0x200000a8
|
|
|
|
08007bc8 <USBD_MSC_RegisterStorage>:
|
|
* @param fops: storage callback
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_MSC_RegisterStorage(USBD_HandleTypeDef *pdev,
|
|
USBD_StorageTypeDef *fops)
|
|
{
|
|
8007bc8: b480 push {r7}
|
|
8007bca: b083 sub sp, #12
|
|
8007bcc: af00 add r7, sp, #0
|
|
8007bce: 6078 str r0, [r7, #4]
|
|
8007bd0: 6039 str r1, [r7, #0]
|
|
if (fops != NULL)
|
|
8007bd2: 683b ldr r3, [r7, #0]
|
|
8007bd4: 2b00 cmp r3, #0
|
|
8007bd6: d003 beq.n 8007be0 <USBD_MSC_RegisterStorage+0x18>
|
|
{
|
|
pdev->pUserData = fops;
|
|
8007bd8: 687b ldr r3, [r7, #4]
|
|
8007bda: 683a ldr r2, [r7, #0]
|
|
8007bdc: f8c3 22bc str.w r2, [r3, #700] ; 0x2bc
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007be0: 2300 movs r3, #0
|
|
}
|
|
8007be2: 4618 mov r0, r3
|
|
8007be4: 370c adds r7, #12
|
|
8007be6: 46bd mov sp, r7
|
|
8007be8: bc80 pop {r7}
|
|
8007bea: 4770 bx lr
|
|
|
|
08007bec <MSC_BOT_Init>:
|
|
* Initialize the BOT Process
|
|
* @param pdev: device instance
|
|
* @retval None
|
|
*/
|
|
void MSC_BOT_Init(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007bec: b580 push {r7, lr}
|
|
8007bee: b084 sub sp, #16
|
|
8007bf0: af00 add r7, sp, #0
|
|
8007bf2: 6078 str r0, [r7, #4]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007bf4: 687b ldr r3, [r7, #4]
|
|
8007bf6: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007bfa: 60fb str r3, [r7, #12]
|
|
|
|
hmsc->bot_state = USBD_BOT_IDLE;
|
|
8007bfc: 68fb ldr r3, [r7, #12]
|
|
8007bfe: 2200 movs r2, #0
|
|
8007c00: 721a strb r2, [r3, #8]
|
|
hmsc->bot_status = USBD_BOT_STATUS_NORMAL;
|
|
8007c02: 68fb ldr r3, [r7, #12]
|
|
8007c04: 2200 movs r2, #0
|
|
8007c06: 725a strb r2, [r3, #9]
|
|
|
|
hmsc->scsi_sense_tail = 0U;
|
|
8007c08: 68fb ldr r3, [r7, #12]
|
|
8007c0a: 2200 movs r2, #0
|
|
8007c0c: f883 225d strb.w r2, [r3, #605] ; 0x25d
|
|
hmsc->scsi_sense_head = 0U;
|
|
8007c10: 68fb ldr r3, [r7, #12]
|
|
8007c12: 2200 movs r2, #0
|
|
8007c14: f883 225c strb.w r2, [r3, #604] ; 0x25c
|
|
|
|
((USBD_StorageTypeDef *)pdev->pUserData)->Init(0U);
|
|
8007c18: 687b ldr r3, [r7, #4]
|
|
8007c1a: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8007c1e: 681b ldr r3, [r3, #0]
|
|
8007c20: 2000 movs r0, #0
|
|
8007c22: 4798 blx r3
|
|
|
|
USBD_LL_FlushEP(pdev, MSC_EPOUT_ADDR);
|
|
8007c24: 2101 movs r1, #1
|
|
8007c26: 6878 ldr r0, [r7, #4]
|
|
8007c28: f002 fb8c bl 800a344 <USBD_LL_FlushEP>
|
|
USBD_LL_FlushEP(pdev, MSC_EPIN_ADDR);
|
|
8007c2c: 2181 movs r1, #129 ; 0x81
|
|
8007c2e: 6878 ldr r0, [r7, #4]
|
|
8007c30: f002 fb88 bl 800a344 <USBD_LL_FlushEP>
|
|
|
|
/* Prapare EP to Receive First BOT Cmd */
|
|
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
|
|
8007c34: 68fb ldr r3, [r7, #12]
|
|
8007c36: f503 7203 add.w r2, r3, #524 ; 0x20c
|
|
8007c3a: 231f movs r3, #31
|
|
8007c3c: 2101 movs r1, #1
|
|
8007c3e: 6878 ldr r0, [r7, #4]
|
|
8007c40: f002 fc4b bl 800a4da <USBD_LL_PrepareReceive>
|
|
USBD_BOT_CBW_LENGTH);
|
|
}
|
|
8007c44: bf00 nop
|
|
8007c46: 3710 adds r7, #16
|
|
8007c48: 46bd mov sp, r7
|
|
8007c4a: bd80 pop {r7, pc}
|
|
|
|
08007c4c <MSC_BOT_Reset>:
|
|
* Reset the BOT Machine
|
|
* @param pdev: device instance
|
|
* @retval None
|
|
*/
|
|
void MSC_BOT_Reset(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007c4c: b580 push {r7, lr}
|
|
8007c4e: b084 sub sp, #16
|
|
8007c50: af00 add r7, sp, #0
|
|
8007c52: 6078 str r0, [r7, #4]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007c54: 687b ldr r3, [r7, #4]
|
|
8007c56: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007c5a: 60fb str r3, [r7, #12]
|
|
|
|
hmsc->bot_state = USBD_BOT_IDLE;
|
|
8007c5c: 68fb ldr r3, [r7, #12]
|
|
8007c5e: 2200 movs r2, #0
|
|
8007c60: 721a strb r2, [r3, #8]
|
|
hmsc->bot_status = USBD_BOT_STATUS_RECOVERY;
|
|
8007c62: 68fb ldr r3, [r7, #12]
|
|
8007c64: 2201 movs r2, #1
|
|
8007c66: 725a strb r2, [r3, #9]
|
|
|
|
/* Prapare EP to Receive First BOT Cmd */
|
|
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
|
|
8007c68: 68fb ldr r3, [r7, #12]
|
|
8007c6a: f503 7203 add.w r2, r3, #524 ; 0x20c
|
|
8007c6e: 231f movs r3, #31
|
|
8007c70: 2101 movs r1, #1
|
|
8007c72: 6878 ldr r0, [r7, #4]
|
|
8007c74: f002 fc31 bl 800a4da <USBD_LL_PrepareReceive>
|
|
USBD_BOT_CBW_LENGTH);
|
|
}
|
|
8007c78: bf00 nop
|
|
8007c7a: 3710 adds r7, #16
|
|
8007c7c: 46bd mov sp, r7
|
|
8007c7e: bd80 pop {r7, pc}
|
|
|
|
08007c80 <MSC_BOT_DeInit>:
|
|
* Deinitialize the BOT Machine
|
|
* @param pdev: device instance
|
|
* @retval None
|
|
*/
|
|
void MSC_BOT_DeInit(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007c80: b480 push {r7}
|
|
8007c82: b085 sub sp, #20
|
|
8007c84: af00 add r7, sp, #0
|
|
8007c86: 6078 str r0, [r7, #4]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007c88: 687b ldr r3, [r7, #4]
|
|
8007c8a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007c8e: 60fb str r3, [r7, #12]
|
|
hmsc->bot_state = USBD_BOT_IDLE;
|
|
8007c90: 68fb ldr r3, [r7, #12]
|
|
8007c92: 2200 movs r2, #0
|
|
8007c94: 721a strb r2, [r3, #8]
|
|
}
|
|
8007c96: bf00 nop
|
|
8007c98: 3714 adds r7, #20
|
|
8007c9a: 46bd mov sp, r7
|
|
8007c9c: bc80 pop {r7}
|
|
8007c9e: 4770 bx lr
|
|
|
|
08007ca0 <MSC_BOT_DataIn>:
|
|
* @param epnum: endpoint index
|
|
* @retval None
|
|
*/
|
|
void MSC_BOT_DataIn(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum)
|
|
{
|
|
8007ca0: b580 push {r7, lr}
|
|
8007ca2: b084 sub sp, #16
|
|
8007ca4: af00 add r7, sp, #0
|
|
8007ca6: 6078 str r0, [r7, #4]
|
|
8007ca8: 460b mov r3, r1
|
|
8007caa: 70fb strb r3, [r7, #3]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007cac: 687b ldr r3, [r7, #4]
|
|
8007cae: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007cb2: 60fb str r3, [r7, #12]
|
|
|
|
switch (hmsc->bot_state)
|
|
8007cb4: 68fb ldr r3, [r7, #12]
|
|
8007cb6: 7a1b ldrb r3, [r3, #8]
|
|
8007cb8: 2b02 cmp r3, #2
|
|
8007cba: d004 beq.n 8007cc6 <MSC_BOT_DataIn+0x26>
|
|
8007cbc: 2b02 cmp r3, #2
|
|
8007cbe: db19 blt.n 8007cf4 <MSC_BOT_DataIn+0x54>
|
|
8007cc0: 2b04 cmp r3, #4
|
|
8007cc2: dc17 bgt.n 8007cf4 <MSC_BOT_DataIn+0x54>
|
|
8007cc4: e011 b.n 8007cea <MSC_BOT_DataIn+0x4a>
|
|
{
|
|
case USBD_BOT_DATA_IN:
|
|
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
|
|
8007cc6: 68fb ldr r3, [r7, #12]
|
|
8007cc8: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
8007ccc: 68fb ldr r3, [r7, #12]
|
|
8007cce: f203 231b addw r3, r3, #539 ; 0x21b
|
|
8007cd2: 461a mov r2, r3
|
|
8007cd4: 6878 ldr r0, [r7, #4]
|
|
8007cd6: f000 f979 bl 8007fcc <SCSI_ProcessCmd>
|
|
8007cda: 4603 mov r3, r0
|
|
8007cdc: 2b00 cmp r3, #0
|
|
8007cde: da0b bge.n 8007cf8 <MSC_BOT_DataIn+0x58>
|
|
{
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
|
|
8007ce0: 2101 movs r1, #1
|
|
8007ce2: 6878 ldr r0, [r7, #4]
|
|
8007ce4: f000 f8f0 bl 8007ec8 <MSC_BOT_SendCSW>
|
|
}
|
|
break;
|
|
8007ce8: e006 b.n 8007cf8 <MSC_BOT_DataIn+0x58>
|
|
|
|
case USBD_BOT_SEND_DATA:
|
|
case USBD_BOT_LAST_DATA_IN:
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
|
|
8007cea: 2100 movs r1, #0
|
|
8007cec: 6878 ldr r0, [r7, #4]
|
|
8007cee: f000 f8eb bl 8007ec8 <MSC_BOT_SendCSW>
|
|
break;
|
|
8007cf2: e002 b.n 8007cfa <MSC_BOT_DataIn+0x5a>
|
|
|
|
default:
|
|
break;
|
|
8007cf4: bf00 nop
|
|
8007cf6: e000 b.n 8007cfa <MSC_BOT_DataIn+0x5a>
|
|
break;
|
|
8007cf8: bf00 nop
|
|
}
|
|
}
|
|
8007cfa: bf00 nop
|
|
8007cfc: 3710 adds r7, #16
|
|
8007cfe: 46bd mov sp, r7
|
|
8007d00: bd80 pop {r7, pc}
|
|
|
|
08007d02 <MSC_BOT_DataOut>:
|
|
* @param epnum: endpoint index
|
|
* @retval None
|
|
*/
|
|
void MSC_BOT_DataOut(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum)
|
|
{
|
|
8007d02: b580 push {r7, lr}
|
|
8007d04: b084 sub sp, #16
|
|
8007d06: af00 add r7, sp, #0
|
|
8007d08: 6078 str r0, [r7, #4]
|
|
8007d0a: 460b mov r3, r1
|
|
8007d0c: 70fb strb r3, [r7, #3]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007d0e: 687b ldr r3, [r7, #4]
|
|
8007d10: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007d14: 60fb str r3, [r7, #12]
|
|
|
|
switch (hmsc->bot_state)
|
|
8007d16: 68fb ldr r3, [r7, #12]
|
|
8007d18: 7a1b ldrb r3, [r3, #8]
|
|
8007d1a: 2b00 cmp r3, #0
|
|
8007d1c: d002 beq.n 8007d24 <MSC_BOT_DataOut+0x22>
|
|
8007d1e: 2b01 cmp r3, #1
|
|
8007d20: d004 beq.n 8007d2c <MSC_BOT_DataOut+0x2a>
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
8007d22: e015 b.n 8007d50 <MSC_BOT_DataOut+0x4e>
|
|
MSC_BOT_CBW_Decode(pdev);
|
|
8007d24: 6878 ldr r0, [r7, #4]
|
|
8007d26: f000 f817 bl 8007d58 <MSC_BOT_CBW_Decode>
|
|
break;
|
|
8007d2a: e011 b.n 8007d50 <MSC_BOT_DataOut+0x4e>
|
|
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
|
|
8007d2c: 68fb ldr r3, [r7, #12]
|
|
8007d2e: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
8007d32: 68fb ldr r3, [r7, #12]
|
|
8007d34: f203 231b addw r3, r3, #539 ; 0x21b
|
|
8007d38: 461a mov r2, r3
|
|
8007d3a: 6878 ldr r0, [r7, #4]
|
|
8007d3c: f000 f946 bl 8007fcc <SCSI_ProcessCmd>
|
|
8007d40: 4603 mov r3, r0
|
|
8007d42: 2b00 cmp r3, #0
|
|
8007d44: da03 bge.n 8007d4e <MSC_BOT_DataOut+0x4c>
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
|
|
8007d46: 2101 movs r1, #1
|
|
8007d48: 6878 ldr r0, [r7, #4]
|
|
8007d4a: f000 f8bd bl 8007ec8 <MSC_BOT_SendCSW>
|
|
break;
|
|
8007d4e: bf00 nop
|
|
}
|
|
}
|
|
8007d50: bf00 nop
|
|
8007d52: 3710 adds r7, #16
|
|
8007d54: 46bd mov sp, r7
|
|
8007d56: bd80 pop {r7, pc}
|
|
|
|
08007d58 <MSC_BOT_CBW_Decode>:
|
|
* Decode the CBW command and set the BOT state machine accordingly
|
|
* @param pdev: device instance
|
|
* @retval None
|
|
*/
|
|
static void MSC_BOT_CBW_Decode(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007d58: b580 push {r7, lr}
|
|
8007d5a: b084 sub sp, #16
|
|
8007d5c: af00 add r7, sp, #0
|
|
8007d5e: 6078 str r0, [r7, #4]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007d60: 687b ldr r3, [r7, #4]
|
|
8007d62: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007d66: 60fb str r3, [r7, #12]
|
|
|
|
hmsc->csw.dTag = hmsc->cbw.dTag;
|
|
8007d68: 68fb ldr r3, [r7, #12]
|
|
8007d6a: f8d3 2210 ldr.w r2, [r3, #528] ; 0x210
|
|
8007d6e: 68fb ldr r3, [r7, #12]
|
|
8007d70: f8c3 2230 str.w r2, [r3, #560] ; 0x230
|
|
hmsc->csw.dDataResidue = hmsc->cbw.dDataLength;
|
|
8007d74: 68fb ldr r3, [r7, #12]
|
|
8007d76: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
|
|
8007d7a: 68fb ldr r3, [r7, #12]
|
|
8007d7c: f8c3 2234 str.w r2, [r3, #564] ; 0x234
|
|
|
|
if ((USBD_LL_GetRxDataSize(pdev, MSC_EPOUT_ADDR) != USBD_BOT_CBW_LENGTH) ||
|
|
8007d80: 2101 movs r1, #1
|
|
8007d82: 6878 ldr r0, [r7, #4]
|
|
8007d84: f002 fbcc bl 800a520 <USBD_LL_GetRxDataSize>
|
|
8007d88: 4603 mov r3, r0
|
|
8007d8a: 2b1f cmp r3, #31
|
|
8007d8c: d114 bne.n 8007db8 <MSC_BOT_CBW_Decode+0x60>
|
|
(hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE) ||
|
|
8007d8e: 68fb ldr r3, [r7, #12]
|
|
8007d90: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
|
if ((USBD_LL_GetRxDataSize(pdev, MSC_EPOUT_ADDR) != USBD_BOT_CBW_LENGTH) ||
|
|
8007d94: 4a32 ldr r2, [pc, #200] ; (8007e60 <MSC_BOT_CBW_Decode+0x108>)
|
|
8007d96: 4293 cmp r3, r2
|
|
8007d98: d10e bne.n 8007db8 <MSC_BOT_CBW_Decode+0x60>
|
|
(hmsc->cbw.bLUN > 1U) ||
|
|
8007d9a: 68fb ldr r3, [r7, #12]
|
|
8007d9c: f893 3219 ldrb.w r3, [r3, #537] ; 0x219
|
|
(hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE) ||
|
|
8007da0: 2b01 cmp r3, #1
|
|
8007da2: d809 bhi.n 8007db8 <MSC_BOT_CBW_Decode+0x60>
|
|
(hmsc->cbw.bCBLength < 1U) || (hmsc->cbw.bCBLength > 16U))
|
|
8007da4: 68fb ldr r3, [r7, #12]
|
|
8007da6: f893 321a ldrb.w r3, [r3, #538] ; 0x21a
|
|
(hmsc->cbw.bLUN > 1U) ||
|
|
8007daa: 2b00 cmp r3, #0
|
|
8007dac: d004 beq.n 8007db8 <MSC_BOT_CBW_Decode+0x60>
|
|
(hmsc->cbw.bCBLength < 1U) || (hmsc->cbw.bCBLength > 16U))
|
|
8007dae: 68fb ldr r3, [r7, #12]
|
|
8007db0: f893 321a ldrb.w r3, [r3, #538] ; 0x21a
|
|
8007db4: 2b10 cmp r3, #16
|
|
8007db6: d90e bls.n 8007dd6 <MSC_BOT_CBW_Decode+0x7e>
|
|
{
|
|
|
|
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
|
|
8007db8: 68fb ldr r3, [r7, #12]
|
|
8007dba: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
8007dbe: 2320 movs r3, #32
|
|
8007dc0: 2205 movs r2, #5
|
|
8007dc2: 6878 ldr r0, [r7, #4]
|
|
8007dc4: f000 fc48 bl 8008658 <SCSI_SenseCode>
|
|
|
|
hmsc->bot_status = USBD_BOT_STATUS_ERROR;
|
|
8007dc8: 68fb ldr r3, [r7, #12]
|
|
8007dca: 2202 movs r2, #2
|
|
8007dcc: 725a strb r2, [r3, #9]
|
|
MSC_BOT_Abort(pdev);
|
|
8007dce: 6878 ldr r0, [r7, #4]
|
|
8007dd0: f000 f8a6 bl 8007f20 <MSC_BOT_Abort>
|
|
8007dd4: e041 b.n 8007e5a <MSC_BOT_CBW_Decode+0x102>
|
|
}
|
|
else
|
|
{
|
|
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
|
|
8007dd6: 68fb ldr r3, [r7, #12]
|
|
8007dd8: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
8007ddc: 68fb ldr r3, [r7, #12]
|
|
8007dde: f203 231b addw r3, r3, #539 ; 0x21b
|
|
8007de2: 461a mov r2, r3
|
|
8007de4: 6878 ldr r0, [r7, #4]
|
|
8007de6: f000 f8f1 bl 8007fcc <SCSI_ProcessCmd>
|
|
8007dea: 4603 mov r3, r0
|
|
8007dec: 2b00 cmp r3, #0
|
|
8007dee: da0c bge.n 8007e0a <MSC_BOT_CBW_Decode+0xb2>
|
|
{
|
|
if (hmsc->bot_state == USBD_BOT_NO_DATA)
|
|
8007df0: 68fb ldr r3, [r7, #12]
|
|
8007df2: 7a1b ldrb r3, [r3, #8]
|
|
8007df4: 2b05 cmp r3, #5
|
|
8007df6: d104 bne.n 8007e02 <MSC_BOT_CBW_Decode+0xaa>
|
|
{
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
|
|
8007df8: 2101 movs r1, #1
|
|
8007dfa: 6878 ldr r0, [r7, #4]
|
|
8007dfc: f000 f864 bl 8007ec8 <MSC_BOT_SendCSW>
|
|
8007e00: e02b b.n 8007e5a <MSC_BOT_CBW_Decode+0x102>
|
|
}
|
|
else
|
|
{
|
|
MSC_BOT_Abort(pdev);
|
|
8007e02: 6878 ldr r0, [r7, #4]
|
|
8007e04: f000 f88c bl 8007f20 <MSC_BOT_Abort>
|
|
8007e08: e027 b.n 8007e5a <MSC_BOT_CBW_Decode+0x102>
|
|
}
|
|
}
|
|
/*Burst xfer handled internally*/
|
|
else if ((hmsc->bot_state != USBD_BOT_DATA_IN) &&
|
|
8007e0a: 68fb ldr r3, [r7, #12]
|
|
8007e0c: 7a1b ldrb r3, [r3, #8]
|
|
8007e0e: 2b02 cmp r3, #2
|
|
8007e10: d022 beq.n 8007e58 <MSC_BOT_CBW_Decode+0x100>
|
|
(hmsc->bot_state != USBD_BOT_DATA_OUT) &&
|
|
8007e12: 68fb ldr r3, [r7, #12]
|
|
8007e14: 7a1b ldrb r3, [r3, #8]
|
|
else if ((hmsc->bot_state != USBD_BOT_DATA_IN) &&
|
|
8007e16: 2b01 cmp r3, #1
|
|
8007e18: d01e beq.n 8007e58 <MSC_BOT_CBW_Decode+0x100>
|
|
(hmsc->bot_state != USBD_BOT_LAST_DATA_IN))
|
|
8007e1a: 68fb ldr r3, [r7, #12]
|
|
8007e1c: 7a1b ldrb r3, [r3, #8]
|
|
(hmsc->bot_state != USBD_BOT_DATA_OUT) &&
|
|
8007e1e: 2b03 cmp r3, #3
|
|
8007e20: d01a beq.n 8007e58 <MSC_BOT_CBW_Decode+0x100>
|
|
{
|
|
if (hmsc->bot_data_length > 0U)
|
|
8007e22: 68fb ldr r3, [r7, #12]
|
|
8007e24: 895b ldrh r3, [r3, #10]
|
|
8007e26: 2b00 cmp r3, #0
|
|
8007e28: d009 beq.n 8007e3e <MSC_BOT_CBW_Decode+0xe6>
|
|
{
|
|
MSC_BOT_SendData(pdev, hmsc->bot_data, hmsc->bot_data_length);
|
|
8007e2a: 68fb ldr r3, [r7, #12]
|
|
8007e2c: f103 010c add.w r1, r3, #12
|
|
8007e30: 68fb ldr r3, [r7, #12]
|
|
8007e32: 895b ldrh r3, [r3, #10]
|
|
8007e34: 461a mov r2, r3
|
|
8007e36: 6878 ldr r0, [r7, #4]
|
|
8007e38: f000 f814 bl 8007e64 <MSC_BOT_SendData>
|
|
if (hmsc->bot_data_length > 0U)
|
|
8007e3c: e00d b.n 8007e5a <MSC_BOT_CBW_Decode+0x102>
|
|
}
|
|
else if (hmsc->bot_data_length == 0U)
|
|
8007e3e: 68fb ldr r3, [r7, #12]
|
|
8007e40: 895b ldrh r3, [r3, #10]
|
|
8007e42: 2b00 cmp r3, #0
|
|
8007e44: d104 bne.n 8007e50 <MSC_BOT_CBW_Decode+0xf8>
|
|
{
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
|
|
8007e46: 2100 movs r1, #0
|
|
8007e48: 6878 ldr r0, [r7, #4]
|
|
8007e4a: f000 f83d bl 8007ec8 <MSC_BOT_SendCSW>
|
|
if (hmsc->bot_data_length > 0U)
|
|
8007e4e: e004 b.n 8007e5a <MSC_BOT_CBW_Decode+0x102>
|
|
}
|
|
else
|
|
{
|
|
MSC_BOT_Abort(pdev);
|
|
8007e50: 6878 ldr r0, [r7, #4]
|
|
8007e52: f000 f865 bl 8007f20 <MSC_BOT_Abort>
|
|
if (hmsc->bot_data_length > 0U)
|
|
8007e56: e000 b.n 8007e5a <MSC_BOT_CBW_Decode+0x102>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
return;
|
|
8007e58: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
8007e5a: 3710 adds r7, #16
|
|
8007e5c: 46bd mov sp, r7
|
|
8007e5e: bd80 pop {r7, pc}
|
|
8007e60: 43425355 .word 0x43425355
|
|
|
|
08007e64 <MSC_BOT_SendData>:
|
|
* @param len: Data Length
|
|
* @retval None
|
|
*/
|
|
static void MSC_BOT_SendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf,
|
|
uint16_t len)
|
|
{
|
|
8007e64: b580 push {r7, lr}
|
|
8007e66: b086 sub sp, #24
|
|
8007e68: af00 add r7, sp, #0
|
|
8007e6a: 60f8 str r0, [r7, #12]
|
|
8007e6c: 60b9 str r1, [r7, #8]
|
|
8007e6e: 4613 mov r3, r2
|
|
8007e70: 80fb strh r3, [r7, #6]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007e72: 68fb ldr r3, [r7, #12]
|
|
8007e74: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007e78: 617b str r3, [r7, #20]
|
|
|
|
uint16_t length = (uint16_t)MIN(hmsc->cbw.dDataLength, len);
|
|
8007e7a: 697b ldr r3, [r7, #20]
|
|
8007e7c: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
|
|
8007e80: 88fb ldrh r3, [r7, #6]
|
|
8007e82: 429a cmp r2, r3
|
|
8007e84: d204 bcs.n 8007e90 <MSC_BOT_SendData+0x2c>
|
|
8007e86: 697b ldr r3, [r7, #20]
|
|
8007e88: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
|
8007e8c: b29b uxth r3, r3
|
|
8007e8e: e000 b.n 8007e92 <MSC_BOT_SendData+0x2e>
|
|
8007e90: 88fb ldrh r3, [r7, #6]
|
|
8007e92: 827b strh r3, [r7, #18]
|
|
|
|
hmsc->csw.dDataResidue -= len;
|
|
8007e94: 697b ldr r3, [r7, #20]
|
|
8007e96: f8d3 2234 ldr.w r2, [r3, #564] ; 0x234
|
|
8007e9a: 88fb ldrh r3, [r7, #6]
|
|
8007e9c: 1ad2 subs r2, r2, r3
|
|
8007e9e: 697b ldr r3, [r7, #20]
|
|
8007ea0: f8c3 2234 str.w r2, [r3, #564] ; 0x234
|
|
hmsc->csw.bStatus = USBD_CSW_CMD_PASSED;
|
|
8007ea4: 697b ldr r3, [r7, #20]
|
|
8007ea6: 2200 movs r2, #0
|
|
8007ea8: f883 2238 strb.w r2, [r3, #568] ; 0x238
|
|
hmsc->bot_state = USBD_BOT_SEND_DATA;
|
|
8007eac: 697b ldr r3, [r7, #20]
|
|
8007eae: 2204 movs r2, #4
|
|
8007eb0: 721a strb r2, [r3, #8]
|
|
|
|
USBD_LL_Transmit(pdev, MSC_EPIN_ADDR, pbuf, length);
|
|
8007eb2: 8a7b ldrh r3, [r7, #18]
|
|
8007eb4: 68ba ldr r2, [r7, #8]
|
|
8007eb6: 2181 movs r1, #129 ; 0x81
|
|
8007eb8: 68f8 ldr r0, [r7, #12]
|
|
8007eba: f002 faeb bl 800a494 <USBD_LL_Transmit>
|
|
}
|
|
8007ebe: bf00 nop
|
|
8007ec0: 3718 adds r7, #24
|
|
8007ec2: 46bd mov sp, r7
|
|
8007ec4: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08007ec8 <MSC_BOT_SendCSW>:
|
|
* @param status : CSW status
|
|
* @retval None
|
|
*/
|
|
void MSC_BOT_SendCSW(USBD_HandleTypeDef *pdev,
|
|
uint8_t CSW_Status)
|
|
{
|
|
8007ec8: b580 push {r7, lr}
|
|
8007eca: b084 sub sp, #16
|
|
8007ecc: af00 add r7, sp, #0
|
|
8007ece: 6078 str r0, [r7, #4]
|
|
8007ed0: 460b mov r3, r1
|
|
8007ed2: 70fb strb r3, [r7, #3]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007ed4: 687b ldr r3, [r7, #4]
|
|
8007ed6: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007eda: 60fb str r3, [r7, #12]
|
|
|
|
hmsc->csw.dSignature = USBD_BOT_CSW_SIGNATURE;
|
|
8007edc: 68fb ldr r3, [r7, #12]
|
|
8007ede: 4a0f ldr r2, [pc, #60] ; (8007f1c <MSC_BOT_SendCSW+0x54>)
|
|
8007ee0: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
|
hmsc->csw.bStatus = CSW_Status;
|
|
8007ee4: 68fb ldr r3, [r7, #12]
|
|
8007ee6: 78fa ldrb r2, [r7, #3]
|
|
8007ee8: f883 2238 strb.w r2, [r3, #568] ; 0x238
|
|
hmsc->bot_state = USBD_BOT_IDLE;
|
|
8007eec: 68fb ldr r3, [r7, #12]
|
|
8007eee: 2200 movs r2, #0
|
|
8007ef0: 721a strb r2, [r3, #8]
|
|
|
|
USBD_LL_Transmit(pdev, MSC_EPIN_ADDR, (uint8_t *)(void *)&hmsc->csw,
|
|
8007ef2: 68fb ldr r3, [r7, #12]
|
|
8007ef4: f503 720b add.w r2, r3, #556 ; 0x22c
|
|
8007ef8: 230d movs r3, #13
|
|
8007efa: 2181 movs r1, #129 ; 0x81
|
|
8007efc: 6878 ldr r0, [r7, #4]
|
|
8007efe: f002 fac9 bl 800a494 <USBD_LL_Transmit>
|
|
USBD_BOT_CSW_LENGTH);
|
|
|
|
/* Prepare EP to Receive next Cmd */
|
|
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
|
|
8007f02: 68fb ldr r3, [r7, #12]
|
|
8007f04: f503 7203 add.w r2, r3, #524 ; 0x20c
|
|
8007f08: 231f movs r3, #31
|
|
8007f0a: 2101 movs r1, #1
|
|
8007f0c: 6878 ldr r0, [r7, #4]
|
|
8007f0e: f002 fae4 bl 800a4da <USBD_LL_PrepareReceive>
|
|
USBD_BOT_CBW_LENGTH);
|
|
}
|
|
8007f12: bf00 nop
|
|
8007f14: 3710 adds r7, #16
|
|
8007f16: 46bd mov sp, r7
|
|
8007f18: bd80 pop {r7, pc}
|
|
8007f1a: bf00 nop
|
|
8007f1c: 53425355 .word 0x53425355
|
|
|
|
08007f20 <MSC_BOT_Abort>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
static void MSC_BOT_Abort(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007f20: b580 push {r7, lr}
|
|
8007f22: b084 sub sp, #16
|
|
8007f24: af00 add r7, sp, #0
|
|
8007f26: 6078 str r0, [r7, #4]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007f28: 687b ldr r3, [r7, #4]
|
|
8007f2a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007f2e: 60fb str r3, [r7, #12]
|
|
|
|
if ((hmsc->cbw.bmFlags == 0U) &&
|
|
8007f30: 68fb ldr r3, [r7, #12]
|
|
8007f32: f893 3218 ldrb.w r3, [r3, #536] ; 0x218
|
|
8007f36: 2b00 cmp r3, #0
|
|
8007f38: d10c bne.n 8007f54 <MSC_BOT_Abort+0x34>
|
|
(hmsc->cbw.dDataLength != 0U) &&
|
|
8007f3a: 68fb ldr r3, [r7, #12]
|
|
8007f3c: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
|
if ((hmsc->cbw.bmFlags == 0U) &&
|
|
8007f40: 2b00 cmp r3, #0
|
|
8007f42: d007 beq.n 8007f54 <MSC_BOT_Abort+0x34>
|
|
(hmsc->bot_status == USBD_BOT_STATUS_NORMAL))
|
|
8007f44: 68fb ldr r3, [r7, #12]
|
|
8007f46: 7a5b ldrb r3, [r3, #9]
|
|
(hmsc->cbw.dDataLength != 0U) &&
|
|
8007f48: 2b00 cmp r3, #0
|
|
8007f4a: d103 bne.n 8007f54 <MSC_BOT_Abort+0x34>
|
|
{
|
|
USBD_LL_StallEP(pdev, MSC_EPOUT_ADDR);
|
|
8007f4c: 2101 movs r1, #1
|
|
8007f4e: 6878 ldr r0, [r7, #4]
|
|
8007f50: f002 fa17 bl 800a382 <USBD_LL_StallEP>
|
|
}
|
|
|
|
USBD_LL_StallEP(pdev, MSC_EPIN_ADDR);
|
|
8007f54: 2181 movs r1, #129 ; 0x81
|
|
8007f56: 6878 ldr r0, [r7, #4]
|
|
8007f58: f002 fa13 bl 800a382 <USBD_LL_StallEP>
|
|
|
|
if (hmsc->bot_status == USBD_BOT_STATUS_ERROR)
|
|
8007f5c: 68fb ldr r3, [r7, #12]
|
|
8007f5e: 7a5b ldrb r3, [r3, #9]
|
|
8007f60: 2b02 cmp r3, #2
|
|
8007f62: d107 bne.n 8007f74 <MSC_BOT_Abort+0x54>
|
|
{
|
|
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
|
|
8007f64: 68fb ldr r3, [r7, #12]
|
|
8007f66: f503 7203 add.w r2, r3, #524 ; 0x20c
|
|
8007f6a: 231f movs r3, #31
|
|
8007f6c: 2101 movs r1, #1
|
|
8007f6e: 6878 ldr r0, [r7, #4]
|
|
8007f70: f002 fab3 bl 800a4da <USBD_LL_PrepareReceive>
|
|
USBD_BOT_CBW_LENGTH);
|
|
}
|
|
}
|
|
8007f74: bf00 nop
|
|
8007f76: 3710 adds r7, #16
|
|
8007f78: 46bd mov sp, r7
|
|
8007f7a: bd80 pop {r7, pc}
|
|
|
|
08007f7c <MSC_BOT_CplClrFeature>:
|
|
* @param epnum: endpoint index
|
|
* @retval None
|
|
*/
|
|
|
|
void MSC_BOT_CplClrFeature(USBD_HandleTypeDef *pdev, uint8_t epnum)
|
|
{
|
|
8007f7c: b580 push {r7, lr}
|
|
8007f7e: b084 sub sp, #16
|
|
8007f80: af00 add r7, sp, #0
|
|
8007f82: 6078 str r0, [r7, #4]
|
|
8007f84: 460b mov r3, r1
|
|
8007f86: 70fb strb r3, [r7, #3]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8007f88: 687b ldr r3, [r7, #4]
|
|
8007f8a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8007f8e: 60fb str r3, [r7, #12]
|
|
|
|
if (hmsc->bot_status == USBD_BOT_STATUS_ERROR) /* Bad CBW Signature */
|
|
8007f90: 68fb ldr r3, [r7, #12]
|
|
8007f92: 7a5b ldrb r3, [r3, #9]
|
|
8007f94: 2b02 cmp r3, #2
|
|
8007f96: d107 bne.n 8007fa8 <MSC_BOT_CplClrFeature+0x2c>
|
|
{
|
|
USBD_LL_StallEP(pdev, MSC_EPIN_ADDR);
|
|
8007f98: 2181 movs r1, #129 ; 0x81
|
|
8007f9a: 6878 ldr r0, [r7, #4]
|
|
8007f9c: f002 f9f1 bl 800a382 <USBD_LL_StallEP>
|
|
hmsc->bot_status = USBD_BOT_STATUS_NORMAL;
|
|
8007fa0: 68fb ldr r3, [r7, #12]
|
|
8007fa2: 2200 movs r2, #0
|
|
8007fa4: 725a strb r2, [r3, #9]
|
|
8007fa6: e00d b.n 8007fc4 <MSC_BOT_CplClrFeature+0x48>
|
|
}
|
|
else if (((epnum & 0x80U) == 0x80U) && (hmsc->bot_status != USBD_BOT_STATUS_RECOVERY))
|
|
8007fa8: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8007fac: 2b00 cmp r3, #0
|
|
8007fae: da08 bge.n 8007fc2 <MSC_BOT_CplClrFeature+0x46>
|
|
8007fb0: 68fb ldr r3, [r7, #12]
|
|
8007fb2: 7a5b ldrb r3, [r3, #9]
|
|
8007fb4: 2b01 cmp r3, #1
|
|
8007fb6: d004 beq.n 8007fc2 <MSC_BOT_CplClrFeature+0x46>
|
|
{
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
|
|
8007fb8: 2101 movs r1, #1
|
|
8007fba: 6878 ldr r0, [r7, #4]
|
|
8007fbc: f7ff ff84 bl 8007ec8 <MSC_BOT_SendCSW>
|
|
8007fc0: e000 b.n 8007fc4 <MSC_BOT_CplClrFeature+0x48>
|
|
}
|
|
else
|
|
{
|
|
return;
|
|
8007fc2: bf00 nop
|
|
}
|
|
}
|
|
8007fc4: 3710 adds r7, #16
|
|
8007fc6: 46bd mov sp, r7
|
|
8007fc8: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08007fcc <SCSI_ProcessCmd>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
int8_t SCSI_ProcessCmd(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *cmd)
|
|
{
|
|
8007fcc: b580 push {r7, lr}
|
|
8007fce: b084 sub sp, #16
|
|
8007fd0: af00 add r7, sp, #0
|
|
8007fd2: 60f8 str r0, [r7, #12]
|
|
8007fd4: 460b mov r3, r1
|
|
8007fd6: 607a str r2, [r7, #4]
|
|
8007fd8: 72fb strb r3, [r7, #11]
|
|
switch (cmd[0])
|
|
8007fda: 687b ldr r3, [r7, #4]
|
|
8007fdc: 781b ldrb r3, [r3, #0]
|
|
8007fde: 2b5a cmp r3, #90 ; 0x5a
|
|
8007fe0: f200 810e bhi.w 8008200 <SCSI_ProcessCmd+0x234>
|
|
8007fe4: a201 add r2, pc, #4 ; (adr r2, 8007fec <SCSI_ProcessCmd+0x20>)
|
|
8007fe6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8007fea: bf00 nop
|
|
8007fec: 08008159 .word 0x08008159
|
|
8007ff0: 08008201 .word 0x08008201
|
|
8007ff4: 08008201 .word 0x08008201
|
|
8007ff8: 08008167 .word 0x08008167
|
|
8007ffc: 08008201 .word 0x08008201
|
|
8008000: 08008201 .word 0x08008201
|
|
8008004: 08008201 .word 0x08008201
|
|
8008008: 08008201 .word 0x08008201
|
|
800800c: 08008201 .word 0x08008201
|
|
8008010: 08008201 .word 0x08008201
|
|
8008014: 08008201 .word 0x08008201
|
|
8008018: 08008201 .word 0x08008201
|
|
800801c: 08008201 .word 0x08008201
|
|
8008020: 08008201 .word 0x08008201
|
|
8008024: 08008201 .word 0x08008201
|
|
8008028: 08008201 .word 0x08008201
|
|
800802c: 08008201 .word 0x08008201
|
|
8008030: 08008201 .word 0x08008201
|
|
8008034: 08008175 .word 0x08008175
|
|
8008038: 08008201 .word 0x08008201
|
|
800803c: 08008201 .word 0x08008201
|
|
8008040: 08008201 .word 0x08008201
|
|
8008044: 08008201 .word 0x08008201
|
|
8008048: 08008201 .word 0x08008201
|
|
800804c: 08008201 .word 0x08008201
|
|
8008050: 08008201 .word 0x08008201
|
|
8008054: 0800819f .word 0x0800819f
|
|
8008058: 08008183 .word 0x08008183
|
|
800805c: 08008201 .word 0x08008201
|
|
8008060: 08008201 .word 0x08008201
|
|
8008064: 08008191 .word 0x08008191
|
|
8008068: 08008201 .word 0x08008201
|
|
800806c: 08008201 .word 0x08008201
|
|
8008070: 08008201 .word 0x08008201
|
|
8008074: 08008201 .word 0x08008201
|
|
8008078: 080081bb .word 0x080081bb
|
|
800807c: 08008201 .word 0x08008201
|
|
8008080: 080081c9 .word 0x080081c9
|
|
8008084: 08008201 .word 0x08008201
|
|
8008088: 08008201 .word 0x08008201
|
|
800808c: 080081d7 .word 0x080081d7
|
|
8008090: 08008201 .word 0x08008201
|
|
8008094: 080081e5 .word 0x080081e5
|
|
8008098: 08008201 .word 0x08008201
|
|
800809c: 08008201 .word 0x08008201
|
|
80080a0: 08008201 .word 0x08008201
|
|
80080a4: 08008201 .word 0x08008201
|
|
80080a8: 080081f3 .word 0x080081f3
|
|
80080ac: 08008201 .word 0x08008201
|
|
80080b0: 08008201 .word 0x08008201
|
|
80080b4: 08008201 .word 0x08008201
|
|
80080b8: 08008201 .word 0x08008201
|
|
80080bc: 08008201 .word 0x08008201
|
|
80080c0: 08008201 .word 0x08008201
|
|
80080c4: 08008201 .word 0x08008201
|
|
80080c8: 08008201 .word 0x08008201
|
|
80080cc: 08008201 .word 0x08008201
|
|
80080d0: 08008201 .word 0x08008201
|
|
80080d4: 08008201 .word 0x08008201
|
|
80080d8: 08008201 .word 0x08008201
|
|
80080dc: 08008201 .word 0x08008201
|
|
80080e0: 08008201 .word 0x08008201
|
|
80080e4: 08008201 .word 0x08008201
|
|
80080e8: 08008201 .word 0x08008201
|
|
80080ec: 08008201 .word 0x08008201
|
|
80080f0: 08008201 .word 0x08008201
|
|
80080f4: 08008201 .word 0x08008201
|
|
80080f8: 08008201 .word 0x08008201
|
|
80080fc: 08008201 .word 0x08008201
|
|
8008100: 08008201 .word 0x08008201
|
|
8008104: 08008201 .word 0x08008201
|
|
8008108: 08008201 .word 0x08008201
|
|
800810c: 08008201 .word 0x08008201
|
|
8008110: 08008201 .word 0x08008201
|
|
8008114: 08008201 .word 0x08008201
|
|
8008118: 08008201 .word 0x08008201
|
|
800811c: 08008201 .word 0x08008201
|
|
8008120: 08008201 .word 0x08008201
|
|
8008124: 08008201 .word 0x08008201
|
|
8008128: 08008201 .word 0x08008201
|
|
800812c: 08008201 .word 0x08008201
|
|
8008130: 08008201 .word 0x08008201
|
|
8008134: 08008201 .word 0x08008201
|
|
8008138: 08008201 .word 0x08008201
|
|
800813c: 08008201 .word 0x08008201
|
|
8008140: 08008201 .word 0x08008201
|
|
8008144: 08008201 .word 0x08008201
|
|
8008148: 08008201 .word 0x08008201
|
|
800814c: 08008201 .word 0x08008201
|
|
8008150: 08008201 .word 0x08008201
|
|
8008154: 080081ad .word 0x080081ad
|
|
{
|
|
case SCSI_TEST_UNIT_READY:
|
|
SCSI_TestUnitReady(pdev, lun, cmd);
|
|
8008158: 7afb ldrb r3, [r7, #11]
|
|
800815a: 687a ldr r2, [r7, #4]
|
|
800815c: 4619 mov r1, r3
|
|
800815e: 68f8 ldr r0, [r7, #12]
|
|
8008160: f000 f85c bl 800821c <SCSI_TestUnitReady>
|
|
break;
|
|
8008164: e055 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_REQUEST_SENSE:
|
|
SCSI_RequestSense(pdev, lun, cmd);
|
|
8008166: 7afb ldrb r3, [r7, #11]
|
|
8008168: 687a ldr r2, [r7, #4]
|
|
800816a: 4619 mov r1, r3
|
|
800816c: 68f8 ldr r0, [r7, #12]
|
|
800816e: f000 fa09 bl 8008584 <SCSI_RequestSense>
|
|
break;
|
|
8008172: e04e b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
case SCSI_INQUIRY:
|
|
SCSI_Inquiry(pdev, lun, cmd);
|
|
8008174: 7afb ldrb r3, [r7, #11]
|
|
8008176: 687a ldr r2, [r7, #4]
|
|
8008178: 4619 mov r1, r3
|
|
800817a: 68f8 ldr r0, [r7, #12]
|
|
800817c: f000 f888 bl 8008290 <SCSI_Inquiry>
|
|
break;
|
|
8008180: e047 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_START_STOP_UNIT:
|
|
SCSI_StartStopUnit(pdev, lun, cmd);
|
|
8008182: 7afb ldrb r3, [r7, #11]
|
|
8008184: 687a ldr r2, [r7, #4]
|
|
8008186: 4619 mov r1, r3
|
|
8008188: 68f8 ldr r0, [r7, #12]
|
|
800818a: f000 fa9e bl 80086ca <SCSI_StartStopUnit>
|
|
break;
|
|
800818e: e040 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_ALLOW_MEDIUM_REMOVAL:
|
|
SCSI_StartStopUnit(pdev, lun, cmd);
|
|
8008190: 7afb ldrb r3, [r7, #11]
|
|
8008192: 687a ldr r2, [r7, #4]
|
|
8008194: 4619 mov r1, r3
|
|
8008196: 68f8 ldr r0, [r7, #12]
|
|
8008198: f000 fa97 bl 80086ca <SCSI_StartStopUnit>
|
|
break;
|
|
800819c: e039 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_MODE_SENSE6:
|
|
SCSI_ModeSense6(pdev, lun, cmd);
|
|
800819e: 7afb ldrb r3, [r7, #11]
|
|
80081a0: 687a ldr r2, [r7, #4]
|
|
80081a2: 4619 mov r1, r3
|
|
80081a4: 68f8 ldr r0, [r7, #12]
|
|
80081a6: f000 f99d bl 80084e4 <SCSI_ModeSense6>
|
|
break;
|
|
80081aa: e032 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_MODE_SENSE10:
|
|
SCSI_ModeSense10(pdev, lun, cmd);
|
|
80081ac: 7afb ldrb r3, [r7, #11]
|
|
80081ae: 687a ldr r2, [r7, #4]
|
|
80081b0: 4619 mov r1, r3
|
|
80081b2: 68f8 ldr r0, [r7, #12]
|
|
80081b4: f000 f9be bl 8008534 <SCSI_ModeSense10>
|
|
break;
|
|
80081b8: e02b b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_READ_FORMAT_CAPACITIES:
|
|
SCSI_ReadFormatCapacity(pdev, lun, cmd);
|
|
80081ba: 7afb ldrb r3, [r7, #11]
|
|
80081bc: 687a ldr r2, [r7, #4]
|
|
80081be: 4619 mov r1, r3
|
|
80081c0: 68f8 ldr r0, [r7, #12]
|
|
80081c2: f000 f92a bl 800841a <SCSI_ReadFormatCapacity>
|
|
break;
|
|
80081c6: e024 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_READ_CAPACITY10:
|
|
SCSI_ReadCapacity10(pdev, lun, cmd);
|
|
80081c8: 7afb ldrb r3, [r7, #11]
|
|
80081ca: 687a ldr r2, [r7, #4]
|
|
80081cc: 4619 mov r1, r3
|
|
80081ce: 68f8 ldr r0, [r7, #12]
|
|
80081d0: f000 f8bc bl 800834c <SCSI_ReadCapacity10>
|
|
break;
|
|
80081d4: e01d b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_READ10:
|
|
SCSI_Read10(pdev, lun, cmd);
|
|
80081d6: 7afb ldrb r3, [r7, #11]
|
|
80081d8: 687a ldr r2, [r7, #4]
|
|
80081da: 4619 mov r1, r3
|
|
80081dc: 68f8 ldr r0, [r7, #12]
|
|
80081de: f000 fa88 bl 80086f2 <SCSI_Read10>
|
|
break;
|
|
80081e2: e016 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_WRITE10:
|
|
SCSI_Write10(pdev, lun, cmd);
|
|
80081e4: 7afb ldrb r3, [r7, #11]
|
|
80081e6: 687a ldr r2, [r7, #4]
|
|
80081e8: 4619 mov r1, r3
|
|
80081ea: 68f8 ldr r0, [r7, #12]
|
|
80081ec: f000 fb0d bl 800880a <SCSI_Write10>
|
|
break;
|
|
80081f0: e00f b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
case SCSI_VERIFY10:
|
|
SCSI_Verify10(pdev, lun, cmd);
|
|
80081f2: 7afb ldrb r3, [r7, #11]
|
|
80081f4: 687a ldr r2, [r7, #4]
|
|
80081f6: 4619 mov r1, r3
|
|
80081f8: 68f8 ldr r0, [r7, #12]
|
|
80081fa: f000 fbb6 bl 800896a <SCSI_Verify10>
|
|
break;
|
|
80081fe: e008 b.n 8008212 <SCSI_ProcessCmd+0x246>
|
|
|
|
default:
|
|
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, INVALID_CDB);
|
|
8008200: 7af9 ldrb r1, [r7, #11]
|
|
8008202: 2320 movs r3, #32
|
|
8008204: 2205 movs r2, #5
|
|
8008206: 68f8 ldr r0, [r7, #12]
|
|
8008208: f000 fa26 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
800820c: f04f 33ff mov.w r3, #4294967295
|
|
8008210: e000 b.n 8008214 <SCSI_ProcessCmd+0x248>
|
|
}
|
|
|
|
return 0;
|
|
8008212: 2300 movs r3, #0
|
|
}
|
|
8008214: 4618 mov r0, r3
|
|
8008216: 3710 adds r7, #16
|
|
8008218: 46bd mov sp, r7
|
|
800821a: bd80 pop {r7, pc}
|
|
|
|
0800821c <SCSI_TestUnitReady>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_TestUnitReady(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
800821c: b580 push {r7, lr}
|
|
800821e: b086 sub sp, #24
|
|
8008220: af00 add r7, sp, #0
|
|
8008222: 60f8 str r0, [r7, #12]
|
|
8008224: 460b mov r3, r1
|
|
8008226: 607a str r2, [r7, #4]
|
|
8008228: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
800822a: 68fb ldr r3, [r7, #12]
|
|
800822c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8008230: 617b str r3, [r7, #20]
|
|
|
|
/* case 9 : Hi > D0 */
|
|
if (hmsc->cbw.dDataLength != 0U)
|
|
8008232: 697b ldr r3, [r7, #20]
|
|
8008234: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
|
8008238: 2b00 cmp r3, #0
|
|
800823a: d00a beq.n 8008252 <SCSI_TestUnitReady+0x36>
|
|
{
|
|
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
|
|
800823c: 697b ldr r3, [r7, #20]
|
|
800823e: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
8008242: 2320 movs r3, #32
|
|
8008244: 2205 movs r2, #5
|
|
8008246: 68f8 ldr r0, [r7, #12]
|
|
8008248: f000 fa06 bl 8008658 <SCSI_SenseCode>
|
|
|
|
return -1;
|
|
800824c: f04f 33ff mov.w r3, #4294967295
|
|
8008250: e019 b.n 8008286 <SCSI_TestUnitReady+0x6a>
|
|
}
|
|
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsReady(lun) != 0)
|
|
8008252: 68fb ldr r3, [r7, #12]
|
|
8008254: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008258: 689b ldr r3, [r3, #8]
|
|
800825a: 7afa ldrb r2, [r7, #11]
|
|
800825c: 4610 mov r0, r2
|
|
800825e: 4798 blx r3
|
|
8008260: 4603 mov r3, r0
|
|
8008262: 2b00 cmp r3, #0
|
|
8008264: d00b beq.n 800827e <SCSI_TestUnitReady+0x62>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
|
|
8008266: 7af9 ldrb r1, [r7, #11]
|
|
8008268: 233a movs r3, #58 ; 0x3a
|
|
800826a: 2202 movs r2, #2
|
|
800826c: 68f8 ldr r0, [r7, #12]
|
|
800826e: f000 f9f3 bl 8008658 <SCSI_SenseCode>
|
|
hmsc->bot_state = USBD_BOT_NO_DATA;
|
|
8008272: 697b ldr r3, [r7, #20]
|
|
8008274: 2205 movs r2, #5
|
|
8008276: 721a strb r2, [r3, #8]
|
|
|
|
return -1;
|
|
8008278: f04f 33ff mov.w r3, #4294967295
|
|
800827c: e003 b.n 8008286 <SCSI_TestUnitReady+0x6a>
|
|
}
|
|
hmsc->bot_data_length = 0U;
|
|
800827e: 697b ldr r3, [r7, #20]
|
|
8008280: 2200 movs r2, #0
|
|
8008282: 815a strh r2, [r3, #10]
|
|
|
|
return 0;
|
|
8008284: 2300 movs r3, #0
|
|
}
|
|
8008286: 4618 mov r0, r3
|
|
8008288: 3718 adds r7, #24
|
|
800828a: 46bd mov sp, r7
|
|
800828c: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08008290 <SCSI_Inquiry>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_Inquiry(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
8008290: b480 push {r7}
|
|
8008292: b089 sub sp, #36 ; 0x24
|
|
8008294: af00 add r7, sp, #0
|
|
8008296: 60f8 str r0, [r7, #12]
|
|
8008298: 460b mov r3, r1
|
|
800829a: 607a str r2, [r7, #4]
|
|
800829c: 72fb strb r3, [r7, #11]
|
|
uint8_t *pPage;
|
|
uint16_t len;
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
800829e: 68fb ldr r3, [r7, #12]
|
|
80082a0: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
80082a4: 61bb str r3, [r7, #24]
|
|
|
|
if (params[1] & 0x01U)/*Evpd is set*/
|
|
80082a6: 687b ldr r3, [r7, #4]
|
|
80082a8: 3301 adds r3, #1
|
|
80082aa: 781b ldrb r3, [r3, #0]
|
|
80082ac: f003 0301 and.w r3, r3, #1
|
|
80082b0: 2b00 cmp r3, #0
|
|
80082b2: d014 beq.n 80082de <SCSI_Inquiry+0x4e>
|
|
{
|
|
len = LENGTH_INQUIRY_PAGE00;
|
|
80082b4: 2307 movs r3, #7
|
|
80082b6: 83fb strh r3, [r7, #30]
|
|
hmsc->bot_data_length = len;
|
|
80082b8: 69bb ldr r3, [r7, #24]
|
|
80082ba: 8bfa ldrh r2, [r7, #30]
|
|
80082bc: 815a strh r2, [r3, #10]
|
|
|
|
while (len)
|
|
80082be: e00a b.n 80082d6 <SCSI_Inquiry+0x46>
|
|
{
|
|
len--;
|
|
80082c0: 8bfb ldrh r3, [r7, #30]
|
|
80082c2: 3b01 subs r3, #1
|
|
80082c4: 83fb strh r3, [r7, #30]
|
|
hmsc->bot_data[len] = MSC_Page00_Inquiry_Data[len];
|
|
80082c6: 8bfa ldrh r2, [r7, #30]
|
|
80082c8: 8bfb ldrh r3, [r7, #30]
|
|
80082ca: 491f ldr r1, [pc, #124] ; (8008348 <SCSI_Inquiry+0xb8>)
|
|
80082cc: 5c89 ldrb r1, [r1, r2]
|
|
80082ce: 69ba ldr r2, [r7, #24]
|
|
80082d0: 4413 add r3, r2
|
|
80082d2: 460a mov r2, r1
|
|
80082d4: 731a strb r2, [r3, #12]
|
|
while (len)
|
|
80082d6: 8bfb ldrh r3, [r7, #30]
|
|
80082d8: 2b00 cmp r3, #0
|
|
80082da: d1f1 bne.n 80082c0 <SCSI_Inquiry+0x30>
|
|
80082dc: e02e b.n 800833c <SCSI_Inquiry+0xac>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
pPage = (uint8_t *)(void *) & ((USBD_StorageTypeDef *)pdev->pUserData)->pInquiry[lun * STANDARD_INQUIRY_DATA_LEN];
|
|
80082de: 68fb ldr r3, [r7, #12]
|
|
80082e0: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
80082e4: 69d9 ldr r1, [r3, #28]
|
|
80082e6: 7afa ldrb r2, [r7, #11]
|
|
80082e8: 4613 mov r3, r2
|
|
80082ea: 00db lsls r3, r3, #3
|
|
80082ec: 4413 add r3, r2
|
|
80082ee: 009b lsls r3, r3, #2
|
|
80082f0: 440b add r3, r1
|
|
80082f2: 617b str r3, [r7, #20]
|
|
len = (uint16_t)pPage[4] + 5U;
|
|
80082f4: 697b ldr r3, [r7, #20]
|
|
80082f6: 3304 adds r3, #4
|
|
80082f8: 781b ldrb r3, [r3, #0]
|
|
80082fa: b29b uxth r3, r3
|
|
80082fc: 3305 adds r3, #5
|
|
80082fe: 83fb strh r3, [r7, #30]
|
|
|
|
if (params[4] <= len)
|
|
8008300: 687b ldr r3, [r7, #4]
|
|
8008302: 3304 adds r3, #4
|
|
8008304: 781b ldrb r3, [r3, #0]
|
|
8008306: b29b uxth r3, r3
|
|
8008308: 8bfa ldrh r2, [r7, #30]
|
|
800830a: 429a cmp r2, r3
|
|
800830c: d303 bcc.n 8008316 <SCSI_Inquiry+0x86>
|
|
{
|
|
len = params[4];
|
|
800830e: 687b ldr r3, [r7, #4]
|
|
8008310: 3304 adds r3, #4
|
|
8008312: 781b ldrb r3, [r3, #0]
|
|
8008314: 83fb strh r3, [r7, #30]
|
|
}
|
|
hmsc->bot_data_length = len;
|
|
8008316: 69bb ldr r3, [r7, #24]
|
|
8008318: 8bfa ldrh r2, [r7, #30]
|
|
800831a: 815a strh r2, [r3, #10]
|
|
|
|
while (len)
|
|
800831c: e00b b.n 8008336 <SCSI_Inquiry+0xa6>
|
|
{
|
|
len--;
|
|
800831e: 8bfb ldrh r3, [r7, #30]
|
|
8008320: 3b01 subs r3, #1
|
|
8008322: 83fb strh r3, [r7, #30]
|
|
hmsc->bot_data[len] = pPage[len];
|
|
8008324: 8bfb ldrh r3, [r7, #30]
|
|
8008326: 697a ldr r2, [r7, #20]
|
|
8008328: 441a add r2, r3
|
|
800832a: 8bfb ldrh r3, [r7, #30]
|
|
800832c: 7811 ldrb r1, [r2, #0]
|
|
800832e: 69ba ldr r2, [r7, #24]
|
|
8008330: 4413 add r3, r2
|
|
8008332: 460a mov r2, r1
|
|
8008334: 731a strb r2, [r3, #12]
|
|
while (len)
|
|
8008336: 8bfb ldrh r3, [r7, #30]
|
|
8008338: 2b00 cmp r3, #0
|
|
800833a: d1f0 bne.n 800831e <SCSI_Inquiry+0x8e>
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
800833c: 2300 movs r3, #0
|
|
}
|
|
800833e: 4618 mov r0, r3
|
|
8008340: 3724 adds r7, #36 ; 0x24
|
|
8008342: 46bd mov sp, r7
|
|
8008344: bc80 pop {r7}
|
|
8008346: 4770 bx lr
|
|
8008348: 0800a6c0 .word 0x0800a6c0
|
|
|
|
0800834c <SCSI_ReadCapacity10>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_ReadCapacity10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
800834c: b580 push {r7, lr}
|
|
800834e: b086 sub sp, #24
|
|
8008350: af00 add r7, sp, #0
|
|
8008352: 60f8 str r0, [r7, #12]
|
|
8008354: 460b mov r3, r1
|
|
8008356: 607a str r2, [r7, #4]
|
|
8008358: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
800835a: 68fb ldr r3, [r7, #12]
|
|
800835c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8008360: 617b str r3, [r7, #20]
|
|
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->GetCapacity(lun, &hmsc->scsi_blk_nbr, &hmsc->scsi_blk_size) != 0)
|
|
8008362: 68fb ldr r3, [r7, #12]
|
|
8008364: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008368: 685b ldr r3, [r3, #4]
|
|
800836a: 697a ldr r2, [r7, #20]
|
|
800836c: f502 7118 add.w r1, r2, #608 ; 0x260
|
|
8008370: 697a ldr r2, [r7, #20]
|
|
8008372: f202 225e addw r2, r2, #606 ; 0x25e
|
|
8008376: 7af8 ldrb r0, [r7, #11]
|
|
8008378: 4798 blx r3
|
|
800837a: 4603 mov r3, r0
|
|
800837c: 2b00 cmp r3, #0
|
|
800837e: d008 beq.n 8008392 <SCSI_ReadCapacity10+0x46>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
|
|
8008380: 7af9 ldrb r1, [r7, #11]
|
|
8008382: 233a movs r3, #58 ; 0x3a
|
|
8008384: 2202 movs r2, #2
|
|
8008386: 68f8 ldr r0, [r7, #12]
|
|
8008388: f000 f966 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
800838c: f04f 33ff mov.w r3, #4294967295
|
|
8008390: e03f b.n 8008412 <SCSI_ReadCapacity10+0xc6>
|
|
}
|
|
else
|
|
{
|
|
|
|
hmsc->bot_data[0] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 24);
|
|
8008392: 697b ldr r3, [r7, #20]
|
|
8008394: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
|
|
8008398: 3b01 subs r3, #1
|
|
800839a: 0e1b lsrs r3, r3, #24
|
|
800839c: b2da uxtb r2, r3
|
|
800839e: 697b ldr r3, [r7, #20]
|
|
80083a0: 731a strb r2, [r3, #12]
|
|
hmsc->bot_data[1] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 16);
|
|
80083a2: 697b ldr r3, [r7, #20]
|
|
80083a4: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
|
|
80083a8: 3b01 subs r3, #1
|
|
80083aa: 0c1b lsrs r3, r3, #16
|
|
80083ac: b2da uxtb r2, r3
|
|
80083ae: 697b ldr r3, [r7, #20]
|
|
80083b0: 735a strb r2, [r3, #13]
|
|
hmsc->bot_data[2] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 8);
|
|
80083b2: 697b ldr r3, [r7, #20]
|
|
80083b4: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
|
|
80083b8: 3b01 subs r3, #1
|
|
80083ba: 0a1b lsrs r3, r3, #8
|
|
80083bc: b2da uxtb r2, r3
|
|
80083be: 697b ldr r3, [r7, #20]
|
|
80083c0: 739a strb r2, [r3, #14]
|
|
hmsc->bot_data[3] = (uint8_t)(hmsc->scsi_blk_nbr - 1U);
|
|
80083c2: 697b ldr r3, [r7, #20]
|
|
80083c4: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
|
|
80083c8: b2db uxtb r3, r3
|
|
80083ca: 3b01 subs r3, #1
|
|
80083cc: b2da uxtb r2, r3
|
|
80083ce: 697b ldr r3, [r7, #20]
|
|
80083d0: 73da strb r2, [r3, #15]
|
|
|
|
hmsc->bot_data[4] = (uint8_t)(hmsc->scsi_blk_size >> 24);
|
|
80083d2: 697b ldr r3, [r7, #20]
|
|
80083d4: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
80083d8: 161b asrs r3, r3, #24
|
|
80083da: b2da uxtb r2, r3
|
|
80083dc: 697b ldr r3, [r7, #20]
|
|
80083de: 741a strb r2, [r3, #16]
|
|
hmsc->bot_data[5] = (uint8_t)(hmsc->scsi_blk_size >> 16);
|
|
80083e0: 697b ldr r3, [r7, #20]
|
|
80083e2: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
80083e6: 141b asrs r3, r3, #16
|
|
80083e8: b2da uxtb r2, r3
|
|
80083ea: 697b ldr r3, [r7, #20]
|
|
80083ec: 745a strb r2, [r3, #17]
|
|
hmsc->bot_data[6] = (uint8_t)(hmsc->scsi_blk_size >> 8);
|
|
80083ee: 697b ldr r3, [r7, #20]
|
|
80083f0: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
80083f4: 0a1b lsrs r3, r3, #8
|
|
80083f6: b29b uxth r3, r3
|
|
80083f8: b2da uxtb r2, r3
|
|
80083fa: 697b ldr r3, [r7, #20]
|
|
80083fc: 749a strb r2, [r3, #18]
|
|
hmsc->bot_data[7] = (uint8_t)(hmsc->scsi_blk_size);
|
|
80083fe: 697b ldr r3, [r7, #20]
|
|
8008400: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
8008404: b2da uxtb r2, r3
|
|
8008406: 697b ldr r3, [r7, #20]
|
|
8008408: 74da strb r2, [r3, #19]
|
|
|
|
hmsc->bot_data_length = 8U;
|
|
800840a: 697b ldr r3, [r7, #20]
|
|
800840c: 2208 movs r2, #8
|
|
800840e: 815a strh r2, [r3, #10]
|
|
return 0;
|
|
8008410: 2300 movs r3, #0
|
|
}
|
|
}
|
|
8008412: 4618 mov r0, r3
|
|
8008414: 3718 adds r7, #24
|
|
8008416: 46bd mov sp, r7
|
|
8008418: bd80 pop {r7, pc}
|
|
|
|
0800841a <SCSI_ReadFormatCapacity>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_ReadFormatCapacity(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
800841a: b580 push {r7, lr}
|
|
800841c: b088 sub sp, #32
|
|
800841e: af00 add r7, sp, #0
|
|
8008420: 60f8 str r0, [r7, #12]
|
|
8008422: 460b mov r3, r1
|
|
8008424: 607a str r2, [r7, #4]
|
|
8008426: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8008428: 68fb ldr r3, [r7, #12]
|
|
800842a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800842e: 61bb str r3, [r7, #24]
|
|
|
|
uint16_t blk_size;
|
|
uint32_t blk_nbr;
|
|
uint16_t i;
|
|
|
|
for (i = 0U; i < 12U ; i++)
|
|
8008430: 2300 movs r3, #0
|
|
8008432: 83fb strh r3, [r7, #30]
|
|
8008434: e007 b.n 8008446 <SCSI_ReadFormatCapacity+0x2c>
|
|
{
|
|
hmsc->bot_data[i] = 0U;
|
|
8008436: 8bfb ldrh r3, [r7, #30]
|
|
8008438: 69ba ldr r2, [r7, #24]
|
|
800843a: 4413 add r3, r2
|
|
800843c: 2200 movs r2, #0
|
|
800843e: 731a strb r2, [r3, #12]
|
|
for (i = 0U; i < 12U ; i++)
|
|
8008440: 8bfb ldrh r3, [r7, #30]
|
|
8008442: 3301 adds r3, #1
|
|
8008444: 83fb strh r3, [r7, #30]
|
|
8008446: 8bfb ldrh r3, [r7, #30]
|
|
8008448: 2b0b cmp r3, #11
|
|
800844a: d9f4 bls.n 8008436 <SCSI_ReadFormatCapacity+0x1c>
|
|
}
|
|
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->GetCapacity(lun, &blk_nbr, &blk_size) != 0U)
|
|
800844c: 68fb ldr r3, [r7, #12]
|
|
800844e: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008452: 685b ldr r3, [r3, #4]
|
|
8008454: f107 0216 add.w r2, r7, #22
|
|
8008458: f107 0110 add.w r1, r7, #16
|
|
800845c: 7af8 ldrb r0, [r7, #11]
|
|
800845e: 4798 blx r3
|
|
8008460: 4603 mov r3, r0
|
|
8008462: 2b00 cmp r3, #0
|
|
8008464: d008 beq.n 8008478 <SCSI_ReadFormatCapacity+0x5e>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
|
|
8008466: 7af9 ldrb r1, [r7, #11]
|
|
8008468: 233a movs r3, #58 ; 0x3a
|
|
800846a: 2202 movs r2, #2
|
|
800846c: 68f8 ldr r0, [r7, #12]
|
|
800846e: f000 f8f3 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
8008472: f04f 33ff mov.w r3, #4294967295
|
|
8008476: e030 b.n 80084da <SCSI_ReadFormatCapacity+0xc0>
|
|
}
|
|
else
|
|
{
|
|
hmsc->bot_data[3] = 0x08U;
|
|
8008478: 69bb ldr r3, [r7, #24]
|
|
800847a: 2208 movs r2, #8
|
|
800847c: 73da strb r2, [r3, #15]
|
|
hmsc->bot_data[4] = (uint8_t)((blk_nbr - 1U) >> 24);
|
|
800847e: 693b ldr r3, [r7, #16]
|
|
8008480: 3b01 subs r3, #1
|
|
8008482: 0e1b lsrs r3, r3, #24
|
|
8008484: b2da uxtb r2, r3
|
|
8008486: 69bb ldr r3, [r7, #24]
|
|
8008488: 741a strb r2, [r3, #16]
|
|
hmsc->bot_data[5] = (uint8_t)((blk_nbr - 1U) >> 16);
|
|
800848a: 693b ldr r3, [r7, #16]
|
|
800848c: 3b01 subs r3, #1
|
|
800848e: 0c1b lsrs r3, r3, #16
|
|
8008490: b2da uxtb r2, r3
|
|
8008492: 69bb ldr r3, [r7, #24]
|
|
8008494: 745a strb r2, [r3, #17]
|
|
hmsc->bot_data[6] = (uint8_t)((blk_nbr - 1U) >> 8);
|
|
8008496: 693b ldr r3, [r7, #16]
|
|
8008498: 3b01 subs r3, #1
|
|
800849a: 0a1b lsrs r3, r3, #8
|
|
800849c: b2da uxtb r2, r3
|
|
800849e: 69bb ldr r3, [r7, #24]
|
|
80084a0: 749a strb r2, [r3, #18]
|
|
hmsc->bot_data[7] = (uint8_t)(blk_nbr - 1U);
|
|
80084a2: 693b ldr r3, [r7, #16]
|
|
80084a4: b2db uxtb r3, r3
|
|
80084a6: 3b01 subs r3, #1
|
|
80084a8: b2da uxtb r2, r3
|
|
80084aa: 69bb ldr r3, [r7, #24]
|
|
80084ac: 74da strb r2, [r3, #19]
|
|
|
|
hmsc->bot_data[8] = 0x02U;
|
|
80084ae: 69bb ldr r3, [r7, #24]
|
|
80084b0: 2202 movs r2, #2
|
|
80084b2: 751a strb r2, [r3, #20]
|
|
hmsc->bot_data[9] = (uint8_t)(blk_size >> 16);
|
|
80084b4: 8afb ldrh r3, [r7, #22]
|
|
80084b6: 141b asrs r3, r3, #16
|
|
80084b8: b2da uxtb r2, r3
|
|
80084ba: 69bb ldr r3, [r7, #24]
|
|
80084bc: 755a strb r2, [r3, #21]
|
|
hmsc->bot_data[10] = (uint8_t)(blk_size >> 8);
|
|
80084be: 8afb ldrh r3, [r7, #22]
|
|
80084c0: 0a1b lsrs r3, r3, #8
|
|
80084c2: b29b uxth r3, r3
|
|
80084c4: b2da uxtb r2, r3
|
|
80084c6: 69bb ldr r3, [r7, #24]
|
|
80084c8: 759a strb r2, [r3, #22]
|
|
hmsc->bot_data[11] = (uint8_t)(blk_size);
|
|
80084ca: 8afb ldrh r3, [r7, #22]
|
|
80084cc: b2da uxtb r2, r3
|
|
80084ce: 69bb ldr r3, [r7, #24]
|
|
80084d0: 75da strb r2, [r3, #23]
|
|
|
|
hmsc->bot_data_length = 12U;
|
|
80084d2: 69bb ldr r3, [r7, #24]
|
|
80084d4: 220c movs r2, #12
|
|
80084d6: 815a strh r2, [r3, #10]
|
|
return 0;
|
|
80084d8: 2300 movs r3, #0
|
|
}
|
|
}
|
|
80084da: 4618 mov r0, r3
|
|
80084dc: 3720 adds r7, #32
|
|
80084de: 46bd mov sp, r7
|
|
80084e0: bd80 pop {r7, pc}
|
|
...
|
|
|
|
080084e4 <SCSI_ModeSense6>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_ModeSense6(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
80084e4: b480 push {r7}
|
|
80084e6: b087 sub sp, #28
|
|
80084e8: af00 add r7, sp, #0
|
|
80084ea: 60f8 str r0, [r7, #12]
|
|
80084ec: 460b mov r3, r1
|
|
80084ee: 607a str r2, [r7, #4]
|
|
80084f0: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
80084f2: 68fb ldr r3, [r7, #12]
|
|
80084f4: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
80084f8: 613b str r3, [r7, #16]
|
|
uint16_t len = 8U;
|
|
80084fa: 2308 movs r3, #8
|
|
80084fc: 82fb strh r3, [r7, #22]
|
|
hmsc->bot_data_length = len;
|
|
80084fe: 693b ldr r3, [r7, #16]
|
|
8008500: 8afa ldrh r2, [r7, #22]
|
|
8008502: 815a strh r2, [r3, #10]
|
|
|
|
while (len)
|
|
8008504: e00a b.n 800851c <SCSI_ModeSense6+0x38>
|
|
{
|
|
len--;
|
|
8008506: 8afb ldrh r3, [r7, #22]
|
|
8008508: 3b01 subs r3, #1
|
|
800850a: 82fb strh r3, [r7, #22]
|
|
hmsc->bot_data[len] = MSC_Mode_Sense6_data[len];
|
|
800850c: 8afa ldrh r2, [r7, #22]
|
|
800850e: 8afb ldrh r3, [r7, #22]
|
|
8008510: 4907 ldr r1, [pc, #28] ; (8008530 <SCSI_ModeSense6+0x4c>)
|
|
8008512: 5c89 ldrb r1, [r1, r2]
|
|
8008514: 693a ldr r2, [r7, #16]
|
|
8008516: 4413 add r3, r2
|
|
8008518: 460a mov r2, r1
|
|
800851a: 731a strb r2, [r3, #12]
|
|
while (len)
|
|
800851c: 8afb ldrh r3, [r7, #22]
|
|
800851e: 2b00 cmp r3, #0
|
|
8008520: d1f1 bne.n 8008506 <SCSI_ModeSense6+0x22>
|
|
}
|
|
return 0;
|
|
8008522: 2300 movs r3, #0
|
|
}
|
|
8008524: 4618 mov r0, r3
|
|
8008526: 371c adds r7, #28
|
|
8008528: 46bd mov sp, r7
|
|
800852a: bc80 pop {r7}
|
|
800852c: 4770 bx lr
|
|
800852e: bf00 nop
|
|
8008530: 0800a6c8 .word 0x0800a6c8
|
|
|
|
08008534 <SCSI_ModeSense10>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_ModeSense10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
8008534: b480 push {r7}
|
|
8008536: b087 sub sp, #28
|
|
8008538: af00 add r7, sp, #0
|
|
800853a: 60f8 str r0, [r7, #12]
|
|
800853c: 460b mov r3, r1
|
|
800853e: 607a str r2, [r7, #4]
|
|
8008540: 72fb strb r3, [r7, #11]
|
|
uint16_t len = 8U;
|
|
8008542: 2308 movs r3, #8
|
|
8008544: 82fb strh r3, [r7, #22]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8008546: 68fb ldr r3, [r7, #12]
|
|
8008548: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800854c: 613b str r3, [r7, #16]
|
|
|
|
hmsc->bot_data_length = len;
|
|
800854e: 693b ldr r3, [r7, #16]
|
|
8008550: 8afa ldrh r2, [r7, #22]
|
|
8008552: 815a strh r2, [r3, #10]
|
|
|
|
while (len)
|
|
8008554: e00a b.n 800856c <SCSI_ModeSense10+0x38>
|
|
{
|
|
len--;
|
|
8008556: 8afb ldrh r3, [r7, #22]
|
|
8008558: 3b01 subs r3, #1
|
|
800855a: 82fb strh r3, [r7, #22]
|
|
hmsc->bot_data[len] = MSC_Mode_Sense10_data[len];
|
|
800855c: 8afa ldrh r2, [r7, #22]
|
|
800855e: 8afb ldrh r3, [r7, #22]
|
|
8008560: 4907 ldr r1, [pc, #28] ; (8008580 <SCSI_ModeSense10+0x4c>)
|
|
8008562: 5c89 ldrb r1, [r1, r2]
|
|
8008564: 693a ldr r2, [r7, #16]
|
|
8008566: 4413 add r3, r2
|
|
8008568: 460a mov r2, r1
|
|
800856a: 731a strb r2, [r3, #12]
|
|
while (len)
|
|
800856c: 8afb ldrh r3, [r7, #22]
|
|
800856e: 2b00 cmp r3, #0
|
|
8008570: d1f1 bne.n 8008556 <SCSI_ModeSense10+0x22>
|
|
}
|
|
|
|
return 0;
|
|
8008572: 2300 movs r3, #0
|
|
}
|
|
8008574: 4618 mov r0, r3
|
|
8008576: 371c adds r7, #28
|
|
8008578: 46bd mov sp, r7
|
|
800857a: bc80 pop {r7}
|
|
800857c: 4770 bx lr
|
|
800857e: bf00 nop
|
|
8008580: 0800a6d0 .word 0x0800a6d0
|
|
|
|
08008584 <SCSI_RequestSense>:
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
|
|
static int8_t SCSI_RequestSense(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
8008584: b480 push {r7}
|
|
8008586: b087 sub sp, #28
|
|
8008588: af00 add r7, sp, #0
|
|
800858a: 60f8 str r0, [r7, #12]
|
|
800858c: 460b mov r3, r1
|
|
800858e: 607a str r2, [r7, #4]
|
|
8008590: 72fb strb r3, [r7, #11]
|
|
uint8_t i;
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8008592: 68fb ldr r3, [r7, #12]
|
|
8008594: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8008598: 613b str r3, [r7, #16]
|
|
|
|
for (i = 0U ; i < REQUEST_SENSE_DATA_LEN; i++)
|
|
800859a: 2300 movs r3, #0
|
|
800859c: 75fb strb r3, [r7, #23]
|
|
800859e: e007 b.n 80085b0 <SCSI_RequestSense+0x2c>
|
|
{
|
|
hmsc->bot_data[i] = 0U;
|
|
80085a0: 7dfb ldrb r3, [r7, #23]
|
|
80085a2: 693a ldr r2, [r7, #16]
|
|
80085a4: 4413 add r3, r2
|
|
80085a6: 2200 movs r2, #0
|
|
80085a8: 731a strb r2, [r3, #12]
|
|
for (i = 0U ; i < REQUEST_SENSE_DATA_LEN; i++)
|
|
80085aa: 7dfb ldrb r3, [r7, #23]
|
|
80085ac: 3301 adds r3, #1
|
|
80085ae: 75fb strb r3, [r7, #23]
|
|
80085b0: 7dfb ldrb r3, [r7, #23]
|
|
80085b2: 2b11 cmp r3, #17
|
|
80085b4: d9f4 bls.n 80085a0 <SCSI_RequestSense+0x1c>
|
|
}
|
|
|
|
hmsc->bot_data[0] = 0x70U;
|
|
80085b6: 693b ldr r3, [r7, #16]
|
|
80085b8: 2270 movs r2, #112 ; 0x70
|
|
80085ba: 731a strb r2, [r3, #12]
|
|
hmsc->bot_data[7] = REQUEST_SENSE_DATA_LEN - 6U;
|
|
80085bc: 693b ldr r3, [r7, #16]
|
|
80085be: 220c movs r2, #12
|
|
80085c0: 74da strb r2, [r3, #19]
|
|
|
|
if ((hmsc->scsi_sense_head != hmsc->scsi_sense_tail))
|
|
80085c2: 693b ldr r3, [r7, #16]
|
|
80085c4: f893 225c ldrb.w r2, [r3, #604] ; 0x25c
|
|
80085c8: 693b ldr r3, [r7, #16]
|
|
80085ca: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
|
|
80085ce: 429a cmp r2, r3
|
|
80085d0: d02e beq.n 8008630 <SCSI_RequestSense+0xac>
|
|
{
|
|
|
|
hmsc->bot_data[2] = hmsc->scsi_sense[hmsc->scsi_sense_head].Skey;
|
|
80085d2: 693b ldr r3, [r7, #16]
|
|
80085d4: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
|
|
80085d8: 693a ldr r2, [r7, #16]
|
|
80085da: 3347 adds r3, #71 ; 0x47
|
|
80085dc: 00db lsls r3, r3, #3
|
|
80085de: 4413 add r3, r2
|
|
80085e0: 791a ldrb r2, [r3, #4]
|
|
80085e2: 693b ldr r3, [r7, #16]
|
|
80085e4: 739a strb r2, [r3, #14]
|
|
hmsc->bot_data[12] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASCQ;
|
|
80085e6: 693b ldr r3, [r7, #16]
|
|
80085e8: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
|
|
80085ec: 693a ldr r2, [r7, #16]
|
|
80085ee: 3347 adds r3, #71 ; 0x47
|
|
80085f0: 00db lsls r3, r3, #3
|
|
80085f2: 4413 add r3, r2
|
|
80085f4: 7a5a ldrb r2, [r3, #9]
|
|
80085f6: 693b ldr r3, [r7, #16]
|
|
80085f8: 761a strb r2, [r3, #24]
|
|
hmsc->bot_data[13] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASC;
|
|
80085fa: 693b ldr r3, [r7, #16]
|
|
80085fc: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
|
|
8008600: 693a ldr r2, [r7, #16]
|
|
8008602: 3347 adds r3, #71 ; 0x47
|
|
8008604: 00db lsls r3, r3, #3
|
|
8008606: 4413 add r3, r2
|
|
8008608: 7a1a ldrb r2, [r3, #8]
|
|
800860a: 693b ldr r3, [r7, #16]
|
|
800860c: 765a strb r2, [r3, #25]
|
|
hmsc->scsi_sense_head++;
|
|
800860e: 693b ldr r3, [r7, #16]
|
|
8008610: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
|
|
8008614: 3301 adds r3, #1
|
|
8008616: b2da uxtb r2, r3
|
|
8008618: 693b ldr r3, [r7, #16]
|
|
800861a: f883 225c strb.w r2, [r3, #604] ; 0x25c
|
|
|
|
if (hmsc->scsi_sense_head == SENSE_LIST_DEEPTH)
|
|
800861e: 693b ldr r3, [r7, #16]
|
|
8008620: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
|
|
8008624: 2b04 cmp r3, #4
|
|
8008626: d103 bne.n 8008630 <SCSI_RequestSense+0xac>
|
|
{
|
|
hmsc->scsi_sense_head = 0U;
|
|
8008628: 693b ldr r3, [r7, #16]
|
|
800862a: 2200 movs r2, #0
|
|
800862c: f883 225c strb.w r2, [r3, #604] ; 0x25c
|
|
}
|
|
}
|
|
hmsc->bot_data_length = REQUEST_SENSE_DATA_LEN;
|
|
8008630: 693b ldr r3, [r7, #16]
|
|
8008632: 2212 movs r2, #18
|
|
8008634: 815a strh r2, [r3, #10]
|
|
|
|
if (params[4] <= REQUEST_SENSE_DATA_LEN)
|
|
8008636: 687b ldr r3, [r7, #4]
|
|
8008638: 3304 adds r3, #4
|
|
800863a: 781b ldrb r3, [r3, #0]
|
|
800863c: 2b12 cmp r3, #18
|
|
800863e: d805 bhi.n 800864c <SCSI_RequestSense+0xc8>
|
|
{
|
|
hmsc->bot_data_length = params[4];
|
|
8008640: 687b ldr r3, [r7, #4]
|
|
8008642: 3304 adds r3, #4
|
|
8008644: 781b ldrb r3, [r3, #0]
|
|
8008646: b29a uxth r2, r3
|
|
8008648: 693b ldr r3, [r7, #16]
|
|
800864a: 815a strh r2, [r3, #10]
|
|
}
|
|
return 0;
|
|
800864c: 2300 movs r3, #0
|
|
}
|
|
800864e: 4618 mov r0, r3
|
|
8008650: 371c adds r7, #28
|
|
8008652: 46bd mov sp, r7
|
|
8008654: bc80 pop {r7}
|
|
8008656: 4770 bx lr
|
|
|
|
08008658 <SCSI_SenseCode>:
|
|
* @param ASC: Additional Sense Key
|
|
* @retval none
|
|
|
|
*/
|
|
void SCSI_SenseCode(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t sKey, uint8_t ASC)
|
|
{
|
|
8008658: b480 push {r7}
|
|
800865a: b085 sub sp, #20
|
|
800865c: af00 add r7, sp, #0
|
|
800865e: 6078 str r0, [r7, #4]
|
|
8008660: 4608 mov r0, r1
|
|
8008662: 4611 mov r1, r2
|
|
8008664: 461a mov r2, r3
|
|
8008666: 4603 mov r3, r0
|
|
8008668: 70fb strb r3, [r7, #3]
|
|
800866a: 460b mov r3, r1
|
|
800866c: 70bb strb r3, [r7, #2]
|
|
800866e: 4613 mov r3, r2
|
|
8008670: 707b strb r3, [r7, #1]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8008672: 687b ldr r3, [r7, #4]
|
|
8008674: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8008678: 60fb str r3, [r7, #12]
|
|
|
|
hmsc->scsi_sense[hmsc->scsi_sense_tail].Skey = sKey;
|
|
800867a: 68fb ldr r3, [r7, #12]
|
|
800867c: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
|
|
8008680: 68fa ldr r2, [r7, #12]
|
|
8008682: 3347 adds r3, #71 ; 0x47
|
|
8008684: 00db lsls r3, r3, #3
|
|
8008686: 4413 add r3, r2
|
|
8008688: 78ba ldrb r2, [r7, #2]
|
|
800868a: 711a strb r2, [r3, #4]
|
|
hmsc->scsi_sense[hmsc->scsi_sense_tail].w.ASC = ASC << 8;
|
|
800868c: 68fb ldr r3, [r7, #12]
|
|
800868e: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
|
|
8008692: 68fa ldr r2, [r7, #12]
|
|
8008694: 3347 adds r3, #71 ; 0x47
|
|
8008696: 00db lsls r3, r3, #3
|
|
8008698: 4413 add r3, r2
|
|
800869a: 2200 movs r2, #0
|
|
800869c: 721a strb r2, [r3, #8]
|
|
hmsc->scsi_sense_tail++;
|
|
800869e: 68fb ldr r3, [r7, #12]
|
|
80086a0: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
|
|
80086a4: 3301 adds r3, #1
|
|
80086a6: b2da uxtb r2, r3
|
|
80086a8: 68fb ldr r3, [r7, #12]
|
|
80086aa: f883 225d strb.w r2, [r3, #605] ; 0x25d
|
|
if (hmsc->scsi_sense_tail == SENSE_LIST_DEEPTH)
|
|
80086ae: 68fb ldr r3, [r7, #12]
|
|
80086b0: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
|
|
80086b4: 2b04 cmp r3, #4
|
|
80086b6: d103 bne.n 80086c0 <SCSI_SenseCode+0x68>
|
|
{
|
|
hmsc->scsi_sense_tail = 0U;
|
|
80086b8: 68fb ldr r3, [r7, #12]
|
|
80086ba: 2200 movs r2, #0
|
|
80086bc: f883 225d strb.w r2, [r3, #605] ; 0x25d
|
|
}
|
|
}
|
|
80086c0: bf00 nop
|
|
80086c2: 3714 adds r7, #20
|
|
80086c4: 46bd mov sp, r7
|
|
80086c6: bc80 pop {r7}
|
|
80086c8: 4770 bx lr
|
|
|
|
080086ca <SCSI_StartStopUnit>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_StartStopUnit(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
80086ca: b480 push {r7}
|
|
80086cc: b087 sub sp, #28
|
|
80086ce: af00 add r7, sp, #0
|
|
80086d0: 60f8 str r0, [r7, #12]
|
|
80086d2: 460b mov r3, r1
|
|
80086d4: 607a str r2, [r7, #4]
|
|
80086d6: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
|
|
80086d8: 68fb ldr r3, [r7, #12]
|
|
80086da: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
80086de: 617b str r3, [r7, #20]
|
|
hmsc->bot_data_length = 0U;
|
|
80086e0: 697b ldr r3, [r7, #20]
|
|
80086e2: 2200 movs r2, #0
|
|
80086e4: 815a strh r2, [r3, #10]
|
|
return 0;
|
|
80086e6: 2300 movs r3, #0
|
|
}
|
|
80086e8: 4618 mov r0, r3
|
|
80086ea: 371c adds r7, #28
|
|
80086ec: 46bd mov sp, r7
|
|
80086ee: bc80 pop {r7}
|
|
80086f0: 4770 bx lr
|
|
|
|
080086f2 <SCSI_Read10>:
|
|
* @param lun: Logical unit number
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_Read10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
80086f2: b580 push {r7, lr}
|
|
80086f4: b086 sub sp, #24
|
|
80086f6: af00 add r7, sp, #0
|
|
80086f8: 60f8 str r0, [r7, #12]
|
|
80086fa: 460b mov r3, r1
|
|
80086fc: 607a str r2, [r7, #4]
|
|
80086fe: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
|
|
8008700: 68fb ldr r3, [r7, #12]
|
|
8008702: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8008706: 617b str r3, [r7, #20]
|
|
|
|
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
|
|
8008708: 697b ldr r3, [r7, #20]
|
|
800870a: 7a1b ldrb r3, [r3, #8]
|
|
800870c: 2b00 cmp r3, #0
|
|
800870e: d16e bne.n 80087ee <SCSI_Read10+0xfc>
|
|
{
|
|
/* case 10 : Ho <> Di */
|
|
if ((hmsc->cbw.bmFlags & 0x80U) != 0x80U)
|
|
8008710: 697b ldr r3, [r7, #20]
|
|
8008712: f893 3218 ldrb.w r3, [r3, #536] ; 0x218
|
|
8008716: b25b sxtb r3, r3
|
|
8008718: 2b00 cmp r3, #0
|
|
800871a: db0a blt.n 8008732 <SCSI_Read10+0x40>
|
|
{
|
|
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
|
|
800871c: 697b ldr r3, [r7, #20]
|
|
800871e: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
8008722: 2320 movs r3, #32
|
|
8008724: 2205 movs r2, #5
|
|
8008726: 68f8 ldr r0, [r7, #12]
|
|
8008728: f7ff ff96 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
800872c: f04f 33ff mov.w r3, #4294967295
|
|
8008730: e067 b.n 8008802 <SCSI_Read10+0x110>
|
|
}
|
|
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsReady(lun) != 0)
|
|
8008732: 68fb ldr r3, [r7, #12]
|
|
8008734: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008738: 689b ldr r3, [r3, #8]
|
|
800873a: 7afa ldrb r2, [r7, #11]
|
|
800873c: 4610 mov r0, r2
|
|
800873e: 4798 blx r3
|
|
8008740: 4603 mov r3, r0
|
|
8008742: 2b00 cmp r3, #0
|
|
8008744: d008 beq.n 8008758 <SCSI_Read10+0x66>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
|
|
8008746: 7af9 ldrb r1, [r7, #11]
|
|
8008748: 233a movs r3, #58 ; 0x3a
|
|
800874a: 2202 movs r2, #2
|
|
800874c: 68f8 ldr r0, [r7, #12]
|
|
800874e: f7ff ff83 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
8008752: f04f 33ff mov.w r3, #4294967295
|
|
8008756: e054 b.n 8008802 <SCSI_Read10+0x110>
|
|
}
|
|
|
|
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
|
|
8008758: 687b ldr r3, [r7, #4]
|
|
800875a: 3302 adds r3, #2
|
|
800875c: 781b ldrb r3, [r3, #0]
|
|
800875e: 061a lsls r2, r3, #24
|
|
((uint32_t)params[3] << 16) |
|
|
8008760: 687b ldr r3, [r7, #4]
|
|
8008762: 3303 adds r3, #3
|
|
8008764: 781b ldrb r3, [r3, #0]
|
|
8008766: 041b lsls r3, r3, #16
|
|
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
|
|
8008768: 431a orrs r2, r3
|
|
((uint32_t)params[4] << 8) |
|
|
800876a: 687b ldr r3, [r7, #4]
|
|
800876c: 3304 adds r3, #4
|
|
800876e: 781b ldrb r3, [r3, #0]
|
|
8008770: 021b lsls r3, r3, #8
|
|
((uint32_t)params[3] << 16) |
|
|
8008772: 4313 orrs r3, r2
|
|
(uint32_t)params[5];
|
|
8008774: 687a ldr r2, [r7, #4]
|
|
8008776: 3205 adds r2, #5
|
|
8008778: 7812 ldrb r2, [r2, #0]
|
|
((uint32_t)params[4] << 8) |
|
|
800877a: 431a orrs r2, r3
|
|
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
|
|
800877c: 697b ldr r3, [r7, #20]
|
|
800877e: f8c3 2264 str.w r2, [r3, #612] ; 0x264
|
|
|
|
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) | (uint32_t)params[8];
|
|
8008782: 687b ldr r3, [r7, #4]
|
|
8008784: 3307 adds r3, #7
|
|
8008786: 781b ldrb r3, [r3, #0]
|
|
8008788: 021b lsls r3, r3, #8
|
|
800878a: 687a ldr r2, [r7, #4]
|
|
800878c: 3208 adds r2, #8
|
|
800878e: 7812 ldrb r2, [r2, #0]
|
|
8008790: 431a orrs r2, r3
|
|
8008792: 697b ldr r3, [r7, #20]
|
|
8008794: f8c3 2268 str.w r2, [r3, #616] ; 0x268
|
|
|
|
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
|
|
8008798: 697b ldr r3, [r7, #20]
|
|
800879a: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
|
|
800879e: 697b ldr r3, [r7, #20]
|
|
80087a0: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
80087a4: 7af9 ldrb r1, [r7, #11]
|
|
80087a6: 68f8 ldr r0, [r7, #12]
|
|
80087a8: f000 f912 bl 80089d0 <SCSI_CheckAddressRange>
|
|
80087ac: 4603 mov r3, r0
|
|
80087ae: 2b00 cmp r3, #0
|
|
80087b0: da02 bge.n 80087b8 <SCSI_Read10+0xc6>
|
|
hmsc->scsi_blk_len) < 0)
|
|
{
|
|
return -1; /* error */
|
|
80087b2: f04f 33ff mov.w r3, #4294967295
|
|
80087b6: e024 b.n 8008802 <SCSI_Read10+0x110>
|
|
}
|
|
|
|
hmsc->bot_state = USBD_BOT_DATA_IN;
|
|
80087b8: 697b ldr r3, [r7, #20]
|
|
80087ba: 2202 movs r2, #2
|
|
80087bc: 721a strb r2, [r3, #8]
|
|
|
|
/* cases 4,5 : Hi <> Dn */
|
|
if (hmsc->cbw.dDataLength != (hmsc->scsi_blk_len * hmsc->scsi_blk_size))
|
|
80087be: 697b ldr r3, [r7, #20]
|
|
80087c0: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
|
|
80087c4: 697b ldr r3, [r7, #20]
|
|
80087c6: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
80087ca: 6979 ldr r1, [r7, #20]
|
|
80087cc: f8b1 125e ldrh.w r1, [r1, #606] ; 0x25e
|
|
80087d0: fb01 f303 mul.w r3, r1, r3
|
|
80087d4: 429a cmp r2, r3
|
|
80087d6: d00a beq.n 80087ee <SCSI_Read10+0xfc>
|
|
{
|
|
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
|
|
80087d8: 697b ldr r3, [r7, #20]
|
|
80087da: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
80087de: 2320 movs r3, #32
|
|
80087e0: 2205 movs r2, #5
|
|
80087e2: 68f8 ldr r0, [r7, #12]
|
|
80087e4: f7ff ff38 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
80087e8: f04f 33ff mov.w r3, #4294967295
|
|
80087ec: e009 b.n 8008802 <SCSI_Read10+0x110>
|
|
}
|
|
}
|
|
hmsc->bot_data_length = MSC_MEDIA_PACKET;
|
|
80087ee: 697b ldr r3, [r7, #20]
|
|
80087f0: f44f 7200 mov.w r2, #512 ; 0x200
|
|
80087f4: 815a strh r2, [r3, #10]
|
|
|
|
return SCSI_ProcessRead(pdev, lun);
|
|
80087f6: 7afb ldrb r3, [r7, #11]
|
|
80087f8: 4619 mov r1, r3
|
|
80087fa: 68f8 ldr r0, [r7, #12]
|
|
80087fc: f000 f90a bl 8008a14 <SCSI_ProcessRead>
|
|
8008800: 4603 mov r3, r0
|
|
}
|
|
8008802: 4618 mov r0, r3
|
|
8008804: 3718 adds r7, #24
|
|
8008806: 46bd mov sp, r7
|
|
8008808: bd80 pop {r7, pc}
|
|
|
|
0800880a <SCSI_Write10>:
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
|
|
static int8_t SCSI_Write10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
800880a: b580 push {r7, lr}
|
|
800880c: b086 sub sp, #24
|
|
800880e: af00 add r7, sp, #0
|
|
8008810: 60f8 str r0, [r7, #12]
|
|
8008812: 460b mov r3, r1
|
|
8008814: 607a str r2, [r7, #4]
|
|
8008816: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
|
|
8008818: 68fb ldr r3, [r7, #12]
|
|
800881a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800881e: 617b str r3, [r7, #20]
|
|
uint32_t len;
|
|
|
|
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
|
|
8008820: 697b ldr r3, [r7, #20]
|
|
8008822: 7a1b ldrb r3, [r3, #8]
|
|
8008824: 2b00 cmp r3, #0
|
|
8008826: f040 8096 bne.w 8008956 <SCSI_Write10+0x14c>
|
|
{
|
|
/* case 8 : Hi <> Do */
|
|
if ((hmsc->cbw.bmFlags & 0x80U) == 0x80U)
|
|
800882a: 697b ldr r3, [r7, #20]
|
|
800882c: f893 3218 ldrb.w r3, [r3, #536] ; 0x218
|
|
8008830: b25b sxtb r3, r3
|
|
8008832: 2b00 cmp r3, #0
|
|
8008834: da0a bge.n 800884c <SCSI_Write10+0x42>
|
|
{
|
|
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
|
|
8008836: 697b ldr r3, [r7, #20]
|
|
8008838: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
800883c: 2320 movs r3, #32
|
|
800883e: 2205 movs r2, #5
|
|
8008840: 68f8 ldr r0, [r7, #12]
|
|
8008842: f7ff ff09 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
8008846: f04f 33ff mov.w r3, #4294967295
|
|
800884a: e08a b.n 8008962 <SCSI_Write10+0x158>
|
|
}
|
|
|
|
/* Check whether Media is ready */
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsReady(lun) != 0)
|
|
800884c: 68fb ldr r3, [r7, #12]
|
|
800884e: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008852: 689b ldr r3, [r3, #8]
|
|
8008854: 7afa ldrb r2, [r7, #11]
|
|
8008856: 4610 mov r0, r2
|
|
8008858: 4798 blx r3
|
|
800885a: 4603 mov r3, r0
|
|
800885c: 2b00 cmp r3, #0
|
|
800885e: d008 beq.n 8008872 <SCSI_Write10+0x68>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
|
|
8008860: 7af9 ldrb r1, [r7, #11]
|
|
8008862: 233a movs r3, #58 ; 0x3a
|
|
8008864: 2202 movs r2, #2
|
|
8008866: 68f8 ldr r0, [r7, #12]
|
|
8008868: f7ff fef6 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
800886c: f04f 33ff mov.w r3, #4294967295
|
|
8008870: e077 b.n 8008962 <SCSI_Write10+0x158>
|
|
}
|
|
|
|
/* Check If media is write-protected */
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsWriteProtected(lun) != 0)
|
|
8008872: 68fb ldr r3, [r7, #12]
|
|
8008874: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008878: 68db ldr r3, [r3, #12]
|
|
800887a: 7afa ldrb r2, [r7, #11]
|
|
800887c: 4610 mov r0, r2
|
|
800887e: 4798 blx r3
|
|
8008880: 4603 mov r3, r0
|
|
8008882: 2b00 cmp r3, #0
|
|
8008884: d008 beq.n 8008898 <SCSI_Write10+0x8e>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, NOT_READY, WRITE_PROTECTED);
|
|
8008886: 7af9 ldrb r1, [r7, #11]
|
|
8008888: 2327 movs r3, #39 ; 0x27
|
|
800888a: 2202 movs r2, #2
|
|
800888c: 68f8 ldr r0, [r7, #12]
|
|
800888e: f7ff fee3 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
8008892: f04f 33ff mov.w r3, #4294967295
|
|
8008896: e064 b.n 8008962 <SCSI_Write10+0x158>
|
|
}
|
|
|
|
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
|
|
8008898: 687b ldr r3, [r7, #4]
|
|
800889a: 3302 adds r3, #2
|
|
800889c: 781b ldrb r3, [r3, #0]
|
|
800889e: 061a lsls r2, r3, #24
|
|
((uint32_t)params[3] << 16) |
|
|
80088a0: 687b ldr r3, [r7, #4]
|
|
80088a2: 3303 adds r3, #3
|
|
80088a4: 781b ldrb r3, [r3, #0]
|
|
80088a6: 041b lsls r3, r3, #16
|
|
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
|
|
80088a8: 431a orrs r2, r3
|
|
((uint32_t)params[4] << 8) |
|
|
80088aa: 687b ldr r3, [r7, #4]
|
|
80088ac: 3304 adds r3, #4
|
|
80088ae: 781b ldrb r3, [r3, #0]
|
|
80088b0: 021b lsls r3, r3, #8
|
|
((uint32_t)params[3] << 16) |
|
|
80088b2: 4313 orrs r3, r2
|
|
(uint32_t)params[5];
|
|
80088b4: 687a ldr r2, [r7, #4]
|
|
80088b6: 3205 adds r2, #5
|
|
80088b8: 7812 ldrb r2, [r2, #0]
|
|
((uint32_t)params[4] << 8) |
|
|
80088ba: 431a orrs r2, r3
|
|
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
|
|
80088bc: 697b ldr r3, [r7, #20]
|
|
80088be: f8c3 2264 str.w r2, [r3, #612] ; 0x264
|
|
|
|
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) |
|
|
80088c2: 687b ldr r3, [r7, #4]
|
|
80088c4: 3307 adds r3, #7
|
|
80088c6: 781b ldrb r3, [r3, #0]
|
|
80088c8: 021b lsls r3, r3, #8
|
|
(uint32_t)params[8];
|
|
80088ca: 687a ldr r2, [r7, #4]
|
|
80088cc: 3208 adds r2, #8
|
|
80088ce: 7812 ldrb r2, [r2, #0]
|
|
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) |
|
|
80088d0: 431a orrs r2, r3
|
|
80088d2: 697b ldr r3, [r7, #20]
|
|
80088d4: f8c3 2268 str.w r2, [r3, #616] ; 0x268
|
|
|
|
/* check if LBA address is in the right range */
|
|
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
|
|
80088d8: 697b ldr r3, [r7, #20]
|
|
80088da: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
|
|
80088de: 697b ldr r3, [r7, #20]
|
|
80088e0: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
80088e4: 7af9 ldrb r1, [r7, #11]
|
|
80088e6: 68f8 ldr r0, [r7, #12]
|
|
80088e8: f000 f872 bl 80089d0 <SCSI_CheckAddressRange>
|
|
80088ec: 4603 mov r3, r0
|
|
80088ee: 2b00 cmp r3, #0
|
|
80088f0: da02 bge.n 80088f8 <SCSI_Write10+0xee>
|
|
hmsc->scsi_blk_len) < 0)
|
|
{
|
|
return -1; /* error */
|
|
80088f2: f04f 33ff mov.w r3, #4294967295
|
|
80088f6: e034 b.n 8008962 <SCSI_Write10+0x158>
|
|
}
|
|
|
|
len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
|
|
80088f8: 697b ldr r3, [r7, #20]
|
|
80088fa: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
80088fe: 697a ldr r2, [r7, #20]
|
|
8008900: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
|
|
8008904: fb02 f303 mul.w r3, r2, r3
|
|
8008908: 613b str r3, [r7, #16]
|
|
|
|
/* cases 3,11,13 : Hn,Ho <> D0 */
|
|
if (hmsc->cbw.dDataLength != len)
|
|
800890a: 697b ldr r3, [r7, #20]
|
|
800890c: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
|
8008910: 693a ldr r2, [r7, #16]
|
|
8008912: 429a cmp r2, r3
|
|
8008914: d00a beq.n 800892c <SCSI_Write10+0x122>
|
|
{
|
|
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
|
|
8008916: 697b ldr r3, [r7, #20]
|
|
8008918: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
|
|
800891c: 2320 movs r3, #32
|
|
800891e: 2205 movs r2, #5
|
|
8008920: 68f8 ldr r0, [r7, #12]
|
|
8008922: f7ff fe99 bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
8008926: f04f 33ff mov.w r3, #4294967295
|
|
800892a: e01a b.n 8008962 <SCSI_Write10+0x158>
|
|
}
|
|
|
|
len = MIN(len, MSC_MEDIA_PACKET);
|
|
800892c: 693b ldr r3, [r7, #16]
|
|
800892e: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8008932: bf28 it cs
|
|
8008934: f44f 7300 movcs.w r3, #512 ; 0x200
|
|
8008938: 613b str r3, [r7, #16]
|
|
|
|
/* Prepare EP to receive first data packet */
|
|
hmsc->bot_state = USBD_BOT_DATA_OUT;
|
|
800893a: 697b ldr r3, [r7, #20]
|
|
800893c: 2201 movs r2, #1
|
|
800893e: 721a strb r2, [r3, #8]
|
|
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, hmsc->bot_data, len);
|
|
8008940: 697b ldr r3, [r7, #20]
|
|
8008942: f103 020c add.w r2, r3, #12
|
|
8008946: 693b ldr r3, [r7, #16]
|
|
8008948: b29b uxth r3, r3
|
|
800894a: 2101 movs r1, #1
|
|
800894c: 68f8 ldr r0, [r7, #12]
|
|
800894e: f001 fdc4 bl 800a4da <USBD_LL_PrepareReceive>
|
|
}
|
|
else /* Write Process ongoing */
|
|
{
|
|
return SCSI_ProcessWrite(pdev, lun);
|
|
}
|
|
return 0;
|
|
8008952: 2300 movs r3, #0
|
|
8008954: e005 b.n 8008962 <SCSI_Write10+0x158>
|
|
return SCSI_ProcessWrite(pdev, lun);
|
|
8008956: 7afb ldrb r3, [r7, #11]
|
|
8008958: 4619 mov r1, r3
|
|
800895a: 68f8 ldr r0, [r7, #12]
|
|
800895c: f000 f8ce bl 8008afc <SCSI_ProcessWrite>
|
|
8008960: 4603 mov r3, r0
|
|
}
|
|
8008962: 4618 mov r0, r3
|
|
8008964: 3718 adds r7, #24
|
|
8008966: 46bd mov sp, r7
|
|
8008968: bd80 pop {r7, pc}
|
|
|
|
0800896a <SCSI_Verify10>:
|
|
* @param params: Command parameters
|
|
* @retval status
|
|
*/
|
|
|
|
static int8_t SCSI_Verify10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
|
|
{
|
|
800896a: b580 push {r7, lr}
|
|
800896c: b086 sub sp, #24
|
|
800896e: af00 add r7, sp, #0
|
|
8008970: 60f8 str r0, [r7, #12]
|
|
8008972: 460b mov r3, r1
|
|
8008974: 607a str r2, [r7, #4]
|
|
8008976: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
|
|
8008978: 68fb ldr r3, [r7, #12]
|
|
800897a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800897e: 617b str r3, [r7, #20]
|
|
|
|
if ((params[1] & 0x02U) == 0x02U)
|
|
8008980: 687b ldr r3, [r7, #4]
|
|
8008982: 3301 adds r3, #1
|
|
8008984: 781b ldrb r3, [r3, #0]
|
|
8008986: f003 0302 and.w r3, r3, #2
|
|
800898a: 2b00 cmp r3, #0
|
|
800898c: d008 beq.n 80089a0 <SCSI_Verify10+0x36>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND);
|
|
800898e: 7af9 ldrb r1, [r7, #11]
|
|
8008990: 2324 movs r3, #36 ; 0x24
|
|
8008992: 2205 movs r2, #5
|
|
8008994: 68f8 ldr r0, [r7, #12]
|
|
8008996: f7ff fe5f bl 8008658 <SCSI_SenseCode>
|
|
return -1; /* Error, Verify Mode Not supported*/
|
|
800899a: f04f 33ff mov.w r3, #4294967295
|
|
800899e: e013 b.n 80089c8 <SCSI_Verify10+0x5e>
|
|
}
|
|
|
|
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
|
|
80089a0: 697b ldr r3, [r7, #20]
|
|
80089a2: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
|
|
80089a6: 697b ldr r3, [r7, #20]
|
|
80089a8: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
80089ac: 7af9 ldrb r1, [r7, #11]
|
|
80089ae: 68f8 ldr r0, [r7, #12]
|
|
80089b0: f000 f80e bl 80089d0 <SCSI_CheckAddressRange>
|
|
80089b4: 4603 mov r3, r0
|
|
80089b6: 2b00 cmp r3, #0
|
|
80089b8: da02 bge.n 80089c0 <SCSI_Verify10+0x56>
|
|
hmsc->scsi_blk_len) < 0)
|
|
{
|
|
return -1; /* error */
|
|
80089ba: f04f 33ff mov.w r3, #4294967295
|
|
80089be: e003 b.n 80089c8 <SCSI_Verify10+0x5e>
|
|
}
|
|
hmsc->bot_data_length = 0U;
|
|
80089c0: 697b ldr r3, [r7, #20]
|
|
80089c2: 2200 movs r2, #0
|
|
80089c4: 815a strh r2, [r3, #10]
|
|
return 0;
|
|
80089c6: 2300 movs r3, #0
|
|
}
|
|
80089c8: 4618 mov r0, r3
|
|
80089ca: 3718 adds r7, #24
|
|
80089cc: 46bd mov sp, r7
|
|
80089ce: bd80 pop {r7, pc}
|
|
|
|
080089d0 <SCSI_CheckAddressRange>:
|
|
* @param blk_nbr: number of block to be processed
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_CheckAddressRange(USBD_HandleTypeDef *pdev, uint8_t lun,
|
|
uint32_t blk_offset, uint32_t blk_nbr)
|
|
{
|
|
80089d0: b580 push {r7, lr}
|
|
80089d2: b086 sub sp, #24
|
|
80089d4: af00 add r7, sp, #0
|
|
80089d6: 60f8 str r0, [r7, #12]
|
|
80089d8: 607a str r2, [r7, #4]
|
|
80089da: 603b str r3, [r7, #0]
|
|
80089dc: 460b mov r3, r1
|
|
80089de: 72fb strb r3, [r7, #11]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
|
|
80089e0: 68fb ldr r3, [r7, #12]
|
|
80089e2: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
80089e6: 617b str r3, [r7, #20]
|
|
|
|
if ((blk_offset + blk_nbr) > hmsc->scsi_blk_nbr)
|
|
80089e8: 687a ldr r2, [r7, #4]
|
|
80089ea: 683b ldr r3, [r7, #0]
|
|
80089ec: 441a add r2, r3
|
|
80089ee: 697b ldr r3, [r7, #20]
|
|
80089f0: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
|
|
80089f4: 429a cmp r2, r3
|
|
80089f6: d908 bls.n 8008a0a <SCSI_CheckAddressRange+0x3a>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE);
|
|
80089f8: 7af9 ldrb r1, [r7, #11]
|
|
80089fa: 2321 movs r3, #33 ; 0x21
|
|
80089fc: 2205 movs r2, #5
|
|
80089fe: 68f8 ldr r0, [r7, #12]
|
|
8008a00: f7ff fe2a bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
8008a04: f04f 33ff mov.w r3, #4294967295
|
|
8008a08: e000 b.n 8008a0c <SCSI_CheckAddressRange+0x3c>
|
|
}
|
|
return 0;
|
|
8008a0a: 2300 movs r3, #0
|
|
}
|
|
8008a0c: 4618 mov r0, r3
|
|
8008a0e: 3718 adds r7, #24
|
|
8008a10: 46bd mov sp, r7
|
|
8008a12: bd80 pop {r7, pc}
|
|
|
|
08008a14 <SCSI_ProcessRead>:
|
|
* Handle Read Process
|
|
* @param lun: Logical unit number
|
|
* @retval status
|
|
*/
|
|
static int8_t SCSI_ProcessRead(USBD_HandleTypeDef *pdev, uint8_t lun)
|
|
{
|
|
8008a14: b590 push {r4, r7, lr}
|
|
8008a16: b085 sub sp, #20
|
|
8008a18: af00 add r7, sp, #0
|
|
8008a1a: 6078 str r0, [r7, #4]
|
|
8008a1c: 460b mov r3, r1
|
|
8008a1e: 70fb strb r3, [r7, #3]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
|
|
8008a20: 687b ldr r3, [r7, #4]
|
|
8008a22: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8008a26: 60fb str r3, [r7, #12]
|
|
uint32_t len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
|
|
8008a28: 68fb ldr r3, [r7, #12]
|
|
8008a2a: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
8008a2e: 68fa ldr r2, [r7, #12]
|
|
8008a30: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
|
|
8008a34: fb02 f303 mul.w r3, r2, r3
|
|
8008a38: 60bb str r3, [r7, #8]
|
|
|
|
len = MIN(len, MSC_MEDIA_PACKET);
|
|
8008a3a: 68bb ldr r3, [r7, #8]
|
|
8008a3c: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8008a40: bf28 it cs
|
|
8008a42: f44f 7300 movcs.w r3, #512 ; 0x200
|
|
8008a46: 60bb str r3, [r7, #8]
|
|
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->Read(lun,
|
|
8008a48: 687b ldr r3, [r7, #4]
|
|
8008a4a: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008a4e: 691c ldr r4, [r3, #16]
|
|
hmsc->bot_data,
|
|
8008a50: 68fb ldr r3, [r7, #12]
|
|
8008a52: f103 010c add.w r1, r3, #12
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->Read(lun,
|
|
8008a56: 68fb ldr r3, [r7, #12]
|
|
8008a58: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
|
|
hmsc->scsi_blk_addr,
|
|
(len / hmsc->scsi_blk_size)) < 0)
|
|
8008a5c: 68fb ldr r3, [r7, #12]
|
|
8008a5e: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
8008a62: 4618 mov r0, r3
|
|
8008a64: 68bb ldr r3, [r7, #8]
|
|
8008a66: fbb3 f3f0 udiv r3, r3, r0
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->Read(lun,
|
|
8008a6a: b29b uxth r3, r3
|
|
8008a6c: 78f8 ldrb r0, [r7, #3]
|
|
8008a6e: 47a0 blx r4
|
|
8008a70: 4603 mov r3, r0
|
|
8008a72: 2b00 cmp r3, #0
|
|
8008a74: da08 bge.n 8008a88 <SCSI_ProcessRead+0x74>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, HARDWARE_ERROR, UNRECOVERED_READ_ERROR);
|
|
8008a76: 78f9 ldrb r1, [r7, #3]
|
|
8008a78: 2311 movs r3, #17
|
|
8008a7a: 2204 movs r2, #4
|
|
8008a7c: 6878 ldr r0, [r7, #4]
|
|
8008a7e: f7ff fdeb bl 8008658 <SCSI_SenseCode>
|
|
return -1;
|
|
8008a82: f04f 33ff mov.w r3, #4294967295
|
|
8008a86: e035 b.n 8008af4 <SCSI_ProcessRead+0xe0>
|
|
}
|
|
|
|
USBD_LL_Transmit(pdev, MSC_EPIN_ADDR, hmsc->bot_data, len);
|
|
8008a88: 68fb ldr r3, [r7, #12]
|
|
8008a8a: f103 020c add.w r2, r3, #12
|
|
8008a8e: 68bb ldr r3, [r7, #8]
|
|
8008a90: b29b uxth r3, r3
|
|
8008a92: 2181 movs r1, #129 ; 0x81
|
|
8008a94: 6878 ldr r0, [r7, #4]
|
|
8008a96: f001 fcfd bl 800a494 <USBD_LL_Transmit>
|
|
|
|
hmsc->scsi_blk_addr += (len / hmsc->scsi_blk_size);
|
|
8008a9a: 68fb ldr r3, [r7, #12]
|
|
8008a9c: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
|
|
8008aa0: 68fb ldr r3, [r7, #12]
|
|
8008aa2: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
8008aa6: 4619 mov r1, r3
|
|
8008aa8: 68bb ldr r3, [r7, #8]
|
|
8008aaa: fbb3 f3f1 udiv r3, r3, r1
|
|
8008aae: 441a add r2, r3
|
|
8008ab0: 68fb ldr r3, [r7, #12]
|
|
8008ab2: f8c3 2264 str.w r2, [r3, #612] ; 0x264
|
|
hmsc->scsi_blk_len -= (len / hmsc->scsi_blk_size);
|
|
8008ab6: 68fb ldr r3, [r7, #12]
|
|
8008ab8: f8d3 2268 ldr.w r2, [r3, #616] ; 0x268
|
|
8008abc: 68fb ldr r3, [r7, #12]
|
|
8008abe: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
8008ac2: 4619 mov r1, r3
|
|
8008ac4: 68bb ldr r3, [r7, #8]
|
|
8008ac6: fbb3 f3f1 udiv r3, r3, r1
|
|
8008aca: 1ad2 subs r2, r2, r3
|
|
8008acc: 68fb ldr r3, [r7, #12]
|
|
8008ace: f8c3 2268 str.w r2, [r3, #616] ; 0x268
|
|
|
|
/* case 6 : Hi = Di */
|
|
hmsc->csw.dDataResidue -= len;
|
|
8008ad2: 68fb ldr r3, [r7, #12]
|
|
8008ad4: f8d3 2234 ldr.w r2, [r3, #564] ; 0x234
|
|
8008ad8: 68bb ldr r3, [r7, #8]
|
|
8008ada: 1ad2 subs r2, r2, r3
|
|
8008adc: 68fb ldr r3, [r7, #12]
|
|
8008ade: f8c3 2234 str.w r2, [r3, #564] ; 0x234
|
|
|
|
if (hmsc->scsi_blk_len == 0U)
|
|
8008ae2: 68fb ldr r3, [r7, #12]
|
|
8008ae4: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
8008ae8: 2b00 cmp r3, #0
|
|
8008aea: d102 bne.n 8008af2 <SCSI_ProcessRead+0xde>
|
|
{
|
|
hmsc->bot_state = USBD_BOT_LAST_DATA_IN;
|
|
8008aec: 68fb ldr r3, [r7, #12]
|
|
8008aee: 2203 movs r2, #3
|
|
8008af0: 721a strb r2, [r3, #8]
|
|
}
|
|
return 0;
|
|
8008af2: 2300 movs r3, #0
|
|
}
|
|
8008af4: 4618 mov r0, r3
|
|
8008af6: 3714 adds r7, #20
|
|
8008af8: 46bd mov sp, r7
|
|
8008afa: bd90 pop {r4, r7, pc}
|
|
|
|
08008afc <SCSI_ProcessWrite>:
|
|
* @param lun: Logical unit number
|
|
* @retval status
|
|
*/
|
|
|
|
static int8_t SCSI_ProcessWrite(USBD_HandleTypeDef *pdev, uint8_t lun)
|
|
{
|
|
8008afc: b590 push {r4, r7, lr}
|
|
8008afe: b085 sub sp, #20
|
|
8008b00: af00 add r7, sp, #0
|
|
8008b02: 6078 str r0, [r7, #4]
|
|
8008b04: 460b mov r3, r1
|
|
8008b06: 70fb strb r3, [r7, #3]
|
|
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
|
|
8008b08: 687b ldr r3, [r7, #4]
|
|
8008b0a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8008b0e: 60fb str r3, [r7, #12]
|
|
uint32_t len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
|
|
8008b10: 68fb ldr r3, [r7, #12]
|
|
8008b12: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
8008b16: 68fa ldr r2, [r7, #12]
|
|
8008b18: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
|
|
8008b1c: fb02 f303 mul.w r3, r2, r3
|
|
8008b20: 60bb str r3, [r7, #8]
|
|
|
|
len = MIN(len, MSC_MEDIA_PACKET);
|
|
8008b22: 68bb ldr r3, [r7, #8]
|
|
8008b24: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8008b28: bf28 it cs
|
|
8008b2a: f44f 7300 movcs.w r3, #512 ; 0x200
|
|
8008b2e: 60bb str r3, [r7, #8]
|
|
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->Write(lun, hmsc->bot_data,
|
|
8008b30: 687b ldr r3, [r7, #4]
|
|
8008b32: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8008b36: 695c ldr r4, [r3, #20]
|
|
8008b38: 68fb ldr r3, [r7, #12]
|
|
8008b3a: f103 010c add.w r1, r3, #12
|
|
8008b3e: 68fb ldr r3, [r7, #12]
|
|
8008b40: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
|
|
hmsc->scsi_blk_addr,
|
|
(len / hmsc->scsi_blk_size)) < 0)
|
|
8008b44: 68fb ldr r3, [r7, #12]
|
|
8008b46: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
8008b4a: 4618 mov r0, r3
|
|
8008b4c: 68bb ldr r3, [r7, #8]
|
|
8008b4e: fbb3 f3f0 udiv r3, r3, r0
|
|
if (((USBD_StorageTypeDef *)pdev->pUserData)->Write(lun, hmsc->bot_data,
|
|
8008b52: b29b uxth r3, r3
|
|
8008b54: 78f8 ldrb r0, [r7, #3]
|
|
8008b56: 47a0 blx r4
|
|
8008b58: 4603 mov r3, r0
|
|
8008b5a: 2b00 cmp r3, #0
|
|
8008b5c: da08 bge.n 8008b70 <SCSI_ProcessWrite+0x74>
|
|
{
|
|
SCSI_SenseCode(pdev, lun, HARDWARE_ERROR, WRITE_FAULT);
|
|
8008b5e: 78f9 ldrb r1, [r7, #3]
|
|
8008b60: 2303 movs r3, #3
|
|
8008b62: 2204 movs r2, #4
|
|
8008b64: 6878 ldr r0, [r7, #4]
|
|
8008b66: f7ff fd77 bl 8008658 <SCSI_SenseCode>
|
|
|
|
return -1;
|
|
8008b6a: f04f 33ff mov.w r3, #4294967295
|
|
8008b6e: e045 b.n 8008bfc <SCSI_ProcessWrite+0x100>
|
|
}
|
|
|
|
hmsc->scsi_blk_addr += (len / hmsc->scsi_blk_size);
|
|
8008b70: 68fb ldr r3, [r7, #12]
|
|
8008b72: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
|
|
8008b76: 68fb ldr r3, [r7, #12]
|
|
8008b78: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
8008b7c: 4619 mov r1, r3
|
|
8008b7e: 68bb ldr r3, [r7, #8]
|
|
8008b80: fbb3 f3f1 udiv r3, r3, r1
|
|
8008b84: 441a add r2, r3
|
|
8008b86: 68fb ldr r3, [r7, #12]
|
|
8008b88: f8c3 2264 str.w r2, [r3, #612] ; 0x264
|
|
hmsc->scsi_blk_len -= (len / hmsc->scsi_blk_size);
|
|
8008b8c: 68fb ldr r3, [r7, #12]
|
|
8008b8e: f8d3 2268 ldr.w r2, [r3, #616] ; 0x268
|
|
8008b92: 68fb ldr r3, [r7, #12]
|
|
8008b94: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
|
|
8008b98: 4619 mov r1, r3
|
|
8008b9a: 68bb ldr r3, [r7, #8]
|
|
8008b9c: fbb3 f3f1 udiv r3, r3, r1
|
|
8008ba0: 1ad2 subs r2, r2, r3
|
|
8008ba2: 68fb ldr r3, [r7, #12]
|
|
8008ba4: f8c3 2268 str.w r2, [r3, #616] ; 0x268
|
|
|
|
/* case 12 : Ho = Do */
|
|
hmsc->csw.dDataResidue -= len;
|
|
8008ba8: 68fb ldr r3, [r7, #12]
|
|
8008baa: f8d3 2234 ldr.w r2, [r3, #564] ; 0x234
|
|
8008bae: 68bb ldr r3, [r7, #8]
|
|
8008bb0: 1ad2 subs r2, r2, r3
|
|
8008bb2: 68fb ldr r3, [r7, #12]
|
|
8008bb4: f8c3 2234 str.w r2, [r3, #564] ; 0x234
|
|
|
|
if (hmsc->scsi_blk_len == 0U)
|
|
8008bb8: 68fb ldr r3, [r7, #12]
|
|
8008bba: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
8008bbe: 2b00 cmp r3, #0
|
|
8008bc0: d104 bne.n 8008bcc <SCSI_ProcessWrite+0xd0>
|
|
{
|
|
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
|
|
8008bc2: 2100 movs r1, #0
|
|
8008bc4: 6878 ldr r0, [r7, #4]
|
|
8008bc6: f7ff f97f bl 8007ec8 <MSC_BOT_SendCSW>
|
|
8008bca: e016 b.n 8008bfa <SCSI_ProcessWrite+0xfe>
|
|
}
|
|
else
|
|
{
|
|
len = MIN((hmsc->scsi_blk_len * hmsc->scsi_blk_size), MSC_MEDIA_PACKET);
|
|
8008bcc: 68fb ldr r3, [r7, #12]
|
|
8008bce: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
8008bd2: 68fa ldr r2, [r7, #12]
|
|
8008bd4: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
|
|
8008bd8: fb02 f303 mul.w r3, r2, r3
|
|
8008bdc: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8008be0: bf28 it cs
|
|
8008be2: f44f 7300 movcs.w r3, #512 ; 0x200
|
|
8008be6: 60bb str r3, [r7, #8]
|
|
/* Prepare EP to Receive next packet */
|
|
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, hmsc->bot_data, len);
|
|
8008be8: 68fb ldr r3, [r7, #12]
|
|
8008bea: f103 020c add.w r2, r3, #12
|
|
8008bee: 68bb ldr r3, [r7, #8]
|
|
8008bf0: b29b uxth r3, r3
|
|
8008bf2: 2101 movs r1, #1
|
|
8008bf4: 6878 ldr r0, [r7, #4]
|
|
8008bf6: f001 fc70 bl 800a4da <USBD_LL_PrepareReceive>
|
|
}
|
|
|
|
return 0;
|
|
8008bfa: 2300 movs r3, #0
|
|
}
|
|
8008bfc: 4618 mov r0, r3
|
|
8008bfe: 3714 adds r7, #20
|
|
8008c00: 46bd mov sp, r7
|
|
8008c02: bd90 pop {r4, r7, pc}
|
|
|
|
08008c04 <USBD_Init>:
|
|
* @param id: Low level core index
|
|
* @retval None
|
|
*/
|
|
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
|
|
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
|
|
{
|
|
8008c04: b580 push {r7, lr}
|
|
8008c06: b084 sub sp, #16
|
|
8008c08: af00 add r7, sp, #0
|
|
8008c0a: 60f8 str r0, [r7, #12]
|
|
8008c0c: 60b9 str r1, [r7, #8]
|
|
8008c0e: 4613 mov r3, r2
|
|
8008c10: 71fb strb r3, [r7, #7]
|
|
/* Check whether the USB Host handle is valid */
|
|
if (pdev == NULL)
|
|
8008c12: 68fb ldr r3, [r7, #12]
|
|
8008c14: 2b00 cmp r3, #0
|
|
8008c16: d101 bne.n 8008c1c <USBD_Init+0x18>
|
|
{
|
|
#if (USBD_DEBUG_LEVEL > 1U)
|
|
USBD_ErrLog("Invalid Device handle");
|
|
#endif
|
|
return USBD_FAIL;
|
|
8008c18: 2302 movs r3, #2
|
|
8008c1a: e01a b.n 8008c52 <USBD_Init+0x4e>
|
|
}
|
|
|
|
/* Unlink previous class*/
|
|
if (pdev->pClass != NULL)
|
|
8008c1c: 68fb ldr r3, [r7, #12]
|
|
8008c1e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008c22: 2b00 cmp r3, #0
|
|
8008c24: d003 beq.n 8008c2e <USBD_Init+0x2a>
|
|
{
|
|
pdev->pClass = NULL;
|
|
8008c26: 68fb ldr r3, [r7, #12]
|
|
8008c28: 2200 movs r2, #0
|
|
8008c2a: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
|
|
}
|
|
|
|
/* Assign USBD Descriptors */
|
|
if (pdesc != NULL)
|
|
8008c2e: 68bb ldr r3, [r7, #8]
|
|
8008c30: 2b00 cmp r3, #0
|
|
8008c32: d003 beq.n 8008c3c <USBD_Init+0x38>
|
|
{
|
|
pdev->pDesc = pdesc;
|
|
8008c34: 68fb ldr r3, [r7, #12]
|
|
8008c36: 68ba ldr r2, [r7, #8]
|
|
8008c38: f8c3 22b0 str.w r2, [r3, #688] ; 0x2b0
|
|
}
|
|
|
|
/* Set Device initial State */
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
8008c3c: 68fb ldr r3, [r7, #12]
|
|
8008c3e: 2201 movs r2, #1
|
|
8008c40: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
pdev->id = id;
|
|
8008c44: 68fb ldr r3, [r7, #12]
|
|
8008c46: 79fa ldrb r2, [r7, #7]
|
|
8008c48: 701a strb r2, [r3, #0]
|
|
/* Initialize low level driver */
|
|
USBD_LL_Init(pdev);
|
|
8008c4a: 68f8 ldr r0, [r7, #12]
|
|
8008c4c: f001 faca bl 800a1e4 <USBD_LL_Init>
|
|
|
|
return USBD_OK;
|
|
8008c50: 2300 movs r3, #0
|
|
}
|
|
8008c52: 4618 mov r0, r3
|
|
8008c54: 3710 adds r7, #16
|
|
8008c56: 46bd mov sp, r7
|
|
8008c58: bd80 pop {r7, pc}
|
|
|
|
08008c5a <USBD_RegisterClass>:
|
|
* @param pDevice : Device Handle
|
|
* @param pclass: Class handle
|
|
* @retval USBD Status
|
|
*/
|
|
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
|
|
{
|
|
8008c5a: b480 push {r7}
|
|
8008c5c: b085 sub sp, #20
|
|
8008c5e: af00 add r7, sp, #0
|
|
8008c60: 6078 str r0, [r7, #4]
|
|
8008c62: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef status = USBD_OK;
|
|
8008c64: 2300 movs r3, #0
|
|
8008c66: 73fb strb r3, [r7, #15]
|
|
if (pclass != NULL)
|
|
8008c68: 683b ldr r3, [r7, #0]
|
|
8008c6a: 2b00 cmp r3, #0
|
|
8008c6c: d006 beq.n 8008c7c <USBD_RegisterClass+0x22>
|
|
{
|
|
/* link the class to the USB Device handle */
|
|
pdev->pClass = pclass;
|
|
8008c6e: 687b ldr r3, [r7, #4]
|
|
8008c70: 683a ldr r2, [r7, #0]
|
|
8008c72: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
|
|
status = USBD_OK;
|
|
8008c76: 2300 movs r3, #0
|
|
8008c78: 73fb strb r3, [r7, #15]
|
|
8008c7a: e001 b.n 8008c80 <USBD_RegisterClass+0x26>
|
|
else
|
|
{
|
|
#if (USBD_DEBUG_LEVEL > 1U)
|
|
USBD_ErrLog("Invalid Class handle");
|
|
#endif
|
|
status = USBD_FAIL;
|
|
8008c7c: 2302 movs r3, #2
|
|
8008c7e: 73fb strb r3, [r7, #15]
|
|
}
|
|
|
|
return status;
|
|
8008c80: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8008c82: 4618 mov r0, r3
|
|
8008c84: 3714 adds r7, #20
|
|
8008c86: 46bd mov sp, r7
|
|
8008c88: bc80 pop {r7}
|
|
8008c8a: 4770 bx lr
|
|
|
|
08008c8c <USBD_Start>:
|
|
* Start the USB Device Core.
|
|
* @param pdev: Device Handle
|
|
* @retval USBD Status
|
|
*/
|
|
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8008c8c: b580 push {r7, lr}
|
|
8008c8e: b082 sub sp, #8
|
|
8008c90: af00 add r7, sp, #0
|
|
8008c92: 6078 str r0, [r7, #4]
|
|
/* Start the low level driver */
|
|
USBD_LL_Start(pdev);
|
|
8008c94: 6878 ldr r0, [r7, #4]
|
|
8008c96: f001 faf5 bl 800a284 <USBD_LL_Start>
|
|
|
|
return USBD_OK;
|
|
8008c9a: 2300 movs r3, #0
|
|
}
|
|
8008c9c: 4618 mov r0, r3
|
|
8008c9e: 3708 adds r7, #8
|
|
8008ca0: 46bd mov sp, r7
|
|
8008ca2: bd80 pop {r7, pc}
|
|
|
|
08008ca4 <USBD_RunTestMode>:
|
|
* Launch test mode process
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8008ca4: b480 push {r7}
|
|
8008ca6: b083 sub sp, #12
|
|
8008ca8: af00 add r7, sp, #0
|
|
8008caa: 6078 str r0, [r7, #4]
|
|
/* Prevent unused argument compilation warning */
|
|
UNUSED(pdev);
|
|
|
|
return USBD_OK;
|
|
8008cac: 2300 movs r3, #0
|
|
}
|
|
8008cae: 4618 mov r0, r3
|
|
8008cb0: 370c adds r7, #12
|
|
8008cb2: 46bd mov sp, r7
|
|
8008cb4: bc80 pop {r7}
|
|
8008cb6: 4770 bx lr
|
|
|
|
08008cb8 <USBD_SetClassConfig>:
|
|
* @param cfgidx: configuration index
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
8008cb8: b580 push {r7, lr}
|
|
8008cba: b084 sub sp, #16
|
|
8008cbc: af00 add r7, sp, #0
|
|
8008cbe: 6078 str r0, [r7, #4]
|
|
8008cc0: 460b mov r3, r1
|
|
8008cc2: 70fb strb r3, [r7, #3]
|
|
USBD_StatusTypeDef ret = USBD_FAIL;
|
|
8008cc4: 2302 movs r3, #2
|
|
8008cc6: 73fb strb r3, [r7, #15]
|
|
|
|
if (pdev->pClass != NULL)
|
|
8008cc8: 687b ldr r3, [r7, #4]
|
|
8008cca: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008cce: 2b00 cmp r3, #0
|
|
8008cd0: d00c beq.n 8008cec <USBD_SetClassConfig+0x34>
|
|
{
|
|
/* Set configuration and Start the Class*/
|
|
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
|
|
8008cd2: 687b ldr r3, [r7, #4]
|
|
8008cd4: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008cd8: 681b ldr r3, [r3, #0]
|
|
8008cda: 78fa ldrb r2, [r7, #3]
|
|
8008cdc: 4611 mov r1, r2
|
|
8008cde: 6878 ldr r0, [r7, #4]
|
|
8008ce0: 4798 blx r3
|
|
8008ce2: 4603 mov r3, r0
|
|
8008ce4: 2b00 cmp r3, #0
|
|
8008ce6: d101 bne.n 8008cec <USBD_SetClassConfig+0x34>
|
|
{
|
|
ret = USBD_OK;
|
|
8008ce8: 2300 movs r3, #0
|
|
8008cea: 73fb strb r3, [r7, #15]
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
8008cec: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8008cee: 4618 mov r0, r3
|
|
8008cf0: 3710 adds r7, #16
|
|
8008cf2: 46bd mov sp, r7
|
|
8008cf4: bd80 pop {r7, pc}
|
|
|
|
08008cf6 <USBD_ClrClassConfig>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: configuration index
|
|
* @retval status: USBD_StatusTypeDef
|
|
*/
|
|
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
8008cf6: b580 push {r7, lr}
|
|
8008cf8: b082 sub sp, #8
|
|
8008cfa: af00 add r7, sp, #0
|
|
8008cfc: 6078 str r0, [r7, #4]
|
|
8008cfe: 460b mov r3, r1
|
|
8008d00: 70fb strb r3, [r7, #3]
|
|
/* Clear configuration and De-initialize the Class process*/
|
|
pdev->pClass->DeInit(pdev, cfgidx);
|
|
8008d02: 687b ldr r3, [r7, #4]
|
|
8008d04: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008d08: 685b ldr r3, [r3, #4]
|
|
8008d0a: 78fa ldrb r2, [r7, #3]
|
|
8008d0c: 4611 mov r1, r2
|
|
8008d0e: 6878 ldr r0, [r7, #4]
|
|
8008d10: 4798 blx r3
|
|
|
|
return USBD_OK;
|
|
8008d12: 2300 movs r3, #0
|
|
}
|
|
8008d14: 4618 mov r0, r3
|
|
8008d16: 3708 adds r7, #8
|
|
8008d18: 46bd mov sp, r7
|
|
8008d1a: bd80 pop {r7, pc}
|
|
|
|
08008d1c <USBD_LL_SetupStage>:
|
|
* Handle the setup stage
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
|
|
{
|
|
8008d1c: b580 push {r7, lr}
|
|
8008d1e: b082 sub sp, #8
|
|
8008d20: af00 add r7, sp, #0
|
|
8008d22: 6078 str r0, [r7, #4]
|
|
8008d24: 6039 str r1, [r7, #0]
|
|
USBD_ParseSetupRequest(&pdev->request, psetup);
|
|
8008d26: 687b ldr r3, [r7, #4]
|
|
8008d28: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8008d2c: 6839 ldr r1, [r7, #0]
|
|
8008d2e: 4618 mov r0, r3
|
|
8008d30: f000 feca bl 8009ac8 <USBD_ParseSetupRequest>
|
|
|
|
pdev->ep0_state = USBD_EP0_SETUP;
|
|
8008d34: 687b ldr r3, [r7, #4]
|
|
8008d36: 2201 movs r2, #1
|
|
8008d38: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
|
|
pdev->ep0_data_len = pdev->request.wLength;
|
|
8008d3c: 687b ldr r3, [r7, #4]
|
|
8008d3e: f8b3 32ae ldrh.w r3, [r3, #686] ; 0x2ae
|
|
8008d42: 461a mov r2, r3
|
|
8008d44: 687b ldr r3, [r7, #4]
|
|
8008d46: f8c3 2298 str.w r2, [r3, #664] ; 0x298
|
|
|
|
switch (pdev->request.bmRequest & 0x1FU)
|
|
8008d4a: 687b ldr r3, [r7, #4]
|
|
8008d4c: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8008d50: f003 031f and.w r3, r3, #31
|
|
8008d54: 2b01 cmp r3, #1
|
|
8008d56: d00c beq.n 8008d72 <USBD_LL_SetupStage+0x56>
|
|
8008d58: 2b01 cmp r3, #1
|
|
8008d5a: d302 bcc.n 8008d62 <USBD_LL_SetupStage+0x46>
|
|
8008d5c: 2b02 cmp r3, #2
|
|
8008d5e: d010 beq.n 8008d82 <USBD_LL_SetupStage+0x66>
|
|
8008d60: e017 b.n 8008d92 <USBD_LL_SetupStage+0x76>
|
|
{
|
|
case USB_REQ_RECIPIENT_DEVICE:
|
|
USBD_StdDevReq(pdev, &pdev->request);
|
|
8008d62: 687b ldr r3, [r7, #4]
|
|
8008d64: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8008d68: 4619 mov r1, r3
|
|
8008d6a: 6878 ldr r0, [r7, #4]
|
|
8008d6c: f000 f9ca bl 8009104 <USBD_StdDevReq>
|
|
break;
|
|
8008d70: e01a b.n 8008da8 <USBD_LL_SetupStage+0x8c>
|
|
|
|
case USB_REQ_RECIPIENT_INTERFACE:
|
|
USBD_StdItfReq(pdev, &pdev->request);
|
|
8008d72: 687b ldr r3, [r7, #4]
|
|
8008d74: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8008d78: 4619 mov r1, r3
|
|
8008d7a: 6878 ldr r0, [r7, #4]
|
|
8008d7c: f000 fa2c bl 80091d8 <USBD_StdItfReq>
|
|
break;
|
|
8008d80: e012 b.n 8008da8 <USBD_LL_SetupStage+0x8c>
|
|
|
|
case USB_REQ_RECIPIENT_ENDPOINT:
|
|
USBD_StdEPReq(pdev, &pdev->request);
|
|
8008d82: 687b ldr r3, [r7, #4]
|
|
8008d84: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8008d88: 4619 mov r1, r3
|
|
8008d8a: 6878 ldr r0, [r7, #4]
|
|
8008d8c: f000 fa6a bl 8009264 <USBD_StdEPReq>
|
|
break;
|
|
8008d90: e00a b.n 8008da8 <USBD_LL_SetupStage+0x8c>
|
|
|
|
default:
|
|
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
|
|
8008d92: 687b ldr r3, [r7, #4]
|
|
8008d94: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8008d98: f023 037f bic.w r3, r3, #127 ; 0x7f
|
|
8008d9c: b2db uxtb r3, r3
|
|
8008d9e: 4619 mov r1, r3
|
|
8008da0: 6878 ldr r0, [r7, #4]
|
|
8008da2: f001 faee bl 800a382 <USBD_LL_StallEP>
|
|
break;
|
|
8008da6: bf00 nop
|
|
}
|
|
|
|
return USBD_OK;
|
|
8008da8: 2300 movs r3, #0
|
|
}
|
|
8008daa: 4618 mov r0, r3
|
|
8008dac: 3708 adds r7, #8
|
|
8008dae: 46bd mov sp, r7
|
|
8008db0: bd80 pop {r7, pc}
|
|
|
|
08008db2 <USBD_LL_DataOutStage>:
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum, uint8_t *pdata)
|
|
{
|
|
8008db2: b580 push {r7, lr}
|
|
8008db4: b086 sub sp, #24
|
|
8008db6: af00 add r7, sp, #0
|
|
8008db8: 60f8 str r0, [r7, #12]
|
|
8008dba: 460b mov r3, r1
|
|
8008dbc: 607a str r2, [r7, #4]
|
|
8008dbe: 72fb strb r3, [r7, #11]
|
|
USBD_EndpointTypeDef *pep;
|
|
|
|
if (epnum == 0U)
|
|
8008dc0: 7afb ldrb r3, [r7, #11]
|
|
8008dc2: 2b00 cmp r3, #0
|
|
8008dc4: d14b bne.n 8008e5e <USBD_LL_DataOutStage+0xac>
|
|
{
|
|
pep = &pdev->ep_out[0];
|
|
8008dc6: 68fb ldr r3, [r7, #12]
|
|
8008dc8: f503 73aa add.w r3, r3, #340 ; 0x154
|
|
8008dcc: 617b str r3, [r7, #20]
|
|
|
|
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
|
|
8008dce: 68fb ldr r3, [r7, #12]
|
|
8008dd0: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8008dd4: 2b03 cmp r3, #3
|
|
8008dd6: d134 bne.n 8008e42 <USBD_LL_DataOutStage+0x90>
|
|
{
|
|
if (pep->rem_length > pep->maxpacket)
|
|
8008dd8: 697b ldr r3, [r7, #20]
|
|
8008dda: 68da ldr r2, [r3, #12]
|
|
8008ddc: 697b ldr r3, [r7, #20]
|
|
8008dde: 691b ldr r3, [r3, #16]
|
|
8008de0: 429a cmp r2, r3
|
|
8008de2: d919 bls.n 8008e18 <USBD_LL_DataOutStage+0x66>
|
|
{
|
|
pep->rem_length -= pep->maxpacket;
|
|
8008de4: 697b ldr r3, [r7, #20]
|
|
8008de6: 68da ldr r2, [r3, #12]
|
|
8008de8: 697b ldr r3, [r7, #20]
|
|
8008dea: 691b ldr r3, [r3, #16]
|
|
8008dec: 1ad2 subs r2, r2, r3
|
|
8008dee: 697b ldr r3, [r7, #20]
|
|
8008df0: 60da str r2, [r3, #12]
|
|
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
8008df2: 697b ldr r3, [r7, #20]
|
|
8008df4: 68da ldr r2, [r3, #12]
|
|
8008df6: 697b ldr r3, [r7, #20]
|
|
8008df8: 691b ldr r3, [r3, #16]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
8008dfa: 429a cmp r2, r3
|
|
8008dfc: d203 bcs.n 8008e06 <USBD_LL_DataOutStage+0x54>
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
8008dfe: 697b ldr r3, [r7, #20]
|
|
8008e00: 68db ldr r3, [r3, #12]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
8008e02: b29b uxth r3, r3
|
|
8008e04: e002 b.n 8008e0c <USBD_LL_DataOutStage+0x5a>
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
8008e06: 697b ldr r3, [r7, #20]
|
|
8008e08: 691b ldr r3, [r3, #16]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
8008e0a: b29b uxth r3, r3
|
|
8008e0c: 461a mov r2, r3
|
|
8008e0e: 6879 ldr r1, [r7, #4]
|
|
8008e10: 68f8 ldr r0, [r7, #12]
|
|
8008e12: f000 ff2d bl 8009c70 <USBD_CtlContinueRx>
|
|
8008e16: e038 b.n 8008e8a <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->pClass->EP0_RxReady != NULL) &&
|
|
8008e18: 68fb ldr r3, [r7, #12]
|
|
8008e1a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008e1e: 691b ldr r3, [r3, #16]
|
|
8008e20: 2b00 cmp r3, #0
|
|
8008e22: d00a beq.n 8008e3a <USBD_LL_DataOutStage+0x88>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8008e24: 68fb ldr r3, [r7, #12]
|
|
8008e26: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
if ((pdev->pClass->EP0_RxReady != NULL) &&
|
|
8008e2a: 2b03 cmp r3, #3
|
|
8008e2c: d105 bne.n 8008e3a <USBD_LL_DataOutStage+0x88>
|
|
{
|
|
pdev->pClass->EP0_RxReady(pdev);
|
|
8008e2e: 68fb ldr r3, [r7, #12]
|
|
8008e30: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008e34: 691b ldr r3, [r3, #16]
|
|
8008e36: 68f8 ldr r0, [r7, #12]
|
|
8008e38: 4798 blx r3
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
8008e3a: 68f8 ldr r0, [r7, #12]
|
|
8008e3c: f000 ff2a bl 8009c94 <USBD_CtlSendStatus>
|
|
8008e40: e023 b.n 8008e8a <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
|
|
8008e42: 68fb ldr r3, [r7, #12]
|
|
8008e44: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8008e48: 2b05 cmp r3, #5
|
|
8008e4a: d11e bne.n 8008e8a <USBD_LL_DataOutStage+0xd8>
|
|
{
|
|
/*
|
|
* STATUS PHASE completed, update ep0_state to idle
|
|
*/
|
|
pdev->ep0_state = USBD_EP0_IDLE;
|
|
8008e4c: 68fb ldr r3, [r7, #12]
|
|
8008e4e: 2200 movs r2, #0
|
|
8008e50: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
USBD_LL_StallEP(pdev, 0U);
|
|
8008e54: 2100 movs r1, #0
|
|
8008e56: 68f8 ldr r0, [r7, #12]
|
|
8008e58: f001 fa93 bl 800a382 <USBD_LL_StallEP>
|
|
8008e5c: e015 b.n 8008e8a <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
}
|
|
}
|
|
else if ((pdev->pClass->DataOut != NULL) &&
|
|
8008e5e: 68fb ldr r3, [r7, #12]
|
|
8008e60: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008e64: 699b ldr r3, [r3, #24]
|
|
8008e66: 2b00 cmp r3, #0
|
|
8008e68: d00d beq.n 8008e86 <USBD_LL_DataOutStage+0xd4>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8008e6a: 68fb ldr r3, [r7, #12]
|
|
8008e6c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
else if ((pdev->pClass->DataOut != NULL) &&
|
|
8008e70: 2b03 cmp r3, #3
|
|
8008e72: d108 bne.n 8008e86 <USBD_LL_DataOutStage+0xd4>
|
|
{
|
|
pdev->pClass->DataOut(pdev, epnum);
|
|
8008e74: 68fb ldr r3, [r7, #12]
|
|
8008e76: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008e7a: 699b ldr r3, [r3, #24]
|
|
8008e7c: 7afa ldrb r2, [r7, #11]
|
|
8008e7e: 4611 mov r1, r2
|
|
8008e80: 68f8 ldr r0, [r7, #12]
|
|
8008e82: 4798 blx r3
|
|
8008e84: e001 b.n 8008e8a <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
else
|
|
{
|
|
/* should never be in this condition */
|
|
return USBD_FAIL;
|
|
8008e86: 2302 movs r3, #2
|
|
8008e88: e000 b.n 8008e8c <USBD_LL_DataOutStage+0xda>
|
|
}
|
|
|
|
return USBD_OK;
|
|
8008e8a: 2300 movs r3, #0
|
|
}
|
|
8008e8c: 4618 mov r0, r3
|
|
8008e8e: 3718 adds r7, #24
|
|
8008e90: 46bd mov sp, r7
|
|
8008e92: bd80 pop {r7, pc}
|
|
|
|
08008e94 <USBD_LL_DataInStage>:
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum, uint8_t *pdata)
|
|
{
|
|
8008e94: b580 push {r7, lr}
|
|
8008e96: b086 sub sp, #24
|
|
8008e98: af00 add r7, sp, #0
|
|
8008e9a: 60f8 str r0, [r7, #12]
|
|
8008e9c: 460b mov r3, r1
|
|
8008e9e: 607a str r2, [r7, #4]
|
|
8008ea0: 72fb strb r3, [r7, #11]
|
|
USBD_EndpointTypeDef *pep;
|
|
|
|
if (epnum == 0U)
|
|
8008ea2: 7afb ldrb r3, [r7, #11]
|
|
8008ea4: 2b00 cmp r3, #0
|
|
8008ea6: d17f bne.n 8008fa8 <USBD_LL_DataInStage+0x114>
|
|
{
|
|
pep = &pdev->ep_in[0];
|
|
8008ea8: 68fb ldr r3, [r7, #12]
|
|
8008eaa: 3314 adds r3, #20
|
|
8008eac: 617b str r3, [r7, #20]
|
|
|
|
if (pdev->ep0_state == USBD_EP0_DATA_IN)
|
|
8008eae: 68fb ldr r3, [r7, #12]
|
|
8008eb0: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8008eb4: 2b02 cmp r3, #2
|
|
8008eb6: d15c bne.n 8008f72 <USBD_LL_DataInStage+0xde>
|
|
{
|
|
if (pep->rem_length > pep->maxpacket)
|
|
8008eb8: 697b ldr r3, [r7, #20]
|
|
8008eba: 68da ldr r2, [r3, #12]
|
|
8008ebc: 697b ldr r3, [r7, #20]
|
|
8008ebe: 691b ldr r3, [r3, #16]
|
|
8008ec0: 429a cmp r2, r3
|
|
8008ec2: d915 bls.n 8008ef0 <USBD_LL_DataInStage+0x5c>
|
|
{
|
|
pep->rem_length -= pep->maxpacket;
|
|
8008ec4: 697b ldr r3, [r7, #20]
|
|
8008ec6: 68da ldr r2, [r3, #12]
|
|
8008ec8: 697b ldr r3, [r7, #20]
|
|
8008eca: 691b ldr r3, [r3, #16]
|
|
8008ecc: 1ad2 subs r2, r2, r3
|
|
8008ece: 697b ldr r3, [r7, #20]
|
|
8008ed0: 60da str r2, [r3, #12]
|
|
|
|
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
|
|
8008ed2: 697b ldr r3, [r7, #20]
|
|
8008ed4: 68db ldr r3, [r3, #12]
|
|
8008ed6: b29b uxth r3, r3
|
|
8008ed8: 461a mov r2, r3
|
|
8008eda: 6879 ldr r1, [r7, #4]
|
|
8008edc: 68f8 ldr r0, [r7, #12]
|
|
8008ede: f000 feb5 bl 8009c4c <USBD_CtlContinueSendData>
|
|
|
|
/* Prepare endpoint for premature end of transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
8008ee2: 2300 movs r3, #0
|
|
8008ee4: 2200 movs r2, #0
|
|
8008ee6: 2100 movs r1, #0
|
|
8008ee8: 68f8 ldr r0, [r7, #12]
|
|
8008eea: f001 faf6 bl 800a4da <USBD_LL_PrepareReceive>
|
|
8008eee: e04e b.n 8008f8e <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
else
|
|
{
|
|
/* last packet is MPS multiple, so send ZLP packet */
|
|
if ((pep->total_length % pep->maxpacket == 0U) &&
|
|
8008ef0: 697b ldr r3, [r7, #20]
|
|
8008ef2: 689b ldr r3, [r3, #8]
|
|
8008ef4: 697a ldr r2, [r7, #20]
|
|
8008ef6: 6912 ldr r2, [r2, #16]
|
|
8008ef8: fbb3 f1f2 udiv r1, r3, r2
|
|
8008efc: fb02 f201 mul.w r2, r2, r1
|
|
8008f00: 1a9b subs r3, r3, r2
|
|
8008f02: 2b00 cmp r3, #0
|
|
8008f04: d11c bne.n 8008f40 <USBD_LL_DataInStage+0xac>
|
|
(pep->total_length >= pep->maxpacket) &&
|
|
8008f06: 697b ldr r3, [r7, #20]
|
|
8008f08: 689a ldr r2, [r3, #8]
|
|
8008f0a: 697b ldr r3, [r7, #20]
|
|
8008f0c: 691b ldr r3, [r3, #16]
|
|
if ((pep->total_length % pep->maxpacket == 0U) &&
|
|
8008f0e: 429a cmp r2, r3
|
|
8008f10: d316 bcc.n 8008f40 <USBD_LL_DataInStage+0xac>
|
|
(pep->total_length < pdev->ep0_data_len))
|
|
8008f12: 697b ldr r3, [r7, #20]
|
|
8008f14: 689a ldr r2, [r3, #8]
|
|
8008f16: 68fb ldr r3, [r7, #12]
|
|
8008f18: f8d3 3298 ldr.w r3, [r3, #664] ; 0x298
|
|
(pep->total_length >= pep->maxpacket) &&
|
|
8008f1c: 429a cmp r2, r3
|
|
8008f1e: d20f bcs.n 8008f40 <USBD_LL_DataInStage+0xac>
|
|
{
|
|
USBD_CtlContinueSendData(pdev, NULL, 0U);
|
|
8008f20: 2200 movs r2, #0
|
|
8008f22: 2100 movs r1, #0
|
|
8008f24: 68f8 ldr r0, [r7, #12]
|
|
8008f26: f000 fe91 bl 8009c4c <USBD_CtlContinueSendData>
|
|
pdev->ep0_data_len = 0U;
|
|
8008f2a: 68fb ldr r3, [r7, #12]
|
|
8008f2c: 2200 movs r2, #0
|
|
8008f2e: f8c3 2298 str.w r2, [r3, #664] ; 0x298
|
|
|
|
/* Prepare endpoint for premature end of transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
8008f32: 2300 movs r3, #0
|
|
8008f34: 2200 movs r2, #0
|
|
8008f36: 2100 movs r1, #0
|
|
8008f38: 68f8 ldr r0, [r7, #12]
|
|
8008f3a: f001 face bl 800a4da <USBD_LL_PrepareReceive>
|
|
8008f3e: e026 b.n 8008f8e <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->pClass->EP0_TxSent != NULL) &&
|
|
8008f40: 68fb ldr r3, [r7, #12]
|
|
8008f42: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008f46: 68db ldr r3, [r3, #12]
|
|
8008f48: 2b00 cmp r3, #0
|
|
8008f4a: d00a beq.n 8008f62 <USBD_LL_DataInStage+0xce>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8008f4c: 68fb ldr r3, [r7, #12]
|
|
8008f4e: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
if ((pdev->pClass->EP0_TxSent != NULL) &&
|
|
8008f52: 2b03 cmp r3, #3
|
|
8008f54: d105 bne.n 8008f62 <USBD_LL_DataInStage+0xce>
|
|
{
|
|
pdev->pClass->EP0_TxSent(pdev);
|
|
8008f56: 68fb ldr r3, [r7, #12]
|
|
8008f58: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008f5c: 68db ldr r3, [r3, #12]
|
|
8008f5e: 68f8 ldr r0, [r7, #12]
|
|
8008f60: 4798 blx r3
|
|
}
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8008f62: 2180 movs r1, #128 ; 0x80
|
|
8008f64: 68f8 ldr r0, [r7, #12]
|
|
8008f66: f001 fa0c bl 800a382 <USBD_LL_StallEP>
|
|
USBD_CtlReceiveStatus(pdev);
|
|
8008f6a: 68f8 ldr r0, [r7, #12]
|
|
8008f6c: f000 fea5 bl 8009cba <USBD_CtlReceiveStatus>
|
|
8008f70: e00d b.n 8008f8e <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
|
|
8008f72: 68fb ldr r3, [r7, #12]
|
|
8008f74: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8008f78: 2b04 cmp r3, #4
|
|
8008f7a: d004 beq.n 8008f86 <USBD_LL_DataInStage+0xf2>
|
|
(pdev->ep0_state == USBD_EP0_IDLE))
|
|
8008f7c: 68fb ldr r3, [r7, #12]
|
|
8008f7e: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
|
|
8008f82: 2b00 cmp r3, #0
|
|
8008f84: d103 bne.n 8008f8e <USBD_LL_DataInStage+0xfa>
|
|
{
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8008f86: 2180 movs r1, #128 ; 0x80
|
|
8008f88: 68f8 ldr r0, [r7, #12]
|
|
8008f8a: f001 f9fa bl 800a382 <USBD_LL_StallEP>
|
|
}
|
|
}
|
|
|
|
if (pdev->dev_test_mode == 1U)
|
|
8008f8e: 68fb ldr r3, [r7, #12]
|
|
8008f90: f893 32a0 ldrb.w r3, [r3, #672] ; 0x2a0
|
|
8008f94: 2b01 cmp r3, #1
|
|
8008f96: d11d bne.n 8008fd4 <USBD_LL_DataInStage+0x140>
|
|
{
|
|
USBD_RunTestMode(pdev);
|
|
8008f98: 68f8 ldr r0, [r7, #12]
|
|
8008f9a: f7ff fe83 bl 8008ca4 <USBD_RunTestMode>
|
|
pdev->dev_test_mode = 0U;
|
|
8008f9e: 68fb ldr r3, [r7, #12]
|
|
8008fa0: 2200 movs r2, #0
|
|
8008fa2: f883 22a0 strb.w r2, [r3, #672] ; 0x2a0
|
|
8008fa6: e015 b.n 8008fd4 <USBD_LL_DataInStage+0x140>
|
|
}
|
|
}
|
|
else if ((pdev->pClass->DataIn != NULL) &&
|
|
8008fa8: 68fb ldr r3, [r7, #12]
|
|
8008faa: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008fae: 695b ldr r3, [r3, #20]
|
|
8008fb0: 2b00 cmp r3, #0
|
|
8008fb2: d00d beq.n 8008fd0 <USBD_LL_DataInStage+0x13c>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8008fb4: 68fb ldr r3, [r7, #12]
|
|
8008fb6: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
else if ((pdev->pClass->DataIn != NULL) &&
|
|
8008fba: 2b03 cmp r3, #3
|
|
8008fbc: d108 bne.n 8008fd0 <USBD_LL_DataInStage+0x13c>
|
|
{
|
|
pdev->pClass->DataIn(pdev, epnum);
|
|
8008fbe: 68fb ldr r3, [r7, #12]
|
|
8008fc0: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8008fc4: 695b ldr r3, [r3, #20]
|
|
8008fc6: 7afa ldrb r2, [r7, #11]
|
|
8008fc8: 4611 mov r1, r2
|
|
8008fca: 68f8 ldr r0, [r7, #12]
|
|
8008fcc: 4798 blx r3
|
|
8008fce: e001 b.n 8008fd4 <USBD_LL_DataInStage+0x140>
|
|
}
|
|
else
|
|
{
|
|
/* should never be in this condition */
|
|
return USBD_FAIL;
|
|
8008fd0: 2302 movs r3, #2
|
|
8008fd2: e000 b.n 8008fd6 <USBD_LL_DataInStage+0x142>
|
|
}
|
|
|
|
return USBD_OK;
|
|
8008fd4: 2300 movs r3, #0
|
|
}
|
|
8008fd6: 4618 mov r0, r3
|
|
8008fd8: 3718 adds r7, #24
|
|
8008fda: 46bd mov sp, r7
|
|
8008fdc: bd80 pop {r7, pc}
|
|
|
|
08008fde <USBD_LL_Reset>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8008fde: b580 push {r7, lr}
|
|
8008fe0: b082 sub sp, #8
|
|
8008fe2: af00 add r7, sp, #0
|
|
8008fe4: 6078 str r0, [r7, #4]
|
|
/* Open EP0 OUT */
|
|
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
|
|
8008fe6: 2340 movs r3, #64 ; 0x40
|
|
8008fe8: 2200 movs r2, #0
|
|
8008fea: 2100 movs r1, #0
|
|
8008fec: 6878 ldr r0, [r7, #4]
|
|
8008fee: f001 f964 bl 800a2ba <USBD_LL_OpenEP>
|
|
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
|
|
8008ff2: 687b ldr r3, [r7, #4]
|
|
8008ff4: 2201 movs r2, #1
|
|
8008ff6: f8c3 2158 str.w r2, [r3, #344] ; 0x158
|
|
|
|
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
|
|
8008ffa: 687b ldr r3, [r7, #4]
|
|
8008ffc: 2240 movs r2, #64 ; 0x40
|
|
8008ffe: f8c3 2164 str.w r2, [r3, #356] ; 0x164
|
|
|
|
/* Open EP0 IN */
|
|
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
|
|
8009002: 2340 movs r3, #64 ; 0x40
|
|
8009004: 2200 movs r2, #0
|
|
8009006: 2180 movs r1, #128 ; 0x80
|
|
8009008: 6878 ldr r0, [r7, #4]
|
|
800900a: f001 f956 bl 800a2ba <USBD_LL_OpenEP>
|
|
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
|
|
800900e: 687b ldr r3, [r7, #4]
|
|
8009010: 2201 movs r2, #1
|
|
8009012: 619a str r2, [r3, #24]
|
|
|
|
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
|
|
8009014: 687b ldr r3, [r7, #4]
|
|
8009016: 2240 movs r2, #64 ; 0x40
|
|
8009018: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Upon Reset call user call back */
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
800901a: 687b ldr r3, [r7, #4]
|
|
800901c: 2201 movs r2, #1
|
|
800901e: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
pdev->ep0_state = USBD_EP0_IDLE;
|
|
8009022: 687b ldr r3, [r7, #4]
|
|
8009024: 2200 movs r2, #0
|
|
8009026: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
pdev->dev_config = 0U;
|
|
800902a: 687b ldr r3, [r7, #4]
|
|
800902c: 2200 movs r2, #0
|
|
800902e: 605a str r2, [r3, #4]
|
|
pdev->dev_remote_wakeup = 0U;
|
|
8009030: 687b ldr r3, [r7, #4]
|
|
8009032: 2200 movs r2, #0
|
|
8009034: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
|
|
|
|
if (pdev->pClassData)
|
|
8009038: 687b ldr r3, [r7, #4]
|
|
800903a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800903e: 2b00 cmp r3, #0
|
|
8009040: d009 beq.n 8009056 <USBD_LL_Reset+0x78>
|
|
{
|
|
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
|
|
8009042: 687b ldr r3, [r7, #4]
|
|
8009044: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8009048: 685b ldr r3, [r3, #4]
|
|
800904a: 687a ldr r2, [r7, #4]
|
|
800904c: 6852 ldr r2, [r2, #4]
|
|
800904e: b2d2 uxtb r2, r2
|
|
8009050: 4611 mov r1, r2
|
|
8009052: 6878 ldr r0, [r7, #4]
|
|
8009054: 4798 blx r3
|
|
}
|
|
|
|
return USBD_OK;
|
|
8009056: 2300 movs r3, #0
|
|
}
|
|
8009058: 4618 mov r0, r3
|
|
800905a: 3708 adds r7, #8
|
|
800905c: 46bd mov sp, r7
|
|
800905e: bd80 pop {r7, pc}
|
|
|
|
08009060 <USBD_LL_SetSpeed>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
|
|
USBD_SpeedTypeDef speed)
|
|
{
|
|
8009060: b480 push {r7}
|
|
8009062: b083 sub sp, #12
|
|
8009064: af00 add r7, sp, #0
|
|
8009066: 6078 str r0, [r7, #4]
|
|
8009068: 460b mov r3, r1
|
|
800906a: 70fb strb r3, [r7, #3]
|
|
pdev->dev_speed = speed;
|
|
800906c: 687b ldr r3, [r7, #4]
|
|
800906e: 78fa ldrb r2, [r7, #3]
|
|
8009070: 741a strb r2, [r3, #16]
|
|
|
|
return USBD_OK;
|
|
8009072: 2300 movs r3, #0
|
|
}
|
|
8009074: 4618 mov r0, r3
|
|
8009076: 370c adds r7, #12
|
|
8009078: 46bd mov sp, r7
|
|
800907a: bc80 pop {r7}
|
|
800907c: 4770 bx lr
|
|
|
|
0800907e <USBD_LL_Suspend>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800907e: b480 push {r7}
|
|
8009080: b083 sub sp, #12
|
|
8009082: af00 add r7, sp, #0
|
|
8009084: 6078 str r0, [r7, #4]
|
|
pdev->dev_old_state = pdev->dev_state;
|
|
8009086: 687b ldr r3, [r7, #4]
|
|
8009088: f893 229c ldrb.w r2, [r3, #668] ; 0x29c
|
|
800908c: 687b ldr r3, [r7, #4]
|
|
800908e: f883 229d strb.w r2, [r3, #669] ; 0x29d
|
|
pdev->dev_state = USBD_STATE_SUSPENDED;
|
|
8009092: 687b ldr r3, [r7, #4]
|
|
8009094: 2204 movs r2, #4
|
|
8009096: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
|
|
return USBD_OK;
|
|
800909a: 2300 movs r3, #0
|
|
}
|
|
800909c: 4618 mov r0, r3
|
|
800909e: 370c adds r7, #12
|
|
80090a0: 46bd mov sp, r7
|
|
80090a2: bc80 pop {r7}
|
|
80090a4: 4770 bx lr
|
|
|
|
080090a6 <USBD_LL_Resume>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
|
|
{
|
|
80090a6: b480 push {r7}
|
|
80090a8: b083 sub sp, #12
|
|
80090aa: af00 add r7, sp, #0
|
|
80090ac: 6078 str r0, [r7, #4]
|
|
if (pdev->dev_state == USBD_STATE_SUSPENDED)
|
|
80090ae: 687b ldr r3, [r7, #4]
|
|
80090b0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80090b4: 2b04 cmp r3, #4
|
|
80090b6: d105 bne.n 80090c4 <USBD_LL_Resume+0x1e>
|
|
{
|
|
pdev->dev_state = pdev->dev_old_state;
|
|
80090b8: 687b ldr r3, [r7, #4]
|
|
80090ba: f893 229d ldrb.w r2, [r3, #669] ; 0x29d
|
|
80090be: 687b ldr r3, [r7, #4]
|
|
80090c0: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
}
|
|
|
|
return USBD_OK;
|
|
80090c4: 2300 movs r3, #0
|
|
}
|
|
80090c6: 4618 mov r0, r3
|
|
80090c8: 370c adds r7, #12
|
|
80090ca: 46bd mov sp, r7
|
|
80090cc: bc80 pop {r7}
|
|
80090ce: 4770 bx lr
|
|
|
|
080090d0 <USBD_LL_SOF>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
|
|
{
|
|
80090d0: b580 push {r7, lr}
|
|
80090d2: b082 sub sp, #8
|
|
80090d4: af00 add r7, sp, #0
|
|
80090d6: 6078 str r0, [r7, #4]
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
80090d8: 687b ldr r3, [r7, #4]
|
|
80090da: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80090de: 2b03 cmp r3, #3
|
|
80090e0: d10b bne.n 80090fa <USBD_LL_SOF+0x2a>
|
|
{
|
|
if (pdev->pClass->SOF != NULL)
|
|
80090e2: 687b ldr r3, [r7, #4]
|
|
80090e4: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80090e8: 69db ldr r3, [r3, #28]
|
|
80090ea: 2b00 cmp r3, #0
|
|
80090ec: d005 beq.n 80090fa <USBD_LL_SOF+0x2a>
|
|
{
|
|
pdev->pClass->SOF(pdev);
|
|
80090ee: 687b ldr r3, [r7, #4]
|
|
80090f0: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80090f4: 69db ldr r3, [r3, #28]
|
|
80090f6: 6878 ldr r0, [r7, #4]
|
|
80090f8: 4798 blx r3
|
|
}
|
|
}
|
|
|
|
return USBD_OK;
|
|
80090fa: 2300 movs r3, #0
|
|
}
|
|
80090fc: 4618 mov r0, r3
|
|
80090fe: 3708 adds r7, #8
|
|
8009100: 46bd mov sp, r7
|
|
8009102: bd80 pop {r7, pc}
|
|
|
|
08009104 <USBD_StdDevReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8009104: b580 push {r7, lr}
|
|
8009106: b084 sub sp, #16
|
|
8009108: af00 add r7, sp, #0
|
|
800910a: 6078 str r0, [r7, #4]
|
|
800910c: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
800910e: 2300 movs r3, #0
|
|
8009110: 73fb strb r3, [r7, #15]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
8009112: 683b ldr r3, [r7, #0]
|
|
8009114: 781b ldrb r3, [r3, #0]
|
|
8009116: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
800911a: 2b20 cmp r3, #32
|
|
800911c: d004 beq.n 8009128 <USBD_StdDevReq+0x24>
|
|
800911e: 2b40 cmp r3, #64 ; 0x40
|
|
8009120: d002 beq.n 8009128 <USBD_StdDevReq+0x24>
|
|
8009122: 2b00 cmp r3, #0
|
|
8009124: d008 beq.n 8009138 <USBD_StdDevReq+0x34>
|
|
8009126: e04c b.n 80091c2 <USBD_StdDevReq+0xbe>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
pdev->pClass->Setup(pdev, req);
|
|
8009128: 687b ldr r3, [r7, #4]
|
|
800912a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
800912e: 689b ldr r3, [r3, #8]
|
|
8009130: 6839 ldr r1, [r7, #0]
|
|
8009132: 6878 ldr r0, [r7, #4]
|
|
8009134: 4798 blx r3
|
|
break;
|
|
8009136: e049 b.n 80091cc <USBD_StdDevReq+0xc8>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (req->bRequest)
|
|
8009138: 683b ldr r3, [r7, #0]
|
|
800913a: 785b ldrb r3, [r3, #1]
|
|
800913c: 2b09 cmp r3, #9
|
|
800913e: d83a bhi.n 80091b6 <USBD_StdDevReq+0xb2>
|
|
8009140: a201 add r2, pc, #4 ; (adr r2, 8009148 <USBD_StdDevReq+0x44>)
|
|
8009142: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8009146: bf00 nop
|
|
8009148: 08009199 .word 0x08009199
|
|
800914c: 080091ad .word 0x080091ad
|
|
8009150: 080091b7 .word 0x080091b7
|
|
8009154: 080091a3 .word 0x080091a3
|
|
8009158: 080091b7 .word 0x080091b7
|
|
800915c: 0800917b .word 0x0800917b
|
|
8009160: 08009171 .word 0x08009171
|
|
8009164: 080091b7 .word 0x080091b7
|
|
8009168: 0800918f .word 0x0800918f
|
|
800916c: 08009185 .word 0x08009185
|
|
{
|
|
case USB_REQ_GET_DESCRIPTOR:
|
|
USBD_GetDescriptor(pdev, req);
|
|
8009170: 6839 ldr r1, [r7, #0]
|
|
8009172: 6878 ldr r0, [r7, #4]
|
|
8009174: f000 f9d4 bl 8009520 <USBD_GetDescriptor>
|
|
break;
|
|
8009178: e022 b.n 80091c0 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_ADDRESS:
|
|
USBD_SetAddress(pdev, req);
|
|
800917a: 6839 ldr r1, [r7, #0]
|
|
800917c: 6878 ldr r0, [r7, #4]
|
|
800917e: f000 fb37 bl 80097f0 <USBD_SetAddress>
|
|
break;
|
|
8009182: e01d b.n 80091c0 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_CONFIGURATION:
|
|
USBD_SetConfig(pdev, req);
|
|
8009184: 6839 ldr r1, [r7, #0]
|
|
8009186: 6878 ldr r0, [r7, #4]
|
|
8009188: f000 fb74 bl 8009874 <USBD_SetConfig>
|
|
break;
|
|
800918c: e018 b.n 80091c0 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_GET_CONFIGURATION:
|
|
USBD_GetConfig(pdev, req);
|
|
800918e: 6839 ldr r1, [r7, #0]
|
|
8009190: 6878 ldr r0, [r7, #4]
|
|
8009192: f000 fbfd bl 8009990 <USBD_GetConfig>
|
|
break;
|
|
8009196: e013 b.n 80091c0 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_GET_STATUS:
|
|
USBD_GetStatus(pdev, req);
|
|
8009198: 6839 ldr r1, [r7, #0]
|
|
800919a: 6878 ldr r0, [r7, #4]
|
|
800919c: f000 fc2c bl 80099f8 <USBD_GetStatus>
|
|
break;
|
|
80091a0: e00e b.n 80091c0 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_FEATURE:
|
|
USBD_SetFeature(pdev, req);
|
|
80091a2: 6839 ldr r1, [r7, #0]
|
|
80091a4: 6878 ldr r0, [r7, #4]
|
|
80091a6: f000 fc5a bl 8009a5e <USBD_SetFeature>
|
|
break;
|
|
80091aa: e009 b.n 80091c0 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
USBD_ClrFeature(pdev, req);
|
|
80091ac: 6839 ldr r1, [r7, #0]
|
|
80091ae: 6878 ldr r0, [r7, #4]
|
|
80091b0: f000 fc69 bl 8009a86 <USBD_ClrFeature>
|
|
break;
|
|
80091b4: e004 b.n 80091c0 <USBD_StdDevReq+0xbc>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80091b6: 6839 ldr r1, [r7, #0]
|
|
80091b8: 6878 ldr r0, [r7, #4]
|
|
80091ba: f000 fcc1 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
80091be: bf00 nop
|
|
}
|
|
break;
|
|
80091c0: e004 b.n 80091cc <USBD_StdDevReq+0xc8>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80091c2: 6839 ldr r1, [r7, #0]
|
|
80091c4: 6878 ldr r0, [r7, #4]
|
|
80091c6: f000 fcbb bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
80091ca: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
80091cc: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80091ce: 4618 mov r0, r3
|
|
80091d0: 3710 adds r7, #16
|
|
80091d2: 46bd mov sp, r7
|
|
80091d4: bd80 pop {r7, pc}
|
|
80091d6: bf00 nop
|
|
|
|
080091d8 <USBD_StdItfReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
80091d8: b580 push {r7, lr}
|
|
80091da: b084 sub sp, #16
|
|
80091dc: af00 add r7, sp, #0
|
|
80091de: 6078 str r0, [r7, #4]
|
|
80091e0: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
80091e2: 2300 movs r3, #0
|
|
80091e4: 73fb strb r3, [r7, #15]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
80091e6: 683b ldr r3, [r7, #0]
|
|
80091e8: 781b ldrb r3, [r3, #0]
|
|
80091ea: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
80091ee: 2b20 cmp r3, #32
|
|
80091f0: d003 beq.n 80091fa <USBD_StdItfReq+0x22>
|
|
80091f2: 2b40 cmp r3, #64 ; 0x40
|
|
80091f4: d001 beq.n 80091fa <USBD_StdItfReq+0x22>
|
|
80091f6: 2b00 cmp r3, #0
|
|
80091f8: d12a bne.n 8009250 <USBD_StdItfReq+0x78>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (pdev->dev_state)
|
|
80091fa: 687b ldr r3, [r7, #4]
|
|
80091fc: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8009200: 3b01 subs r3, #1
|
|
8009202: 2b02 cmp r3, #2
|
|
8009204: d81d bhi.n 8009242 <USBD_StdItfReq+0x6a>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
|
|
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
|
|
8009206: 683b ldr r3, [r7, #0]
|
|
8009208: 889b ldrh r3, [r3, #4]
|
|
800920a: b2db uxtb r3, r3
|
|
800920c: 2b01 cmp r3, #1
|
|
800920e: d813 bhi.n 8009238 <USBD_StdItfReq+0x60>
|
|
{
|
|
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
|
|
8009210: 687b ldr r3, [r7, #4]
|
|
8009212: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8009216: 689b ldr r3, [r3, #8]
|
|
8009218: 6839 ldr r1, [r7, #0]
|
|
800921a: 6878 ldr r0, [r7, #4]
|
|
800921c: 4798 blx r3
|
|
800921e: 4603 mov r3, r0
|
|
8009220: 73fb strb r3, [r7, #15]
|
|
|
|
if ((req->wLength == 0U) && (ret == USBD_OK))
|
|
8009222: 683b ldr r3, [r7, #0]
|
|
8009224: 88db ldrh r3, [r3, #6]
|
|
8009226: 2b00 cmp r3, #0
|
|
8009228: d110 bne.n 800924c <USBD_StdItfReq+0x74>
|
|
800922a: 7bfb ldrb r3, [r7, #15]
|
|
800922c: 2b00 cmp r3, #0
|
|
800922e: d10d bne.n 800924c <USBD_StdItfReq+0x74>
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
8009230: 6878 ldr r0, [r7, #4]
|
|
8009232: f000 fd2f bl 8009c94 <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
8009236: e009 b.n 800924c <USBD_StdItfReq+0x74>
|
|
USBD_CtlError(pdev, req);
|
|
8009238: 6839 ldr r1, [r7, #0]
|
|
800923a: 6878 ldr r0, [r7, #4]
|
|
800923c: f000 fc80 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009240: e004 b.n 800924c <USBD_StdItfReq+0x74>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8009242: 6839 ldr r1, [r7, #0]
|
|
8009244: 6878 ldr r0, [r7, #4]
|
|
8009246: f000 fc7b bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
800924a: e000 b.n 800924e <USBD_StdItfReq+0x76>
|
|
break;
|
|
800924c: bf00 nop
|
|
}
|
|
break;
|
|
800924e: e004 b.n 800925a <USBD_StdItfReq+0x82>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8009250: 6839 ldr r1, [r7, #0]
|
|
8009252: 6878 ldr r0, [r7, #4]
|
|
8009254: f000 fc74 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009258: bf00 nop
|
|
}
|
|
|
|
return USBD_OK;
|
|
800925a: 2300 movs r3, #0
|
|
}
|
|
800925c: 4618 mov r0, r3
|
|
800925e: 3710 adds r7, #16
|
|
8009260: 46bd mov sp, r7
|
|
8009262: bd80 pop {r7, pc}
|
|
|
|
08009264 <USBD_StdEPReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8009264: b580 push {r7, lr}
|
|
8009266: b084 sub sp, #16
|
|
8009268: af00 add r7, sp, #0
|
|
800926a: 6078 str r0, [r7, #4]
|
|
800926c: 6039 str r1, [r7, #0]
|
|
USBD_EndpointTypeDef *pep;
|
|
uint8_t ep_addr;
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
800926e: 2300 movs r3, #0
|
|
8009270: 73fb strb r3, [r7, #15]
|
|
ep_addr = LOBYTE(req->wIndex);
|
|
8009272: 683b ldr r3, [r7, #0]
|
|
8009274: 889b ldrh r3, [r3, #4]
|
|
8009276: 73bb strb r3, [r7, #14]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
8009278: 683b ldr r3, [r7, #0]
|
|
800927a: 781b ldrb r3, [r3, #0]
|
|
800927c: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
8009280: 2b20 cmp r3, #32
|
|
8009282: d004 beq.n 800928e <USBD_StdEPReq+0x2a>
|
|
8009284: 2b40 cmp r3, #64 ; 0x40
|
|
8009286: d002 beq.n 800928e <USBD_StdEPReq+0x2a>
|
|
8009288: 2b00 cmp r3, #0
|
|
800928a: d008 beq.n 800929e <USBD_StdEPReq+0x3a>
|
|
800928c: e13d b.n 800950a <USBD_StdEPReq+0x2a6>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
pdev->pClass->Setup(pdev, req);
|
|
800928e: 687b ldr r3, [r7, #4]
|
|
8009290: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8009294: 689b ldr r3, [r3, #8]
|
|
8009296: 6839 ldr r1, [r7, #0]
|
|
8009298: 6878 ldr r0, [r7, #4]
|
|
800929a: 4798 blx r3
|
|
break;
|
|
800929c: e13a b.n 8009514 <USBD_StdEPReq+0x2b0>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
/* Check if it is a class request */
|
|
if ((req->bmRequest & 0x60U) == 0x20U)
|
|
800929e: 683b ldr r3, [r7, #0]
|
|
80092a0: 781b ldrb r3, [r3, #0]
|
|
80092a2: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
80092a6: 2b20 cmp r3, #32
|
|
80092a8: d10a bne.n 80092c0 <USBD_StdEPReq+0x5c>
|
|
{
|
|
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
|
|
80092aa: 687b ldr r3, [r7, #4]
|
|
80092ac: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80092b0: 689b ldr r3, [r3, #8]
|
|
80092b2: 6839 ldr r1, [r7, #0]
|
|
80092b4: 6878 ldr r0, [r7, #4]
|
|
80092b6: 4798 blx r3
|
|
80092b8: 4603 mov r3, r0
|
|
80092ba: 73fb strb r3, [r7, #15]
|
|
|
|
return ret;
|
|
80092bc: 7bfb ldrb r3, [r7, #15]
|
|
80092be: e12a b.n 8009516 <USBD_StdEPReq+0x2b2>
|
|
}
|
|
|
|
switch (req->bRequest)
|
|
80092c0: 683b ldr r3, [r7, #0]
|
|
80092c2: 785b ldrb r3, [r3, #1]
|
|
80092c4: 2b01 cmp r3, #1
|
|
80092c6: d03e beq.n 8009346 <USBD_StdEPReq+0xe2>
|
|
80092c8: 2b03 cmp r3, #3
|
|
80092ca: d002 beq.n 80092d2 <USBD_StdEPReq+0x6e>
|
|
80092cc: 2b00 cmp r3, #0
|
|
80092ce: d070 beq.n 80093b2 <USBD_StdEPReq+0x14e>
|
|
80092d0: e115 b.n 80094fe <USBD_StdEPReq+0x29a>
|
|
{
|
|
case USB_REQ_SET_FEATURE:
|
|
switch (pdev->dev_state)
|
|
80092d2: 687b ldr r3, [r7, #4]
|
|
80092d4: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80092d8: 2b02 cmp r3, #2
|
|
80092da: d002 beq.n 80092e2 <USBD_StdEPReq+0x7e>
|
|
80092dc: 2b03 cmp r3, #3
|
|
80092de: d015 beq.n 800930c <USBD_StdEPReq+0xa8>
|
|
80092e0: e02b b.n 800933a <USBD_StdEPReq+0xd6>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
80092e2: 7bbb ldrb r3, [r7, #14]
|
|
80092e4: 2b00 cmp r3, #0
|
|
80092e6: d00c beq.n 8009302 <USBD_StdEPReq+0x9e>
|
|
80092e8: 7bbb ldrb r3, [r7, #14]
|
|
80092ea: 2b80 cmp r3, #128 ; 0x80
|
|
80092ec: d009 beq.n 8009302 <USBD_StdEPReq+0x9e>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
80092ee: 7bbb ldrb r3, [r7, #14]
|
|
80092f0: 4619 mov r1, r3
|
|
80092f2: 6878 ldr r0, [r7, #4]
|
|
80092f4: f001 f845 bl 800a382 <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
80092f8: 2180 movs r1, #128 ; 0x80
|
|
80092fa: 6878 ldr r0, [r7, #4]
|
|
80092fc: f001 f841 bl 800a382 <USBD_LL_StallEP>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
8009300: e020 b.n 8009344 <USBD_StdEPReq+0xe0>
|
|
USBD_CtlError(pdev, req);
|
|
8009302: 6839 ldr r1, [r7, #0]
|
|
8009304: 6878 ldr r0, [r7, #4]
|
|
8009306: f000 fc1b bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
800930a: e01b b.n 8009344 <USBD_StdEPReq+0xe0>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_EP_HALT)
|
|
800930c: 683b ldr r3, [r7, #0]
|
|
800930e: 885b ldrh r3, [r3, #2]
|
|
8009310: 2b00 cmp r3, #0
|
|
8009312: d10e bne.n 8009332 <USBD_StdEPReq+0xce>
|
|
{
|
|
if ((ep_addr != 0x00U) &&
|
|
8009314: 7bbb ldrb r3, [r7, #14]
|
|
8009316: 2b00 cmp r3, #0
|
|
8009318: d00b beq.n 8009332 <USBD_StdEPReq+0xce>
|
|
800931a: 7bbb ldrb r3, [r7, #14]
|
|
800931c: 2b80 cmp r3, #128 ; 0x80
|
|
800931e: d008 beq.n 8009332 <USBD_StdEPReq+0xce>
|
|
(ep_addr != 0x80U) && (req->wLength == 0x00U))
|
|
8009320: 683b ldr r3, [r7, #0]
|
|
8009322: 88db ldrh r3, [r3, #6]
|
|
8009324: 2b00 cmp r3, #0
|
|
8009326: d104 bne.n 8009332 <USBD_StdEPReq+0xce>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
8009328: 7bbb ldrb r3, [r7, #14]
|
|
800932a: 4619 mov r1, r3
|
|
800932c: 6878 ldr r0, [r7, #4]
|
|
800932e: f001 f828 bl 800a382 <USBD_LL_StallEP>
|
|
}
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
8009332: 6878 ldr r0, [r7, #4]
|
|
8009334: f000 fcae bl 8009c94 <USBD_CtlSendStatus>
|
|
|
|
break;
|
|
8009338: e004 b.n 8009344 <USBD_StdEPReq+0xe0>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800933a: 6839 ldr r1, [r7, #0]
|
|
800933c: 6878 ldr r0, [r7, #4]
|
|
800933e: f000 fbff bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009342: bf00 nop
|
|
}
|
|
break;
|
|
8009344: e0e0 b.n 8009508 <USBD_StdEPReq+0x2a4>
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
|
|
switch (pdev->dev_state)
|
|
8009346: 687b ldr r3, [r7, #4]
|
|
8009348: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
800934c: 2b02 cmp r3, #2
|
|
800934e: d002 beq.n 8009356 <USBD_StdEPReq+0xf2>
|
|
8009350: 2b03 cmp r3, #3
|
|
8009352: d015 beq.n 8009380 <USBD_StdEPReq+0x11c>
|
|
8009354: e026 b.n 80093a4 <USBD_StdEPReq+0x140>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
8009356: 7bbb ldrb r3, [r7, #14]
|
|
8009358: 2b00 cmp r3, #0
|
|
800935a: d00c beq.n 8009376 <USBD_StdEPReq+0x112>
|
|
800935c: 7bbb ldrb r3, [r7, #14]
|
|
800935e: 2b80 cmp r3, #128 ; 0x80
|
|
8009360: d009 beq.n 8009376 <USBD_StdEPReq+0x112>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
8009362: 7bbb ldrb r3, [r7, #14]
|
|
8009364: 4619 mov r1, r3
|
|
8009366: 6878 ldr r0, [r7, #4]
|
|
8009368: f001 f80b bl 800a382 <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
800936c: 2180 movs r1, #128 ; 0x80
|
|
800936e: 6878 ldr r0, [r7, #4]
|
|
8009370: f001 f807 bl 800a382 <USBD_LL_StallEP>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
8009374: e01c b.n 80093b0 <USBD_StdEPReq+0x14c>
|
|
USBD_CtlError(pdev, req);
|
|
8009376: 6839 ldr r1, [r7, #0]
|
|
8009378: 6878 ldr r0, [r7, #4]
|
|
800937a: f000 fbe1 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
800937e: e017 b.n 80093b0 <USBD_StdEPReq+0x14c>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_EP_HALT)
|
|
8009380: 683b ldr r3, [r7, #0]
|
|
8009382: 885b ldrh r3, [r3, #2]
|
|
8009384: 2b00 cmp r3, #0
|
|
8009386: d112 bne.n 80093ae <USBD_StdEPReq+0x14a>
|
|
{
|
|
if ((ep_addr & 0x7FU) != 0x00U)
|
|
8009388: 7bbb ldrb r3, [r7, #14]
|
|
800938a: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
800938e: 2b00 cmp r3, #0
|
|
8009390: d004 beq.n 800939c <USBD_StdEPReq+0x138>
|
|
{
|
|
USBD_LL_ClearStallEP(pdev, ep_addr);
|
|
8009392: 7bbb ldrb r3, [r7, #14]
|
|
8009394: 4619 mov r1, r3
|
|
8009396: 6878 ldr r0, [r7, #4]
|
|
8009398: f001 f812 bl 800a3c0 <USBD_LL_ClearStallEP>
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
800939c: 6878 ldr r0, [r7, #4]
|
|
800939e: f000 fc79 bl 8009c94 <USBD_CtlSendStatus>
|
|
}
|
|
break;
|
|
80093a2: e004 b.n 80093ae <USBD_StdEPReq+0x14a>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80093a4: 6839 ldr r1, [r7, #0]
|
|
80093a6: 6878 ldr r0, [r7, #4]
|
|
80093a8: f000 fbca bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
80093ac: e000 b.n 80093b0 <USBD_StdEPReq+0x14c>
|
|
break;
|
|
80093ae: bf00 nop
|
|
}
|
|
break;
|
|
80093b0: e0aa b.n 8009508 <USBD_StdEPReq+0x2a4>
|
|
|
|
case USB_REQ_GET_STATUS:
|
|
switch (pdev->dev_state)
|
|
80093b2: 687b ldr r3, [r7, #4]
|
|
80093b4: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80093b8: 2b02 cmp r3, #2
|
|
80093ba: d002 beq.n 80093c2 <USBD_StdEPReq+0x15e>
|
|
80093bc: 2b03 cmp r3, #3
|
|
80093be: d032 beq.n 8009426 <USBD_StdEPReq+0x1c2>
|
|
80093c0: e097 b.n 80094f2 <USBD_StdEPReq+0x28e>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
80093c2: 7bbb ldrb r3, [r7, #14]
|
|
80093c4: 2b00 cmp r3, #0
|
|
80093c6: d007 beq.n 80093d8 <USBD_StdEPReq+0x174>
|
|
80093c8: 7bbb ldrb r3, [r7, #14]
|
|
80093ca: 2b80 cmp r3, #128 ; 0x80
|
|
80093cc: d004 beq.n 80093d8 <USBD_StdEPReq+0x174>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80093ce: 6839 ldr r1, [r7, #0]
|
|
80093d0: 6878 ldr r0, [r7, #4]
|
|
80093d2: f000 fbb5 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
80093d6: e091 b.n 80094fc <USBD_StdEPReq+0x298>
|
|
}
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
80093d8: f997 300e ldrsb.w r3, [r7, #14]
|
|
80093dc: 2b00 cmp r3, #0
|
|
80093de: da0b bge.n 80093f8 <USBD_StdEPReq+0x194>
|
|
80093e0: 7bbb ldrb r3, [r7, #14]
|
|
80093e2: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
80093e6: 4613 mov r3, r2
|
|
80093e8: 009b lsls r3, r3, #2
|
|
80093ea: 4413 add r3, r2
|
|
80093ec: 009b lsls r3, r3, #2
|
|
80093ee: 3310 adds r3, #16
|
|
80093f0: 687a ldr r2, [r7, #4]
|
|
80093f2: 4413 add r3, r2
|
|
80093f4: 3304 adds r3, #4
|
|
80093f6: e00b b.n 8009410 <USBD_StdEPReq+0x1ac>
|
|
&pdev->ep_out[ep_addr & 0x7FU];
|
|
80093f8: 7bbb ldrb r3, [r7, #14]
|
|
80093fa: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
80093fe: 4613 mov r3, r2
|
|
8009400: 009b lsls r3, r3, #2
|
|
8009402: 4413 add r3, r2
|
|
8009404: 009b lsls r3, r3, #2
|
|
8009406: f503 73a8 add.w r3, r3, #336 ; 0x150
|
|
800940a: 687a ldr r2, [r7, #4]
|
|
800940c: 4413 add r3, r2
|
|
800940e: 3304 adds r3, #4
|
|
8009410: 60bb str r3, [r7, #8]
|
|
|
|
pep->status = 0x0000U;
|
|
8009412: 68bb ldr r3, [r7, #8]
|
|
8009414: 2200 movs r2, #0
|
|
8009416: 601a str r2, [r3, #0]
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
|
|
8009418: 68bb ldr r3, [r7, #8]
|
|
800941a: 2202 movs r2, #2
|
|
800941c: 4619 mov r1, r3
|
|
800941e: 6878 ldr r0, [r7, #4]
|
|
8009420: f000 fbf8 bl 8009c14 <USBD_CtlSendData>
|
|
break;
|
|
8009424: e06a b.n 80094fc <USBD_StdEPReq+0x298>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8009426: f997 300e ldrsb.w r3, [r7, #14]
|
|
800942a: 2b00 cmp r3, #0
|
|
800942c: da11 bge.n 8009452 <USBD_StdEPReq+0x1ee>
|
|
{
|
|
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
|
|
800942e: 7bbb ldrb r3, [r7, #14]
|
|
8009430: f003 020f and.w r2, r3, #15
|
|
8009434: 6879 ldr r1, [r7, #4]
|
|
8009436: 4613 mov r3, r2
|
|
8009438: 009b lsls r3, r3, #2
|
|
800943a: 4413 add r3, r2
|
|
800943c: 009b lsls r3, r3, #2
|
|
800943e: 440b add r3, r1
|
|
8009440: 3318 adds r3, #24
|
|
8009442: 681b ldr r3, [r3, #0]
|
|
8009444: 2b00 cmp r3, #0
|
|
8009446: d117 bne.n 8009478 <USBD_StdEPReq+0x214>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8009448: 6839 ldr r1, [r7, #0]
|
|
800944a: 6878 ldr r0, [r7, #4]
|
|
800944c: f000 fb78 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009450: e054 b.n 80094fc <USBD_StdEPReq+0x298>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
|
|
8009452: 7bbb ldrb r3, [r7, #14]
|
|
8009454: f003 020f and.w r2, r3, #15
|
|
8009458: 6879 ldr r1, [r7, #4]
|
|
800945a: 4613 mov r3, r2
|
|
800945c: 009b lsls r3, r3, #2
|
|
800945e: 4413 add r3, r2
|
|
8009460: 009b lsls r3, r3, #2
|
|
8009462: 440b add r3, r1
|
|
8009464: f503 73ac add.w r3, r3, #344 ; 0x158
|
|
8009468: 681b ldr r3, [r3, #0]
|
|
800946a: 2b00 cmp r3, #0
|
|
800946c: d104 bne.n 8009478 <USBD_StdEPReq+0x214>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
800946e: 6839 ldr r1, [r7, #0]
|
|
8009470: 6878 ldr r0, [r7, #4]
|
|
8009472: f000 fb65 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009476: e041 b.n 80094fc <USBD_StdEPReq+0x298>
|
|
}
|
|
}
|
|
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
8009478: f997 300e ldrsb.w r3, [r7, #14]
|
|
800947c: 2b00 cmp r3, #0
|
|
800947e: da0b bge.n 8009498 <USBD_StdEPReq+0x234>
|
|
8009480: 7bbb ldrb r3, [r7, #14]
|
|
8009482: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
8009486: 4613 mov r3, r2
|
|
8009488: 009b lsls r3, r3, #2
|
|
800948a: 4413 add r3, r2
|
|
800948c: 009b lsls r3, r3, #2
|
|
800948e: 3310 adds r3, #16
|
|
8009490: 687a ldr r2, [r7, #4]
|
|
8009492: 4413 add r3, r2
|
|
8009494: 3304 adds r3, #4
|
|
8009496: e00b b.n 80094b0 <USBD_StdEPReq+0x24c>
|
|
&pdev->ep_out[ep_addr & 0x7FU];
|
|
8009498: 7bbb ldrb r3, [r7, #14]
|
|
800949a: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
800949e: 4613 mov r3, r2
|
|
80094a0: 009b lsls r3, r3, #2
|
|
80094a2: 4413 add r3, r2
|
|
80094a4: 009b lsls r3, r3, #2
|
|
80094a6: f503 73a8 add.w r3, r3, #336 ; 0x150
|
|
80094aa: 687a ldr r2, [r7, #4]
|
|
80094ac: 4413 add r3, r2
|
|
80094ae: 3304 adds r3, #4
|
|
80094b0: 60bb str r3, [r7, #8]
|
|
|
|
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
|
|
80094b2: 7bbb ldrb r3, [r7, #14]
|
|
80094b4: 2b00 cmp r3, #0
|
|
80094b6: d002 beq.n 80094be <USBD_StdEPReq+0x25a>
|
|
80094b8: 7bbb ldrb r3, [r7, #14]
|
|
80094ba: 2b80 cmp r3, #128 ; 0x80
|
|
80094bc: d103 bne.n 80094c6 <USBD_StdEPReq+0x262>
|
|
{
|
|
pep->status = 0x0000U;
|
|
80094be: 68bb ldr r3, [r7, #8]
|
|
80094c0: 2200 movs r2, #0
|
|
80094c2: 601a str r2, [r3, #0]
|
|
80094c4: e00e b.n 80094e4 <USBD_StdEPReq+0x280>
|
|
}
|
|
else if (USBD_LL_IsStallEP(pdev, ep_addr))
|
|
80094c6: 7bbb ldrb r3, [r7, #14]
|
|
80094c8: 4619 mov r1, r3
|
|
80094ca: 6878 ldr r0, [r7, #4]
|
|
80094cc: f000 ff97 bl 800a3fe <USBD_LL_IsStallEP>
|
|
80094d0: 4603 mov r3, r0
|
|
80094d2: 2b00 cmp r3, #0
|
|
80094d4: d003 beq.n 80094de <USBD_StdEPReq+0x27a>
|
|
{
|
|
pep->status = 0x0001U;
|
|
80094d6: 68bb ldr r3, [r7, #8]
|
|
80094d8: 2201 movs r2, #1
|
|
80094da: 601a str r2, [r3, #0]
|
|
80094dc: e002 b.n 80094e4 <USBD_StdEPReq+0x280>
|
|
}
|
|
else
|
|
{
|
|
pep->status = 0x0000U;
|
|
80094de: 68bb ldr r3, [r7, #8]
|
|
80094e0: 2200 movs r2, #0
|
|
80094e2: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
|
|
80094e4: 68bb ldr r3, [r7, #8]
|
|
80094e6: 2202 movs r2, #2
|
|
80094e8: 4619 mov r1, r3
|
|
80094ea: 6878 ldr r0, [r7, #4]
|
|
80094ec: f000 fb92 bl 8009c14 <USBD_CtlSendData>
|
|
break;
|
|
80094f0: e004 b.n 80094fc <USBD_StdEPReq+0x298>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80094f2: 6839 ldr r1, [r7, #0]
|
|
80094f4: 6878 ldr r0, [r7, #4]
|
|
80094f6: f000 fb23 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
80094fa: bf00 nop
|
|
}
|
|
break;
|
|
80094fc: e004 b.n 8009508 <USBD_StdEPReq+0x2a4>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80094fe: 6839 ldr r1, [r7, #0]
|
|
8009500: 6878 ldr r0, [r7, #4]
|
|
8009502: f000 fb1d bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009506: bf00 nop
|
|
}
|
|
break;
|
|
8009508: e004 b.n 8009514 <USBD_StdEPReq+0x2b0>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800950a: 6839 ldr r1, [r7, #0]
|
|
800950c: 6878 ldr r0, [r7, #4]
|
|
800950e: f000 fb17 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009512: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
8009514: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8009516: 4618 mov r0, r3
|
|
8009518: 3710 adds r7, #16
|
|
800951a: 46bd mov sp, r7
|
|
800951c: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08009520 <USBD_GetDescriptor>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8009520: b580 push {r7, lr}
|
|
8009522: b084 sub sp, #16
|
|
8009524: af00 add r7, sp, #0
|
|
8009526: 6078 str r0, [r7, #4]
|
|
8009528: 6039 str r1, [r7, #0]
|
|
uint16_t len = 0U;
|
|
800952a: 2300 movs r3, #0
|
|
800952c: 813b strh r3, [r7, #8]
|
|
uint8_t *pbuf = NULL;
|
|
800952e: 2300 movs r3, #0
|
|
8009530: 60fb str r3, [r7, #12]
|
|
uint8_t err = 0U;
|
|
8009532: 2300 movs r3, #0
|
|
8009534: 72fb strb r3, [r7, #11]
|
|
|
|
switch (req->wValue >> 8)
|
|
8009536: 683b ldr r3, [r7, #0]
|
|
8009538: 885b ldrh r3, [r3, #2]
|
|
800953a: 0a1b lsrs r3, r3, #8
|
|
800953c: b29b uxth r3, r3
|
|
800953e: 3b01 subs r3, #1
|
|
8009540: 2b06 cmp r3, #6
|
|
8009542: f200 8128 bhi.w 8009796 <USBD_GetDescriptor+0x276>
|
|
8009546: a201 add r2, pc, #4 ; (adr r2, 800954c <USBD_GetDescriptor+0x2c>)
|
|
8009548: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800954c: 08009569 .word 0x08009569
|
|
8009550: 08009581 .word 0x08009581
|
|
8009554: 080095c1 .word 0x080095c1
|
|
8009558: 08009797 .word 0x08009797
|
|
800955c: 08009797 .word 0x08009797
|
|
8009560: 08009737 .word 0x08009737
|
|
8009564: 08009763 .word 0x08009763
|
|
err++;
|
|
}
|
|
break;
|
|
#endif
|
|
case USB_DESC_TYPE_DEVICE:
|
|
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
|
|
8009568: 687b ldr r3, [r7, #4]
|
|
800956a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800956e: 681b ldr r3, [r3, #0]
|
|
8009570: 687a ldr r2, [r7, #4]
|
|
8009572: 7c12 ldrb r2, [r2, #16]
|
|
8009574: f107 0108 add.w r1, r7, #8
|
|
8009578: 4610 mov r0, r2
|
|
800957a: 4798 blx r3
|
|
800957c: 60f8 str r0, [r7, #12]
|
|
break;
|
|
800957e: e112 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_CONFIGURATION:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8009580: 687b ldr r3, [r7, #4]
|
|
8009582: 7c1b ldrb r3, [r3, #16]
|
|
8009584: 2b00 cmp r3, #0
|
|
8009586: d10d bne.n 80095a4 <USBD_GetDescriptor+0x84>
|
|
{
|
|
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
|
|
8009588: 687b ldr r3, [r7, #4]
|
|
800958a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
800958e: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8009590: f107 0208 add.w r2, r7, #8
|
|
8009594: 4610 mov r0, r2
|
|
8009596: 4798 blx r3
|
|
8009598: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
800959a: 68fb ldr r3, [r7, #12]
|
|
800959c: 3301 adds r3, #1
|
|
800959e: 2202 movs r2, #2
|
|
80095a0: 701a strb r2, [r3, #0]
|
|
else
|
|
{
|
|
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
}
|
|
break;
|
|
80095a2: e100 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
|
|
80095a4: 687b ldr r3, [r7, #4]
|
|
80095a6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80095aa: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80095ac: f107 0208 add.w r2, r7, #8
|
|
80095b0: 4610 mov r0, r2
|
|
80095b2: 4798 blx r3
|
|
80095b4: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
80095b6: 68fb ldr r3, [r7, #12]
|
|
80095b8: 3301 adds r3, #1
|
|
80095ba: 2202 movs r2, #2
|
|
80095bc: 701a strb r2, [r3, #0]
|
|
break;
|
|
80095be: e0f2 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_STRING:
|
|
switch ((uint8_t)(req->wValue))
|
|
80095c0: 683b ldr r3, [r7, #0]
|
|
80095c2: 885b ldrh r3, [r3, #2]
|
|
80095c4: b2db uxtb r3, r3
|
|
80095c6: 2b05 cmp r3, #5
|
|
80095c8: f200 80ac bhi.w 8009724 <USBD_GetDescriptor+0x204>
|
|
80095cc: a201 add r2, pc, #4 ; (adr r2, 80095d4 <USBD_GetDescriptor+0xb4>)
|
|
80095ce: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80095d2: bf00 nop
|
|
80095d4: 080095ed .word 0x080095ed
|
|
80095d8: 08009621 .word 0x08009621
|
|
80095dc: 08009655 .word 0x08009655
|
|
80095e0: 08009689 .word 0x08009689
|
|
80095e4: 080096bd .word 0x080096bd
|
|
80095e8: 080096f1 .word 0x080096f1
|
|
{
|
|
case USBD_IDX_LANGID_STR:
|
|
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
|
|
80095ec: 687b ldr r3, [r7, #4]
|
|
80095ee: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80095f2: 685b ldr r3, [r3, #4]
|
|
80095f4: 2b00 cmp r3, #0
|
|
80095f6: d00b beq.n 8009610 <USBD_GetDescriptor+0xf0>
|
|
{
|
|
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
|
|
80095f8: 687b ldr r3, [r7, #4]
|
|
80095fa: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80095fe: 685b ldr r3, [r3, #4]
|
|
8009600: 687a ldr r2, [r7, #4]
|
|
8009602: 7c12 ldrb r2, [r2, #16]
|
|
8009604: f107 0108 add.w r1, r7, #8
|
|
8009608: 4610 mov r0, r2
|
|
800960a: 4798 blx r3
|
|
800960c: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
800960e: e091 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8009610: 6839 ldr r1, [r7, #0]
|
|
8009612: 6878 ldr r0, [r7, #4]
|
|
8009614: f000 fa94 bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
8009618: 7afb ldrb r3, [r7, #11]
|
|
800961a: 3301 adds r3, #1
|
|
800961c: 72fb strb r3, [r7, #11]
|
|
break;
|
|
800961e: e089 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_MFC_STR:
|
|
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
|
|
8009620: 687b ldr r3, [r7, #4]
|
|
8009622: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8009626: 689b ldr r3, [r3, #8]
|
|
8009628: 2b00 cmp r3, #0
|
|
800962a: d00b beq.n 8009644 <USBD_GetDescriptor+0x124>
|
|
{
|
|
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
|
|
800962c: 687b ldr r3, [r7, #4]
|
|
800962e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8009632: 689b ldr r3, [r3, #8]
|
|
8009634: 687a ldr r2, [r7, #4]
|
|
8009636: 7c12 ldrb r2, [r2, #16]
|
|
8009638: f107 0108 add.w r1, r7, #8
|
|
800963c: 4610 mov r0, r2
|
|
800963e: 4798 blx r3
|
|
8009640: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8009642: e077 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8009644: 6839 ldr r1, [r7, #0]
|
|
8009646: 6878 ldr r0, [r7, #4]
|
|
8009648: f000 fa7a bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
800964c: 7afb ldrb r3, [r7, #11]
|
|
800964e: 3301 adds r3, #1
|
|
8009650: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8009652: e06f b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_PRODUCT_STR:
|
|
if (pdev->pDesc->GetProductStrDescriptor != NULL)
|
|
8009654: 687b ldr r3, [r7, #4]
|
|
8009656: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800965a: 68db ldr r3, [r3, #12]
|
|
800965c: 2b00 cmp r3, #0
|
|
800965e: d00b beq.n 8009678 <USBD_GetDescriptor+0x158>
|
|
{
|
|
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
|
|
8009660: 687b ldr r3, [r7, #4]
|
|
8009662: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8009666: 68db ldr r3, [r3, #12]
|
|
8009668: 687a ldr r2, [r7, #4]
|
|
800966a: 7c12 ldrb r2, [r2, #16]
|
|
800966c: f107 0108 add.w r1, r7, #8
|
|
8009670: 4610 mov r0, r2
|
|
8009672: 4798 blx r3
|
|
8009674: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8009676: e05d b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8009678: 6839 ldr r1, [r7, #0]
|
|
800967a: 6878 ldr r0, [r7, #4]
|
|
800967c: f000 fa60 bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
8009680: 7afb ldrb r3, [r7, #11]
|
|
8009682: 3301 adds r3, #1
|
|
8009684: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8009686: e055 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_SERIAL_STR:
|
|
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
|
|
8009688: 687b ldr r3, [r7, #4]
|
|
800968a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800968e: 691b ldr r3, [r3, #16]
|
|
8009690: 2b00 cmp r3, #0
|
|
8009692: d00b beq.n 80096ac <USBD_GetDescriptor+0x18c>
|
|
{
|
|
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
|
|
8009694: 687b ldr r3, [r7, #4]
|
|
8009696: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800969a: 691b ldr r3, [r3, #16]
|
|
800969c: 687a ldr r2, [r7, #4]
|
|
800969e: 7c12 ldrb r2, [r2, #16]
|
|
80096a0: f107 0108 add.w r1, r7, #8
|
|
80096a4: 4610 mov r0, r2
|
|
80096a6: 4798 blx r3
|
|
80096a8: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
80096aa: e043 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
80096ac: 6839 ldr r1, [r7, #0]
|
|
80096ae: 6878 ldr r0, [r7, #4]
|
|
80096b0: f000 fa46 bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
80096b4: 7afb ldrb r3, [r7, #11]
|
|
80096b6: 3301 adds r3, #1
|
|
80096b8: 72fb strb r3, [r7, #11]
|
|
break;
|
|
80096ba: e03b b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_CONFIG_STR:
|
|
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
|
|
80096bc: 687b ldr r3, [r7, #4]
|
|
80096be: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80096c2: 695b ldr r3, [r3, #20]
|
|
80096c4: 2b00 cmp r3, #0
|
|
80096c6: d00b beq.n 80096e0 <USBD_GetDescriptor+0x1c0>
|
|
{
|
|
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
|
|
80096c8: 687b ldr r3, [r7, #4]
|
|
80096ca: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80096ce: 695b ldr r3, [r3, #20]
|
|
80096d0: 687a ldr r2, [r7, #4]
|
|
80096d2: 7c12 ldrb r2, [r2, #16]
|
|
80096d4: f107 0108 add.w r1, r7, #8
|
|
80096d8: 4610 mov r0, r2
|
|
80096da: 4798 blx r3
|
|
80096dc: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
80096de: e029 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
80096e0: 6839 ldr r1, [r7, #0]
|
|
80096e2: 6878 ldr r0, [r7, #4]
|
|
80096e4: f000 fa2c bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
80096e8: 7afb ldrb r3, [r7, #11]
|
|
80096ea: 3301 adds r3, #1
|
|
80096ec: 72fb strb r3, [r7, #11]
|
|
break;
|
|
80096ee: e021 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_INTERFACE_STR:
|
|
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
|
|
80096f0: 687b ldr r3, [r7, #4]
|
|
80096f2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80096f6: 699b ldr r3, [r3, #24]
|
|
80096f8: 2b00 cmp r3, #0
|
|
80096fa: d00b beq.n 8009714 <USBD_GetDescriptor+0x1f4>
|
|
{
|
|
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
|
|
80096fc: 687b ldr r3, [r7, #4]
|
|
80096fe: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8009702: 699b ldr r3, [r3, #24]
|
|
8009704: 687a ldr r2, [r7, #4]
|
|
8009706: 7c12 ldrb r2, [r2, #16]
|
|
8009708: f107 0108 add.w r1, r7, #8
|
|
800970c: 4610 mov r0, r2
|
|
800970e: 4798 blx r3
|
|
8009710: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8009712: e00f b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8009714: 6839 ldr r1, [r7, #0]
|
|
8009716: 6878 ldr r0, [r7, #4]
|
|
8009718: f000 fa12 bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
800971c: 7afb ldrb r3, [r7, #11]
|
|
800971e: 3301 adds r3, #1
|
|
8009720: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8009722: e007 b.n 8009734 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
#else
|
|
USBD_CtlError(pdev, req);
|
|
8009724: 6839 ldr r1, [r7, #0]
|
|
8009726: 6878 ldr r0, [r7, #4]
|
|
8009728: f000 fa0a bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
800972c: 7afb ldrb r3, [r7, #11]
|
|
800972e: 3301 adds r3, #1
|
|
8009730: 72fb strb r3, [r7, #11]
|
|
#endif
|
|
}
|
|
break;
|
|
8009732: e038 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
8009734: e037 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_DEVICE_QUALIFIER:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8009736: 687b ldr r3, [r7, #4]
|
|
8009738: 7c1b ldrb r3, [r3, #16]
|
|
800973a: 2b00 cmp r3, #0
|
|
800973c: d109 bne.n 8009752 <USBD_GetDescriptor+0x232>
|
|
{
|
|
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
|
|
800973e: 687b ldr r3, [r7, #4]
|
|
8009740: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8009744: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8009746: f107 0208 add.w r2, r7, #8
|
|
800974a: 4610 mov r0, r2
|
|
800974c: 4798 blx r3
|
|
800974e: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8009750: e029 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
USBD_CtlError(pdev, req);
|
|
8009752: 6839 ldr r1, [r7, #0]
|
|
8009754: 6878 ldr r0, [r7, #4]
|
|
8009756: f000 f9f3 bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
800975a: 7afb ldrb r3, [r7, #11]
|
|
800975c: 3301 adds r3, #1
|
|
800975e: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8009760: e021 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8009762: 687b ldr r3, [r7, #4]
|
|
8009764: 7c1b ldrb r3, [r3, #16]
|
|
8009766: 2b00 cmp r3, #0
|
|
8009768: d10d bne.n 8009786 <USBD_GetDescriptor+0x266>
|
|
{
|
|
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
|
|
800976a: 687b ldr r3, [r7, #4]
|
|
800976c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8009770: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8009772: f107 0208 add.w r2, r7, #8
|
|
8009776: 4610 mov r0, r2
|
|
8009778: 4798 blx r3
|
|
800977a: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
|
|
800977c: 68fb ldr r3, [r7, #12]
|
|
800977e: 3301 adds r3, #1
|
|
8009780: 2207 movs r2, #7
|
|
8009782: 701a strb r2, [r3, #0]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8009784: e00f b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
USBD_CtlError(pdev, req);
|
|
8009786: 6839 ldr r1, [r7, #0]
|
|
8009788: 6878 ldr r0, [r7, #4]
|
|
800978a: f000 f9d9 bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
800978e: 7afb ldrb r3, [r7, #11]
|
|
8009790: 3301 adds r3, #1
|
|
8009792: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8009794: e007 b.n 80097a6 <USBD_GetDescriptor+0x286>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8009796: 6839 ldr r1, [r7, #0]
|
|
8009798: 6878 ldr r0, [r7, #4]
|
|
800979a: f000 f9d1 bl 8009b40 <USBD_CtlError>
|
|
err++;
|
|
800979e: 7afb ldrb r3, [r7, #11]
|
|
80097a0: 3301 adds r3, #1
|
|
80097a2: 72fb strb r3, [r7, #11]
|
|
break;
|
|
80097a4: bf00 nop
|
|
}
|
|
|
|
if (err != 0U)
|
|
80097a6: 7afb ldrb r3, [r7, #11]
|
|
80097a8: 2b00 cmp r3, #0
|
|
80097aa: d11c bne.n 80097e6 <USBD_GetDescriptor+0x2c6>
|
|
{
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
if ((len != 0U) && (req->wLength != 0U))
|
|
80097ac: 893b ldrh r3, [r7, #8]
|
|
80097ae: 2b00 cmp r3, #0
|
|
80097b0: d011 beq.n 80097d6 <USBD_GetDescriptor+0x2b6>
|
|
80097b2: 683b ldr r3, [r7, #0]
|
|
80097b4: 88db ldrh r3, [r3, #6]
|
|
80097b6: 2b00 cmp r3, #0
|
|
80097b8: d00d beq.n 80097d6 <USBD_GetDescriptor+0x2b6>
|
|
{
|
|
len = MIN(len, req->wLength);
|
|
80097ba: 683b ldr r3, [r7, #0]
|
|
80097bc: 88da ldrh r2, [r3, #6]
|
|
80097be: 893b ldrh r3, [r7, #8]
|
|
80097c0: 4293 cmp r3, r2
|
|
80097c2: bf28 it cs
|
|
80097c4: 4613 movcs r3, r2
|
|
80097c6: b29b uxth r3, r3
|
|
80097c8: 813b strh r3, [r7, #8]
|
|
(void)USBD_CtlSendData(pdev, pbuf, len);
|
|
80097ca: 893b ldrh r3, [r7, #8]
|
|
80097cc: 461a mov r2, r3
|
|
80097ce: 68f9 ldr r1, [r7, #12]
|
|
80097d0: 6878 ldr r0, [r7, #4]
|
|
80097d2: f000 fa1f bl 8009c14 <USBD_CtlSendData>
|
|
}
|
|
|
|
if (req->wLength == 0U)
|
|
80097d6: 683b ldr r3, [r7, #0]
|
|
80097d8: 88db ldrh r3, [r3, #6]
|
|
80097da: 2b00 cmp r3, #0
|
|
80097dc: d104 bne.n 80097e8 <USBD_GetDescriptor+0x2c8>
|
|
{
|
|
(void)USBD_CtlSendStatus(pdev);
|
|
80097de: 6878 ldr r0, [r7, #4]
|
|
80097e0: f000 fa58 bl 8009c94 <USBD_CtlSendStatus>
|
|
80097e4: e000 b.n 80097e8 <USBD_GetDescriptor+0x2c8>
|
|
return;
|
|
80097e6: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
80097e8: 3710 adds r7, #16
|
|
80097ea: 46bd mov sp, r7
|
|
80097ec: bd80 pop {r7, pc}
|
|
80097ee: bf00 nop
|
|
|
|
080097f0 <USBD_SetAddress>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
80097f0: b580 push {r7, lr}
|
|
80097f2: b084 sub sp, #16
|
|
80097f4: af00 add r7, sp, #0
|
|
80097f6: 6078 str r0, [r7, #4]
|
|
80097f8: 6039 str r1, [r7, #0]
|
|
uint8_t dev_addr;
|
|
|
|
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
|
|
80097fa: 683b ldr r3, [r7, #0]
|
|
80097fc: 889b ldrh r3, [r3, #4]
|
|
80097fe: 2b00 cmp r3, #0
|
|
8009800: d130 bne.n 8009864 <USBD_SetAddress+0x74>
|
|
8009802: 683b ldr r3, [r7, #0]
|
|
8009804: 88db ldrh r3, [r3, #6]
|
|
8009806: 2b00 cmp r3, #0
|
|
8009808: d12c bne.n 8009864 <USBD_SetAddress+0x74>
|
|
800980a: 683b ldr r3, [r7, #0]
|
|
800980c: 885b ldrh r3, [r3, #2]
|
|
800980e: 2b7f cmp r3, #127 ; 0x7f
|
|
8009810: d828 bhi.n 8009864 <USBD_SetAddress+0x74>
|
|
{
|
|
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
|
|
8009812: 683b ldr r3, [r7, #0]
|
|
8009814: 885b ldrh r3, [r3, #2]
|
|
8009816: b2db uxtb r3, r3
|
|
8009818: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
800981c: 73fb strb r3, [r7, #15]
|
|
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
800981e: 687b ldr r3, [r7, #4]
|
|
8009820: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8009824: 2b03 cmp r3, #3
|
|
8009826: d104 bne.n 8009832 <USBD_SetAddress+0x42>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8009828: 6839 ldr r1, [r7, #0]
|
|
800982a: 6878 ldr r0, [r7, #4]
|
|
800982c: f000 f988 bl 8009b40 <USBD_CtlError>
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8009830: e01c b.n 800986c <USBD_SetAddress+0x7c>
|
|
}
|
|
else
|
|
{
|
|
pdev->dev_address = dev_addr;
|
|
8009832: 687b ldr r3, [r7, #4]
|
|
8009834: 7bfa ldrb r2, [r7, #15]
|
|
8009836: f883 229e strb.w r2, [r3, #670] ; 0x29e
|
|
USBD_LL_SetUSBAddress(pdev, dev_addr);
|
|
800983a: 7bfb ldrb r3, [r7, #15]
|
|
800983c: 4619 mov r1, r3
|
|
800983e: 6878 ldr r0, [r7, #4]
|
|
8009840: f000 fe09 bl 800a456 <USBD_LL_SetUSBAddress>
|
|
USBD_CtlSendStatus(pdev);
|
|
8009844: 6878 ldr r0, [r7, #4]
|
|
8009846: f000 fa25 bl 8009c94 <USBD_CtlSendStatus>
|
|
|
|
if (dev_addr != 0U)
|
|
800984a: 7bfb ldrb r3, [r7, #15]
|
|
800984c: 2b00 cmp r3, #0
|
|
800984e: d004 beq.n 800985a <USBD_SetAddress+0x6a>
|
|
{
|
|
pdev->dev_state = USBD_STATE_ADDRESSED;
|
|
8009850: 687b ldr r3, [r7, #4]
|
|
8009852: 2202 movs r2, #2
|
|
8009854: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8009858: e008 b.n 800986c <USBD_SetAddress+0x7c>
|
|
}
|
|
else
|
|
{
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
800985a: 687b ldr r3, [r7, #4]
|
|
800985c: 2201 movs r2, #1
|
|
800985e: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8009862: e003 b.n 800986c <USBD_SetAddress+0x7c>
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8009864: 6839 ldr r1, [r7, #0]
|
|
8009866: 6878 ldr r0, [r7, #4]
|
|
8009868: f000 f96a bl 8009b40 <USBD_CtlError>
|
|
}
|
|
}
|
|
800986c: bf00 nop
|
|
800986e: 3710 adds r7, #16
|
|
8009870: 46bd mov sp, r7
|
|
8009872: bd80 pop {r7, pc}
|
|
|
|
08009874 <USBD_SetConfig>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
8009874: b580 push {r7, lr}
|
|
8009876: b082 sub sp, #8
|
|
8009878: af00 add r7, sp, #0
|
|
800987a: 6078 str r0, [r7, #4]
|
|
800987c: 6039 str r1, [r7, #0]
|
|
static uint8_t cfgidx;
|
|
|
|
cfgidx = (uint8_t)(req->wValue);
|
|
800987e: 683b ldr r3, [r7, #0]
|
|
8009880: 885b ldrh r3, [r3, #2]
|
|
8009882: b2da uxtb r2, r3
|
|
8009884: 4b41 ldr r3, [pc, #260] ; (800998c <USBD_SetConfig+0x118>)
|
|
8009886: 701a strb r2, [r3, #0]
|
|
|
|
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
|
|
8009888: 4b40 ldr r3, [pc, #256] ; (800998c <USBD_SetConfig+0x118>)
|
|
800988a: 781b ldrb r3, [r3, #0]
|
|
800988c: 2b01 cmp r3, #1
|
|
800988e: d904 bls.n 800989a <USBD_SetConfig+0x26>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8009890: 6839 ldr r1, [r7, #0]
|
|
8009892: 6878 ldr r0, [r7, #4]
|
|
8009894: f000 f954 bl 8009b40 <USBD_CtlError>
|
|
8009898: e075 b.n 8009986 <USBD_SetConfig+0x112>
|
|
}
|
|
else
|
|
{
|
|
switch (pdev->dev_state)
|
|
800989a: 687b ldr r3, [r7, #4]
|
|
800989c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80098a0: 2b02 cmp r3, #2
|
|
80098a2: d002 beq.n 80098aa <USBD_SetConfig+0x36>
|
|
80098a4: 2b03 cmp r3, #3
|
|
80098a6: d023 beq.n 80098f0 <USBD_SetConfig+0x7c>
|
|
80098a8: e062 b.n 8009970 <USBD_SetConfig+0xfc>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if (cfgidx)
|
|
80098aa: 4b38 ldr r3, [pc, #224] ; (800998c <USBD_SetConfig+0x118>)
|
|
80098ac: 781b ldrb r3, [r3, #0]
|
|
80098ae: 2b00 cmp r3, #0
|
|
80098b0: d01a beq.n 80098e8 <USBD_SetConfig+0x74>
|
|
{
|
|
pdev->dev_config = cfgidx;
|
|
80098b2: 4b36 ldr r3, [pc, #216] ; (800998c <USBD_SetConfig+0x118>)
|
|
80098b4: 781b ldrb r3, [r3, #0]
|
|
80098b6: 461a mov r2, r3
|
|
80098b8: 687b ldr r3, [r7, #4]
|
|
80098ba: 605a str r2, [r3, #4]
|
|
pdev->dev_state = USBD_STATE_CONFIGURED;
|
|
80098bc: 687b ldr r3, [r7, #4]
|
|
80098be: 2203 movs r2, #3
|
|
80098c0: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
|
|
80098c4: 4b31 ldr r3, [pc, #196] ; (800998c <USBD_SetConfig+0x118>)
|
|
80098c6: 781b ldrb r3, [r3, #0]
|
|
80098c8: 4619 mov r1, r3
|
|
80098ca: 6878 ldr r0, [r7, #4]
|
|
80098cc: f7ff f9f4 bl 8008cb8 <USBD_SetClassConfig>
|
|
80098d0: 4603 mov r3, r0
|
|
80098d2: 2b02 cmp r3, #2
|
|
80098d4: d104 bne.n 80098e0 <USBD_SetConfig+0x6c>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80098d6: 6839 ldr r1, [r7, #0]
|
|
80098d8: 6878 ldr r0, [r7, #4]
|
|
80098da: f000 f931 bl 8009b40 <USBD_CtlError>
|
|
return;
|
|
80098de: e052 b.n 8009986 <USBD_SetConfig+0x112>
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
80098e0: 6878 ldr r0, [r7, #4]
|
|
80098e2: f000 f9d7 bl 8009c94 <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
}
|
|
break;
|
|
80098e6: e04e b.n 8009986 <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
80098e8: 6878 ldr r0, [r7, #4]
|
|
80098ea: f000 f9d3 bl 8009c94 <USBD_CtlSendStatus>
|
|
break;
|
|
80098ee: e04a b.n 8009986 <USBD_SetConfig+0x112>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (cfgidx == 0U)
|
|
80098f0: 4b26 ldr r3, [pc, #152] ; (800998c <USBD_SetConfig+0x118>)
|
|
80098f2: 781b ldrb r3, [r3, #0]
|
|
80098f4: 2b00 cmp r3, #0
|
|
80098f6: d112 bne.n 800991e <USBD_SetConfig+0xaa>
|
|
{
|
|
pdev->dev_state = USBD_STATE_ADDRESSED;
|
|
80098f8: 687b ldr r3, [r7, #4]
|
|
80098fa: 2202 movs r2, #2
|
|
80098fc: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
pdev->dev_config = cfgidx;
|
|
8009900: 4b22 ldr r3, [pc, #136] ; (800998c <USBD_SetConfig+0x118>)
|
|
8009902: 781b ldrb r3, [r3, #0]
|
|
8009904: 461a mov r2, r3
|
|
8009906: 687b ldr r3, [r7, #4]
|
|
8009908: 605a str r2, [r3, #4]
|
|
USBD_ClrClassConfig(pdev, cfgidx);
|
|
800990a: 4b20 ldr r3, [pc, #128] ; (800998c <USBD_SetConfig+0x118>)
|
|
800990c: 781b ldrb r3, [r3, #0]
|
|
800990e: 4619 mov r1, r3
|
|
8009910: 6878 ldr r0, [r7, #4]
|
|
8009912: f7ff f9f0 bl 8008cf6 <USBD_ClrClassConfig>
|
|
USBD_CtlSendStatus(pdev);
|
|
8009916: 6878 ldr r0, [r7, #4]
|
|
8009918: f000 f9bc bl 8009c94 <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
}
|
|
break;
|
|
800991c: e033 b.n 8009986 <USBD_SetConfig+0x112>
|
|
else if (cfgidx != pdev->dev_config)
|
|
800991e: 4b1b ldr r3, [pc, #108] ; (800998c <USBD_SetConfig+0x118>)
|
|
8009920: 781b ldrb r3, [r3, #0]
|
|
8009922: 461a mov r2, r3
|
|
8009924: 687b ldr r3, [r7, #4]
|
|
8009926: 685b ldr r3, [r3, #4]
|
|
8009928: 429a cmp r2, r3
|
|
800992a: d01d beq.n 8009968 <USBD_SetConfig+0xf4>
|
|
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
|
|
800992c: 687b ldr r3, [r7, #4]
|
|
800992e: 685b ldr r3, [r3, #4]
|
|
8009930: b2db uxtb r3, r3
|
|
8009932: 4619 mov r1, r3
|
|
8009934: 6878 ldr r0, [r7, #4]
|
|
8009936: f7ff f9de bl 8008cf6 <USBD_ClrClassConfig>
|
|
pdev->dev_config = cfgidx;
|
|
800993a: 4b14 ldr r3, [pc, #80] ; (800998c <USBD_SetConfig+0x118>)
|
|
800993c: 781b ldrb r3, [r3, #0]
|
|
800993e: 461a mov r2, r3
|
|
8009940: 687b ldr r3, [r7, #4]
|
|
8009942: 605a str r2, [r3, #4]
|
|
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
|
|
8009944: 4b11 ldr r3, [pc, #68] ; (800998c <USBD_SetConfig+0x118>)
|
|
8009946: 781b ldrb r3, [r3, #0]
|
|
8009948: 4619 mov r1, r3
|
|
800994a: 6878 ldr r0, [r7, #4]
|
|
800994c: f7ff f9b4 bl 8008cb8 <USBD_SetClassConfig>
|
|
8009950: 4603 mov r3, r0
|
|
8009952: 2b02 cmp r3, #2
|
|
8009954: d104 bne.n 8009960 <USBD_SetConfig+0xec>
|
|
USBD_CtlError(pdev, req);
|
|
8009956: 6839 ldr r1, [r7, #0]
|
|
8009958: 6878 ldr r0, [r7, #4]
|
|
800995a: f000 f8f1 bl 8009b40 <USBD_CtlError>
|
|
return;
|
|
800995e: e012 b.n 8009986 <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
8009960: 6878 ldr r0, [r7, #4]
|
|
8009962: f000 f997 bl 8009c94 <USBD_CtlSendStatus>
|
|
break;
|
|
8009966: e00e b.n 8009986 <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
8009968: 6878 ldr r0, [r7, #4]
|
|
800996a: f000 f993 bl 8009c94 <USBD_CtlSendStatus>
|
|
break;
|
|
800996e: e00a b.n 8009986 <USBD_SetConfig+0x112>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8009970: 6839 ldr r1, [r7, #0]
|
|
8009972: 6878 ldr r0, [r7, #4]
|
|
8009974: f000 f8e4 bl 8009b40 <USBD_CtlError>
|
|
USBD_ClrClassConfig(pdev, cfgidx);
|
|
8009978: 4b04 ldr r3, [pc, #16] ; (800998c <USBD_SetConfig+0x118>)
|
|
800997a: 781b ldrb r3, [r3, #0]
|
|
800997c: 4619 mov r1, r3
|
|
800997e: 6878 ldr r0, [r7, #4]
|
|
8009980: f7ff f9b9 bl 8008cf6 <USBD_ClrClassConfig>
|
|
break;
|
|
8009984: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
8009986: 3708 adds r7, #8
|
|
8009988: 46bd mov sp, r7
|
|
800998a: bd80 pop {r7, pc}
|
|
800998c: 20000140 .word 0x20000140
|
|
|
|
08009990 <USBD_GetConfig>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
8009990: b580 push {r7, lr}
|
|
8009992: b082 sub sp, #8
|
|
8009994: af00 add r7, sp, #0
|
|
8009996: 6078 str r0, [r7, #4]
|
|
8009998: 6039 str r1, [r7, #0]
|
|
if (req->wLength != 1U)
|
|
800999a: 683b ldr r3, [r7, #0]
|
|
800999c: 88db ldrh r3, [r3, #6]
|
|
800999e: 2b01 cmp r3, #1
|
|
80099a0: d004 beq.n 80099ac <USBD_GetConfig+0x1c>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80099a2: 6839 ldr r1, [r7, #0]
|
|
80099a4: 6878 ldr r0, [r7, #4]
|
|
80099a6: f000 f8cb bl 8009b40 <USBD_CtlError>
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
80099aa: e021 b.n 80099f0 <USBD_GetConfig+0x60>
|
|
switch (pdev->dev_state)
|
|
80099ac: 687b ldr r3, [r7, #4]
|
|
80099ae: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80099b2: 2b01 cmp r3, #1
|
|
80099b4: db17 blt.n 80099e6 <USBD_GetConfig+0x56>
|
|
80099b6: 2b02 cmp r3, #2
|
|
80099b8: dd02 ble.n 80099c0 <USBD_GetConfig+0x30>
|
|
80099ba: 2b03 cmp r3, #3
|
|
80099bc: d00b beq.n 80099d6 <USBD_GetConfig+0x46>
|
|
80099be: e012 b.n 80099e6 <USBD_GetConfig+0x56>
|
|
pdev->dev_default_config = 0U;
|
|
80099c0: 687b ldr r3, [r7, #4]
|
|
80099c2: 2200 movs r2, #0
|
|
80099c4: 609a str r2, [r3, #8]
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
|
|
80099c6: 687b ldr r3, [r7, #4]
|
|
80099c8: 3308 adds r3, #8
|
|
80099ca: 2201 movs r2, #1
|
|
80099cc: 4619 mov r1, r3
|
|
80099ce: 6878 ldr r0, [r7, #4]
|
|
80099d0: f000 f920 bl 8009c14 <USBD_CtlSendData>
|
|
break;
|
|
80099d4: e00c b.n 80099f0 <USBD_GetConfig+0x60>
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
|
|
80099d6: 687b ldr r3, [r7, #4]
|
|
80099d8: 3304 adds r3, #4
|
|
80099da: 2201 movs r2, #1
|
|
80099dc: 4619 mov r1, r3
|
|
80099de: 6878 ldr r0, [r7, #4]
|
|
80099e0: f000 f918 bl 8009c14 <USBD_CtlSendData>
|
|
break;
|
|
80099e4: e004 b.n 80099f0 <USBD_GetConfig+0x60>
|
|
USBD_CtlError(pdev, req);
|
|
80099e6: 6839 ldr r1, [r7, #0]
|
|
80099e8: 6878 ldr r0, [r7, #4]
|
|
80099ea: f000 f8a9 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
80099ee: bf00 nop
|
|
}
|
|
80099f0: bf00 nop
|
|
80099f2: 3708 adds r7, #8
|
|
80099f4: 46bd mov sp, r7
|
|
80099f6: bd80 pop {r7, pc}
|
|
|
|
080099f8 <USBD_GetStatus>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
80099f8: b580 push {r7, lr}
|
|
80099fa: b082 sub sp, #8
|
|
80099fc: af00 add r7, sp, #0
|
|
80099fe: 6078 str r0, [r7, #4]
|
|
8009a00: 6039 str r1, [r7, #0]
|
|
switch (pdev->dev_state)
|
|
8009a02: 687b ldr r3, [r7, #4]
|
|
8009a04: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8009a08: 3b01 subs r3, #1
|
|
8009a0a: 2b02 cmp r3, #2
|
|
8009a0c: d81e bhi.n 8009a4c <USBD_GetStatus+0x54>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wLength != 0x2U)
|
|
8009a0e: 683b ldr r3, [r7, #0]
|
|
8009a10: 88db ldrh r3, [r3, #6]
|
|
8009a12: 2b02 cmp r3, #2
|
|
8009a14: d004 beq.n 8009a20 <USBD_GetStatus+0x28>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8009a16: 6839 ldr r1, [r7, #0]
|
|
8009a18: 6878 ldr r0, [r7, #4]
|
|
8009a1a: f000 f891 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009a1e: e01a b.n 8009a56 <USBD_GetStatus+0x5e>
|
|
}
|
|
|
|
#if (USBD_SELF_POWERED == 1U)
|
|
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
|
|
8009a20: 687b ldr r3, [r7, #4]
|
|
8009a22: 2201 movs r2, #1
|
|
8009a24: 60da str r2, [r3, #12]
|
|
#else
|
|
pdev->dev_config_status = 0U;
|
|
#endif
|
|
|
|
if (pdev->dev_remote_wakeup)
|
|
8009a26: 687b ldr r3, [r7, #4]
|
|
8009a28: f8d3 32a4 ldr.w r3, [r3, #676] ; 0x2a4
|
|
8009a2c: 2b00 cmp r3, #0
|
|
8009a2e: d005 beq.n 8009a3c <USBD_GetStatus+0x44>
|
|
{
|
|
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
|
|
8009a30: 687b ldr r3, [r7, #4]
|
|
8009a32: 68db ldr r3, [r3, #12]
|
|
8009a34: f043 0202 orr.w r2, r3, #2
|
|
8009a38: 687b ldr r3, [r7, #4]
|
|
8009a3a: 60da str r2, [r3, #12]
|
|
}
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
|
|
8009a3c: 687b ldr r3, [r7, #4]
|
|
8009a3e: 330c adds r3, #12
|
|
8009a40: 2202 movs r2, #2
|
|
8009a42: 4619 mov r1, r3
|
|
8009a44: 6878 ldr r0, [r7, #4]
|
|
8009a46: f000 f8e5 bl 8009c14 <USBD_CtlSendData>
|
|
break;
|
|
8009a4a: e004 b.n 8009a56 <USBD_GetStatus+0x5e>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8009a4c: 6839 ldr r1, [r7, #0]
|
|
8009a4e: 6878 ldr r0, [r7, #4]
|
|
8009a50: f000 f876 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009a54: bf00 nop
|
|
}
|
|
}
|
|
8009a56: bf00 nop
|
|
8009a58: 3708 adds r7, #8
|
|
8009a5a: 46bd mov sp, r7
|
|
8009a5c: bd80 pop {r7, pc}
|
|
|
|
08009a5e <USBD_SetFeature>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8009a5e: b580 push {r7, lr}
|
|
8009a60: b082 sub sp, #8
|
|
8009a62: af00 add r7, sp, #0
|
|
8009a64: 6078 str r0, [r7, #4]
|
|
8009a66: 6039 str r1, [r7, #0]
|
|
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
|
|
8009a68: 683b ldr r3, [r7, #0]
|
|
8009a6a: 885b ldrh r3, [r3, #2]
|
|
8009a6c: 2b01 cmp r3, #1
|
|
8009a6e: d106 bne.n 8009a7e <USBD_SetFeature+0x20>
|
|
{
|
|
pdev->dev_remote_wakeup = 1U;
|
|
8009a70: 687b ldr r3, [r7, #4]
|
|
8009a72: 2201 movs r2, #1
|
|
8009a74: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
|
|
USBD_CtlSendStatus(pdev);
|
|
8009a78: 6878 ldr r0, [r7, #4]
|
|
8009a7a: f000 f90b bl 8009c94 <USBD_CtlSendStatus>
|
|
}
|
|
}
|
|
8009a7e: bf00 nop
|
|
8009a80: 3708 adds r7, #8
|
|
8009a82: 46bd mov sp, r7
|
|
8009a84: bd80 pop {r7, pc}
|
|
|
|
08009a86 <USBD_ClrFeature>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8009a86: b580 push {r7, lr}
|
|
8009a88: b082 sub sp, #8
|
|
8009a8a: af00 add r7, sp, #0
|
|
8009a8c: 6078 str r0, [r7, #4]
|
|
8009a8e: 6039 str r1, [r7, #0]
|
|
switch (pdev->dev_state)
|
|
8009a90: 687b ldr r3, [r7, #4]
|
|
8009a92: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8009a96: 3b01 subs r3, #1
|
|
8009a98: 2b02 cmp r3, #2
|
|
8009a9a: d80b bhi.n 8009ab4 <USBD_ClrFeature+0x2e>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
|
|
8009a9c: 683b ldr r3, [r7, #0]
|
|
8009a9e: 885b ldrh r3, [r3, #2]
|
|
8009aa0: 2b01 cmp r3, #1
|
|
8009aa2: d10c bne.n 8009abe <USBD_ClrFeature+0x38>
|
|
{
|
|
pdev->dev_remote_wakeup = 0U;
|
|
8009aa4: 687b ldr r3, [r7, #4]
|
|
8009aa6: 2200 movs r2, #0
|
|
8009aa8: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
|
|
USBD_CtlSendStatus(pdev);
|
|
8009aac: 6878 ldr r0, [r7, #4]
|
|
8009aae: f000 f8f1 bl 8009c94 <USBD_CtlSendStatus>
|
|
}
|
|
break;
|
|
8009ab2: e004 b.n 8009abe <USBD_ClrFeature+0x38>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8009ab4: 6839 ldr r1, [r7, #0]
|
|
8009ab6: 6878 ldr r0, [r7, #4]
|
|
8009ab8: f000 f842 bl 8009b40 <USBD_CtlError>
|
|
break;
|
|
8009abc: e000 b.n 8009ac0 <USBD_ClrFeature+0x3a>
|
|
break;
|
|
8009abe: bf00 nop
|
|
}
|
|
}
|
|
8009ac0: bf00 nop
|
|
8009ac2: 3708 adds r7, #8
|
|
8009ac4: 46bd mov sp, r7
|
|
8009ac6: bd80 pop {r7, pc}
|
|
|
|
08009ac8 <USBD_ParseSetupRequest>:
|
|
* @param req: usb request
|
|
* @retval None
|
|
*/
|
|
|
|
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
|
|
{
|
|
8009ac8: b480 push {r7}
|
|
8009aca: b083 sub sp, #12
|
|
8009acc: af00 add r7, sp, #0
|
|
8009ace: 6078 str r0, [r7, #4]
|
|
8009ad0: 6039 str r1, [r7, #0]
|
|
req->bmRequest = *(uint8_t *)(pdata);
|
|
8009ad2: 683b ldr r3, [r7, #0]
|
|
8009ad4: 781a ldrb r2, [r3, #0]
|
|
8009ad6: 687b ldr r3, [r7, #4]
|
|
8009ad8: 701a strb r2, [r3, #0]
|
|
req->bRequest = *(uint8_t *)(pdata + 1U);
|
|
8009ada: 683b ldr r3, [r7, #0]
|
|
8009adc: 785a ldrb r2, [r3, #1]
|
|
8009ade: 687b ldr r3, [r7, #4]
|
|
8009ae0: 705a strb r2, [r3, #1]
|
|
req->wValue = SWAPBYTE(pdata + 2U);
|
|
8009ae2: 683b ldr r3, [r7, #0]
|
|
8009ae4: 3302 adds r3, #2
|
|
8009ae6: 781b ldrb r3, [r3, #0]
|
|
8009ae8: b29a uxth r2, r3
|
|
8009aea: 683b ldr r3, [r7, #0]
|
|
8009aec: 3303 adds r3, #3
|
|
8009aee: 781b ldrb r3, [r3, #0]
|
|
8009af0: b29b uxth r3, r3
|
|
8009af2: 021b lsls r3, r3, #8
|
|
8009af4: b29b uxth r3, r3
|
|
8009af6: 4413 add r3, r2
|
|
8009af8: b29a uxth r2, r3
|
|
8009afa: 687b ldr r3, [r7, #4]
|
|
8009afc: 805a strh r2, [r3, #2]
|
|
req->wIndex = SWAPBYTE(pdata + 4U);
|
|
8009afe: 683b ldr r3, [r7, #0]
|
|
8009b00: 3304 adds r3, #4
|
|
8009b02: 781b ldrb r3, [r3, #0]
|
|
8009b04: b29a uxth r2, r3
|
|
8009b06: 683b ldr r3, [r7, #0]
|
|
8009b08: 3305 adds r3, #5
|
|
8009b0a: 781b ldrb r3, [r3, #0]
|
|
8009b0c: b29b uxth r3, r3
|
|
8009b0e: 021b lsls r3, r3, #8
|
|
8009b10: b29b uxth r3, r3
|
|
8009b12: 4413 add r3, r2
|
|
8009b14: b29a uxth r2, r3
|
|
8009b16: 687b ldr r3, [r7, #4]
|
|
8009b18: 809a strh r2, [r3, #4]
|
|
req->wLength = SWAPBYTE(pdata + 6U);
|
|
8009b1a: 683b ldr r3, [r7, #0]
|
|
8009b1c: 3306 adds r3, #6
|
|
8009b1e: 781b ldrb r3, [r3, #0]
|
|
8009b20: b29a uxth r2, r3
|
|
8009b22: 683b ldr r3, [r7, #0]
|
|
8009b24: 3307 adds r3, #7
|
|
8009b26: 781b ldrb r3, [r3, #0]
|
|
8009b28: b29b uxth r3, r3
|
|
8009b2a: 021b lsls r3, r3, #8
|
|
8009b2c: b29b uxth r3, r3
|
|
8009b2e: 4413 add r3, r2
|
|
8009b30: b29a uxth r2, r3
|
|
8009b32: 687b ldr r3, [r7, #4]
|
|
8009b34: 80da strh r2, [r3, #6]
|
|
|
|
}
|
|
8009b36: bf00 nop
|
|
8009b38: 370c adds r7, #12
|
|
8009b3a: 46bd mov sp, r7
|
|
8009b3c: bc80 pop {r7}
|
|
8009b3e: 4770 bx lr
|
|
|
|
08009b40 <USBD_CtlError>:
|
|
* @retval None
|
|
*/
|
|
|
|
void USBD_CtlError(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8009b40: b580 push {r7, lr}
|
|
8009b42: b082 sub sp, #8
|
|
8009b44: af00 add r7, sp, #0
|
|
8009b46: 6078 str r0, [r7, #4]
|
|
8009b48: 6039 str r1, [r7, #0]
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8009b4a: 2180 movs r1, #128 ; 0x80
|
|
8009b4c: 6878 ldr r0, [r7, #4]
|
|
8009b4e: f000 fc18 bl 800a382 <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0U);
|
|
8009b52: 2100 movs r1, #0
|
|
8009b54: 6878 ldr r0, [r7, #4]
|
|
8009b56: f000 fc14 bl 800a382 <USBD_LL_StallEP>
|
|
}
|
|
8009b5a: bf00 nop
|
|
8009b5c: 3708 adds r7, #8
|
|
8009b5e: 46bd mov sp, r7
|
|
8009b60: bd80 pop {r7, pc}
|
|
|
|
08009b62 <USBD_GetString>:
|
|
* @param unicode : Formatted string buffer (unicode)
|
|
* @param len : descriptor length
|
|
* @retval None
|
|
*/
|
|
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
|
|
{
|
|
8009b62: b580 push {r7, lr}
|
|
8009b64: b086 sub sp, #24
|
|
8009b66: af00 add r7, sp, #0
|
|
8009b68: 60f8 str r0, [r7, #12]
|
|
8009b6a: 60b9 str r1, [r7, #8]
|
|
8009b6c: 607a str r2, [r7, #4]
|
|
uint8_t idx = 0U;
|
|
8009b6e: 2300 movs r3, #0
|
|
8009b70: 75fb strb r3, [r7, #23]
|
|
|
|
if (desc != NULL)
|
|
8009b72: 68fb ldr r3, [r7, #12]
|
|
8009b74: 2b00 cmp r3, #0
|
|
8009b76: d032 beq.n 8009bde <USBD_GetString+0x7c>
|
|
{
|
|
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
|
|
8009b78: 68f8 ldr r0, [r7, #12]
|
|
8009b7a: f000 f834 bl 8009be6 <USBD_GetLen>
|
|
8009b7e: 4603 mov r3, r0
|
|
8009b80: 3301 adds r3, #1
|
|
8009b82: b29b uxth r3, r3
|
|
8009b84: 005b lsls r3, r3, #1
|
|
8009b86: b29a uxth r2, r3
|
|
8009b88: 687b ldr r3, [r7, #4]
|
|
8009b8a: 801a strh r2, [r3, #0]
|
|
unicode[idx++] = *(uint8_t *)(void *)len;
|
|
8009b8c: 7dfb ldrb r3, [r7, #23]
|
|
8009b8e: 1c5a adds r2, r3, #1
|
|
8009b90: 75fa strb r2, [r7, #23]
|
|
8009b92: 461a mov r2, r3
|
|
8009b94: 68bb ldr r3, [r7, #8]
|
|
8009b96: 4413 add r3, r2
|
|
8009b98: 687a ldr r2, [r7, #4]
|
|
8009b9a: 7812 ldrb r2, [r2, #0]
|
|
8009b9c: 701a strb r2, [r3, #0]
|
|
unicode[idx++] = USB_DESC_TYPE_STRING;
|
|
8009b9e: 7dfb ldrb r3, [r7, #23]
|
|
8009ba0: 1c5a adds r2, r3, #1
|
|
8009ba2: 75fa strb r2, [r7, #23]
|
|
8009ba4: 461a mov r2, r3
|
|
8009ba6: 68bb ldr r3, [r7, #8]
|
|
8009ba8: 4413 add r3, r2
|
|
8009baa: 2203 movs r2, #3
|
|
8009bac: 701a strb r2, [r3, #0]
|
|
|
|
while (*desc != '\0')
|
|
8009bae: e012 b.n 8009bd6 <USBD_GetString+0x74>
|
|
{
|
|
unicode[idx++] = *desc++;
|
|
8009bb0: 68fb ldr r3, [r7, #12]
|
|
8009bb2: 1c5a adds r2, r3, #1
|
|
8009bb4: 60fa str r2, [r7, #12]
|
|
8009bb6: 7dfa ldrb r2, [r7, #23]
|
|
8009bb8: 1c51 adds r1, r2, #1
|
|
8009bba: 75f9 strb r1, [r7, #23]
|
|
8009bbc: 4611 mov r1, r2
|
|
8009bbe: 68ba ldr r2, [r7, #8]
|
|
8009bc0: 440a add r2, r1
|
|
8009bc2: 781b ldrb r3, [r3, #0]
|
|
8009bc4: 7013 strb r3, [r2, #0]
|
|
unicode[idx++] = 0U;
|
|
8009bc6: 7dfb ldrb r3, [r7, #23]
|
|
8009bc8: 1c5a adds r2, r3, #1
|
|
8009bca: 75fa strb r2, [r7, #23]
|
|
8009bcc: 461a mov r2, r3
|
|
8009bce: 68bb ldr r3, [r7, #8]
|
|
8009bd0: 4413 add r3, r2
|
|
8009bd2: 2200 movs r2, #0
|
|
8009bd4: 701a strb r2, [r3, #0]
|
|
while (*desc != '\0')
|
|
8009bd6: 68fb ldr r3, [r7, #12]
|
|
8009bd8: 781b ldrb r3, [r3, #0]
|
|
8009bda: 2b00 cmp r3, #0
|
|
8009bdc: d1e8 bne.n 8009bb0 <USBD_GetString+0x4e>
|
|
}
|
|
}
|
|
}
|
|
8009bde: bf00 nop
|
|
8009be0: 3718 adds r7, #24
|
|
8009be2: 46bd mov sp, r7
|
|
8009be4: bd80 pop {r7, pc}
|
|
|
|
08009be6 <USBD_GetLen>:
|
|
* return the string length
|
|
* @param buf : pointer to the ascii string buffer
|
|
* @retval string length
|
|
*/
|
|
static uint8_t USBD_GetLen(uint8_t *buf)
|
|
{
|
|
8009be6: b480 push {r7}
|
|
8009be8: b085 sub sp, #20
|
|
8009bea: af00 add r7, sp, #0
|
|
8009bec: 6078 str r0, [r7, #4]
|
|
uint8_t len = 0U;
|
|
8009bee: 2300 movs r3, #0
|
|
8009bf0: 73fb strb r3, [r7, #15]
|
|
|
|
while (*buf != '\0')
|
|
8009bf2: e005 b.n 8009c00 <USBD_GetLen+0x1a>
|
|
{
|
|
len++;
|
|
8009bf4: 7bfb ldrb r3, [r7, #15]
|
|
8009bf6: 3301 adds r3, #1
|
|
8009bf8: 73fb strb r3, [r7, #15]
|
|
buf++;
|
|
8009bfa: 687b ldr r3, [r7, #4]
|
|
8009bfc: 3301 adds r3, #1
|
|
8009bfe: 607b str r3, [r7, #4]
|
|
while (*buf != '\0')
|
|
8009c00: 687b ldr r3, [r7, #4]
|
|
8009c02: 781b ldrb r3, [r3, #0]
|
|
8009c04: 2b00 cmp r3, #0
|
|
8009c06: d1f5 bne.n 8009bf4 <USBD_GetLen+0xe>
|
|
}
|
|
|
|
return len;
|
|
8009c08: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8009c0a: 4618 mov r0, r3
|
|
8009c0c: 3714 adds r7, #20
|
|
8009c0e: 46bd mov sp, r7
|
|
8009c10: bc80 pop {r7}
|
|
8009c12: 4770 bx lr
|
|
|
|
08009c14 <USBD_CtlSendData>:
|
|
* @param len: length of data to be sent
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8009c14: b580 push {r7, lr}
|
|
8009c16: b084 sub sp, #16
|
|
8009c18: af00 add r7, sp, #0
|
|
8009c1a: 60f8 str r0, [r7, #12]
|
|
8009c1c: 60b9 str r1, [r7, #8]
|
|
8009c1e: 4613 mov r3, r2
|
|
8009c20: 80fb strh r3, [r7, #6]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_DATA_IN;
|
|
8009c22: 68fb ldr r3, [r7, #12]
|
|
8009c24: 2202 movs r2, #2
|
|
8009c26: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
pdev->ep_in[0].total_length = len;
|
|
8009c2a: 88fa ldrh r2, [r7, #6]
|
|
8009c2c: 68fb ldr r3, [r7, #12]
|
|
8009c2e: 61da str r2, [r3, #28]
|
|
pdev->ep_in[0].rem_length = len;
|
|
8009c30: 88fa ldrh r2, [r7, #6]
|
|
8009c32: 68fb ldr r3, [r7, #12]
|
|
8009c34: 621a str r2, [r3, #32]
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
|
|
8009c36: 88fb ldrh r3, [r7, #6]
|
|
8009c38: 68ba ldr r2, [r7, #8]
|
|
8009c3a: 2100 movs r1, #0
|
|
8009c3c: 68f8 ldr r0, [r7, #12]
|
|
8009c3e: f000 fc29 bl 800a494 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
8009c42: 2300 movs r3, #0
|
|
}
|
|
8009c44: 4618 mov r0, r3
|
|
8009c46: 3710 adds r7, #16
|
|
8009c48: 46bd mov sp, r7
|
|
8009c4a: bd80 pop {r7, pc}
|
|
|
|
08009c4c <USBD_CtlContinueSendData>:
|
|
* @param len: length of data to be sent
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8009c4c: b580 push {r7, lr}
|
|
8009c4e: b084 sub sp, #16
|
|
8009c50: af00 add r7, sp, #0
|
|
8009c52: 60f8 str r0, [r7, #12]
|
|
8009c54: 60b9 str r1, [r7, #8]
|
|
8009c56: 4613 mov r3, r2
|
|
8009c58: 80fb strh r3, [r7, #6]
|
|
/* Start the next transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
|
|
8009c5a: 88fb ldrh r3, [r7, #6]
|
|
8009c5c: 68ba ldr r2, [r7, #8]
|
|
8009c5e: 2100 movs r1, #0
|
|
8009c60: 68f8 ldr r0, [r7, #12]
|
|
8009c62: f000 fc17 bl 800a494 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
8009c66: 2300 movs r3, #0
|
|
}
|
|
8009c68: 4618 mov r0, r3
|
|
8009c6a: 3710 adds r7, #16
|
|
8009c6c: 46bd mov sp, r7
|
|
8009c6e: bd80 pop {r7, pc}
|
|
|
|
08009c70 <USBD_CtlContinueRx>:
|
|
* @param len: length of data to be received
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8009c70: b580 push {r7, lr}
|
|
8009c72: b084 sub sp, #16
|
|
8009c74: af00 add r7, sp, #0
|
|
8009c76: 60f8 str r0, [r7, #12]
|
|
8009c78: 60b9 str r1, [r7, #8]
|
|
8009c7a: 4613 mov r3, r2
|
|
8009c7c: 80fb strh r3, [r7, #6]
|
|
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
|
|
8009c7e: 88fb ldrh r3, [r7, #6]
|
|
8009c80: 68ba ldr r2, [r7, #8]
|
|
8009c82: 2100 movs r1, #0
|
|
8009c84: 68f8 ldr r0, [r7, #12]
|
|
8009c86: f000 fc28 bl 800a4da <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
8009c8a: 2300 movs r3, #0
|
|
}
|
|
8009c8c: 4618 mov r0, r3
|
|
8009c8e: 3710 adds r7, #16
|
|
8009c90: 46bd mov sp, r7
|
|
8009c92: bd80 pop {r7, pc}
|
|
|
|
08009c94 <USBD_CtlSendStatus>:
|
|
* send zero lzngth packet on the ctl pipe
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8009c94: b580 push {r7, lr}
|
|
8009c96: b082 sub sp, #8
|
|
8009c98: af00 add r7, sp, #0
|
|
8009c9a: 6078 str r0, [r7, #4]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_STATUS_IN;
|
|
8009c9c: 687b ldr r3, [r7, #4]
|
|
8009c9e: 2204 movs r2, #4
|
|
8009ca0: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
|
|
8009ca4: 2300 movs r3, #0
|
|
8009ca6: 2200 movs r2, #0
|
|
8009ca8: 2100 movs r1, #0
|
|
8009caa: 6878 ldr r0, [r7, #4]
|
|
8009cac: f000 fbf2 bl 800a494 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
8009cb0: 2300 movs r3, #0
|
|
}
|
|
8009cb2: 4618 mov r0, r3
|
|
8009cb4: 3708 adds r7, #8
|
|
8009cb6: 46bd mov sp, r7
|
|
8009cb8: bd80 pop {r7, pc}
|
|
|
|
08009cba <USBD_CtlReceiveStatus>:
|
|
* receive zero lzngth packet on the ctl pipe
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8009cba: b580 push {r7, lr}
|
|
8009cbc: b082 sub sp, #8
|
|
8009cbe: af00 add r7, sp, #0
|
|
8009cc0: 6078 str r0, [r7, #4]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_STATUS_OUT;
|
|
8009cc2: 687b ldr r3, [r7, #4]
|
|
8009cc4: 2205 movs r2, #5
|
|
8009cc6: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
8009cca: 2300 movs r3, #0
|
|
8009ccc: 2200 movs r2, #0
|
|
8009cce: 2100 movs r1, #0
|
|
8009cd0: 6878 ldr r0, [r7, #4]
|
|
8009cd2: f000 fc02 bl 800a4da <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
8009cd6: 2300 movs r3, #0
|
|
}
|
|
8009cd8: 4618 mov r0, r3
|
|
8009cda: 3708 adds r7, #8
|
|
8009cdc: 46bd mov sp, r7
|
|
8009cde: bd80 pop {r7, pc}
|
|
|
|
08009ce0 <MX_USB_DEVICE_Init>:
|
|
/**
|
|
* Init USB device Library, add supported class and start the library
|
|
* @retval None
|
|
*/
|
|
void MX_USB_DEVICE_Init(void)
|
|
{
|
|
8009ce0: b580 push {r7, lr}
|
|
8009ce2: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
|
|
|
|
/* USER CODE END USB_DEVICE_Init_PreTreatment */
|
|
|
|
/* Init Device Library, add supported class and start the library. */
|
|
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
|
|
8009ce4: 2200 movs r2, #0
|
|
8009ce6: 4912 ldr r1, [pc, #72] ; (8009d30 <MX_USB_DEVICE_Init+0x50>)
|
|
8009ce8: 4812 ldr r0, [pc, #72] ; (8009d34 <MX_USB_DEVICE_Init+0x54>)
|
|
8009cea: f7fe ff8b bl 8008c04 <USBD_Init>
|
|
8009cee: 4603 mov r3, r0
|
|
8009cf0: 2b00 cmp r3, #0
|
|
8009cf2: d001 beq.n 8009cf8 <MX_USB_DEVICE_Init+0x18>
|
|
{
|
|
Error_Handler();
|
|
8009cf4: f7f6 fc86 bl 8000604 <Error_Handler>
|
|
}
|
|
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_MSC) != USBD_OK)
|
|
8009cf8: 490f ldr r1, [pc, #60] ; (8009d38 <MX_USB_DEVICE_Init+0x58>)
|
|
8009cfa: 480e ldr r0, [pc, #56] ; (8009d34 <MX_USB_DEVICE_Init+0x54>)
|
|
8009cfc: f7fe ffad bl 8008c5a <USBD_RegisterClass>
|
|
8009d00: 4603 mov r3, r0
|
|
8009d02: 2b00 cmp r3, #0
|
|
8009d04: d001 beq.n 8009d0a <MX_USB_DEVICE_Init+0x2a>
|
|
{
|
|
Error_Handler();
|
|
8009d06: f7f6 fc7d bl 8000604 <Error_Handler>
|
|
}
|
|
if (USBD_MSC_RegisterStorage(&hUsbDeviceFS, &USBD_Storage_Interface_fops_FS) != USBD_OK)
|
|
8009d0a: 490c ldr r1, [pc, #48] ; (8009d3c <MX_USB_DEVICE_Init+0x5c>)
|
|
8009d0c: 4809 ldr r0, [pc, #36] ; (8009d34 <MX_USB_DEVICE_Init+0x54>)
|
|
8009d0e: f7fd ff5b bl 8007bc8 <USBD_MSC_RegisterStorage>
|
|
8009d12: 4603 mov r3, r0
|
|
8009d14: 2b00 cmp r3, #0
|
|
8009d16: d001 beq.n 8009d1c <MX_USB_DEVICE_Init+0x3c>
|
|
{
|
|
Error_Handler();
|
|
8009d18: f7f6 fc74 bl 8000604 <Error_Handler>
|
|
}
|
|
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
|
|
8009d1c: 4805 ldr r0, [pc, #20] ; (8009d34 <MX_USB_DEVICE_Init+0x54>)
|
|
8009d1e: f7fe ffb5 bl 8008c8c <USBD_Start>
|
|
8009d22: 4603 mov r3, r0
|
|
8009d24: 2b00 cmp r3, #0
|
|
8009d26: d001 beq.n 8009d2c <MX_USB_DEVICE_Init+0x4c>
|
|
{
|
|
Error_Handler();
|
|
8009d28: f7f6 fc6c bl 8000604 <Error_Handler>
|
|
}
|
|
|
|
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
|
|
|
|
/* USER CODE END USB_DEVICE_Init_PostTreatment */
|
|
}
|
|
8009d2c: bf00 nop
|
|
8009d2e: bd80 pop {r7, pc}
|
|
8009d30: 200000b4 .word 0x200000b4
|
|
8009d34: 20000490 .word 0x20000490
|
|
8009d38: 20000010 .word 0x20000010
|
|
8009d3c: 20000104 .word 0x20000104
|
|
|
|
08009d40 <USBD_FS_DeviceDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8009d40: b480 push {r7}
|
|
8009d42: b083 sub sp, #12
|
|
8009d44: af00 add r7, sp, #0
|
|
8009d46: 4603 mov r3, r0
|
|
8009d48: 6039 str r1, [r7, #0]
|
|
8009d4a: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = sizeof(USBD_FS_DeviceDesc);
|
|
8009d4c: 683b ldr r3, [r7, #0]
|
|
8009d4e: 2212 movs r2, #18
|
|
8009d50: 801a strh r2, [r3, #0]
|
|
return USBD_FS_DeviceDesc;
|
|
8009d52: 4b03 ldr r3, [pc, #12] ; (8009d60 <USBD_FS_DeviceDescriptor+0x20>)
|
|
}
|
|
8009d54: 4618 mov r0, r3
|
|
8009d56: 370c adds r7, #12
|
|
8009d58: 46bd mov sp, r7
|
|
8009d5a: bc80 pop {r7}
|
|
8009d5c: 4770 bx lr
|
|
8009d5e: bf00 nop
|
|
8009d60: 200000d0 .word 0x200000d0
|
|
|
|
08009d64 <USBD_FS_LangIDStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8009d64: b480 push {r7}
|
|
8009d66: b083 sub sp, #12
|
|
8009d68: af00 add r7, sp, #0
|
|
8009d6a: 4603 mov r3, r0
|
|
8009d6c: 6039 str r1, [r7, #0]
|
|
8009d6e: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = sizeof(USBD_LangIDDesc);
|
|
8009d70: 683b ldr r3, [r7, #0]
|
|
8009d72: 2204 movs r2, #4
|
|
8009d74: 801a strh r2, [r3, #0]
|
|
return USBD_LangIDDesc;
|
|
8009d76: 4b03 ldr r3, [pc, #12] ; (8009d84 <USBD_FS_LangIDStrDescriptor+0x20>)
|
|
}
|
|
8009d78: 4618 mov r0, r3
|
|
8009d7a: 370c adds r7, #12
|
|
8009d7c: 46bd mov sp, r7
|
|
8009d7e: bc80 pop {r7}
|
|
8009d80: 4770 bx lr
|
|
8009d82: bf00 nop
|
|
8009d84: 200000e4 .word 0x200000e4
|
|
|
|
08009d88 <USBD_FS_ProductStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8009d88: b580 push {r7, lr}
|
|
8009d8a: b082 sub sp, #8
|
|
8009d8c: af00 add r7, sp, #0
|
|
8009d8e: 4603 mov r3, r0
|
|
8009d90: 6039 str r1, [r7, #0]
|
|
8009d92: 71fb strb r3, [r7, #7]
|
|
if(speed == 0)
|
|
8009d94: 79fb ldrb r3, [r7, #7]
|
|
8009d96: 2b00 cmp r3, #0
|
|
8009d98: d105 bne.n 8009da6 <USBD_FS_ProductStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
|
|
8009d9a: 683a ldr r2, [r7, #0]
|
|
8009d9c: 4907 ldr r1, [pc, #28] ; (8009dbc <USBD_FS_ProductStrDescriptor+0x34>)
|
|
8009d9e: 4808 ldr r0, [pc, #32] ; (8009dc0 <USBD_FS_ProductStrDescriptor+0x38>)
|
|
8009da0: f7ff fedf bl 8009b62 <USBD_GetString>
|
|
8009da4: e004 b.n 8009db0 <USBD_FS_ProductStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
|
|
8009da6: 683a ldr r2, [r7, #0]
|
|
8009da8: 4904 ldr r1, [pc, #16] ; (8009dbc <USBD_FS_ProductStrDescriptor+0x34>)
|
|
8009daa: 4805 ldr r0, [pc, #20] ; (8009dc0 <USBD_FS_ProductStrDescriptor+0x38>)
|
|
8009dac: f7ff fed9 bl 8009b62 <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
8009db0: 4b02 ldr r3, [pc, #8] ; (8009dbc <USBD_FS_ProductStrDescriptor+0x34>)
|
|
}
|
|
8009db2: 4618 mov r0, r3
|
|
8009db4: 3708 adds r7, #8
|
|
8009db6: 46bd mov sp, r7
|
|
8009db8: bd80 pop {r7, pc}
|
|
8009dba: bf00 nop
|
|
8009dbc: 20000754 .word 0x20000754
|
|
8009dc0: 0800a664 .word 0x0800a664
|
|
|
|
08009dc4 <USBD_FS_ManufacturerStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8009dc4: b580 push {r7, lr}
|
|
8009dc6: b082 sub sp, #8
|
|
8009dc8: af00 add r7, sp, #0
|
|
8009dca: 4603 mov r3, r0
|
|
8009dcc: 6039 str r1, [r7, #0]
|
|
8009dce: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
|
|
8009dd0: 683a ldr r2, [r7, #0]
|
|
8009dd2: 4904 ldr r1, [pc, #16] ; (8009de4 <USBD_FS_ManufacturerStrDescriptor+0x20>)
|
|
8009dd4: 4804 ldr r0, [pc, #16] ; (8009de8 <USBD_FS_ManufacturerStrDescriptor+0x24>)
|
|
8009dd6: f7ff fec4 bl 8009b62 <USBD_GetString>
|
|
return USBD_StrDesc;
|
|
8009dda: 4b02 ldr r3, [pc, #8] ; (8009de4 <USBD_FS_ManufacturerStrDescriptor+0x20>)
|
|
}
|
|
8009ddc: 4618 mov r0, r3
|
|
8009dde: 3708 adds r7, #8
|
|
8009de0: 46bd mov sp, r7
|
|
8009de2: bd80 pop {r7, pc}
|
|
8009de4: 20000754 .word 0x20000754
|
|
8009de8: 0800a678 .word 0x0800a678
|
|
|
|
08009dec <USBD_FS_SerialStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8009dec: b580 push {r7, lr}
|
|
8009dee: b082 sub sp, #8
|
|
8009df0: af00 add r7, sp, #0
|
|
8009df2: 4603 mov r3, r0
|
|
8009df4: 6039 str r1, [r7, #0]
|
|
8009df6: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = USB_SIZ_STRING_SERIAL;
|
|
8009df8: 683b ldr r3, [r7, #0]
|
|
8009dfa: 221a movs r2, #26
|
|
8009dfc: 801a strh r2, [r3, #0]
|
|
|
|
/* Update the serial number string descriptor with the data from the unique
|
|
* ID */
|
|
Get_SerialNum();
|
|
8009dfe: f000 f843 bl 8009e88 <Get_SerialNum>
|
|
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
|
|
|
|
/* USER CODE END USBD_FS_SerialStrDescriptor */
|
|
return (uint8_t *) USBD_StringSerial;
|
|
8009e02: 4b02 ldr r3, [pc, #8] ; (8009e0c <USBD_FS_SerialStrDescriptor+0x20>)
|
|
}
|
|
8009e04: 4618 mov r0, r3
|
|
8009e06: 3708 adds r7, #8
|
|
8009e08: 46bd mov sp, r7
|
|
8009e0a: bd80 pop {r7, pc}
|
|
8009e0c: 200000e8 .word 0x200000e8
|
|
|
|
08009e10 <USBD_FS_ConfigStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8009e10: b580 push {r7, lr}
|
|
8009e12: b082 sub sp, #8
|
|
8009e14: af00 add r7, sp, #0
|
|
8009e16: 4603 mov r3, r0
|
|
8009e18: 6039 str r1, [r7, #0]
|
|
8009e1a: 71fb strb r3, [r7, #7]
|
|
if(speed == USBD_SPEED_HIGH)
|
|
8009e1c: 79fb ldrb r3, [r7, #7]
|
|
8009e1e: 2b00 cmp r3, #0
|
|
8009e20: d105 bne.n 8009e2e <USBD_FS_ConfigStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
|
|
8009e22: 683a ldr r2, [r7, #0]
|
|
8009e24: 4907 ldr r1, [pc, #28] ; (8009e44 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
8009e26: 4808 ldr r0, [pc, #32] ; (8009e48 <USBD_FS_ConfigStrDescriptor+0x38>)
|
|
8009e28: f7ff fe9b bl 8009b62 <USBD_GetString>
|
|
8009e2c: e004 b.n 8009e38 <USBD_FS_ConfigStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
|
|
8009e2e: 683a ldr r2, [r7, #0]
|
|
8009e30: 4904 ldr r1, [pc, #16] ; (8009e44 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
8009e32: 4805 ldr r0, [pc, #20] ; (8009e48 <USBD_FS_ConfigStrDescriptor+0x38>)
|
|
8009e34: f7ff fe95 bl 8009b62 <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
8009e38: 4b02 ldr r3, [pc, #8] ; (8009e44 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
}
|
|
8009e3a: 4618 mov r0, r3
|
|
8009e3c: 3708 adds r7, #8
|
|
8009e3e: 46bd mov sp, r7
|
|
8009e40: bd80 pop {r7, pc}
|
|
8009e42: bf00 nop
|
|
8009e44: 20000754 .word 0x20000754
|
|
8009e48: 0800a68c .word 0x0800a68c
|
|
|
|
08009e4c <USBD_FS_InterfaceStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8009e4c: b580 push {r7, lr}
|
|
8009e4e: b082 sub sp, #8
|
|
8009e50: af00 add r7, sp, #0
|
|
8009e52: 4603 mov r3, r0
|
|
8009e54: 6039 str r1, [r7, #0]
|
|
8009e56: 71fb strb r3, [r7, #7]
|
|
if(speed == 0)
|
|
8009e58: 79fb ldrb r3, [r7, #7]
|
|
8009e5a: 2b00 cmp r3, #0
|
|
8009e5c: d105 bne.n 8009e6a <USBD_FS_InterfaceStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
|
|
8009e5e: 683a ldr r2, [r7, #0]
|
|
8009e60: 4907 ldr r1, [pc, #28] ; (8009e80 <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
8009e62: 4808 ldr r0, [pc, #32] ; (8009e84 <USBD_FS_InterfaceStrDescriptor+0x38>)
|
|
8009e64: f7ff fe7d bl 8009b62 <USBD_GetString>
|
|
8009e68: e004 b.n 8009e74 <USBD_FS_InterfaceStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
|
|
8009e6a: 683a ldr r2, [r7, #0]
|
|
8009e6c: 4904 ldr r1, [pc, #16] ; (8009e80 <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
8009e6e: 4805 ldr r0, [pc, #20] ; (8009e84 <USBD_FS_InterfaceStrDescriptor+0x38>)
|
|
8009e70: f7ff fe77 bl 8009b62 <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
8009e74: 4b02 ldr r3, [pc, #8] ; (8009e80 <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
}
|
|
8009e76: 4618 mov r0, r3
|
|
8009e78: 3708 adds r7, #8
|
|
8009e7a: 46bd mov sp, r7
|
|
8009e7c: bd80 pop {r7, pc}
|
|
8009e7e: bf00 nop
|
|
8009e80: 20000754 .word 0x20000754
|
|
8009e84: 0800a698 .word 0x0800a698
|
|
|
|
08009e88 <Get_SerialNum>:
|
|
* @brief Create the serial number string descriptor
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void Get_SerialNum(void)
|
|
{
|
|
8009e88: b580 push {r7, lr}
|
|
8009e8a: b084 sub sp, #16
|
|
8009e8c: af00 add r7, sp, #0
|
|
uint32_t deviceserial0, deviceserial1, deviceserial2;
|
|
|
|
deviceserial0 = *(uint32_t *) DEVICE_ID1;
|
|
8009e8e: 4b0f ldr r3, [pc, #60] ; (8009ecc <Get_SerialNum+0x44>)
|
|
8009e90: 681b ldr r3, [r3, #0]
|
|
8009e92: 60fb str r3, [r7, #12]
|
|
deviceserial1 = *(uint32_t *) DEVICE_ID2;
|
|
8009e94: 4b0e ldr r3, [pc, #56] ; (8009ed0 <Get_SerialNum+0x48>)
|
|
8009e96: 681b ldr r3, [r3, #0]
|
|
8009e98: 60bb str r3, [r7, #8]
|
|
deviceserial2 = *(uint32_t *) DEVICE_ID3;
|
|
8009e9a: 4b0e ldr r3, [pc, #56] ; (8009ed4 <Get_SerialNum+0x4c>)
|
|
8009e9c: 681b ldr r3, [r3, #0]
|
|
8009e9e: 607b str r3, [r7, #4]
|
|
|
|
deviceserial0 += deviceserial2;
|
|
8009ea0: 68fa ldr r2, [r7, #12]
|
|
8009ea2: 687b ldr r3, [r7, #4]
|
|
8009ea4: 4413 add r3, r2
|
|
8009ea6: 60fb str r3, [r7, #12]
|
|
|
|
if (deviceserial0 != 0)
|
|
8009ea8: 68fb ldr r3, [r7, #12]
|
|
8009eaa: 2b00 cmp r3, #0
|
|
8009eac: d009 beq.n 8009ec2 <Get_SerialNum+0x3a>
|
|
{
|
|
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
|
|
8009eae: 2208 movs r2, #8
|
|
8009eb0: 4909 ldr r1, [pc, #36] ; (8009ed8 <Get_SerialNum+0x50>)
|
|
8009eb2: 68f8 ldr r0, [r7, #12]
|
|
8009eb4: f000 f814 bl 8009ee0 <IntToUnicode>
|
|
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
|
|
8009eb8: 2204 movs r2, #4
|
|
8009eba: 4908 ldr r1, [pc, #32] ; (8009edc <Get_SerialNum+0x54>)
|
|
8009ebc: 68b8 ldr r0, [r7, #8]
|
|
8009ebe: f000 f80f bl 8009ee0 <IntToUnicode>
|
|
}
|
|
}
|
|
8009ec2: bf00 nop
|
|
8009ec4: 3710 adds r7, #16
|
|
8009ec6: 46bd mov sp, r7
|
|
8009ec8: bd80 pop {r7, pc}
|
|
8009eca: bf00 nop
|
|
8009ecc: 1ffff7e8 .word 0x1ffff7e8
|
|
8009ed0: 1ffff7ec .word 0x1ffff7ec
|
|
8009ed4: 1ffff7f0 .word 0x1ffff7f0
|
|
8009ed8: 200000ea .word 0x200000ea
|
|
8009edc: 200000fa .word 0x200000fa
|
|
|
|
08009ee0 <IntToUnicode>:
|
|
* @param pbuf: pointer to the buffer
|
|
* @param len: buffer length
|
|
* @retval None
|
|
*/
|
|
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
|
|
{
|
|
8009ee0: b480 push {r7}
|
|
8009ee2: b087 sub sp, #28
|
|
8009ee4: af00 add r7, sp, #0
|
|
8009ee6: 60f8 str r0, [r7, #12]
|
|
8009ee8: 60b9 str r1, [r7, #8]
|
|
8009eea: 4613 mov r3, r2
|
|
8009eec: 71fb strb r3, [r7, #7]
|
|
uint8_t idx = 0;
|
|
8009eee: 2300 movs r3, #0
|
|
8009ef0: 75fb strb r3, [r7, #23]
|
|
|
|
for (idx = 0; idx < len; idx++)
|
|
8009ef2: 2300 movs r3, #0
|
|
8009ef4: 75fb strb r3, [r7, #23]
|
|
8009ef6: e027 b.n 8009f48 <IntToUnicode+0x68>
|
|
{
|
|
if (((value >> 28)) < 0xA)
|
|
8009ef8: 68fb ldr r3, [r7, #12]
|
|
8009efa: 0f1b lsrs r3, r3, #28
|
|
8009efc: 2b09 cmp r3, #9
|
|
8009efe: d80b bhi.n 8009f18 <IntToUnicode+0x38>
|
|
{
|
|
pbuf[2 * idx] = (value >> 28) + '0';
|
|
8009f00: 68fb ldr r3, [r7, #12]
|
|
8009f02: 0f1b lsrs r3, r3, #28
|
|
8009f04: b2da uxtb r2, r3
|
|
8009f06: 7dfb ldrb r3, [r7, #23]
|
|
8009f08: 005b lsls r3, r3, #1
|
|
8009f0a: 4619 mov r1, r3
|
|
8009f0c: 68bb ldr r3, [r7, #8]
|
|
8009f0e: 440b add r3, r1
|
|
8009f10: 3230 adds r2, #48 ; 0x30
|
|
8009f12: b2d2 uxtb r2, r2
|
|
8009f14: 701a strb r2, [r3, #0]
|
|
8009f16: e00a b.n 8009f2e <IntToUnicode+0x4e>
|
|
}
|
|
else
|
|
{
|
|
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
|
|
8009f18: 68fb ldr r3, [r7, #12]
|
|
8009f1a: 0f1b lsrs r3, r3, #28
|
|
8009f1c: b2da uxtb r2, r3
|
|
8009f1e: 7dfb ldrb r3, [r7, #23]
|
|
8009f20: 005b lsls r3, r3, #1
|
|
8009f22: 4619 mov r1, r3
|
|
8009f24: 68bb ldr r3, [r7, #8]
|
|
8009f26: 440b add r3, r1
|
|
8009f28: 3237 adds r2, #55 ; 0x37
|
|
8009f2a: b2d2 uxtb r2, r2
|
|
8009f2c: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
value = value << 4;
|
|
8009f2e: 68fb ldr r3, [r7, #12]
|
|
8009f30: 011b lsls r3, r3, #4
|
|
8009f32: 60fb str r3, [r7, #12]
|
|
|
|
pbuf[2 * idx + 1] = 0;
|
|
8009f34: 7dfb ldrb r3, [r7, #23]
|
|
8009f36: 005b lsls r3, r3, #1
|
|
8009f38: 3301 adds r3, #1
|
|
8009f3a: 68ba ldr r2, [r7, #8]
|
|
8009f3c: 4413 add r3, r2
|
|
8009f3e: 2200 movs r2, #0
|
|
8009f40: 701a strb r2, [r3, #0]
|
|
for (idx = 0; idx < len; idx++)
|
|
8009f42: 7dfb ldrb r3, [r7, #23]
|
|
8009f44: 3301 adds r3, #1
|
|
8009f46: 75fb strb r3, [r7, #23]
|
|
8009f48: 7dfa ldrb r2, [r7, #23]
|
|
8009f4a: 79fb ldrb r3, [r7, #7]
|
|
8009f4c: 429a cmp r2, r3
|
|
8009f4e: d3d3 bcc.n 8009ef8 <IntToUnicode+0x18>
|
|
}
|
|
}
|
|
8009f50: bf00 nop
|
|
8009f52: 371c adds r7, #28
|
|
8009f54: 46bd mov sp, r7
|
|
8009f56: bc80 pop {r7}
|
|
8009f58: 4770 bx lr
|
|
|
|
08009f5a <STORAGE_Init_FS>:
|
|
* @brief Initializes over USB FS IP
|
|
* @param lun:
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
int8_t STORAGE_Init_FS(uint8_t lun)
|
|
{
|
|
8009f5a: b480 push {r7}
|
|
8009f5c: b083 sub sp, #12
|
|
8009f5e: af00 add r7, sp, #0
|
|
8009f60: 4603 mov r3, r0
|
|
8009f62: 71fb strb r3, [r7, #7]
|
|
/* USER CODE BEGIN 2 */
|
|
return (USBD_OK);
|
|
8009f64: 2300 movs r3, #0
|
|
/* USER CODE END 2 */
|
|
}
|
|
8009f66: 4618 mov r0, r3
|
|
8009f68: 370c adds r7, #12
|
|
8009f6a: 46bd mov sp, r7
|
|
8009f6c: bc80 pop {r7}
|
|
8009f6e: 4770 bx lr
|
|
|
|
08009f70 <STORAGE_GetCapacity_FS>:
|
|
* @param block_num: .
|
|
* @param block_size: .
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
int8_t STORAGE_GetCapacity_FS(uint8_t lun, uint32_t *block_num, uint16_t *block_size)
|
|
{
|
|
8009f70: b580 push {r7, lr}
|
|
8009f72: b084 sub sp, #16
|
|
8009f74: af00 add r7, sp, #0
|
|
8009f76: 4603 mov r3, r0
|
|
8009f78: 60b9 str r1, [r7, #8]
|
|
8009f7a: 607a str r2, [r7, #4]
|
|
8009f7c: 73fb strb r3, [r7, #15]
|
|
/* USER CODE BEGIN 3 */
|
|
HAL_SD_GetCardInfo(&hsd, &SDCardInfo);
|
|
8009f7e: 4909 ldr r1, [pc, #36] ; (8009fa4 <STORAGE_GetCapacity_FS+0x34>)
|
|
8009f80: 4809 ldr r0, [pc, #36] ; (8009fa8 <STORAGE_GetCapacity_FS+0x38>)
|
|
8009f82: f7fa fa29 bl 80043d8 <HAL_SD_GetCardInfo>
|
|
*block_num = SDCardInfo.BlockNbr;
|
|
8009f86: 4b07 ldr r3, [pc, #28] ; (8009fa4 <STORAGE_GetCapacity_FS+0x34>)
|
|
8009f88: 691a ldr r2, [r3, #16]
|
|
8009f8a: 68bb ldr r3, [r7, #8]
|
|
8009f8c: 601a str r2, [r3, #0]
|
|
*block_size = SDCardInfo.BlockSize;
|
|
8009f8e: 4b05 ldr r3, [pc, #20] ; (8009fa4 <STORAGE_GetCapacity_FS+0x34>)
|
|
8009f90: 695b ldr r3, [r3, #20]
|
|
8009f92: b29a uxth r2, r3
|
|
8009f94: 687b ldr r3, [r7, #4]
|
|
8009f96: 801a strh r2, [r3, #0]
|
|
return (USBD_OK);
|
|
8009f98: 2300 movs r3, #0
|
|
/* USER CODE END 3 */
|
|
}
|
|
8009f9a: 4618 mov r0, r3
|
|
8009f9c: 3710 adds r7, #16
|
|
8009f9e: 46bd mov sp, r7
|
|
8009fa0: bd80 pop {r7, pc}
|
|
8009fa2: bf00 nop
|
|
8009fa4: 20000954 .word 0x20000954
|
|
8009fa8: 20000408 .word 0x20000408
|
|
|
|
08009fac <STORAGE_IsReady_FS>:
|
|
* @brief .
|
|
* @param lun: .
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
int8_t STORAGE_IsReady_FS(uint8_t lun)
|
|
{
|
|
8009fac: b480 push {r7}
|
|
8009fae: b083 sub sp, #12
|
|
8009fb0: af00 add r7, sp, #0
|
|
8009fb2: 4603 mov r3, r0
|
|
8009fb4: 71fb strb r3, [r7, #7]
|
|
/* USER CODE BEGIN 4 */
|
|
return (USBD_OK);
|
|
8009fb6: 2300 movs r3, #0
|
|
/* USER CODE END 4 */
|
|
}
|
|
8009fb8: 4618 mov r0, r3
|
|
8009fba: 370c adds r7, #12
|
|
8009fbc: 46bd mov sp, r7
|
|
8009fbe: bc80 pop {r7}
|
|
8009fc0: 4770 bx lr
|
|
|
|
08009fc2 <STORAGE_IsWriteProtected_FS>:
|
|
* @brief .
|
|
* @param lun: .
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
int8_t STORAGE_IsWriteProtected_FS(uint8_t lun)
|
|
{
|
|
8009fc2: b480 push {r7}
|
|
8009fc4: b083 sub sp, #12
|
|
8009fc6: af00 add r7, sp, #0
|
|
8009fc8: 4603 mov r3, r0
|
|
8009fca: 71fb strb r3, [r7, #7]
|
|
/* USER CODE BEGIN 5 */
|
|
return (USBD_OK);
|
|
8009fcc: 2300 movs r3, #0
|
|
/* USER CODE END 5 */
|
|
}
|
|
8009fce: 4618 mov r0, r3
|
|
8009fd0: 370c adds r7, #12
|
|
8009fd2: 46bd mov sp, r7
|
|
8009fd4: bc80 pop {r7}
|
|
8009fd6: 4770 bx lr
|
|
|
|
08009fd8 <STORAGE_Read_FS>:
|
|
* @brief .
|
|
* @param lun: .
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
int8_t STORAGE_Read_FS(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len)
|
|
{
|
|
8009fd8: b580 push {r7, lr}
|
|
8009fda: b086 sub sp, #24
|
|
8009fdc: af02 add r7, sp, #8
|
|
8009fde: 60b9 str r1, [r7, #8]
|
|
8009fe0: 607a str r2, [r7, #4]
|
|
8009fe2: 461a mov r2, r3
|
|
8009fe4: 4603 mov r3, r0
|
|
8009fe6: 73fb strb r3, [r7, #15]
|
|
8009fe8: 4613 mov r3, r2
|
|
8009fea: 81bb strh r3, [r7, #12]
|
|
/* USER CODE BEGIN 6 */
|
|
HAL_SD_ReadBlocks(&hsd, buf, blk_addr, blk_len, 10);
|
|
8009fec: 89ba ldrh r2, [r7, #12]
|
|
8009fee: 230a movs r3, #10
|
|
8009ff0: 9300 str r3, [sp, #0]
|
|
8009ff2: 4613 mov r3, r2
|
|
8009ff4: 687a ldr r2, [r7, #4]
|
|
8009ff6: 68b9 ldr r1, [r7, #8]
|
|
8009ff8: 4805 ldr r0, [pc, #20] ; (800a010 <STORAGE_Read_FS+0x38>)
|
|
8009ffa: f7f9 fcad bl 8003958 <HAL_SD_ReadBlocks>
|
|
HAL_SD_GetCardState(&hsd);
|
|
8009ffe: 4804 ldr r0, [pc, #16] ; (800a010 <STORAGE_Read_FS+0x38>)
|
|
800a000: f7fa fa92 bl 8004528 <HAL_SD_GetCardState>
|
|
return (USBD_OK);
|
|
800a004: 2300 movs r3, #0
|
|
/* USER CODE END 6 */
|
|
}
|
|
800a006: 4618 mov r0, r3
|
|
800a008: 3710 adds r7, #16
|
|
800a00a: 46bd mov sp, r7
|
|
800a00c: bd80 pop {r7, pc}
|
|
800a00e: bf00 nop
|
|
800a010: 20000408 .word 0x20000408
|
|
|
|
0800a014 <STORAGE_Write_FS>:
|
|
* @brief .
|
|
* @param lun: .
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
int8_t STORAGE_Write_FS(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len)
|
|
{
|
|
800a014: b580 push {r7, lr}
|
|
800a016: b086 sub sp, #24
|
|
800a018: af02 add r7, sp, #8
|
|
800a01a: 60b9 str r1, [r7, #8]
|
|
800a01c: 607a str r2, [r7, #4]
|
|
800a01e: 461a mov r2, r3
|
|
800a020: 4603 mov r3, r0
|
|
800a022: 73fb strb r3, [r7, #15]
|
|
800a024: 4613 mov r3, r2
|
|
800a026: 81bb strh r3, [r7, #12]
|
|
/* USER CODE BEGIN 7 */
|
|
HAL_SD_WriteBlocks(&hsd, buf, blk_addr, blk_len, 10);
|
|
800a028: 89ba ldrh r2, [r7, #12]
|
|
800a02a: 230a movs r3, #10
|
|
800a02c: 9300 str r3, [sp, #0]
|
|
800a02e: 4613 mov r3, r2
|
|
800a030: 687a ldr r2, [r7, #4]
|
|
800a032: 68b9 ldr r1, [r7, #8]
|
|
800a034: 4805 ldr r0, [pc, #20] ; (800a04c <STORAGE_Write_FS+0x38>)
|
|
800a036: f7f9 fe89 bl 8003d4c <HAL_SD_WriteBlocks>
|
|
HAL_SD_GetCardState(&hsd);
|
|
800a03a: 4804 ldr r0, [pc, #16] ; (800a04c <STORAGE_Write_FS+0x38>)
|
|
800a03c: f7fa fa74 bl 8004528 <HAL_SD_GetCardState>
|
|
return (USBD_OK);
|
|
800a040: 2300 movs r3, #0
|
|
/* USER CODE END 7 */
|
|
}
|
|
800a042: 4618 mov r0, r3
|
|
800a044: 3710 adds r7, #16
|
|
800a046: 46bd mov sp, r7
|
|
800a048: bd80 pop {r7, pc}
|
|
800a04a: bf00 nop
|
|
800a04c: 20000408 .word 0x20000408
|
|
|
|
0800a050 <STORAGE_GetMaxLun_FS>:
|
|
* @brief .
|
|
* @param None
|
|
* @retval .
|
|
*/
|
|
int8_t STORAGE_GetMaxLun_FS(void)
|
|
{
|
|
800a050: b480 push {r7}
|
|
800a052: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN 8 */
|
|
return (STORAGE_LUN_NBR - 1);
|
|
800a054: 2300 movs r3, #0
|
|
/* USER CODE END 8 */
|
|
}
|
|
800a056: 4618 mov r0, r3
|
|
800a058: 46bd mov sp, r7
|
|
800a05a: bc80 pop {r7}
|
|
800a05c: 4770 bx lr
|
|
...
|
|
|
|
0800a060 <HAL_PCD_MspInit>:
|
|
LL Driver Callbacks (PCD -> USB Device Library)
|
|
*******************************************************************************/
|
|
/* MSP Init */
|
|
|
|
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
|
|
{
|
|
800a060: b580 push {r7, lr}
|
|
800a062: b084 sub sp, #16
|
|
800a064: af00 add r7, sp, #0
|
|
800a066: 6078 str r0, [r7, #4]
|
|
if(pcdHandle->Instance==USB)
|
|
800a068: 687b ldr r3, [r7, #4]
|
|
800a06a: 681b ldr r3, [r3, #0]
|
|
800a06c: 4a0d ldr r2, [pc, #52] ; (800a0a4 <HAL_PCD_MspInit+0x44>)
|
|
800a06e: 4293 cmp r3, r2
|
|
800a070: d113 bne.n 800a09a <HAL_PCD_MspInit+0x3a>
|
|
{
|
|
/* USER CODE BEGIN USB_MspInit 0 */
|
|
|
|
/* USER CODE END USB_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_USB_CLK_ENABLE();
|
|
800a072: 4b0d ldr r3, [pc, #52] ; (800a0a8 <HAL_PCD_MspInit+0x48>)
|
|
800a074: 69db ldr r3, [r3, #28]
|
|
800a076: 4a0c ldr r2, [pc, #48] ; (800a0a8 <HAL_PCD_MspInit+0x48>)
|
|
800a078: f443 0300 orr.w r3, r3, #8388608 ; 0x800000
|
|
800a07c: 61d3 str r3, [r2, #28]
|
|
800a07e: 4b0a ldr r3, [pc, #40] ; (800a0a8 <HAL_PCD_MspInit+0x48>)
|
|
800a080: 69db ldr r3, [r3, #28]
|
|
800a082: f403 0300 and.w r3, r3, #8388608 ; 0x800000
|
|
800a086: 60fb str r3, [r7, #12]
|
|
800a088: 68fb ldr r3, [r7, #12]
|
|
|
|
/* Peripheral interrupt init */
|
|
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
|
|
800a08a: 2200 movs r2, #0
|
|
800a08c: 2100 movs r1, #0
|
|
800a08e: 2014 movs r0, #20
|
|
800a090: f7f6 fd63 bl 8000b5a <HAL_NVIC_SetPriority>
|
|
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
|
|
800a094: 2014 movs r0, #20
|
|
800a096: f7f6 fd7c bl 8000b92 <HAL_NVIC_EnableIRQ>
|
|
/* USER CODE BEGIN USB_MspInit 1 */
|
|
|
|
/* USER CODE END USB_MspInit 1 */
|
|
}
|
|
}
|
|
800a09a: bf00 nop
|
|
800a09c: 3710 adds r7, #16
|
|
800a09e: 46bd mov sp, r7
|
|
800a0a0: bd80 pop {r7, pc}
|
|
800a0a2: bf00 nop
|
|
800a0a4: 40005c00 .word 0x40005c00
|
|
800a0a8: 40021000 .word 0x40021000
|
|
|
|
0800a0ac <HAL_PCD_SetupStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a0ac: b580 push {r7, lr}
|
|
800a0ae: b082 sub sp, #8
|
|
800a0b0: af00 add r7, sp, #0
|
|
800a0b2: 6078 str r0, [r7, #4]
|
|
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
|
|
800a0b4: 687b ldr r3, [r7, #4]
|
|
800a0b6: f8d3 22e8 ldr.w r2, [r3, #744] ; 0x2e8
|
|
800a0ba: 687b ldr r3, [r7, #4]
|
|
800a0bc: f503 732c add.w r3, r3, #688 ; 0x2b0
|
|
800a0c0: 4619 mov r1, r3
|
|
800a0c2: 4610 mov r0, r2
|
|
800a0c4: f7fe fe2a bl 8008d1c <USBD_LL_SetupStage>
|
|
}
|
|
800a0c8: bf00 nop
|
|
800a0ca: 3708 adds r7, #8
|
|
800a0cc: 46bd mov sp, r7
|
|
800a0ce: bd80 pop {r7, pc}
|
|
|
|
0800a0d0 <HAL_PCD_DataOutStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#else
|
|
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a0d0: b580 push {r7, lr}
|
|
800a0d2: b082 sub sp, #8
|
|
800a0d4: af00 add r7, sp, #0
|
|
800a0d6: 6078 str r0, [r7, #4]
|
|
800a0d8: 460b mov r3, r1
|
|
800a0da: 70fb strb r3, [r7, #3]
|
|
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
|
|
800a0dc: 687b ldr r3, [r7, #4]
|
|
800a0de: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
|
|
800a0e2: 78fa ldrb r2, [r7, #3]
|
|
800a0e4: 6879 ldr r1, [r7, #4]
|
|
800a0e6: 4613 mov r3, r2
|
|
800a0e8: 009b lsls r3, r3, #2
|
|
800a0ea: 4413 add r3, r2
|
|
800a0ec: 00db lsls r3, r3, #3
|
|
800a0ee: 440b add r3, r1
|
|
800a0f0: f503 73be add.w r3, r3, #380 ; 0x17c
|
|
800a0f4: 681a ldr r2, [r3, #0]
|
|
800a0f6: 78fb ldrb r3, [r7, #3]
|
|
800a0f8: 4619 mov r1, r3
|
|
800a0fa: f7fe fe5a bl 8008db2 <USBD_LL_DataOutStage>
|
|
}
|
|
800a0fe: bf00 nop
|
|
800a100: 3708 adds r7, #8
|
|
800a102: 46bd mov sp, r7
|
|
800a104: bd80 pop {r7, pc}
|
|
|
|
0800a106 <HAL_PCD_DataInStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#else
|
|
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a106: b580 push {r7, lr}
|
|
800a108: b082 sub sp, #8
|
|
800a10a: af00 add r7, sp, #0
|
|
800a10c: 6078 str r0, [r7, #4]
|
|
800a10e: 460b mov r3, r1
|
|
800a110: 70fb strb r3, [r7, #3]
|
|
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
|
|
800a112: 687b ldr r3, [r7, #4]
|
|
800a114: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
|
|
800a118: 78fa ldrb r2, [r7, #3]
|
|
800a11a: 6879 ldr r1, [r7, #4]
|
|
800a11c: 4613 mov r3, r2
|
|
800a11e: 009b lsls r3, r3, #2
|
|
800a120: 4413 add r3, r2
|
|
800a122: 00db lsls r3, r3, #3
|
|
800a124: 440b add r3, r1
|
|
800a126: 333c adds r3, #60 ; 0x3c
|
|
800a128: 681a ldr r2, [r3, #0]
|
|
800a12a: 78fb ldrb r3, [r7, #3]
|
|
800a12c: 4619 mov r1, r3
|
|
800a12e: f7fe feb1 bl 8008e94 <USBD_LL_DataInStage>
|
|
}
|
|
800a132: bf00 nop
|
|
800a134: 3708 adds r7, #8
|
|
800a136: 46bd mov sp, r7
|
|
800a138: bd80 pop {r7, pc}
|
|
|
|
0800a13a <HAL_PCD_SOFCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a13a: b580 push {r7, lr}
|
|
800a13c: b082 sub sp, #8
|
|
800a13e: af00 add r7, sp, #0
|
|
800a140: 6078 str r0, [r7, #4]
|
|
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a142: 687b ldr r3, [r7, #4]
|
|
800a144: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
|
|
800a148: 4618 mov r0, r3
|
|
800a14a: f7fe ffc1 bl 80090d0 <USBD_LL_SOF>
|
|
}
|
|
800a14e: bf00 nop
|
|
800a150: 3708 adds r7, #8
|
|
800a152: 46bd mov sp, r7
|
|
800a154: bd80 pop {r7, pc}
|
|
|
|
0800a156 <HAL_PCD_ResetCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a156: b580 push {r7, lr}
|
|
800a158: b084 sub sp, #16
|
|
800a15a: af00 add r7, sp, #0
|
|
800a15c: 6078 str r0, [r7, #4]
|
|
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
|
|
800a15e: 2301 movs r3, #1
|
|
800a160: 73fb strb r3, [r7, #15]
|
|
|
|
if ( hpcd->Init.speed != PCD_SPEED_FULL)
|
|
800a162: 687b ldr r3, [r7, #4]
|
|
800a164: 689b ldr r3, [r3, #8]
|
|
800a166: 2b02 cmp r3, #2
|
|
800a168: d001 beq.n 800a16e <HAL_PCD_ResetCallback+0x18>
|
|
{
|
|
Error_Handler();
|
|
800a16a: f7f6 fa4b bl 8000604 <Error_Handler>
|
|
}
|
|
/* Set Speed. */
|
|
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
|
|
800a16e: 687b ldr r3, [r7, #4]
|
|
800a170: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
|
|
800a174: 7bfa ldrb r2, [r7, #15]
|
|
800a176: 4611 mov r1, r2
|
|
800a178: 4618 mov r0, r3
|
|
800a17a: f7fe ff71 bl 8009060 <USBD_LL_SetSpeed>
|
|
|
|
/* Reset Device. */
|
|
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a17e: 687b ldr r3, [r7, #4]
|
|
800a180: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
|
|
800a184: 4618 mov r0, r3
|
|
800a186: f7fe ff2a bl 8008fde <USBD_LL_Reset>
|
|
}
|
|
800a18a: bf00 nop
|
|
800a18c: 3710 adds r7, #16
|
|
800a18e: 46bd mov sp, r7
|
|
800a190: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800a194 <HAL_PCD_SuspendCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a194: b580 push {r7, lr}
|
|
800a196: b082 sub sp, #8
|
|
800a198: af00 add r7, sp, #0
|
|
800a19a: 6078 str r0, [r7, #4]
|
|
/* Inform USB library that core enters in suspend Mode. */
|
|
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a19c: 687b ldr r3, [r7, #4]
|
|
800a19e: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
|
|
800a1a2: 4618 mov r0, r3
|
|
800a1a4: f7fe ff6b bl 800907e <USBD_LL_Suspend>
|
|
/* Enter in STOP mode. */
|
|
/* USER CODE BEGIN 2 */
|
|
if (hpcd->Init.low_power_enable)
|
|
800a1a8: 687b ldr r3, [r7, #4]
|
|
800a1aa: 699b ldr r3, [r3, #24]
|
|
800a1ac: 2b00 cmp r3, #0
|
|
800a1ae: d005 beq.n 800a1bc <HAL_PCD_SuspendCallback+0x28>
|
|
{
|
|
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
|
|
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
|
|
800a1b0: 4b04 ldr r3, [pc, #16] ; (800a1c4 <HAL_PCD_SuspendCallback+0x30>)
|
|
800a1b2: 691b ldr r3, [r3, #16]
|
|
800a1b4: 4a03 ldr r2, [pc, #12] ; (800a1c4 <HAL_PCD_SuspendCallback+0x30>)
|
|
800a1b6: f043 0306 orr.w r3, r3, #6
|
|
800a1ba: 6113 str r3, [r2, #16]
|
|
}
|
|
/* USER CODE END 2 */
|
|
}
|
|
800a1bc: bf00 nop
|
|
800a1be: 3708 adds r7, #8
|
|
800a1c0: 46bd mov sp, r7
|
|
800a1c2: bd80 pop {r7, pc}
|
|
800a1c4: e000ed00 .word 0xe000ed00
|
|
|
|
0800a1c8 <HAL_PCD_ResumeCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a1c8: b580 push {r7, lr}
|
|
800a1ca: b082 sub sp, #8
|
|
800a1cc: af00 add r7, sp, #0
|
|
800a1ce: 6078 str r0, [r7, #4]
|
|
/* USER CODE BEGIN 3 */
|
|
|
|
/* USER CODE END 3 */
|
|
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a1d0: 687b ldr r3, [r7, #4]
|
|
800a1d2: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
|
|
800a1d6: 4618 mov r0, r3
|
|
800a1d8: f7fe ff65 bl 80090a6 <USBD_LL_Resume>
|
|
}
|
|
800a1dc: bf00 nop
|
|
800a1de: 3708 adds r7, #8
|
|
800a1e0: 46bd mov sp, r7
|
|
800a1e2: bd80 pop {r7, pc}
|
|
|
|
0800a1e4 <USBD_LL_Init>:
|
|
* @brief Initializes the low level portion of the device driver.
|
|
* @param pdev: Device handle
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800a1e4: b580 push {r7, lr}
|
|
800a1e6: b082 sub sp, #8
|
|
800a1e8: af00 add r7, sp, #0
|
|
800a1ea: 6078 str r0, [r7, #4]
|
|
/* Init USB Ip. */
|
|
/* Link the driver to the stack. */
|
|
hpcd_USB_FS.pData = pdev;
|
|
800a1ec: 4a23 ldr r2, [pc, #140] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a1ee: 687b ldr r3, [r7, #4]
|
|
800a1f0: f8c2 32e8 str.w r3, [r2, #744] ; 0x2e8
|
|
pdev->pData = &hpcd_USB_FS;
|
|
800a1f4: 687b ldr r3, [r7, #4]
|
|
800a1f6: 4a21 ldr r2, [pc, #132] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a1f8: f8c3 22c0 str.w r2, [r3, #704] ; 0x2c0
|
|
|
|
hpcd_USB_FS.Instance = USB;
|
|
800a1fc: 4b1f ldr r3, [pc, #124] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a1fe: 4a20 ldr r2, [pc, #128] ; (800a280 <USBD_LL_Init+0x9c>)
|
|
800a200: 601a str r2, [r3, #0]
|
|
hpcd_USB_FS.Init.dev_endpoints = 8;
|
|
800a202: 4b1e ldr r3, [pc, #120] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a204: 2208 movs r2, #8
|
|
800a206: 605a str r2, [r3, #4]
|
|
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
|
|
800a208: 4b1c ldr r3, [pc, #112] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a20a: 2202 movs r2, #2
|
|
800a20c: 609a str r2, [r3, #8]
|
|
hpcd_USB_FS.Init.low_power_enable = DISABLE;
|
|
800a20e: 4b1b ldr r3, [pc, #108] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a210: 2200 movs r2, #0
|
|
800a212: 619a str r2, [r3, #24]
|
|
hpcd_USB_FS.Init.lpm_enable = DISABLE;
|
|
800a214: 4b19 ldr r3, [pc, #100] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a216: 2200 movs r2, #0
|
|
800a218: 61da str r2, [r3, #28]
|
|
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
|
|
800a21a: 4b18 ldr r3, [pc, #96] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a21c: 2200 movs r2, #0
|
|
800a21e: 621a str r2, [r3, #32]
|
|
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
|
|
800a220: 4816 ldr r0, [pc, #88] ; (800a27c <USBD_LL_Init+0x98>)
|
|
800a222: f7f7 fa79 bl 8001718 <HAL_PCD_Init>
|
|
800a226: 4603 mov r3, r0
|
|
800a228: 2b00 cmp r3, #0
|
|
800a22a: d001 beq.n 800a230 <USBD_LL_Init+0x4c>
|
|
{
|
|
Error_Handler( );
|
|
800a22c: f7f6 f9ea bl 8000604 <Error_Handler>
|
|
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
|
|
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
|
|
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
/* USER CODE BEGIN EndPoint_Configuration */
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
|
|
800a230: 687b ldr r3, [r7, #4]
|
|
800a232: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a236: 2318 movs r3, #24
|
|
800a238: 2200 movs r2, #0
|
|
800a23a: 2100 movs r1, #0
|
|
800a23c: f7f8 fdda bl 8002df4 <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
|
|
800a240: 687b ldr r3, [r7, #4]
|
|
800a242: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a246: 2358 movs r3, #88 ; 0x58
|
|
800a248: 2200 movs r2, #0
|
|
800a24a: 2180 movs r1, #128 ; 0x80
|
|
800a24c: f7f8 fdd2 bl 8002df4 <HAL_PCDEx_PMAConfig>
|
|
/* USER CODE END EndPoint_Configuration */
|
|
/* USER CODE BEGIN EndPoint_Configuration_MSC */
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0x98);
|
|
800a250: 687b ldr r3, [r7, #4]
|
|
800a252: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a256: 2398 movs r3, #152 ; 0x98
|
|
800a258: 2200 movs r2, #0
|
|
800a25a: 2181 movs r1, #129 ; 0x81
|
|
800a25c: f7f8 fdca bl 8002df4 <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0xD8);
|
|
800a260: 687b ldr r3, [r7, #4]
|
|
800a262: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a266: 23d8 movs r3, #216 ; 0xd8
|
|
800a268: 2200 movs r2, #0
|
|
800a26a: 2101 movs r1, #1
|
|
800a26c: f7f8 fdc2 bl 8002df4 <HAL_PCDEx_PMAConfig>
|
|
/* USER CODE END EndPoint_Configuration_MSC */
|
|
return USBD_OK;
|
|
800a270: 2300 movs r3, #0
|
|
}
|
|
800a272: 4618 mov r0, r3
|
|
800a274: 3708 adds r7, #8
|
|
800a276: 46bd mov sp, r7
|
|
800a278: bd80 pop {r7, pc}
|
|
800a27a: bf00 nop
|
|
800a27c: 20000974 .word 0x20000974
|
|
800a280: 40005c00 .word 0x40005c00
|
|
|
|
0800a284 <USBD_LL_Start>:
|
|
* @brief Starts the low level portion of the device driver.
|
|
* @param pdev: Device handle
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800a284: b580 push {r7, lr}
|
|
800a286: b084 sub sp, #16
|
|
800a288: af00 add r7, sp, #0
|
|
800a28a: 6078 str r0, [r7, #4]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a28c: 2300 movs r3, #0
|
|
800a28e: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a290: 2300 movs r3, #0
|
|
800a292: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_Start(pdev->pData);
|
|
800a294: 687b ldr r3, [r7, #4]
|
|
800a296: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a29a: 4618 mov r0, r3
|
|
800a29c: f7f7 fb47 bl 800192e <HAL_PCD_Start>
|
|
800a2a0: 4603 mov r3, r0
|
|
800a2a2: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a2a4: 7bfb ldrb r3, [r7, #15]
|
|
800a2a6: 4618 mov r0, r3
|
|
800a2a8: f000 f96e bl 800a588 <USBD_Get_USB_Status>
|
|
800a2ac: 4603 mov r3, r0
|
|
800a2ae: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a2b0: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a2b2: 4618 mov r0, r3
|
|
800a2b4: 3710 adds r7, #16
|
|
800a2b6: 46bd mov sp, r7
|
|
800a2b8: bd80 pop {r7, pc}
|
|
|
|
0800a2ba <USBD_LL_OpenEP>:
|
|
* @param ep_type: Endpoint type
|
|
* @param ep_mps: Endpoint max packet size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
|
|
{
|
|
800a2ba: b580 push {r7, lr}
|
|
800a2bc: b084 sub sp, #16
|
|
800a2be: af00 add r7, sp, #0
|
|
800a2c0: 6078 str r0, [r7, #4]
|
|
800a2c2: 4608 mov r0, r1
|
|
800a2c4: 4611 mov r1, r2
|
|
800a2c6: 461a mov r2, r3
|
|
800a2c8: 4603 mov r3, r0
|
|
800a2ca: 70fb strb r3, [r7, #3]
|
|
800a2cc: 460b mov r3, r1
|
|
800a2ce: 70bb strb r3, [r7, #2]
|
|
800a2d0: 4613 mov r3, r2
|
|
800a2d2: 803b strh r3, [r7, #0]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a2d4: 2300 movs r3, #0
|
|
800a2d6: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a2d8: 2300 movs r3, #0
|
|
800a2da: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
|
|
800a2dc: 687b ldr r3, [r7, #4]
|
|
800a2de: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a2e2: 78bb ldrb r3, [r7, #2]
|
|
800a2e4: 883a ldrh r2, [r7, #0]
|
|
800a2e6: 78f9 ldrb r1, [r7, #3]
|
|
800a2e8: f7f7 fcc1 bl 8001c6e <HAL_PCD_EP_Open>
|
|
800a2ec: 4603 mov r3, r0
|
|
800a2ee: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a2f0: 7bfb ldrb r3, [r7, #15]
|
|
800a2f2: 4618 mov r0, r3
|
|
800a2f4: f000 f948 bl 800a588 <USBD_Get_USB_Status>
|
|
800a2f8: 4603 mov r3, r0
|
|
800a2fa: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a2fc: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a2fe: 4618 mov r0, r3
|
|
800a300: 3710 adds r7, #16
|
|
800a302: 46bd mov sp, r7
|
|
800a304: bd80 pop {r7, pc}
|
|
|
|
0800a306 <USBD_LL_CloseEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a306: b580 push {r7, lr}
|
|
800a308: b084 sub sp, #16
|
|
800a30a: af00 add r7, sp, #0
|
|
800a30c: 6078 str r0, [r7, #4]
|
|
800a30e: 460b mov r3, r1
|
|
800a310: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a312: 2300 movs r3, #0
|
|
800a314: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a316: 2300 movs r3, #0
|
|
800a318: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
|
|
800a31a: 687b ldr r3, [r7, #4]
|
|
800a31c: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a320: 78fa ldrb r2, [r7, #3]
|
|
800a322: 4611 mov r1, r2
|
|
800a324: 4618 mov r0, r3
|
|
800a326: f7f7 fd08 bl 8001d3a <HAL_PCD_EP_Close>
|
|
800a32a: 4603 mov r3, r0
|
|
800a32c: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a32e: 7bfb ldrb r3, [r7, #15]
|
|
800a330: 4618 mov r0, r3
|
|
800a332: f000 f929 bl 800a588 <USBD_Get_USB_Status>
|
|
800a336: 4603 mov r3, r0
|
|
800a338: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a33a: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a33c: 4618 mov r0, r3
|
|
800a33e: 3710 adds r7, #16
|
|
800a340: 46bd mov sp, r7
|
|
800a342: bd80 pop {r7, pc}
|
|
|
|
0800a344 <USBD_LL_FlushEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a344: b580 push {r7, lr}
|
|
800a346: b084 sub sp, #16
|
|
800a348: af00 add r7, sp, #0
|
|
800a34a: 6078 str r0, [r7, #4]
|
|
800a34c: 460b mov r3, r1
|
|
800a34e: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a350: 2300 movs r3, #0
|
|
800a352: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a354: 2300 movs r3, #0
|
|
800a356: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
|
|
800a358: 687b ldr r3, [r7, #4]
|
|
800a35a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a35e: 78fa ldrb r2, [r7, #3]
|
|
800a360: 4611 mov r1, r2
|
|
800a362: 4618 mov r0, r3
|
|
800a364: f7f7 fe7c bl 8002060 <HAL_PCD_EP_Flush>
|
|
800a368: 4603 mov r3, r0
|
|
800a36a: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a36c: 7bfb ldrb r3, [r7, #15]
|
|
800a36e: 4618 mov r0, r3
|
|
800a370: f000 f90a bl 800a588 <USBD_Get_USB_Status>
|
|
800a374: 4603 mov r3, r0
|
|
800a376: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a378: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a37a: 4618 mov r0, r3
|
|
800a37c: 3710 adds r7, #16
|
|
800a37e: 46bd mov sp, r7
|
|
800a380: bd80 pop {r7, pc}
|
|
|
|
0800a382 <USBD_LL_StallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a382: b580 push {r7, lr}
|
|
800a384: b084 sub sp, #16
|
|
800a386: af00 add r7, sp, #0
|
|
800a388: 6078 str r0, [r7, #4]
|
|
800a38a: 460b mov r3, r1
|
|
800a38c: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a38e: 2300 movs r3, #0
|
|
800a390: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a392: 2300 movs r3, #0
|
|
800a394: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
|
|
800a396: 687b ldr r3, [r7, #4]
|
|
800a398: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a39c: 78fa ldrb r2, [r7, #3]
|
|
800a39e: 4611 mov r1, r2
|
|
800a3a0: 4618 mov r0, r3
|
|
800a3a2: f7f7 fda9 bl 8001ef8 <HAL_PCD_EP_SetStall>
|
|
800a3a6: 4603 mov r3, r0
|
|
800a3a8: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a3aa: 7bfb ldrb r3, [r7, #15]
|
|
800a3ac: 4618 mov r0, r3
|
|
800a3ae: f000 f8eb bl 800a588 <USBD_Get_USB_Status>
|
|
800a3b2: 4603 mov r3, r0
|
|
800a3b4: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a3b6: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a3b8: 4618 mov r0, r3
|
|
800a3ba: 3710 adds r7, #16
|
|
800a3bc: 46bd mov sp, r7
|
|
800a3be: bd80 pop {r7, pc}
|
|
|
|
0800a3c0 <USBD_LL_ClearStallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a3c0: b580 push {r7, lr}
|
|
800a3c2: b084 sub sp, #16
|
|
800a3c4: af00 add r7, sp, #0
|
|
800a3c6: 6078 str r0, [r7, #4]
|
|
800a3c8: 460b mov r3, r1
|
|
800a3ca: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a3cc: 2300 movs r3, #0
|
|
800a3ce: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a3d0: 2300 movs r3, #0
|
|
800a3d2: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
|
|
800a3d4: 687b ldr r3, [r7, #4]
|
|
800a3d6: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a3da: 78fa ldrb r2, [r7, #3]
|
|
800a3dc: 4611 mov r1, r2
|
|
800a3de: 4618 mov r0, r3
|
|
800a3e0: f7f7 fdea bl 8001fb8 <HAL_PCD_EP_ClrStall>
|
|
800a3e4: 4603 mov r3, r0
|
|
800a3e6: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a3e8: 7bfb ldrb r3, [r7, #15]
|
|
800a3ea: 4618 mov r0, r3
|
|
800a3ec: f000 f8cc bl 800a588 <USBD_Get_USB_Status>
|
|
800a3f0: 4603 mov r3, r0
|
|
800a3f2: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a3f4: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a3f6: 4618 mov r0, r3
|
|
800a3f8: 3710 adds r7, #16
|
|
800a3fa: 46bd mov sp, r7
|
|
800a3fc: bd80 pop {r7, pc}
|
|
|
|
0800a3fe <USBD_LL_IsStallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval Stall (1: Yes, 0: No)
|
|
*/
|
|
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a3fe: b480 push {r7}
|
|
800a400: b085 sub sp, #20
|
|
800a402: af00 add r7, sp, #0
|
|
800a404: 6078 str r0, [r7, #4]
|
|
800a406: 460b mov r3, r1
|
|
800a408: 70fb strb r3, [r7, #3]
|
|
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
|
|
800a40a: 687b ldr r3, [r7, #4]
|
|
800a40c: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a410: 60fb str r3, [r7, #12]
|
|
|
|
if((ep_addr & 0x80) == 0x80)
|
|
800a412: f997 3003 ldrsb.w r3, [r7, #3]
|
|
800a416: 2b00 cmp r3, #0
|
|
800a418: da0c bge.n 800a434 <USBD_LL_IsStallEP+0x36>
|
|
{
|
|
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
|
|
800a41a: 78fb ldrb r3, [r7, #3]
|
|
800a41c: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
800a420: 68f9 ldr r1, [r7, #12]
|
|
800a422: 1c5a adds r2, r3, #1
|
|
800a424: 4613 mov r3, r2
|
|
800a426: 009b lsls r3, r3, #2
|
|
800a428: 4413 add r3, r2
|
|
800a42a: 00db lsls r3, r3, #3
|
|
800a42c: 440b add r3, r1
|
|
800a42e: 3302 adds r3, #2
|
|
800a430: 781b ldrb r3, [r3, #0]
|
|
800a432: e00b b.n 800a44c <USBD_LL_IsStallEP+0x4e>
|
|
}
|
|
else
|
|
{
|
|
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
|
|
800a434: 78fb ldrb r3, [r7, #3]
|
|
800a436: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
800a43a: 68f9 ldr r1, [r7, #12]
|
|
800a43c: 4613 mov r3, r2
|
|
800a43e: 009b lsls r3, r3, #2
|
|
800a440: 4413 add r3, r2
|
|
800a442: 00db lsls r3, r3, #3
|
|
800a444: 440b add r3, r1
|
|
800a446: f503 73b5 add.w r3, r3, #362 ; 0x16a
|
|
800a44a: 781b ldrb r3, [r3, #0]
|
|
}
|
|
}
|
|
800a44c: 4618 mov r0, r3
|
|
800a44e: 3714 adds r7, #20
|
|
800a450: 46bd mov sp, r7
|
|
800a452: bc80 pop {r7}
|
|
800a454: 4770 bx lr
|
|
|
|
0800a456 <USBD_LL_SetUSBAddress>:
|
|
* @param pdev: Device handle
|
|
* @param dev_addr: Device address
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
|
|
{
|
|
800a456: b580 push {r7, lr}
|
|
800a458: b084 sub sp, #16
|
|
800a45a: af00 add r7, sp, #0
|
|
800a45c: 6078 str r0, [r7, #4]
|
|
800a45e: 460b mov r3, r1
|
|
800a460: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a462: 2300 movs r3, #0
|
|
800a464: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a466: 2300 movs r3, #0
|
|
800a468: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
|
|
800a46a: 687b ldr r3, [r7, #4]
|
|
800a46c: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a470: 78fa ldrb r2, [r7, #3]
|
|
800a472: 4611 mov r1, r2
|
|
800a474: 4618 mov r0, r3
|
|
800a476: f7f7 fbd5 bl 8001c24 <HAL_PCD_SetAddress>
|
|
800a47a: 4603 mov r3, r0
|
|
800a47c: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a47e: 7bfb ldrb r3, [r7, #15]
|
|
800a480: 4618 mov r0, r3
|
|
800a482: f000 f881 bl 800a588 <USBD_Get_USB_Status>
|
|
800a486: 4603 mov r3, r0
|
|
800a488: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a48a: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a48c: 4618 mov r0, r3
|
|
800a48e: 3710 adds r7, #16
|
|
800a490: 46bd mov sp, r7
|
|
800a492: bd80 pop {r7, pc}
|
|
|
|
0800a494 <USBD_LL_Transmit>:
|
|
* @param pbuf: Pointer to data to be sent
|
|
* @param size: Data size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
|
|
{
|
|
800a494: b580 push {r7, lr}
|
|
800a496: b086 sub sp, #24
|
|
800a498: af00 add r7, sp, #0
|
|
800a49a: 60f8 str r0, [r7, #12]
|
|
800a49c: 607a str r2, [r7, #4]
|
|
800a49e: 461a mov r2, r3
|
|
800a4a0: 460b mov r3, r1
|
|
800a4a2: 72fb strb r3, [r7, #11]
|
|
800a4a4: 4613 mov r3, r2
|
|
800a4a6: 813b strh r3, [r7, #8]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a4a8: 2300 movs r3, #0
|
|
800a4aa: 75fb strb r3, [r7, #23]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a4ac: 2300 movs r3, #0
|
|
800a4ae: 75bb strb r3, [r7, #22]
|
|
|
|
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
|
|
800a4b0: 68fb ldr r3, [r7, #12]
|
|
800a4b2: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a4b6: 893b ldrh r3, [r7, #8]
|
|
800a4b8: 7af9 ldrb r1, [r7, #11]
|
|
800a4ba: 687a ldr r2, [r7, #4]
|
|
800a4bc: f7f7 fcd9 bl 8001e72 <HAL_PCD_EP_Transmit>
|
|
800a4c0: 4603 mov r3, r0
|
|
800a4c2: 75fb strb r3, [r7, #23]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a4c4: 7dfb ldrb r3, [r7, #23]
|
|
800a4c6: 4618 mov r0, r3
|
|
800a4c8: f000 f85e bl 800a588 <USBD_Get_USB_Status>
|
|
800a4cc: 4603 mov r3, r0
|
|
800a4ce: 75bb strb r3, [r7, #22]
|
|
|
|
return usb_status;
|
|
800a4d0: 7dbb ldrb r3, [r7, #22]
|
|
}
|
|
800a4d2: 4618 mov r0, r3
|
|
800a4d4: 3718 adds r7, #24
|
|
800a4d6: 46bd mov sp, r7
|
|
800a4d8: bd80 pop {r7, pc}
|
|
|
|
0800a4da <USBD_LL_PrepareReceive>:
|
|
* @param pbuf: Pointer to data to be received
|
|
* @param size: Data size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
|
|
{
|
|
800a4da: b580 push {r7, lr}
|
|
800a4dc: b086 sub sp, #24
|
|
800a4de: af00 add r7, sp, #0
|
|
800a4e0: 60f8 str r0, [r7, #12]
|
|
800a4e2: 607a str r2, [r7, #4]
|
|
800a4e4: 461a mov r2, r3
|
|
800a4e6: 460b mov r3, r1
|
|
800a4e8: 72fb strb r3, [r7, #11]
|
|
800a4ea: 4613 mov r3, r2
|
|
800a4ec: 813b strh r3, [r7, #8]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a4ee: 2300 movs r3, #0
|
|
800a4f0: 75fb strb r3, [r7, #23]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a4f2: 2300 movs r3, #0
|
|
800a4f4: 75bb strb r3, [r7, #22]
|
|
|
|
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
|
|
800a4f6: 68fb ldr r3, [r7, #12]
|
|
800a4f8: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a4fc: 893b ldrh r3, [r7, #8]
|
|
800a4fe: 7af9 ldrb r1, [r7, #11]
|
|
800a500: 687a ldr r2, [r7, #4]
|
|
800a502: f7f7 fc62 bl 8001dca <HAL_PCD_EP_Receive>
|
|
800a506: 4603 mov r3, r0
|
|
800a508: 75fb strb r3, [r7, #23]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a50a: 7dfb ldrb r3, [r7, #23]
|
|
800a50c: 4618 mov r0, r3
|
|
800a50e: f000 f83b bl 800a588 <USBD_Get_USB_Status>
|
|
800a512: 4603 mov r3, r0
|
|
800a514: 75bb strb r3, [r7, #22]
|
|
|
|
return usb_status;
|
|
800a516: 7dbb ldrb r3, [r7, #22]
|
|
}
|
|
800a518: 4618 mov r0, r3
|
|
800a51a: 3718 adds r7, #24
|
|
800a51c: 46bd mov sp, r7
|
|
800a51e: bd80 pop {r7, pc}
|
|
|
|
0800a520 <USBD_LL_GetRxDataSize>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval Recived Data Size
|
|
*/
|
|
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a520: b580 push {r7, lr}
|
|
800a522: b082 sub sp, #8
|
|
800a524: af00 add r7, sp, #0
|
|
800a526: 6078 str r0, [r7, #4]
|
|
800a528: 460b mov r3, r1
|
|
800a52a: 70fb strb r3, [r7, #3]
|
|
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
|
|
800a52c: 687b ldr r3, [r7, #4]
|
|
800a52e: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a532: 78fa ldrb r2, [r7, #3]
|
|
800a534: 4611 mov r1, r2
|
|
800a536: 4618 mov r0, r3
|
|
800a538: f7f7 fc84 bl 8001e44 <HAL_PCD_EP_GetRxCount>
|
|
800a53c: 4603 mov r3, r0
|
|
}
|
|
800a53e: 4618 mov r0, r3
|
|
800a540: 3708 adds r7, #8
|
|
800a542: 46bd mov sp, r7
|
|
800a544: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800a548 <USBD_static_malloc>:
|
|
* @brief Static single allocation.
|
|
* @param size: Size of allocated memory
|
|
* @retval None
|
|
*/
|
|
void *USBD_static_malloc(uint32_t size)
|
|
{
|
|
800a548: b480 push {r7}
|
|
800a54a: b083 sub sp, #12
|
|
800a54c: af00 add r7, sp, #0
|
|
800a54e: 6078 str r0, [r7, #4]
|
|
static uint32_t mem[(sizeof(USBD_MSC_BOT_HandleTypeDef)/4)+1];/* On 32-bit boundary */
|
|
return mem;
|
|
800a550: 4b02 ldr r3, [pc, #8] ; (800a55c <USBD_static_malloc+0x14>)
|
|
}
|
|
800a552: 4618 mov r0, r3
|
|
800a554: 370c adds r7, #12
|
|
800a556: 46bd mov sp, r7
|
|
800a558: bc80 pop {r7}
|
|
800a55a: 4770 bx lr
|
|
800a55c: 20000144 .word 0x20000144
|
|
|
|
0800a560 <USBD_static_free>:
|
|
* @brief Dummy memory free
|
|
* @param p: Pointer to allocated memory address
|
|
* @retval None
|
|
*/
|
|
void USBD_static_free(void *p)
|
|
{
|
|
800a560: b480 push {r7}
|
|
800a562: b083 sub sp, #12
|
|
800a564: af00 add r7, sp, #0
|
|
800a566: 6078 str r0, [r7, #4]
|
|
|
|
}
|
|
800a568: bf00 nop
|
|
800a56a: 370c adds r7, #12
|
|
800a56c: 46bd mov sp, r7
|
|
800a56e: bc80 pop {r7}
|
|
800a570: 4770 bx lr
|
|
|
|
0800a572 <HAL_PCDEx_SetConnectionState>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
|
|
#else
|
|
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a572: b480 push {r7}
|
|
800a574: b083 sub sp, #12
|
|
800a576: af00 add r7, sp, #0
|
|
800a578: 6078 str r0, [r7, #4]
|
|
800a57a: 460b mov r3, r1
|
|
800a57c: 70fb strb r3, [r7, #3]
|
|
{
|
|
/* Configure High connection state. */
|
|
|
|
}
|
|
/* USER CODE END 6 */
|
|
}
|
|
800a57e: bf00 nop
|
|
800a580: 370c adds r7, #12
|
|
800a582: 46bd mov sp, r7
|
|
800a584: bc80 pop {r7}
|
|
800a586: 4770 bx lr
|
|
|
|
0800a588 <USBD_Get_USB_Status>:
|
|
* @brief Retuns the USB status depending on the HAL status:
|
|
* @param hal_status: HAL status
|
|
* @retval USB status
|
|
*/
|
|
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
|
|
{
|
|
800a588: b480 push {r7}
|
|
800a58a: b085 sub sp, #20
|
|
800a58c: af00 add r7, sp, #0
|
|
800a58e: 4603 mov r3, r0
|
|
800a590: 71fb strb r3, [r7, #7]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a592: 2300 movs r3, #0
|
|
800a594: 73fb strb r3, [r7, #15]
|
|
|
|
switch (hal_status)
|
|
800a596: 79fb ldrb r3, [r7, #7]
|
|
800a598: 2b03 cmp r3, #3
|
|
800a59a: d817 bhi.n 800a5cc <USBD_Get_USB_Status+0x44>
|
|
800a59c: a201 add r2, pc, #4 ; (adr r2, 800a5a4 <USBD_Get_USB_Status+0x1c>)
|
|
800a59e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800a5a2: bf00 nop
|
|
800a5a4: 0800a5b5 .word 0x0800a5b5
|
|
800a5a8: 0800a5bb .word 0x0800a5bb
|
|
800a5ac: 0800a5c1 .word 0x0800a5c1
|
|
800a5b0: 0800a5c7 .word 0x0800a5c7
|
|
{
|
|
case HAL_OK :
|
|
usb_status = USBD_OK;
|
|
800a5b4: 2300 movs r3, #0
|
|
800a5b6: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a5b8: e00b b.n 800a5d2 <USBD_Get_USB_Status+0x4a>
|
|
case HAL_ERROR :
|
|
usb_status = USBD_FAIL;
|
|
800a5ba: 2302 movs r3, #2
|
|
800a5bc: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a5be: e008 b.n 800a5d2 <USBD_Get_USB_Status+0x4a>
|
|
case HAL_BUSY :
|
|
usb_status = USBD_BUSY;
|
|
800a5c0: 2301 movs r3, #1
|
|
800a5c2: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a5c4: e005 b.n 800a5d2 <USBD_Get_USB_Status+0x4a>
|
|
case HAL_TIMEOUT :
|
|
usb_status = USBD_FAIL;
|
|
800a5c6: 2302 movs r3, #2
|
|
800a5c8: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a5ca: e002 b.n 800a5d2 <USBD_Get_USB_Status+0x4a>
|
|
default :
|
|
usb_status = USBD_FAIL;
|
|
800a5cc: 2302 movs r3, #2
|
|
800a5ce: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a5d0: bf00 nop
|
|
}
|
|
return usb_status;
|
|
800a5d2: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800a5d4: 4618 mov r0, r3
|
|
800a5d6: 3714 adds r7, #20
|
|
800a5d8: 46bd mov sp, r7
|
|
800a5da: bc80 pop {r7}
|
|
800a5dc: 4770 bx lr
|
|
800a5de: bf00 nop
|
|
|
|
0800a5e0 <__libc_init_array>:
|
|
800a5e0: b570 push {r4, r5, r6, lr}
|
|
800a5e2: 2500 movs r5, #0
|
|
800a5e4: 4e0c ldr r6, [pc, #48] ; (800a618 <__libc_init_array+0x38>)
|
|
800a5e6: 4c0d ldr r4, [pc, #52] ; (800a61c <__libc_init_array+0x3c>)
|
|
800a5e8: 1ba4 subs r4, r4, r6
|
|
800a5ea: 10a4 asrs r4, r4, #2
|
|
800a5ec: 42a5 cmp r5, r4
|
|
800a5ee: d109 bne.n 800a604 <__libc_init_array+0x24>
|
|
800a5f0: f000 f822 bl 800a638 <_init>
|
|
800a5f4: 2500 movs r5, #0
|
|
800a5f6: 4e0a ldr r6, [pc, #40] ; (800a620 <__libc_init_array+0x40>)
|
|
800a5f8: 4c0a ldr r4, [pc, #40] ; (800a624 <__libc_init_array+0x44>)
|
|
800a5fa: 1ba4 subs r4, r4, r6
|
|
800a5fc: 10a4 asrs r4, r4, #2
|
|
800a5fe: 42a5 cmp r5, r4
|
|
800a600: d105 bne.n 800a60e <__libc_init_array+0x2e>
|
|
800a602: bd70 pop {r4, r5, r6, pc}
|
|
800a604: f856 3025 ldr.w r3, [r6, r5, lsl #2]
|
|
800a608: 4798 blx r3
|
|
800a60a: 3501 adds r5, #1
|
|
800a60c: e7ee b.n 800a5ec <__libc_init_array+0xc>
|
|
800a60e: f856 3025 ldr.w r3, [r6, r5, lsl #2]
|
|
800a612: 4798 blx r3
|
|
800a614: 3501 adds r5, #1
|
|
800a616: e7f2 b.n 800a5fe <__libc_init_array+0x1e>
|
|
800a618: 0800a6fc .word 0x0800a6fc
|
|
800a61c: 0800a6fc .word 0x0800a6fc
|
|
800a620: 0800a6fc .word 0x0800a6fc
|
|
800a624: 0800a700 .word 0x0800a700
|
|
|
|
0800a628 <memset>:
|
|
800a628: 4603 mov r3, r0
|
|
800a62a: 4402 add r2, r0
|
|
800a62c: 4293 cmp r3, r2
|
|
800a62e: d100 bne.n 800a632 <memset+0xa>
|
|
800a630: 4770 bx lr
|
|
800a632: f803 1b01 strb.w r1, [r3], #1
|
|
800a636: e7f9 b.n 800a62c <memset+0x4>
|
|
|
|
0800a638 <_init>:
|
|
800a638: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800a63a: bf00 nop
|
|
800a63c: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800a63e: bc08 pop {r3}
|
|
800a640: 469e mov lr, r3
|
|
800a642: 4770 bx lr
|
|
|
|
0800a644 <_fini>:
|
|
800a644: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800a646: bf00 nop
|
|
800a648: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800a64a: bc08 pop {r3}
|
|
800a64c: 469e mov lr, r3
|
|
800a64e: 4770 bx lr
|