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mpads/USB2SDIO/Debug/USB2SDIO.list

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USB2SDIO.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000a3d8 080001e4 080001e4 000101e4 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000ac 0800a5bc 0800a5bc 0001a5bc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800a668 0800a668 00020124 2**0
CONTENTS
4 .ARM 00000000 0800a668 0800a668 00020124 2**0
CONTENTS
5 .preinit_array 00000000 0800a668 0800a668 00020124 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800a668 0800a668 0001a668 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 0800a66c 0800a66c 0001a66c 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 00000124 20000000 0800a670 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00000b3c 20000124 0800a794 00020124 2**2
ALLOC
10 ._user_heap_stack 00003000 20000c60 0800a794 00020c60 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 00020124 2**0
CONTENTS, READONLY
12 .debug_info 00019ebf 00000000 00000000 0002014d 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_abbrev 00003703 00000000 00000000 0003a00c 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_aranges 00001110 00000000 00000000 0003d710 2**3
CONTENTS, READONLY, DEBUGGING
15 .debug_ranges 00000f88 00000000 00000000 0003e820 2**3
CONTENTS, READONLY, DEBUGGING
16 .debug_macro 0001db32 00000000 00000000 0003f7a8 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_line 0001436d 00000000 00000000 0005d2da 2**0
CONTENTS, READONLY, DEBUGGING
18 .debug_str 0009bb92 00000000 00000000 00071647 2**0
CONTENTS, READONLY, DEBUGGING
19 .comment 0000007b 00000000 00000000 0010d1d9 2**0
CONTENTS, READONLY
20 .debug_frame 00004530 00000000 00000000 0010d254 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
080001e4 <__do_global_dtors_aux>:
80001e4: b510 push {r4, lr}
80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>)
80001e8: 7823 ldrb r3, [r4, #0]
80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16>
80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>)
80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12>
80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>)
80001f2: f3af 8000 nop.w
80001f6: 2301 movs r3, #1
80001f8: 7023 strb r3, [r4, #0]
80001fa: bd10 pop {r4, pc}
80001fc: 20000124 .word 0x20000124
8000200: 00000000 .word 0x00000000
8000204: 0800a5a4 .word 0x0800a5a4
08000208 <frame_dummy>:
8000208: b508 push {r3, lr}
800020a: 4b03 ldr r3, [pc, #12] ; (8000218 <frame_dummy+0x10>)
800020c: b11b cbz r3, 8000216 <frame_dummy+0xe>
800020e: 4903 ldr r1, [pc, #12] ; (800021c <frame_dummy+0x14>)
8000210: 4803 ldr r0, [pc, #12] ; (8000220 <frame_dummy+0x18>)
8000212: f3af 8000 nop.w
8000216: bd08 pop {r3, pc}
8000218: 00000000 .word 0x00000000
800021c: 20000128 .word 0x20000128
8000220: 0800a5a4 .word 0x0800a5a4
08000224 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000224: b580 push {r7, lr}
8000226: b082 sub sp, #8
8000228: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
800022a: f000 fb4b bl 80008c4 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
800022e: f000 f8ad bl 800038c <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000232: f000 f973 bl 800051c <MX_GPIO_Init>
MX_USB_DEVICE_Init();
8000236: f009 fcf9 bl 8009c2c <MX_USB_DEVICE_Init>
MX_SDIO_SD_Init();
800023a: f000 f933 bl 80004a4 <MX_SDIO_SD_Init>
MX_I2C1_Init();
800023e: f000 f903 bl 8000448 <MX_I2C1_Init>
/* USER CODE BEGIN 2 */
uint8_t buff[2];
buff[0] = 255;
8000242: 23ff movs r3, #255 ; 0xff
8000244: 713b strb r3, [r7, #4]
buff[1] = 255;
8000246: 23ff movs r3, #255 ; 0xff
8000248: 717b strb r3, [r7, #5]
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
HAL_StatusTypeDef status = HAL_I2C_Slave_Receive(&hi2c1, buff, 2, 10);
800024a: 1d39 adds r1, r7, #4
800024c: 230a movs r3, #10
800024e: 2202 movs r2, #2
8000250: 4848 ldr r0, [pc, #288] ; (8000374 <main+0x150>)
8000252: f001 f84f bl 80012f4 <HAL_I2C_Slave_Receive>
8000256: 4603 mov r3, r0
8000258: 71fb strb r3, [r7, #7]
if (status == HAL_OK)
800025a: 79fb ldrb r3, [r7, #7]
800025c: 2b00 cmp r3, #0
800025e: d1f4 bne.n 800024a <main+0x26>
{
if (buff[0] == 0x01 && selectedSDcard != buff[1]) {
8000260: 793b ldrb r3, [r7, #4]
8000262: 2b01 cmp r3, #1
8000264: d1f1 bne.n 800024a <main+0x26>
8000266: 797b ldrb r3, [r7, #5]
8000268: 461a mov r2, r3
800026a: 4b43 ldr r3, [pc, #268] ; (8000378 <main+0x154>)
800026c: 681b ldr r3, [r3, #0]
800026e: 429a cmp r2, r3
8000270: d0eb beq.n 800024a <main+0x26>
// command to connect/disconnect host to sd
if (selectedSDcard >= 0 && selectedSDcard < 8) {
8000272: 4b41 ldr r3, [pc, #260] ; (8000378 <main+0x154>)
8000274: 681b ldr r3, [r3, #0]
8000276: 2b00 cmp r3, #0
8000278: db06 blt.n 8000288 <main+0x64>
800027a: 4b3f ldr r3, [pc, #252] ; (8000378 <main+0x154>)
800027c: 681b ldr r3, [r3, #0]
800027e: 2b07 cmp r3, #7
8000280: dc02 bgt.n 8000288 <main+0x64>
HAL_SD_DeInit(&hsd);
8000282: 483e ldr r0, [pc, #248] ; (800037c <main+0x158>)
8000284: f003 fb58 bl 8003938 <HAL_SD_DeInit>
}
selectedSDcard = buff[1];
8000288: 797b ldrb r3, [r7, #5]
800028a: 461a mov r2, r3
800028c: 4b3a ldr r3, [pc, #232] ; (8000378 <main+0x154>)
800028e: 601a str r2, [r3, #0]
// disconnect all sd from master, connect to slaves
HAL_GPIO_WritePin(GPIOB, USB_ENABLE_Pin|PORT0_Pin|PORT1_Pin|PORT2_Pin, GPIO_PIN_RESET);
8000290: 2200 movs r2, #0
8000292: f44f 4170 mov.w r1, #61440 ; 0xf000
8000296: 483a ldr r0, [pc, #232] ; (8000380 <main+0x15c>)
8000298: f000 fedc bl 8001054 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOC, PORT3_Pin|PORT4_Pin, GPIO_PIN_RESET);
800029c: 2200 movs r2, #0
800029e: 21c0 movs r1, #192 ; 0xc0
80002a0: 4838 ldr r0, [pc, #224] ; (8000384 <main+0x160>)
80002a2: f000 fed7 bl 8001054 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOA, PORT5_Pin|PORT6_Pin|PORT7_Pin, GPIO_PIN_RESET);
80002a6: 2200 movs r2, #0
80002a8: f44f 61e0 mov.w r1, #1792 ; 0x700
80002ac: 4836 ldr r0, [pc, #216] ; (8000388 <main+0x164>)
80002ae: f000 fed1 bl 8001054 <HAL_GPIO_WritePin>
// if valid sd number connect master to this sd
switch (buff[1]) {
80002b2: 797b ldrb r3, [r7, #5]
80002b4: 2b07 cmp r3, #7
80002b6: d849 bhi.n 800034c <main+0x128>
80002b8: a201 add r2, pc, #4 ; (adr r2, 80002c0 <main+0x9c>)
80002ba: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80002be: bf00 nop
80002c0: 080002e1 .word 0x080002e1
80002c4: 080002ef .word 0x080002ef
80002c8: 080002fd .word 0x080002fd
80002cc: 0800030b .word 0x0800030b
80002d0: 08000317 .word 0x08000317
80002d4: 08000323 .word 0x08000323
80002d8: 08000331 .word 0x08000331
80002dc: 0800033f .word 0x0800033f
case 0:
HAL_GPIO_WritePin(PORT0_GPIO_Port, PORT0_Pin, GPIO_PIN_SET);
80002e0: 2201 movs r2, #1
80002e2: f44f 5100 mov.w r1, #8192 ; 0x2000
80002e6: 4826 ldr r0, [pc, #152] ; (8000380 <main+0x15c>)
80002e8: f000 feb4 bl 8001054 <HAL_GPIO_WritePin>
break;
80002ec: e02f b.n 800034e <main+0x12a>
case 1:
HAL_GPIO_WritePin(PORT1_GPIO_Port, PORT1_Pin, GPIO_PIN_SET);
80002ee: 2201 movs r2, #1
80002f0: f44f 4180 mov.w r1, #16384 ; 0x4000
80002f4: 4822 ldr r0, [pc, #136] ; (8000380 <main+0x15c>)
80002f6: f000 fead bl 8001054 <HAL_GPIO_WritePin>
break;
80002fa: e028 b.n 800034e <main+0x12a>
case 2:
HAL_GPIO_WritePin(PORT2_GPIO_Port, PORT2_Pin, GPIO_PIN_SET);
80002fc: 2201 movs r2, #1
80002fe: f44f 4100 mov.w r1, #32768 ; 0x8000
8000302: 481f ldr r0, [pc, #124] ; (8000380 <main+0x15c>)
8000304: f000 fea6 bl 8001054 <HAL_GPIO_WritePin>
break;
8000308: e021 b.n 800034e <main+0x12a>
case 3:
HAL_GPIO_WritePin(PORT3_GPIO_Port, PORT3_Pin, GPIO_PIN_SET);
800030a: 2201 movs r2, #1
800030c: 2140 movs r1, #64 ; 0x40
800030e: 481d ldr r0, [pc, #116] ; (8000384 <main+0x160>)
8000310: f000 fea0 bl 8001054 <HAL_GPIO_WritePin>
break;
8000314: e01b b.n 800034e <main+0x12a>
case 4:
HAL_GPIO_WritePin(PORT4_GPIO_Port, PORT4_Pin, GPIO_PIN_SET);
8000316: 2201 movs r2, #1
8000318: 2180 movs r1, #128 ; 0x80
800031a: 481a ldr r0, [pc, #104] ; (8000384 <main+0x160>)
800031c: f000 fe9a bl 8001054 <HAL_GPIO_WritePin>
break;
8000320: e015 b.n 800034e <main+0x12a>
case 5:
HAL_GPIO_WritePin(PORT5_GPIO_Port, PORT5_Pin, GPIO_PIN_SET);
8000322: 2201 movs r2, #1
8000324: f44f 7180 mov.w r1, #256 ; 0x100
8000328: 4817 ldr r0, [pc, #92] ; (8000388 <main+0x164>)
800032a: f000 fe93 bl 8001054 <HAL_GPIO_WritePin>
break;
800032e: e00e b.n 800034e <main+0x12a>
case 6:
HAL_GPIO_WritePin(PORT6_GPIO_Port, PORT6_Pin, GPIO_PIN_SET);
8000330: 2201 movs r2, #1
8000332: f44f 7100 mov.w r1, #512 ; 0x200
8000336: 4814 ldr r0, [pc, #80] ; (8000388 <main+0x164>)
8000338: f000 fe8c bl 8001054 <HAL_GPIO_WritePin>
break;
800033c: e007 b.n 800034e <main+0x12a>
case 7:
HAL_GPIO_WritePin(PORT7_GPIO_Port, PORT7_Pin, GPIO_PIN_SET);
800033e: 2201 movs r2, #1
8000340: f44f 6180 mov.w r1, #1024 ; 0x400
8000344: 4810 ldr r0, [pc, #64] ; (8000388 <main+0x164>)
8000346: f000 fe85 bl 8001054 <HAL_GPIO_WritePin>
break;
800034a: e000 b.n 800034e <main+0x12a>
default:
break;
800034c: bf00 nop
}
if (selectedSDcard >= 0 && selectedSDcard < 8) {
800034e: 4b0a ldr r3, [pc, #40] ; (8000378 <main+0x154>)
8000350: 681b ldr r3, [r3, #0]
8000352: 2b00 cmp r3, #0
8000354: f6ff af79 blt.w 800024a <main+0x26>
8000358: 4b07 ldr r3, [pc, #28] ; (8000378 <main+0x154>)
800035a: 681b ldr r3, [r3, #0]
800035c: 2b07 cmp r3, #7
800035e: f73f af74 bgt.w 800024a <main+0x26>
MX_SDIO_SD_Init();
8000362: f000 f89f bl 80004a4 <MX_SDIO_SD_Init>
HAL_GPIO_WritePin(USB_ENABLE_GPIO_Port, USB_ENABLE_Pin, GPIO_PIN_SET);
8000366: 2201 movs r2, #1
8000368: f44f 5180 mov.w r1, #4096 ; 0x1000
800036c: 4804 ldr r0, [pc, #16] ; (8000380 <main+0x15c>)
800036e: f000 fe71 bl 8001054 <HAL_GPIO_WritePin>
{
8000372: e76a b.n 800024a <main+0x26>
8000374: 200003b4 .word 0x200003b4
8000378: 20000000 .word 0x20000000
800037c: 20000408 .word 0x20000408
8000380: 40010c00 .word 0x40010c00
8000384: 40011000 .word 0x40011000
8000388: 40010800 .word 0x40010800
0800038c <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
800038c: b580 push {r7, lr}
800038e: b096 sub sp, #88 ; 0x58
8000390: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000392: f107 0330 add.w r3, r7, #48 ; 0x30
8000396: 2228 movs r2, #40 ; 0x28
8000398: 2100 movs r1, #0
800039a: 4618 mov r0, r3
800039c: f00a f8fa bl 800a594 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
80003a0: f107 031c add.w r3, r7, #28
80003a4: 2200 movs r2, #0
80003a6: 601a str r2, [r3, #0]
80003a8: 605a str r2, [r3, #4]
80003aa: 609a str r2, [r3, #8]
80003ac: 60da str r2, [r3, #12]
80003ae: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
80003b0: 1d3b adds r3, r7, #4
80003b2: 2200 movs r2, #0
80003b4: 601a str r2, [r3, #0]
80003b6: 605a str r2, [r3, #4]
80003b8: 609a str r2, [r3, #8]
80003ba: 60da str r2, [r3, #12]
80003bc: 611a str r2, [r3, #16]
80003be: 615a str r2, [r3, #20]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
80003c0: 2301 movs r3, #1
80003c2: 633b str r3, [r7, #48] ; 0x30
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80003c4: f44f 3380 mov.w r3, #65536 ; 0x10000
80003c8: 637b str r3, [r7, #52] ; 0x34
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
80003ca: f44f 3300 mov.w r3, #131072 ; 0x20000
80003ce: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
80003d0: 2301 movs r3, #1
80003d2: 643b str r3, [r7, #64] ; 0x40
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
80003d4: 2302 movs r3, #2
80003d6: 64fb str r3, [r7, #76] ; 0x4c
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
80003d8: f44f 3380 mov.w r3, #65536 ; 0x10000
80003dc: 653b str r3, [r7, #80] ; 0x50
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
80003de: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
80003e2: 657b str r3, [r7, #84] ; 0x54
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
80003e4: f107 0330 add.w r3, r7, #48 ; 0x30
80003e8: 4618 mov r0, r3
80003ea: f002 fd55 bl 8002e98 <HAL_RCC_OscConfig>
80003ee: 4603 mov r3, r0
80003f0: 2b00 cmp r3, #0
80003f2: d001 beq.n 80003f8 <SystemClock_Config+0x6c>
{
Error_Handler();
80003f4: f000 f916 bl 8000624 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
80003f8: 230f movs r3, #15
80003fa: 61fb str r3, [r7, #28]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
80003fc: 2302 movs r3, #2
80003fe: 623b str r3, [r7, #32]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8000400: 2300 movs r3, #0
8000402: 627b str r3, [r7, #36] ; 0x24
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8000404: f44f 6380 mov.w r3, #1024 ; 0x400
8000408: 62bb str r3, [r7, #40] ; 0x28
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
800040a: 2300 movs r3, #0
800040c: 62fb str r3, [r7, #44] ; 0x2c
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
800040e: f107 031c add.w r3, r7, #28
8000412: 2102 movs r1, #2
8000414: 4618 mov r0, r3
8000416: f002 ffbf bl 8003398 <HAL_RCC_ClockConfig>
800041a: 4603 mov r3, r0
800041c: 2b00 cmp r3, #0
800041e: d001 beq.n 8000424 <SystemClock_Config+0x98>
{
Error_Handler();
8000420: f000 f900 bl 8000624 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
8000424: 2310 movs r3, #16
8000426: 607b str r3, [r7, #4]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
8000428: 2300 movs r3, #0
800042a: 61bb str r3, [r7, #24]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
800042c: 1d3b adds r3, r7, #4
800042e: 4618 mov r0, r3
8000430: f003 f93c bl 80036ac <HAL_RCCEx_PeriphCLKConfig>
8000434: 4603 mov r3, r0
8000436: 2b00 cmp r3, #0
8000438: d001 beq.n 800043e <SystemClock_Config+0xb2>
{
Error_Handler();
800043a: f000 f8f3 bl 8000624 <Error_Handler>
}
}
800043e: bf00 nop
8000440: 3758 adds r7, #88 ; 0x58
8000442: 46bd mov sp, r7
8000444: bd80 pop {r7, pc}
...
08000448 <MX_I2C1_Init>:
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
8000448: b580 push {r7, lr}
800044a: af00 add r7, sp, #0
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
800044c: 4b12 ldr r3, [pc, #72] ; (8000498 <MX_I2C1_Init+0x50>)
800044e: 4a13 ldr r2, [pc, #76] ; (800049c <MX_I2C1_Init+0x54>)
8000450: 601a str r2, [r3, #0]
hi2c1.Init.ClockSpeed = 400000;
8000452: 4b11 ldr r3, [pc, #68] ; (8000498 <MX_I2C1_Init+0x50>)
8000454: 4a12 ldr r2, [pc, #72] ; (80004a0 <MX_I2C1_Init+0x58>)
8000456: 605a str r2, [r3, #4]
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
8000458: 4b0f ldr r3, [pc, #60] ; (8000498 <MX_I2C1_Init+0x50>)
800045a: 2200 movs r2, #0
800045c: 609a str r2, [r3, #8]
hi2c1.Init.OwnAddress1 = 74;
800045e: 4b0e ldr r3, [pc, #56] ; (8000498 <MX_I2C1_Init+0x50>)
8000460: 224a movs r2, #74 ; 0x4a
8000462: 60da str r2, [r3, #12]
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
8000464: 4b0c ldr r3, [pc, #48] ; (8000498 <MX_I2C1_Init+0x50>)
8000466: f44f 4280 mov.w r2, #16384 ; 0x4000
800046a: 611a str r2, [r3, #16]
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
800046c: 4b0a ldr r3, [pc, #40] ; (8000498 <MX_I2C1_Init+0x50>)
800046e: 2200 movs r2, #0
8000470: 615a str r2, [r3, #20]
hi2c1.Init.OwnAddress2 = 0;
8000472: 4b09 ldr r3, [pc, #36] ; (8000498 <MX_I2C1_Init+0x50>)
8000474: 2200 movs r2, #0
8000476: 619a str r2, [r3, #24]
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
8000478: 4b07 ldr r3, [pc, #28] ; (8000498 <MX_I2C1_Init+0x50>)
800047a: 2200 movs r2, #0
800047c: 61da str r2, [r3, #28]
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
800047e: 4b06 ldr r3, [pc, #24] ; (8000498 <MX_I2C1_Init+0x50>)
8000480: 2200 movs r2, #0
8000482: 621a str r2, [r3, #32]
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
8000484: 4804 ldr r0, [pc, #16] ; (8000498 <MX_I2C1_Init+0x50>)
8000486: f000 fdfd bl 8001084 <HAL_I2C_Init>
800048a: 4603 mov r3, r0
800048c: 2b00 cmp r3, #0
800048e: d001 beq.n 8000494 <MX_I2C1_Init+0x4c>
{
Error_Handler();
8000490: f000 f8c8 bl 8000624 <Error_Handler>
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
8000494: bf00 nop
8000496: bd80 pop {r7, pc}
8000498: 200003b4 .word 0x200003b4
800049c: 40005400 .word 0x40005400
80004a0: 00061a80 .word 0x00061a80
080004a4 <MX_SDIO_SD_Init>:
* @brief SDIO Initialization Function
* @param None
* @retval None
*/
static void MX_SDIO_SD_Init(void)
{
80004a4: b580 push {r7, lr}
80004a6: af00 add r7, sp, #0
/* USER CODE BEGIN SDIO_Init 0 */
if (selectedSDcard < 0 || selectedSDcard > 7) return;
80004a8: 4b19 ldr r3, [pc, #100] ; (8000510 <MX_SDIO_SD_Init+0x6c>)
80004aa: 681b ldr r3, [r3, #0]
80004ac: 2b00 cmp r3, #0
80004ae: db2c blt.n 800050a <MX_SDIO_SD_Init+0x66>
80004b0: 4b17 ldr r3, [pc, #92] ; (8000510 <MX_SDIO_SD_Init+0x6c>)
80004b2: 681b ldr r3, [r3, #0]
80004b4: 2b07 cmp r3, #7
80004b6: dc28 bgt.n 800050a <MX_SDIO_SD_Init+0x66>
/* USER CODE END SDIO_Init 0 */
/* USER CODE BEGIN SDIO_Init 1 */
/* USER CODE END SDIO_Init 1 */
hsd.Instance = SDIO;
80004b8: 4b16 ldr r3, [pc, #88] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004ba: 4a17 ldr r2, [pc, #92] ; (8000518 <MX_SDIO_SD_Init+0x74>)
80004bc: 601a str r2, [r3, #0]
hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
80004be: 4b15 ldr r3, [pc, #84] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004c0: 2200 movs r2, #0
80004c2: 605a str r2, [r3, #4]
hsd.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
80004c4: 4b13 ldr r3, [pc, #76] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004c6: 2200 movs r2, #0
80004c8: 609a str r2, [r3, #8]
hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
80004ca: 4b12 ldr r3, [pc, #72] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004cc: 2200 movs r2, #0
80004ce: 60da str r2, [r3, #12]
hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
80004d0: 4b10 ldr r3, [pc, #64] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004d2: 2200 movs r2, #0
80004d4: 611a str r2, [r3, #16]
hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_ENABLE;
80004d6: 4b0f ldr r3, [pc, #60] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004d8: f44f 4280 mov.w r2, #16384 ; 0x4000
80004dc: 615a str r2, [r3, #20]
hsd.Init.ClockDiv = 7;
80004de: 4b0d ldr r3, [pc, #52] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004e0: 2207 movs r2, #7
80004e2: 619a str r2, [r3, #24]
if (HAL_SD_Init(&hsd) != HAL_OK)
80004e4: 480b ldr r0, [pc, #44] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004e6: f003 f997 bl 8003818 <HAL_SD_Init>
80004ea: 4603 mov r3, r0
80004ec: 2b00 cmp r3, #0
80004ee: d001 beq.n 80004f4 <MX_SDIO_SD_Init+0x50>
{
Error_Handler();
80004f0: f000 f898 bl 8000624 <Error_Handler>
}
if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
80004f4: f44f 6100 mov.w r1, #2048 ; 0x800
80004f8: 4806 ldr r0, [pc, #24] ; (8000514 <MX_SDIO_SD_Init+0x70>)
80004fa: f003 ffa9 bl 8004450 <HAL_SD_ConfigWideBusOperation>
80004fe: 4603 mov r3, r0
8000500: 2b00 cmp r3, #0
8000502: d003 beq.n 800050c <MX_SDIO_SD_Init+0x68>
{
Error_Handler();
8000504: f000 f88e bl 8000624 <Error_Handler>
8000508: e000 b.n 800050c <MX_SDIO_SD_Init+0x68>
if (selectedSDcard < 0 || selectedSDcard > 7) return;
800050a: bf00 nop
}
/* USER CODE BEGIN SDIO_Init 2 */
/* USER CODE END SDIO_Init 2 */
}
800050c: bd80 pop {r7, pc}
800050e: bf00 nop
8000510: 20000000 .word 0x20000000
8000514: 20000408 .word 0x20000408
8000518: 40018000 .word 0x40018000
0800051c <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
800051c: b580 push {r7, lr}
800051e: b088 sub sp, #32
8000520: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000522: f107 0310 add.w r3, r7, #16
8000526: 2200 movs r2, #0
8000528: 601a str r2, [r3, #0]
800052a: 605a str r2, [r3, #4]
800052c: 609a str r2, [r3, #8]
800052e: 60da str r2, [r3, #12]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOD_CLK_ENABLE();
8000530: 4b38 ldr r3, [pc, #224] ; (8000614 <MX_GPIO_Init+0xf8>)
8000532: 699b ldr r3, [r3, #24]
8000534: 4a37 ldr r2, [pc, #220] ; (8000614 <MX_GPIO_Init+0xf8>)
8000536: f043 0320 orr.w r3, r3, #32
800053a: 6193 str r3, [r2, #24]
800053c: 4b35 ldr r3, [pc, #212] ; (8000614 <MX_GPIO_Init+0xf8>)
800053e: 699b ldr r3, [r3, #24]
8000540: f003 0320 and.w r3, r3, #32
8000544: 60fb str r3, [r7, #12]
8000546: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000548: 4b32 ldr r3, [pc, #200] ; (8000614 <MX_GPIO_Init+0xf8>)
800054a: 699b ldr r3, [r3, #24]
800054c: 4a31 ldr r2, [pc, #196] ; (8000614 <MX_GPIO_Init+0xf8>)
800054e: f043 0308 orr.w r3, r3, #8
8000552: 6193 str r3, [r2, #24]
8000554: 4b2f ldr r3, [pc, #188] ; (8000614 <MX_GPIO_Init+0xf8>)
8000556: 699b ldr r3, [r3, #24]
8000558: f003 0308 and.w r3, r3, #8
800055c: 60bb str r3, [r7, #8]
800055e: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000560: 4b2c ldr r3, [pc, #176] ; (8000614 <MX_GPIO_Init+0xf8>)
8000562: 699b ldr r3, [r3, #24]
8000564: 4a2b ldr r2, [pc, #172] ; (8000614 <MX_GPIO_Init+0xf8>)
8000566: f043 0310 orr.w r3, r3, #16
800056a: 6193 str r3, [r2, #24]
800056c: 4b29 ldr r3, [pc, #164] ; (8000614 <MX_GPIO_Init+0xf8>)
800056e: 699b ldr r3, [r3, #24]
8000570: f003 0310 and.w r3, r3, #16
8000574: 607b str r3, [r7, #4]
8000576: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000578: 4b26 ldr r3, [pc, #152] ; (8000614 <MX_GPIO_Init+0xf8>)
800057a: 699b ldr r3, [r3, #24]
800057c: 4a25 ldr r2, [pc, #148] ; (8000614 <MX_GPIO_Init+0xf8>)
800057e: f043 0304 orr.w r3, r3, #4
8000582: 6193 str r3, [r2, #24]
8000584: 4b23 ldr r3, [pc, #140] ; (8000614 <MX_GPIO_Init+0xf8>)
8000586: 699b ldr r3, [r3, #24]
8000588: f003 0304 and.w r3, r3, #4
800058c: 603b str r3, [r7, #0]
800058e: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, USB_ENABLE_Pin|PORT0_Pin|PORT1_Pin|PORT2_Pin, GPIO_PIN_RESET);
8000590: 2200 movs r2, #0
8000592: f44f 4170 mov.w r1, #61440 ; 0xf000
8000596: 4820 ldr r0, [pc, #128] ; (8000618 <MX_GPIO_Init+0xfc>)
8000598: f000 fd5c bl 8001054 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, PORT3_Pin|PORT4_Pin, GPIO_PIN_RESET);
800059c: 2200 movs r2, #0
800059e: 21c0 movs r1, #192 ; 0xc0
80005a0: 481e ldr r0, [pc, #120] ; (800061c <MX_GPIO_Init+0x100>)
80005a2: f000 fd57 bl 8001054 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, PORT5_Pin|PORT6_Pin|PORT7_Pin, GPIO_PIN_RESET);
80005a6: 2200 movs r2, #0
80005a8: f44f 61e0 mov.w r1, #1792 ; 0x700
80005ac: 481c ldr r0, [pc, #112] ; (8000620 <MX_GPIO_Init+0x104>)
80005ae: f000 fd51 bl 8001054 <HAL_GPIO_WritePin>
/*Configure GPIO pins : USB_ENABLE_Pin PORT0_Pin PORT1_Pin PORT2_Pin */
GPIO_InitStruct.Pin = USB_ENABLE_Pin|PORT0_Pin|PORT1_Pin|PORT2_Pin;
80005b2: f44f 4370 mov.w r3, #61440 ; 0xf000
80005b6: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80005b8: 2301 movs r3, #1
80005ba: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80005bc: 2300 movs r3, #0
80005be: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80005c0: 2302 movs r3, #2
80005c2: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80005c4: f107 0310 add.w r3, r7, #16
80005c8: 4619 mov r1, r3
80005ca: 4813 ldr r0, [pc, #76] ; (8000618 <MX_GPIO_Init+0xfc>)
80005cc: f000 fb0c bl 8000be8 <HAL_GPIO_Init>
/*Configure GPIO pins : PORT3_Pin PORT4_Pin */
GPIO_InitStruct.Pin = PORT3_Pin|PORT4_Pin;
80005d0: 23c0 movs r3, #192 ; 0xc0
80005d2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80005d4: 2301 movs r3, #1
80005d6: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80005d8: 2300 movs r3, #0
80005da: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80005dc: 2302 movs r3, #2
80005de: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80005e0: f107 0310 add.w r3, r7, #16
80005e4: 4619 mov r1, r3
80005e6: 480d ldr r0, [pc, #52] ; (800061c <MX_GPIO_Init+0x100>)
80005e8: f000 fafe bl 8000be8 <HAL_GPIO_Init>
/*Configure GPIO pins : PORT5_Pin PORT6_Pin PORT7_Pin */
GPIO_InitStruct.Pin = PORT5_Pin|PORT6_Pin|PORT7_Pin;
80005ec: f44f 63e0 mov.w r3, #1792 ; 0x700
80005f0: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80005f2: 2301 movs r3, #1
80005f4: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80005f6: 2300 movs r3, #0
80005f8: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80005fa: 2302 movs r3, #2
80005fc: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80005fe: f107 0310 add.w r3, r7, #16
8000602: 4619 mov r1, r3
8000604: 4806 ldr r0, [pc, #24] ; (8000620 <MX_GPIO_Init+0x104>)
8000606: f000 faef bl 8000be8 <HAL_GPIO_Init>
}
800060a: bf00 nop
800060c: 3720 adds r7, #32
800060e: 46bd mov sp, r7
8000610: bd80 pop {r7, pc}
8000612: bf00 nop
8000614: 40021000 .word 0x40021000
8000618: 40010c00 .word 0x40010c00
800061c: 40011000 .word 0x40011000
8000620: 40010800 .word 0x40010800
08000624 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8000624: b480 push {r7}
8000626: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8000628: b672 cpsid i
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
800062a: e7fe b.n 800062a <Error_Handler+0x6>
0800062c <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
800062c: b480 push {r7}
800062e: b085 sub sp, #20
8000630: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8000632: 4b15 ldr r3, [pc, #84] ; (8000688 <HAL_MspInit+0x5c>)
8000634: 699b ldr r3, [r3, #24]
8000636: 4a14 ldr r2, [pc, #80] ; (8000688 <HAL_MspInit+0x5c>)
8000638: f043 0301 orr.w r3, r3, #1
800063c: 6193 str r3, [r2, #24]
800063e: 4b12 ldr r3, [pc, #72] ; (8000688 <HAL_MspInit+0x5c>)
8000640: 699b ldr r3, [r3, #24]
8000642: f003 0301 and.w r3, r3, #1
8000646: 60bb str r3, [r7, #8]
8000648: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
800064a: 4b0f ldr r3, [pc, #60] ; (8000688 <HAL_MspInit+0x5c>)
800064c: 69db ldr r3, [r3, #28]
800064e: 4a0e ldr r2, [pc, #56] ; (8000688 <HAL_MspInit+0x5c>)
8000650: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8000654: 61d3 str r3, [r2, #28]
8000656: 4b0c ldr r3, [pc, #48] ; (8000688 <HAL_MspInit+0x5c>)
8000658: 69db ldr r3, [r3, #28]
800065a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
800065e: 607b str r3, [r7, #4]
8000660: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
8000662: 4b0a ldr r3, [pc, #40] ; (800068c <HAL_MspInit+0x60>)
8000664: 685b ldr r3, [r3, #4]
8000666: 60fb str r3, [r7, #12]
8000668: 68fb ldr r3, [r7, #12]
800066a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
800066e: 60fb str r3, [r7, #12]
8000670: 68fb ldr r3, [r7, #12]
8000672: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
8000676: 60fb str r3, [r7, #12]
8000678: 4a04 ldr r2, [pc, #16] ; (800068c <HAL_MspInit+0x60>)
800067a: 68fb ldr r3, [r7, #12]
800067c: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
800067e: bf00 nop
8000680: 3714 adds r7, #20
8000682: 46bd mov sp, r7
8000684: bc80 pop {r7}
8000686: 4770 bx lr
8000688: 40021000 .word 0x40021000
800068c: 40010000 .word 0x40010000
08000690 <HAL_I2C_MspInit>:
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
8000690: b580 push {r7, lr}
8000692: b088 sub sp, #32
8000694: af00 add r7, sp, #0
8000696: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000698: f107 0310 add.w r3, r7, #16
800069c: 2200 movs r2, #0
800069e: 601a str r2, [r3, #0]
80006a0: 605a str r2, [r3, #4]
80006a2: 609a str r2, [r3, #8]
80006a4: 60da str r2, [r3, #12]
if(hi2c->Instance==I2C1)
80006a6: 687b ldr r3, [r7, #4]
80006a8: 681b ldr r3, [r3, #0]
80006aa: 4a15 ldr r2, [pc, #84] ; (8000700 <HAL_I2C_MspInit+0x70>)
80006ac: 4293 cmp r3, r2
80006ae: d123 bne.n 80006f8 <HAL_I2C_MspInit+0x68>
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
80006b0: 4b14 ldr r3, [pc, #80] ; (8000704 <HAL_I2C_MspInit+0x74>)
80006b2: 699b ldr r3, [r3, #24]
80006b4: 4a13 ldr r2, [pc, #76] ; (8000704 <HAL_I2C_MspInit+0x74>)
80006b6: f043 0308 orr.w r3, r3, #8
80006ba: 6193 str r3, [r2, #24]
80006bc: 4b11 ldr r3, [pc, #68] ; (8000704 <HAL_I2C_MspInit+0x74>)
80006be: 699b ldr r3, [r3, #24]
80006c0: f003 0308 and.w r3, r3, #8
80006c4: 60fb str r3, [r7, #12]
80006c6: 68fb ldr r3, [r7, #12]
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
80006c8: 23c0 movs r3, #192 ; 0xc0
80006ca: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
80006cc: 2312 movs r3, #18
80006ce: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
80006d0: 2303 movs r3, #3
80006d2: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80006d4: f107 0310 add.w r3, r7, #16
80006d8: 4619 mov r1, r3
80006da: 480b ldr r0, [pc, #44] ; (8000708 <HAL_I2C_MspInit+0x78>)
80006dc: f000 fa84 bl 8000be8 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
80006e0: 4b08 ldr r3, [pc, #32] ; (8000704 <HAL_I2C_MspInit+0x74>)
80006e2: 69db ldr r3, [r3, #28]
80006e4: 4a07 ldr r2, [pc, #28] ; (8000704 <HAL_I2C_MspInit+0x74>)
80006e6: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
80006ea: 61d3 str r3, [r2, #28]
80006ec: 4b05 ldr r3, [pc, #20] ; (8000704 <HAL_I2C_MspInit+0x74>)
80006ee: 69db ldr r3, [r3, #28]
80006f0: f403 1300 and.w r3, r3, #2097152 ; 0x200000
80006f4: 60bb str r3, [r7, #8]
80006f6: 68bb ldr r3, [r7, #8]
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
}
}
80006f8: bf00 nop
80006fa: 3720 adds r7, #32
80006fc: 46bd mov sp, r7
80006fe: bd80 pop {r7, pc}
8000700: 40005400 .word 0x40005400
8000704: 40021000 .word 0x40021000
8000708: 40010c00 .word 0x40010c00
0800070c <HAL_SD_MspInit>:
* This function configures the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
{
800070c: b580 push {r7, lr}
800070e: b08a sub sp, #40 ; 0x28
8000710: af00 add r7, sp, #0
8000712: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000714: f107 0318 add.w r3, r7, #24
8000718: 2200 movs r2, #0
800071a: 601a str r2, [r3, #0]
800071c: 605a str r2, [r3, #4]
800071e: 609a str r2, [r3, #8]
8000720: 60da str r2, [r3, #12]
if(hsd->Instance==SDIO)
8000722: 687b ldr r3, [r7, #4]
8000724: 681b ldr r3, [r3, #0]
8000726: 4a22 ldr r2, [pc, #136] ; (80007b0 <HAL_SD_MspInit+0xa4>)
8000728: 4293 cmp r3, r2
800072a: d13c bne.n 80007a6 <HAL_SD_MspInit+0x9a>
{
/* USER CODE BEGIN SDIO_MspInit 0 */
/* USER CODE END SDIO_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SDIO_CLK_ENABLE();
800072c: 4b21 ldr r3, [pc, #132] ; (80007b4 <HAL_SD_MspInit+0xa8>)
800072e: 695b ldr r3, [r3, #20]
8000730: 4a20 ldr r2, [pc, #128] ; (80007b4 <HAL_SD_MspInit+0xa8>)
8000732: f443 6380 orr.w r3, r3, #1024 ; 0x400
8000736: 6153 str r3, [r2, #20]
8000738: 4b1e ldr r3, [pc, #120] ; (80007b4 <HAL_SD_MspInit+0xa8>)
800073a: 695b ldr r3, [r3, #20]
800073c: f403 6380 and.w r3, r3, #1024 ; 0x400
8000740: 617b str r3, [r7, #20]
8000742: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000744: 4b1b ldr r3, [pc, #108] ; (80007b4 <HAL_SD_MspInit+0xa8>)
8000746: 699b ldr r3, [r3, #24]
8000748: 4a1a ldr r2, [pc, #104] ; (80007b4 <HAL_SD_MspInit+0xa8>)
800074a: f043 0310 orr.w r3, r3, #16
800074e: 6193 str r3, [r2, #24]
8000750: 4b18 ldr r3, [pc, #96] ; (80007b4 <HAL_SD_MspInit+0xa8>)
8000752: 699b ldr r3, [r3, #24]
8000754: f003 0310 and.w r3, r3, #16
8000758: 613b str r3, [r7, #16]
800075a: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOD_CLK_ENABLE();
800075c: 4b15 ldr r3, [pc, #84] ; (80007b4 <HAL_SD_MspInit+0xa8>)
800075e: 699b ldr r3, [r3, #24]
8000760: 4a14 ldr r2, [pc, #80] ; (80007b4 <HAL_SD_MspInit+0xa8>)
8000762: f043 0320 orr.w r3, r3, #32
8000766: 6193 str r3, [r2, #24]
8000768: 4b12 ldr r3, [pc, #72] ; (80007b4 <HAL_SD_MspInit+0xa8>)
800076a: 699b ldr r3, [r3, #24]
800076c: f003 0320 and.w r3, r3, #32
8000770: 60fb str r3, [r7, #12]
8000772: 68fb ldr r3, [r7, #12]
PC10 ------> SDIO_D2
PC11 ------> SDIO_D3
PC12 ------> SDIO_CK
PD2 ------> SDIO_CMD
*/
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
8000774: f44f 53f8 mov.w r3, #7936 ; 0x1f00
8000778: 61bb str r3, [r7, #24]
|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800077a: 2302 movs r3, #2
800077c: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
800077e: 2303 movs r3, #3
8000780: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000782: f107 0318 add.w r3, r7, #24
8000786: 4619 mov r1, r3
8000788: 480b ldr r0, [pc, #44] ; (80007b8 <HAL_SD_MspInit+0xac>)
800078a: f000 fa2d bl 8000be8 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_2;
800078e: 2304 movs r3, #4
8000790: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000792: 2302 movs r3, #2
8000794: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8000796: 2303 movs r3, #3
8000798: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
800079a: f107 0318 add.w r3, r7, #24
800079e: 4619 mov r1, r3
80007a0: 4806 ldr r0, [pc, #24] ; (80007bc <HAL_SD_MspInit+0xb0>)
80007a2: f000 fa21 bl 8000be8 <HAL_GPIO_Init>
/* USER CODE BEGIN SDIO_MspInit 1 */
/* USER CODE END SDIO_MspInit 1 */
}
}
80007a6: bf00 nop
80007a8: 3728 adds r7, #40 ; 0x28
80007aa: 46bd mov sp, r7
80007ac: bd80 pop {r7, pc}
80007ae: bf00 nop
80007b0: 40018000 .word 0x40018000
80007b4: 40021000 .word 0x40021000
80007b8: 40011000 .word 0x40011000
80007bc: 40011400 .word 0x40011400
080007c0 <HAL_SD_MspDeInit>:
* This function freeze the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
{
80007c0: b580 push {r7, lr}
80007c2: b082 sub sp, #8
80007c4: af00 add r7, sp, #0
80007c6: 6078 str r0, [r7, #4]
if(hsd->Instance==SDIO)
80007c8: 687b ldr r3, [r7, #4]
80007ca: 681b ldr r3, [r3, #0]
80007cc: 4a0a ldr r2, [pc, #40] ; (80007f8 <HAL_SD_MspDeInit+0x38>)
80007ce: 4293 cmp r3, r2
80007d0: d10e bne.n 80007f0 <HAL_SD_MspDeInit+0x30>
{
/* USER CODE BEGIN SDIO_MspDeInit 0 */
/* USER CODE END SDIO_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SDIO_CLK_DISABLE();
80007d2: 4b0a ldr r3, [pc, #40] ; (80007fc <HAL_SD_MspDeInit+0x3c>)
80007d4: 695b ldr r3, [r3, #20]
80007d6: 4a09 ldr r2, [pc, #36] ; (80007fc <HAL_SD_MspDeInit+0x3c>)
80007d8: f423 6380 bic.w r3, r3, #1024 ; 0x400
80007dc: 6153 str r3, [r2, #20]
PC10 ------> SDIO_D2
PC11 ------> SDIO_D3
PC12 ------> SDIO_CK
PD2 ------> SDIO_CMD
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
80007de: f44f 51f8 mov.w r1, #7936 ; 0x1f00
80007e2: 4807 ldr r0, [pc, #28] ; (8000800 <HAL_SD_MspDeInit+0x40>)
80007e4: f000 fb6a bl 8000ebc <HAL_GPIO_DeInit>
|GPIO_PIN_12);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
80007e8: 2104 movs r1, #4
80007ea: 4806 ldr r0, [pc, #24] ; (8000804 <HAL_SD_MspDeInit+0x44>)
80007ec: f000 fb66 bl 8000ebc <HAL_GPIO_DeInit>
/* USER CODE BEGIN SDIO_MspDeInit 1 */
/* USER CODE END SDIO_MspDeInit 1 */
}
}
80007f0: bf00 nop
80007f2: 3708 adds r7, #8
80007f4: 46bd mov sp, r7
80007f6: bd80 pop {r7, pc}
80007f8: 40018000 .word 0x40018000
80007fc: 40021000 .word 0x40021000
8000800: 40011000 .word 0x40011000
8000804: 40011400 .word 0x40011400
08000808 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8000808: b480 push {r7}
800080a: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
800080c: e7fe b.n 800080c <NMI_Handler+0x4>
0800080e <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
800080e: b480 push {r7}
8000810: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8000812: e7fe b.n 8000812 <HardFault_Handler+0x4>
08000814 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8000814: b480 push {r7}
8000816: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8000818: e7fe b.n 8000818 <MemManage_Handler+0x4>
0800081a <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
800081a: b480 push {r7}
800081c: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
800081e: e7fe b.n 800081e <BusFault_Handler+0x4>
08000820 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8000820: b480 push {r7}
8000822: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8000824: e7fe b.n 8000824 <UsageFault_Handler+0x4>
08000826 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8000826: b480 push {r7}
8000828: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
800082a: bf00 nop
800082c: 46bd mov sp, r7
800082e: bc80 pop {r7}
8000830: 4770 bx lr
08000832 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8000832: b480 push {r7}
8000834: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8000836: bf00 nop
8000838: 46bd mov sp, r7
800083a: bc80 pop {r7}
800083c: 4770 bx lr
0800083e <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
800083e: b480 push {r7}
8000840: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8000842: bf00 nop
8000844: 46bd mov sp, r7
8000846: bc80 pop {r7}
8000848: 4770 bx lr
0800084a <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
800084a: b580 push {r7, lr}
800084c: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
800084e: f000 f87f bl 8000950 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8000852: bf00 nop
8000854: bd80 pop {r7, pc}
...
08000858 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8000858: b580 push {r7, lr}
800085a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
800085c: 4802 ldr r0, [pc, #8] ; (8000868 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
800085e: f001 f89c bl 800199a <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8000862: bf00 nop
8000864: bd80 pop {r7, pc}
8000866: bf00 nop
8000868: 20000974 .word 0x20000974
0800086c <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
800086c: b480 push {r7}
800086e: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8000870: bf00 nop
8000872: 46bd mov sp, r7
8000874: bc80 pop {r7}
8000876: 4770 bx lr
08000878 <Reset_Handler>:
8000878: 2100 movs r1, #0
800087a: e003 b.n 8000884 <LoopCopyDataInit>
0800087c <CopyDataInit>:
800087c: 4b0b ldr r3, [pc, #44] ; (80008ac <LoopFillZerobss+0x14>)
800087e: 585b ldr r3, [r3, r1]
8000880: 5043 str r3, [r0, r1]
8000882: 3104 adds r1, #4
08000884 <LoopCopyDataInit>:
8000884: 480a ldr r0, [pc, #40] ; (80008b0 <LoopFillZerobss+0x18>)
8000886: 4b0b ldr r3, [pc, #44] ; (80008b4 <LoopFillZerobss+0x1c>)
8000888: 1842 adds r2, r0, r1
800088a: 429a cmp r2, r3
800088c: d3f6 bcc.n 800087c <CopyDataInit>
800088e: 4a0a ldr r2, [pc, #40] ; (80008b8 <LoopFillZerobss+0x20>)
8000890: e002 b.n 8000898 <LoopFillZerobss>
08000892 <FillZerobss>:
8000892: 2300 movs r3, #0
8000894: f842 3b04 str.w r3, [r2], #4
08000898 <LoopFillZerobss>:
8000898: 4b08 ldr r3, [pc, #32] ; (80008bc <LoopFillZerobss+0x24>)
800089a: 429a cmp r2, r3
800089c: d3f9 bcc.n 8000892 <FillZerobss>
800089e: f7ff ffe5 bl 800086c <SystemInit>
80008a2: f009 fe53 bl 800a54c <__libc_init_array>
80008a6: f7ff fcbd bl 8000224 <main>
80008aa: 4770 bx lr
80008ac: 0800a670 .word 0x0800a670
80008b0: 20000000 .word 0x20000000
80008b4: 20000124 .word 0x20000124
80008b8: 20000124 .word 0x20000124
80008bc: 20000c60 .word 0x20000c60
080008c0 <ADC1_2_IRQHandler>:
80008c0: e7fe b.n 80008c0 <ADC1_2_IRQHandler>
...
080008c4 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80008c4: b580 push {r7, lr}
80008c6: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80008c8: 4b08 ldr r3, [pc, #32] ; (80008ec <HAL_Init+0x28>)
80008ca: 681b ldr r3, [r3, #0]
80008cc: 4a07 ldr r2, [pc, #28] ; (80008ec <HAL_Init+0x28>)
80008ce: f043 0310 orr.w r3, r3, #16
80008d2: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80008d4: 2003 movs r0, #3
80008d6: f000 f945 bl 8000b64 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80008da: 2000 movs r0, #0
80008dc: f000 f808 bl 80008f0 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
80008e0: f7ff fea4 bl 800062c <HAL_MspInit>
/* Return function status */
return HAL_OK;
80008e4: 2300 movs r3, #0
}
80008e6: 4618 mov r0, r3
80008e8: bd80 pop {r7, pc}
80008ea: bf00 nop
80008ec: 40022000 .word 0x40022000
080008f0 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
80008f0: b580 push {r7, lr}
80008f2: b082 sub sp, #8
80008f4: af00 add r7, sp, #0
80008f6: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
80008f8: 4b12 ldr r3, [pc, #72] ; (8000944 <HAL_InitTick+0x54>)
80008fa: 681a ldr r2, [r3, #0]
80008fc: 4b12 ldr r3, [pc, #72] ; (8000948 <HAL_InitTick+0x58>)
80008fe: 781b ldrb r3, [r3, #0]
8000900: 4619 mov r1, r3
8000902: f44f 737a mov.w r3, #1000 ; 0x3e8
8000906: fbb3 f3f1 udiv r3, r3, r1
800090a: fbb2 f3f3 udiv r3, r2, r3
800090e: 4618 mov r0, r3
8000910: f000 f95d bl 8000bce <HAL_SYSTICK_Config>
8000914: 4603 mov r3, r0
8000916: 2b00 cmp r3, #0
8000918: d001 beq.n 800091e <HAL_InitTick+0x2e>
{
return HAL_ERROR;
800091a: 2301 movs r3, #1
800091c: e00e b.n 800093c <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
800091e: 687b ldr r3, [r7, #4]
8000920: 2b0f cmp r3, #15
8000922: d80a bhi.n 800093a <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8000924: 2200 movs r2, #0
8000926: 6879 ldr r1, [r7, #4]
8000928: f04f 30ff mov.w r0, #4294967295
800092c: f000 f925 bl 8000b7a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8000930: 4a06 ldr r2, [pc, #24] ; (800094c <HAL_InitTick+0x5c>)
8000932: 687b ldr r3, [r7, #4]
8000934: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8000936: 2300 movs r3, #0
8000938: e000 b.n 800093c <HAL_InitTick+0x4c>
return HAL_ERROR;
800093a: 2301 movs r3, #1
}
800093c: 4618 mov r0, r3
800093e: 3708 adds r7, #8
8000940: 46bd mov sp, r7
8000942: bd80 pop {r7, pc}
8000944: 20000004 .word 0x20000004
8000948: 2000000c .word 0x2000000c
800094c: 20000008 .word 0x20000008
08000950 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8000950: b480 push {r7}
8000952: af00 add r7, sp, #0
uwTick += uwTickFreq;
8000954: 4b05 ldr r3, [pc, #20] ; (800096c <HAL_IncTick+0x1c>)
8000956: 781b ldrb r3, [r3, #0]
8000958: 461a mov r2, r3
800095a: 4b05 ldr r3, [pc, #20] ; (8000970 <HAL_IncTick+0x20>)
800095c: 681b ldr r3, [r3, #0]
800095e: 4413 add r3, r2
8000960: 4a03 ldr r2, [pc, #12] ; (8000970 <HAL_IncTick+0x20>)
8000962: 6013 str r3, [r2, #0]
}
8000964: bf00 nop
8000966: 46bd mov sp, r7
8000968: bc80 pop {r7}
800096a: 4770 bx lr
800096c: 2000000c .word 0x2000000c
8000970: 2000048c .word 0x2000048c
08000974 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8000974: b480 push {r7}
8000976: af00 add r7, sp, #0
return uwTick;
8000978: 4b02 ldr r3, [pc, #8] ; (8000984 <HAL_GetTick+0x10>)
800097a: 681b ldr r3, [r3, #0]
}
800097c: 4618 mov r0, r3
800097e: 46bd mov sp, r7
8000980: bc80 pop {r7}
8000982: 4770 bx lr
8000984: 2000048c .word 0x2000048c
08000988 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
8000988: b580 push {r7, lr}
800098a: b084 sub sp, #16
800098c: af00 add r7, sp, #0
800098e: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
8000990: f7ff fff0 bl 8000974 <HAL_GetTick>
8000994: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
8000996: 687b ldr r3, [r7, #4]
8000998: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
800099a: 68fb ldr r3, [r7, #12]
800099c: f1b3 3fff cmp.w r3, #4294967295
80009a0: d005 beq.n 80009ae <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
80009a2: 4b09 ldr r3, [pc, #36] ; (80009c8 <HAL_Delay+0x40>)
80009a4: 781b ldrb r3, [r3, #0]
80009a6: 461a mov r2, r3
80009a8: 68fb ldr r3, [r7, #12]
80009aa: 4413 add r3, r2
80009ac: 60fb str r3, [r7, #12]
}
while ((HAL_GetTick() - tickstart) < wait)
80009ae: bf00 nop
80009b0: f7ff ffe0 bl 8000974 <HAL_GetTick>
80009b4: 4602 mov r2, r0
80009b6: 68bb ldr r3, [r7, #8]
80009b8: 1ad3 subs r3, r2, r3
80009ba: 68fa ldr r2, [r7, #12]
80009bc: 429a cmp r2, r3
80009be: d8f7 bhi.n 80009b0 <HAL_Delay+0x28>
{
}
}
80009c0: bf00 nop
80009c2: 3710 adds r7, #16
80009c4: 46bd mov sp, r7
80009c6: bd80 pop {r7, pc}
80009c8: 2000000c .word 0x2000000c
080009cc <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80009cc: b480 push {r7}
80009ce: b085 sub sp, #20
80009d0: af00 add r7, sp, #0
80009d2: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80009d4: 687b ldr r3, [r7, #4]
80009d6: f003 0307 and.w r3, r3, #7
80009da: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
80009dc: 4b0c ldr r3, [pc, #48] ; (8000a10 <__NVIC_SetPriorityGrouping+0x44>)
80009de: 68db ldr r3, [r3, #12]
80009e0: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
80009e2: 68ba ldr r2, [r7, #8]
80009e4: f64f 03ff movw r3, #63743 ; 0xf8ff
80009e8: 4013 ands r3, r2
80009ea: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
80009ec: 68fb ldr r3, [r7, #12]
80009ee: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
80009f0: 68bb ldr r3, [r7, #8]
80009f2: 4313 orrs r3, r2
reg_value = (reg_value |
80009f4: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
80009f8: f443 3300 orr.w r3, r3, #131072 ; 0x20000
80009fc: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
80009fe: 4a04 ldr r2, [pc, #16] ; (8000a10 <__NVIC_SetPriorityGrouping+0x44>)
8000a00: 68bb ldr r3, [r7, #8]
8000a02: 60d3 str r3, [r2, #12]
}
8000a04: bf00 nop
8000a06: 3714 adds r7, #20
8000a08: 46bd mov sp, r7
8000a0a: bc80 pop {r7}
8000a0c: 4770 bx lr
8000a0e: bf00 nop
8000a10: e000ed00 .word 0xe000ed00
08000a14 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8000a14: b480 push {r7}
8000a16: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8000a18: 4b04 ldr r3, [pc, #16] ; (8000a2c <__NVIC_GetPriorityGrouping+0x18>)
8000a1a: 68db ldr r3, [r3, #12]
8000a1c: 0a1b lsrs r3, r3, #8
8000a1e: f003 0307 and.w r3, r3, #7
}
8000a22: 4618 mov r0, r3
8000a24: 46bd mov sp, r7
8000a26: bc80 pop {r7}
8000a28: 4770 bx lr
8000a2a: bf00 nop
8000a2c: e000ed00 .word 0xe000ed00
08000a30 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8000a30: b480 push {r7}
8000a32: b083 sub sp, #12
8000a34: af00 add r7, sp, #0
8000a36: 4603 mov r3, r0
8000a38: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8000a3a: f997 3007 ldrsb.w r3, [r7, #7]
8000a3e: 2b00 cmp r3, #0
8000a40: db0b blt.n 8000a5a <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8000a42: 79fb ldrb r3, [r7, #7]
8000a44: f003 021f and.w r2, r3, #31
8000a48: 4906 ldr r1, [pc, #24] ; (8000a64 <__NVIC_EnableIRQ+0x34>)
8000a4a: f997 3007 ldrsb.w r3, [r7, #7]
8000a4e: 095b lsrs r3, r3, #5
8000a50: 2001 movs r0, #1
8000a52: fa00 f202 lsl.w r2, r0, r2
8000a56: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8000a5a: bf00 nop
8000a5c: 370c adds r7, #12
8000a5e: 46bd mov sp, r7
8000a60: bc80 pop {r7}
8000a62: 4770 bx lr
8000a64: e000e100 .word 0xe000e100
08000a68 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8000a68: b480 push {r7}
8000a6a: b083 sub sp, #12
8000a6c: af00 add r7, sp, #0
8000a6e: 4603 mov r3, r0
8000a70: 6039 str r1, [r7, #0]
8000a72: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8000a74: f997 3007 ldrsb.w r3, [r7, #7]
8000a78: 2b00 cmp r3, #0
8000a7a: db0a blt.n 8000a92 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8000a7c: 683b ldr r3, [r7, #0]
8000a7e: b2da uxtb r2, r3
8000a80: 490c ldr r1, [pc, #48] ; (8000ab4 <__NVIC_SetPriority+0x4c>)
8000a82: f997 3007 ldrsb.w r3, [r7, #7]
8000a86: 0112 lsls r2, r2, #4
8000a88: b2d2 uxtb r2, r2
8000a8a: 440b add r3, r1
8000a8c: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8000a90: e00a b.n 8000aa8 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8000a92: 683b ldr r3, [r7, #0]
8000a94: b2da uxtb r2, r3
8000a96: 4908 ldr r1, [pc, #32] ; (8000ab8 <__NVIC_SetPriority+0x50>)
8000a98: 79fb ldrb r3, [r7, #7]
8000a9a: f003 030f and.w r3, r3, #15
8000a9e: 3b04 subs r3, #4
8000aa0: 0112 lsls r2, r2, #4
8000aa2: b2d2 uxtb r2, r2
8000aa4: 440b add r3, r1
8000aa6: 761a strb r2, [r3, #24]
}
8000aa8: bf00 nop
8000aaa: 370c adds r7, #12
8000aac: 46bd mov sp, r7
8000aae: bc80 pop {r7}
8000ab0: 4770 bx lr
8000ab2: bf00 nop
8000ab4: e000e100 .word 0xe000e100
8000ab8: e000ed00 .word 0xe000ed00
08000abc <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8000abc: b480 push {r7}
8000abe: b089 sub sp, #36 ; 0x24
8000ac0: af00 add r7, sp, #0
8000ac2: 60f8 str r0, [r7, #12]
8000ac4: 60b9 str r1, [r7, #8]
8000ac6: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8000ac8: 68fb ldr r3, [r7, #12]
8000aca: f003 0307 and.w r3, r3, #7
8000ace: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8000ad0: 69fb ldr r3, [r7, #28]
8000ad2: f1c3 0307 rsb r3, r3, #7
8000ad6: 2b04 cmp r3, #4
8000ad8: bf28 it cs
8000ada: 2304 movcs r3, #4
8000adc: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8000ade: 69fb ldr r3, [r7, #28]
8000ae0: 3304 adds r3, #4
8000ae2: 2b06 cmp r3, #6
8000ae4: d902 bls.n 8000aec <NVIC_EncodePriority+0x30>
8000ae6: 69fb ldr r3, [r7, #28]
8000ae8: 3b03 subs r3, #3
8000aea: e000 b.n 8000aee <NVIC_EncodePriority+0x32>
8000aec: 2300 movs r3, #0
8000aee: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8000af0: f04f 32ff mov.w r2, #4294967295
8000af4: 69bb ldr r3, [r7, #24]
8000af6: fa02 f303 lsl.w r3, r2, r3
8000afa: 43da mvns r2, r3
8000afc: 68bb ldr r3, [r7, #8]
8000afe: 401a ands r2, r3
8000b00: 697b ldr r3, [r7, #20]
8000b02: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8000b04: f04f 31ff mov.w r1, #4294967295
8000b08: 697b ldr r3, [r7, #20]
8000b0a: fa01 f303 lsl.w r3, r1, r3
8000b0e: 43d9 mvns r1, r3
8000b10: 687b ldr r3, [r7, #4]
8000b12: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8000b14: 4313 orrs r3, r2
);
}
8000b16: 4618 mov r0, r3
8000b18: 3724 adds r7, #36 ; 0x24
8000b1a: 46bd mov sp, r7
8000b1c: bc80 pop {r7}
8000b1e: 4770 bx lr
08000b20 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8000b20: b580 push {r7, lr}
8000b22: b082 sub sp, #8
8000b24: af00 add r7, sp, #0
8000b26: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8000b28: 687b ldr r3, [r7, #4]
8000b2a: 3b01 subs r3, #1
8000b2c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
8000b30: d301 bcc.n 8000b36 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8000b32: 2301 movs r3, #1
8000b34: e00f b.n 8000b56 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8000b36: 4a0a ldr r2, [pc, #40] ; (8000b60 <SysTick_Config+0x40>)
8000b38: 687b ldr r3, [r7, #4]
8000b3a: 3b01 subs r3, #1
8000b3c: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8000b3e: 210f movs r1, #15
8000b40: f04f 30ff mov.w r0, #4294967295
8000b44: f7ff ff90 bl 8000a68 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8000b48: 4b05 ldr r3, [pc, #20] ; (8000b60 <SysTick_Config+0x40>)
8000b4a: 2200 movs r2, #0
8000b4c: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8000b4e: 4b04 ldr r3, [pc, #16] ; (8000b60 <SysTick_Config+0x40>)
8000b50: 2207 movs r2, #7
8000b52: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8000b54: 2300 movs r3, #0
}
8000b56: 4618 mov r0, r3
8000b58: 3708 adds r7, #8
8000b5a: 46bd mov sp, r7
8000b5c: bd80 pop {r7, pc}
8000b5e: bf00 nop
8000b60: e000e010 .word 0xe000e010
08000b64 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8000b64: b580 push {r7, lr}
8000b66: b082 sub sp, #8
8000b68: af00 add r7, sp, #0
8000b6a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8000b6c: 6878 ldr r0, [r7, #4]
8000b6e: f7ff ff2d bl 80009cc <__NVIC_SetPriorityGrouping>
}
8000b72: bf00 nop
8000b74: 3708 adds r7, #8
8000b76: 46bd mov sp, r7
8000b78: bd80 pop {r7, pc}
08000b7a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8000b7a: b580 push {r7, lr}
8000b7c: b086 sub sp, #24
8000b7e: af00 add r7, sp, #0
8000b80: 4603 mov r3, r0
8000b82: 60b9 str r1, [r7, #8]
8000b84: 607a str r2, [r7, #4]
8000b86: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8000b88: 2300 movs r3, #0
8000b8a: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8000b8c: f7ff ff42 bl 8000a14 <__NVIC_GetPriorityGrouping>
8000b90: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8000b92: 687a ldr r2, [r7, #4]
8000b94: 68b9 ldr r1, [r7, #8]
8000b96: 6978 ldr r0, [r7, #20]
8000b98: f7ff ff90 bl 8000abc <NVIC_EncodePriority>
8000b9c: 4602 mov r2, r0
8000b9e: f997 300f ldrsb.w r3, [r7, #15]
8000ba2: 4611 mov r1, r2
8000ba4: 4618 mov r0, r3
8000ba6: f7ff ff5f bl 8000a68 <__NVIC_SetPriority>
}
8000baa: bf00 nop
8000bac: 3718 adds r7, #24
8000bae: 46bd mov sp, r7
8000bb0: bd80 pop {r7, pc}
08000bb2 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8000bb2: b580 push {r7, lr}
8000bb4: b082 sub sp, #8
8000bb6: af00 add r7, sp, #0
8000bb8: 4603 mov r3, r0
8000bba: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8000bbc: f997 3007 ldrsb.w r3, [r7, #7]
8000bc0: 4618 mov r0, r3
8000bc2: f7ff ff35 bl 8000a30 <__NVIC_EnableIRQ>
}
8000bc6: bf00 nop
8000bc8: 3708 adds r7, #8
8000bca: 46bd mov sp, r7
8000bcc: bd80 pop {r7, pc}
08000bce <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8000bce: b580 push {r7, lr}
8000bd0: b082 sub sp, #8
8000bd2: af00 add r7, sp, #0
8000bd4: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8000bd6: 6878 ldr r0, [r7, #4]
8000bd8: f7ff ffa2 bl 8000b20 <SysTick_Config>
8000bdc: 4603 mov r3, r0
}
8000bde: 4618 mov r0, r3
8000be0: 3708 adds r7, #8
8000be2: 46bd mov sp, r7
8000be4: bd80 pop {r7, pc}
...
08000be8 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8000be8: b480 push {r7}
8000bea: b08b sub sp, #44 ; 0x2c
8000bec: af00 add r7, sp, #0
8000bee: 6078 str r0, [r7, #4]
8000bf0: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8000bf2: 2300 movs r3, #0
8000bf4: 627b str r3, [r7, #36] ; 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8000bf6: 2300 movs r3, #0
8000bf8: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8000bfa: e133 b.n 8000e64 <HAL_GPIO_Init+0x27c>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8000bfc: 2201 movs r2, #1
8000bfe: 6a7b ldr r3, [r7, #36] ; 0x24
8000c00: fa02 f303 lsl.w r3, r2, r3
8000c04: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8000c06: 683b ldr r3, [r7, #0]
8000c08: 681b ldr r3, [r3, #0]
8000c0a: 69fa ldr r2, [r7, #28]
8000c0c: 4013 ands r3, r2
8000c0e: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8000c10: 69ba ldr r2, [r7, #24]
8000c12: 69fb ldr r3, [r7, #28]
8000c14: 429a cmp r2, r3
8000c16: f040 8122 bne.w 8000e5e <HAL_GPIO_Init+0x276>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8000c1a: 683b ldr r3, [r7, #0]
8000c1c: 685b ldr r3, [r3, #4]
8000c1e: 2b12 cmp r3, #18
8000c20: d034 beq.n 8000c8c <HAL_GPIO_Init+0xa4>
8000c22: 2b12 cmp r3, #18
8000c24: d80d bhi.n 8000c42 <HAL_GPIO_Init+0x5a>
8000c26: 2b02 cmp r3, #2
8000c28: d02b beq.n 8000c82 <HAL_GPIO_Init+0x9a>
8000c2a: 2b02 cmp r3, #2
8000c2c: d804 bhi.n 8000c38 <HAL_GPIO_Init+0x50>
8000c2e: 2b00 cmp r3, #0
8000c30: d031 beq.n 8000c96 <HAL_GPIO_Init+0xae>
8000c32: 2b01 cmp r3, #1
8000c34: d01c beq.n 8000c70 <HAL_GPIO_Init+0x88>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8000c36: e048 b.n 8000cca <HAL_GPIO_Init+0xe2>
switch (GPIO_Init->Mode)
8000c38: 2b03 cmp r3, #3
8000c3a: d043 beq.n 8000cc4 <HAL_GPIO_Init+0xdc>
8000c3c: 2b11 cmp r3, #17
8000c3e: d01b beq.n 8000c78 <HAL_GPIO_Init+0x90>
break;
8000c40: e043 b.n 8000cca <HAL_GPIO_Init+0xe2>
switch (GPIO_Init->Mode)
8000c42: 4a8f ldr r2, [pc, #572] ; (8000e80 <HAL_GPIO_Init+0x298>)
8000c44: 4293 cmp r3, r2
8000c46: d026 beq.n 8000c96 <HAL_GPIO_Init+0xae>
8000c48: 4a8d ldr r2, [pc, #564] ; (8000e80 <HAL_GPIO_Init+0x298>)
8000c4a: 4293 cmp r3, r2
8000c4c: d806 bhi.n 8000c5c <HAL_GPIO_Init+0x74>
8000c4e: 4a8d ldr r2, [pc, #564] ; (8000e84 <HAL_GPIO_Init+0x29c>)
8000c50: 4293 cmp r3, r2
8000c52: d020 beq.n 8000c96 <HAL_GPIO_Init+0xae>
8000c54: 4a8c ldr r2, [pc, #560] ; (8000e88 <HAL_GPIO_Init+0x2a0>)
8000c56: 4293 cmp r3, r2
8000c58: d01d beq.n 8000c96 <HAL_GPIO_Init+0xae>
break;
8000c5a: e036 b.n 8000cca <HAL_GPIO_Init+0xe2>
switch (GPIO_Init->Mode)
8000c5c: 4a8b ldr r2, [pc, #556] ; (8000e8c <HAL_GPIO_Init+0x2a4>)
8000c5e: 4293 cmp r3, r2
8000c60: d019 beq.n 8000c96 <HAL_GPIO_Init+0xae>
8000c62: 4a8b ldr r2, [pc, #556] ; (8000e90 <HAL_GPIO_Init+0x2a8>)
8000c64: 4293 cmp r3, r2
8000c66: d016 beq.n 8000c96 <HAL_GPIO_Init+0xae>
8000c68: 4a8a ldr r2, [pc, #552] ; (8000e94 <HAL_GPIO_Init+0x2ac>)
8000c6a: 4293 cmp r3, r2
8000c6c: d013 beq.n 8000c96 <HAL_GPIO_Init+0xae>
break;
8000c6e: e02c b.n 8000cca <HAL_GPIO_Init+0xe2>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8000c70: 683b ldr r3, [r7, #0]
8000c72: 68db ldr r3, [r3, #12]
8000c74: 623b str r3, [r7, #32]
break;
8000c76: e028 b.n 8000cca <HAL_GPIO_Init+0xe2>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8000c78: 683b ldr r3, [r7, #0]
8000c7a: 68db ldr r3, [r3, #12]
8000c7c: 3304 adds r3, #4
8000c7e: 623b str r3, [r7, #32]
break;
8000c80: e023 b.n 8000cca <HAL_GPIO_Init+0xe2>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8000c82: 683b ldr r3, [r7, #0]
8000c84: 68db ldr r3, [r3, #12]
8000c86: 3308 adds r3, #8
8000c88: 623b str r3, [r7, #32]
break;
8000c8a: e01e b.n 8000cca <HAL_GPIO_Init+0xe2>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8000c8c: 683b ldr r3, [r7, #0]
8000c8e: 68db ldr r3, [r3, #12]
8000c90: 330c adds r3, #12
8000c92: 623b str r3, [r7, #32]
break;
8000c94: e019 b.n 8000cca <HAL_GPIO_Init+0xe2>
if (GPIO_Init->Pull == GPIO_NOPULL)
8000c96: 683b ldr r3, [r7, #0]
8000c98: 689b ldr r3, [r3, #8]
8000c9a: 2b00 cmp r3, #0
8000c9c: d102 bne.n 8000ca4 <HAL_GPIO_Init+0xbc>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8000c9e: 2304 movs r3, #4
8000ca0: 623b str r3, [r7, #32]
break;
8000ca2: e012 b.n 8000cca <HAL_GPIO_Init+0xe2>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8000ca4: 683b ldr r3, [r7, #0]
8000ca6: 689b ldr r3, [r3, #8]
8000ca8: 2b01 cmp r3, #1
8000caa: d105 bne.n 8000cb8 <HAL_GPIO_Init+0xd0>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8000cac: 2308 movs r3, #8
8000cae: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8000cb0: 687b ldr r3, [r7, #4]
8000cb2: 69fa ldr r2, [r7, #28]
8000cb4: 611a str r2, [r3, #16]
break;
8000cb6: e008 b.n 8000cca <HAL_GPIO_Init+0xe2>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8000cb8: 2308 movs r3, #8
8000cba: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8000cbc: 687b ldr r3, [r7, #4]
8000cbe: 69fa ldr r2, [r7, #28]
8000cc0: 615a str r2, [r3, #20]
break;
8000cc2: e002 b.n 8000cca <HAL_GPIO_Init+0xe2>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8000cc4: 2300 movs r3, #0
8000cc6: 623b str r3, [r7, #32]
break;
8000cc8: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8000cca: 69bb ldr r3, [r7, #24]
8000ccc: 2bff cmp r3, #255 ; 0xff
8000cce: d801 bhi.n 8000cd4 <HAL_GPIO_Init+0xec>
8000cd0: 687b ldr r3, [r7, #4]
8000cd2: e001 b.n 8000cd8 <HAL_GPIO_Init+0xf0>
8000cd4: 687b ldr r3, [r7, #4]
8000cd6: 3304 adds r3, #4
8000cd8: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8000cda: 69bb ldr r3, [r7, #24]
8000cdc: 2bff cmp r3, #255 ; 0xff
8000cde: d802 bhi.n 8000ce6 <HAL_GPIO_Init+0xfe>
8000ce0: 6a7b ldr r3, [r7, #36] ; 0x24
8000ce2: 009b lsls r3, r3, #2
8000ce4: e002 b.n 8000cec <HAL_GPIO_Init+0x104>
8000ce6: 6a7b ldr r3, [r7, #36] ; 0x24
8000ce8: 3b08 subs r3, #8
8000cea: 009b lsls r3, r3, #2
8000cec: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8000cee: 697b ldr r3, [r7, #20]
8000cf0: 681a ldr r2, [r3, #0]
8000cf2: 210f movs r1, #15
8000cf4: 693b ldr r3, [r7, #16]
8000cf6: fa01 f303 lsl.w r3, r1, r3
8000cfa: 43db mvns r3, r3
8000cfc: 401a ands r2, r3
8000cfe: 6a39 ldr r1, [r7, #32]
8000d00: 693b ldr r3, [r7, #16]
8000d02: fa01 f303 lsl.w r3, r1, r3
8000d06: 431a orrs r2, r3
8000d08: 697b ldr r3, [r7, #20]
8000d0a: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8000d0c: 683b ldr r3, [r7, #0]
8000d0e: 685b ldr r3, [r3, #4]
8000d10: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8000d14: 2b00 cmp r3, #0
8000d16: f000 80a2 beq.w 8000e5e <HAL_GPIO_Init+0x276>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8000d1a: 4b5f ldr r3, [pc, #380] ; (8000e98 <HAL_GPIO_Init+0x2b0>)
8000d1c: 699b ldr r3, [r3, #24]
8000d1e: 4a5e ldr r2, [pc, #376] ; (8000e98 <HAL_GPIO_Init+0x2b0>)
8000d20: f043 0301 orr.w r3, r3, #1
8000d24: 6193 str r3, [r2, #24]
8000d26: 4b5c ldr r3, [pc, #368] ; (8000e98 <HAL_GPIO_Init+0x2b0>)
8000d28: 699b ldr r3, [r3, #24]
8000d2a: f003 0301 and.w r3, r3, #1
8000d2e: 60bb str r3, [r7, #8]
8000d30: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8000d32: 4a5a ldr r2, [pc, #360] ; (8000e9c <HAL_GPIO_Init+0x2b4>)
8000d34: 6a7b ldr r3, [r7, #36] ; 0x24
8000d36: 089b lsrs r3, r3, #2
8000d38: 3302 adds r3, #2
8000d3a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8000d3e: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8000d40: 6a7b ldr r3, [r7, #36] ; 0x24
8000d42: f003 0303 and.w r3, r3, #3
8000d46: 009b lsls r3, r3, #2
8000d48: 220f movs r2, #15
8000d4a: fa02 f303 lsl.w r3, r2, r3
8000d4e: 43db mvns r3, r3
8000d50: 68fa ldr r2, [r7, #12]
8000d52: 4013 ands r3, r2
8000d54: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8000d56: 687b ldr r3, [r7, #4]
8000d58: 4a51 ldr r2, [pc, #324] ; (8000ea0 <HAL_GPIO_Init+0x2b8>)
8000d5a: 4293 cmp r3, r2
8000d5c: d01f beq.n 8000d9e <HAL_GPIO_Init+0x1b6>
8000d5e: 687b ldr r3, [r7, #4]
8000d60: 4a50 ldr r2, [pc, #320] ; (8000ea4 <HAL_GPIO_Init+0x2bc>)
8000d62: 4293 cmp r3, r2
8000d64: d019 beq.n 8000d9a <HAL_GPIO_Init+0x1b2>
8000d66: 687b ldr r3, [r7, #4]
8000d68: 4a4f ldr r2, [pc, #316] ; (8000ea8 <HAL_GPIO_Init+0x2c0>)
8000d6a: 4293 cmp r3, r2
8000d6c: d013 beq.n 8000d96 <HAL_GPIO_Init+0x1ae>
8000d6e: 687b ldr r3, [r7, #4]
8000d70: 4a4e ldr r2, [pc, #312] ; (8000eac <HAL_GPIO_Init+0x2c4>)
8000d72: 4293 cmp r3, r2
8000d74: d00d beq.n 8000d92 <HAL_GPIO_Init+0x1aa>
8000d76: 687b ldr r3, [r7, #4]
8000d78: 4a4d ldr r2, [pc, #308] ; (8000eb0 <HAL_GPIO_Init+0x2c8>)
8000d7a: 4293 cmp r3, r2
8000d7c: d007 beq.n 8000d8e <HAL_GPIO_Init+0x1a6>
8000d7e: 687b ldr r3, [r7, #4]
8000d80: 4a4c ldr r2, [pc, #304] ; (8000eb4 <HAL_GPIO_Init+0x2cc>)
8000d82: 4293 cmp r3, r2
8000d84: d101 bne.n 8000d8a <HAL_GPIO_Init+0x1a2>
8000d86: 2305 movs r3, #5
8000d88: e00a b.n 8000da0 <HAL_GPIO_Init+0x1b8>
8000d8a: 2306 movs r3, #6
8000d8c: e008 b.n 8000da0 <HAL_GPIO_Init+0x1b8>
8000d8e: 2304 movs r3, #4
8000d90: e006 b.n 8000da0 <HAL_GPIO_Init+0x1b8>
8000d92: 2303 movs r3, #3
8000d94: e004 b.n 8000da0 <HAL_GPIO_Init+0x1b8>
8000d96: 2302 movs r3, #2
8000d98: e002 b.n 8000da0 <HAL_GPIO_Init+0x1b8>
8000d9a: 2301 movs r3, #1
8000d9c: e000 b.n 8000da0 <HAL_GPIO_Init+0x1b8>
8000d9e: 2300 movs r3, #0
8000da0: 6a7a ldr r2, [r7, #36] ; 0x24
8000da2: f002 0203 and.w r2, r2, #3
8000da6: 0092 lsls r2, r2, #2
8000da8: 4093 lsls r3, r2
8000daa: 68fa ldr r2, [r7, #12]
8000dac: 4313 orrs r3, r2
8000dae: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8000db0: 493a ldr r1, [pc, #232] ; (8000e9c <HAL_GPIO_Init+0x2b4>)
8000db2: 6a7b ldr r3, [r7, #36] ; 0x24
8000db4: 089b lsrs r3, r3, #2
8000db6: 3302 adds r3, #2
8000db8: 68fa ldr r2, [r7, #12]
8000dba: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8000dbe: 683b ldr r3, [r7, #0]
8000dc0: 685b ldr r3, [r3, #4]
8000dc2: f403 3380 and.w r3, r3, #65536 ; 0x10000
8000dc6: 2b00 cmp r3, #0
8000dc8: d006 beq.n 8000dd8 <HAL_GPIO_Init+0x1f0>
{
SET_BIT(EXTI->IMR, iocurrent);
8000dca: 4b3b ldr r3, [pc, #236] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000dcc: 681a ldr r2, [r3, #0]
8000dce: 493a ldr r1, [pc, #232] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000dd0: 69bb ldr r3, [r7, #24]
8000dd2: 4313 orrs r3, r2
8000dd4: 600b str r3, [r1, #0]
8000dd6: e006 b.n 8000de6 <HAL_GPIO_Init+0x1fe>
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8000dd8: 4b37 ldr r3, [pc, #220] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000dda: 681a ldr r2, [r3, #0]
8000ddc: 69bb ldr r3, [r7, #24]
8000dde: 43db mvns r3, r3
8000de0: 4935 ldr r1, [pc, #212] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000de2: 4013 ands r3, r2
8000de4: 600b str r3, [r1, #0]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8000de6: 683b ldr r3, [r7, #0]
8000de8: 685b ldr r3, [r3, #4]
8000dea: f403 3300 and.w r3, r3, #131072 ; 0x20000
8000dee: 2b00 cmp r3, #0
8000df0: d006 beq.n 8000e00 <HAL_GPIO_Init+0x218>
{
SET_BIT(EXTI->EMR, iocurrent);
8000df2: 4b31 ldr r3, [pc, #196] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000df4: 685a ldr r2, [r3, #4]
8000df6: 4930 ldr r1, [pc, #192] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000df8: 69bb ldr r3, [r7, #24]
8000dfa: 4313 orrs r3, r2
8000dfc: 604b str r3, [r1, #4]
8000dfe: e006 b.n 8000e0e <HAL_GPIO_Init+0x226>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8000e00: 4b2d ldr r3, [pc, #180] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e02: 685a ldr r2, [r3, #4]
8000e04: 69bb ldr r3, [r7, #24]
8000e06: 43db mvns r3, r3
8000e08: 492b ldr r1, [pc, #172] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e0a: 4013 ands r3, r2
8000e0c: 604b str r3, [r1, #4]
}
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8000e0e: 683b ldr r3, [r7, #0]
8000e10: 685b ldr r3, [r3, #4]
8000e12: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8000e16: 2b00 cmp r3, #0
8000e18: d006 beq.n 8000e28 <HAL_GPIO_Init+0x240>
{
SET_BIT(EXTI->RTSR, iocurrent);
8000e1a: 4b27 ldr r3, [pc, #156] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e1c: 689a ldr r2, [r3, #8]
8000e1e: 4926 ldr r1, [pc, #152] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e20: 69bb ldr r3, [r7, #24]
8000e22: 4313 orrs r3, r2
8000e24: 608b str r3, [r1, #8]
8000e26: e006 b.n 8000e36 <HAL_GPIO_Init+0x24e>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8000e28: 4b23 ldr r3, [pc, #140] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e2a: 689a ldr r2, [r3, #8]
8000e2c: 69bb ldr r3, [r7, #24]
8000e2e: 43db mvns r3, r3
8000e30: 4921 ldr r1, [pc, #132] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e32: 4013 ands r3, r2
8000e34: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8000e36: 683b ldr r3, [r7, #0]
8000e38: 685b ldr r3, [r3, #4]
8000e3a: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8000e3e: 2b00 cmp r3, #0
8000e40: d006 beq.n 8000e50 <HAL_GPIO_Init+0x268>
{
SET_BIT(EXTI->FTSR, iocurrent);
8000e42: 4b1d ldr r3, [pc, #116] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e44: 68da ldr r2, [r3, #12]
8000e46: 491c ldr r1, [pc, #112] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e48: 69bb ldr r3, [r7, #24]
8000e4a: 4313 orrs r3, r2
8000e4c: 60cb str r3, [r1, #12]
8000e4e: e006 b.n 8000e5e <HAL_GPIO_Init+0x276>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8000e50: 4b19 ldr r3, [pc, #100] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e52: 68da ldr r2, [r3, #12]
8000e54: 69bb ldr r3, [r7, #24]
8000e56: 43db mvns r3, r3
8000e58: 4917 ldr r1, [pc, #92] ; (8000eb8 <HAL_GPIO_Init+0x2d0>)
8000e5a: 4013 ands r3, r2
8000e5c: 60cb str r3, [r1, #12]
}
}
}
position++;
8000e5e: 6a7b ldr r3, [r7, #36] ; 0x24
8000e60: 3301 adds r3, #1
8000e62: 627b str r3, [r7, #36] ; 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8000e64: 683b ldr r3, [r7, #0]
8000e66: 681a ldr r2, [r3, #0]
8000e68: 6a7b ldr r3, [r7, #36] ; 0x24
8000e6a: fa22 f303 lsr.w r3, r2, r3
8000e6e: 2b00 cmp r3, #0
8000e70: f47f aec4 bne.w 8000bfc <HAL_GPIO_Init+0x14>
}
}
8000e74: bf00 nop
8000e76: 372c adds r7, #44 ; 0x2c
8000e78: 46bd mov sp, r7
8000e7a: bc80 pop {r7}
8000e7c: 4770 bx lr
8000e7e: bf00 nop
8000e80: 10210000 .word 0x10210000
8000e84: 10110000 .word 0x10110000
8000e88: 10120000 .word 0x10120000
8000e8c: 10310000 .word 0x10310000
8000e90: 10320000 .word 0x10320000
8000e94: 10220000 .word 0x10220000
8000e98: 40021000 .word 0x40021000
8000e9c: 40010000 .word 0x40010000
8000ea0: 40010800 .word 0x40010800
8000ea4: 40010c00 .word 0x40010c00
8000ea8: 40011000 .word 0x40011000
8000eac: 40011400 .word 0x40011400
8000eb0: 40011800 .word 0x40011800
8000eb4: 40011c00 .word 0x40011c00
8000eb8: 40010400 .word 0x40010400
08000ebc <HAL_GPIO_DeInit>:
* @param GPIO_Pin: specifies the port bit to be written.
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
{
8000ebc: b480 push {r7}
8000ebe: b089 sub sp, #36 ; 0x24
8000ec0: af00 add r7, sp, #0
8000ec2: 6078 str r0, [r7, #4]
8000ec4: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8000ec6: 2300 movs r3, #0
8000ec8: 61fb str r3, [r7, #28]
/* Check the parameters */
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* Configure the port pins */
while ((GPIO_Pin >> position) != 0u)
8000eca: e0a6 b.n 800101a <HAL_GPIO_DeInit+0x15e>
{
/* Get current io position */
iocurrent = (GPIO_Pin) & (1uL << position);
8000ecc: 2201 movs r2, #1
8000ece: 69fb ldr r3, [r7, #28]
8000ed0: fa02 f303 lsl.w r3, r2, r3
8000ed4: 683a ldr r2, [r7, #0]
8000ed6: 4013 ands r3, r2
8000ed8: 61bb str r3, [r7, #24]
if (iocurrent)
8000eda: 69bb ldr r3, [r7, #24]
8000edc: 2b00 cmp r3, #0
8000ede: f000 8099 beq.w 8001014 <HAL_GPIO_DeInit+0x158>
{
/*------------------------- EXTI Mode Configuration --------------------*/
/* Clear the External Interrupt or Event for the current IO */
tmp = AFIO->EXTICR[position >> 2u];
8000ee2: 4a54 ldr r2, [pc, #336] ; (8001034 <HAL_GPIO_DeInit+0x178>)
8000ee4: 69fb ldr r3, [r7, #28]
8000ee6: 089b lsrs r3, r3, #2
8000ee8: 3302 adds r3, #2
8000eea: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8000eee: 617b str r3, [r7, #20]
tmp &= 0x0FuL << (4u * (position & 0x03u));
8000ef0: 69fb ldr r3, [r7, #28]
8000ef2: f003 0303 and.w r3, r3, #3
8000ef6: 009b lsls r3, r3, #2
8000ef8: 220f movs r2, #15
8000efa: fa02 f303 lsl.w r3, r2, r3
8000efe: 697a ldr r2, [r7, #20]
8000f00: 4013 ands r3, r2
8000f02: 617b str r3, [r7, #20]
if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
8000f04: 687b ldr r3, [r7, #4]
8000f06: 4a4c ldr r2, [pc, #304] ; (8001038 <HAL_GPIO_DeInit+0x17c>)
8000f08: 4293 cmp r3, r2
8000f0a: d01f beq.n 8000f4c <HAL_GPIO_DeInit+0x90>
8000f0c: 687b ldr r3, [r7, #4]
8000f0e: 4a4b ldr r2, [pc, #300] ; (800103c <HAL_GPIO_DeInit+0x180>)
8000f10: 4293 cmp r3, r2
8000f12: d019 beq.n 8000f48 <HAL_GPIO_DeInit+0x8c>
8000f14: 687b ldr r3, [r7, #4]
8000f16: 4a4a ldr r2, [pc, #296] ; (8001040 <HAL_GPIO_DeInit+0x184>)
8000f18: 4293 cmp r3, r2
8000f1a: d013 beq.n 8000f44 <HAL_GPIO_DeInit+0x88>
8000f1c: 687b ldr r3, [r7, #4]
8000f1e: 4a49 ldr r2, [pc, #292] ; (8001044 <HAL_GPIO_DeInit+0x188>)
8000f20: 4293 cmp r3, r2
8000f22: d00d beq.n 8000f40 <HAL_GPIO_DeInit+0x84>
8000f24: 687b ldr r3, [r7, #4]
8000f26: 4a48 ldr r2, [pc, #288] ; (8001048 <HAL_GPIO_DeInit+0x18c>)
8000f28: 4293 cmp r3, r2
8000f2a: d007 beq.n 8000f3c <HAL_GPIO_DeInit+0x80>
8000f2c: 687b ldr r3, [r7, #4]
8000f2e: 4a47 ldr r2, [pc, #284] ; (800104c <HAL_GPIO_DeInit+0x190>)
8000f30: 4293 cmp r3, r2
8000f32: d101 bne.n 8000f38 <HAL_GPIO_DeInit+0x7c>
8000f34: 2305 movs r3, #5
8000f36: e00a b.n 8000f4e <HAL_GPIO_DeInit+0x92>
8000f38: 2306 movs r3, #6
8000f3a: e008 b.n 8000f4e <HAL_GPIO_DeInit+0x92>
8000f3c: 2304 movs r3, #4
8000f3e: e006 b.n 8000f4e <HAL_GPIO_DeInit+0x92>
8000f40: 2303 movs r3, #3
8000f42: e004 b.n 8000f4e <HAL_GPIO_DeInit+0x92>
8000f44: 2302 movs r3, #2
8000f46: e002 b.n 8000f4e <HAL_GPIO_DeInit+0x92>
8000f48: 2301 movs r3, #1
8000f4a: e000 b.n 8000f4e <HAL_GPIO_DeInit+0x92>
8000f4c: 2300 movs r3, #0
8000f4e: 69fa ldr r2, [r7, #28]
8000f50: f002 0203 and.w r2, r2, #3
8000f54: 0092 lsls r2, r2, #2
8000f56: 4093 lsls r3, r2
8000f58: 697a ldr r2, [r7, #20]
8000f5a: 429a cmp r2, r3
8000f5c: d132 bne.n 8000fc4 <HAL_GPIO_DeInit+0x108>
{
tmp = 0x0FuL << (4u * (position & 0x03u));
8000f5e: 69fb ldr r3, [r7, #28]
8000f60: f003 0303 and.w r3, r3, #3
8000f64: 009b lsls r3, r3, #2
8000f66: 220f movs r2, #15
8000f68: fa02 f303 lsl.w r3, r2, r3
8000f6c: 617b str r3, [r7, #20]
CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
8000f6e: 4a31 ldr r2, [pc, #196] ; (8001034 <HAL_GPIO_DeInit+0x178>)
8000f70: 69fb ldr r3, [r7, #28]
8000f72: 089b lsrs r3, r3, #2
8000f74: 3302 adds r3, #2
8000f76: f852 1023 ldr.w r1, [r2, r3, lsl #2]
8000f7a: 697b ldr r3, [r7, #20]
8000f7c: 43da mvns r2, r3
8000f7e: 482d ldr r0, [pc, #180] ; (8001034 <HAL_GPIO_DeInit+0x178>)
8000f80: 69fb ldr r3, [r7, #28]
8000f82: 089b lsrs r3, r3, #2
8000f84: 400a ands r2, r1
8000f86: 3302 adds r3, #2
8000f88: f840 2023 str.w r2, [r0, r3, lsl #2]
/* Clear EXTI line configuration */
CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
8000f8c: 4b30 ldr r3, [pc, #192] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000f8e: 681a ldr r2, [r3, #0]
8000f90: 69bb ldr r3, [r7, #24]
8000f92: 43db mvns r3, r3
8000f94: 492e ldr r1, [pc, #184] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000f96: 4013 ands r3, r2
8000f98: 600b str r3, [r1, #0]
CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
8000f9a: 4b2d ldr r3, [pc, #180] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000f9c: 685a ldr r2, [r3, #4]
8000f9e: 69bb ldr r3, [r7, #24]
8000fa0: 43db mvns r3, r3
8000fa2: 492b ldr r1, [pc, #172] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000fa4: 4013 ands r3, r2
8000fa6: 604b str r3, [r1, #4]
/* Clear Rising Falling edge configuration */
CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
8000fa8: 4b29 ldr r3, [pc, #164] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000faa: 689a ldr r2, [r3, #8]
8000fac: 69bb ldr r3, [r7, #24]
8000fae: 43db mvns r3, r3
8000fb0: 4927 ldr r1, [pc, #156] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000fb2: 4013 ands r3, r2
8000fb4: 608b str r3, [r1, #8]
CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
8000fb6: 4b26 ldr r3, [pc, #152] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000fb8: 68da ldr r2, [r3, #12]
8000fba: 69bb ldr r3, [r7, #24]
8000fbc: 43db mvns r3, r3
8000fbe: 4924 ldr r1, [pc, #144] ; (8001050 <HAL_GPIO_DeInit+0x194>)
8000fc0: 4013 ands r3, r2
8000fc2: 60cb str r3, [r1, #12]
}
/*------------------------- GPIO Mode Configuration --------------------*/
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register */
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8000fc4: 69bb ldr r3, [r7, #24]
8000fc6: 2bff cmp r3, #255 ; 0xff
8000fc8: d801 bhi.n 8000fce <HAL_GPIO_DeInit+0x112>
8000fca: 687b ldr r3, [r7, #4]
8000fcc: e001 b.n 8000fd2 <HAL_GPIO_DeInit+0x116>
8000fce: 687b ldr r3, [r7, #4]
8000fd0: 3304 adds r3, #4
8000fd2: 613b str r3, [r7, #16]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8000fd4: 69bb ldr r3, [r7, #24]
8000fd6: 2bff cmp r3, #255 ; 0xff
8000fd8: d802 bhi.n 8000fe0 <HAL_GPIO_DeInit+0x124>
8000fda: 69fb ldr r3, [r7, #28]
8000fdc: 009b lsls r3, r3, #2
8000fde: e002 b.n 8000fe6 <HAL_GPIO_DeInit+0x12a>
8000fe0: 69fb ldr r3, [r7, #28]
8000fe2: 3b08 subs r3, #8
8000fe4: 009b lsls r3, r3, #2
8000fe6: 60fb str r3, [r7, #12]
/* CRL/CRH default value is floating input(0x04) shifted to correct position */
MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), GPIO_CRL_CNF0_0 << registeroffset);
8000fe8: 693b ldr r3, [r7, #16]
8000fea: 681a ldr r2, [r3, #0]
8000fec: 210f movs r1, #15
8000fee: 68fb ldr r3, [r7, #12]
8000ff0: fa01 f303 lsl.w r3, r1, r3
8000ff4: 43db mvns r3, r3
8000ff6: 401a ands r2, r3
8000ff8: 2104 movs r1, #4
8000ffa: 68fb ldr r3, [r7, #12]
8000ffc: fa01 f303 lsl.w r3, r1, r3
8001000: 431a orrs r2, r3
8001002: 693b ldr r3, [r7, #16]
8001004: 601a str r2, [r3, #0]
/* ODR default value is 0 */
CLEAR_BIT(GPIOx->ODR, iocurrent);
8001006: 687b ldr r3, [r7, #4]
8001008: 68da ldr r2, [r3, #12]
800100a: 69bb ldr r3, [r7, #24]
800100c: 43db mvns r3, r3
800100e: 401a ands r2, r3
8001010: 687b ldr r3, [r7, #4]
8001012: 60da str r2, [r3, #12]
}
position++;
8001014: 69fb ldr r3, [r7, #28]
8001016: 3301 adds r3, #1
8001018: 61fb str r3, [r7, #28]
while ((GPIO_Pin >> position) != 0u)
800101a: 683a ldr r2, [r7, #0]
800101c: 69fb ldr r3, [r7, #28]
800101e: fa22 f303 lsr.w r3, r2, r3
8001022: 2b00 cmp r3, #0
8001024: f47f af52 bne.w 8000ecc <HAL_GPIO_DeInit+0x10>
}
}
8001028: bf00 nop
800102a: 3724 adds r7, #36 ; 0x24
800102c: 46bd mov sp, r7
800102e: bc80 pop {r7}
8001030: 4770 bx lr
8001032: bf00 nop
8001034: 40010000 .word 0x40010000
8001038: 40010800 .word 0x40010800
800103c: 40010c00 .word 0x40010c00
8001040: 40011000 .word 0x40011000
8001044: 40011400 .word 0x40011400
8001048: 40011800 .word 0x40011800
800104c: 40011c00 .word 0x40011c00
8001050: 40010400 .word 0x40010400
08001054 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8001054: b480 push {r7}
8001056: b083 sub sp, #12
8001058: af00 add r7, sp, #0
800105a: 6078 str r0, [r7, #4]
800105c: 460b mov r3, r1
800105e: 807b strh r3, [r7, #2]
8001060: 4613 mov r3, r2
8001062: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8001064: 787b ldrb r3, [r7, #1]
8001066: 2b00 cmp r3, #0
8001068: d003 beq.n 8001072 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
800106a: 887a ldrh r2, [r7, #2]
800106c: 687b ldr r3, [r7, #4]
800106e: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8001070: e003 b.n 800107a <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8001072: 887b ldrh r3, [r7, #2]
8001074: 041a lsls r2, r3, #16
8001076: 687b ldr r3, [r7, #4]
8001078: 611a str r2, [r3, #16]
}
800107a: bf00 nop
800107c: 370c adds r7, #12
800107e: 46bd mov sp, r7
8001080: bc80 pop {r7}
8001082: 4770 bx lr
08001084 <HAL_I2C_Init>:
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
{
8001084: b580 push {r7, lr}
8001086: b084 sub sp, #16
8001088: af00 add r7, sp, #0
800108a: 6078 str r0, [r7, #4]
uint32_t freqrange;
uint32_t pclk1;
/* Check the I2C handle allocation */
if (hi2c == NULL)
800108c: 687b ldr r3, [r7, #4]
800108e: 2b00 cmp r3, #0
8001090: d101 bne.n 8001096 <HAL_I2C_Init+0x12>
{
return HAL_ERROR;
8001092: 2301 movs r3, #1
8001094: e11f b.n 80012d6 <HAL_I2C_Init+0x252>
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
if (hi2c->State == HAL_I2C_STATE_RESET)
8001096: 687b ldr r3, [r7, #4]
8001098: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
800109c: b2db uxtb r3, r3
800109e: 2b00 cmp r3, #0
80010a0: d106 bne.n 80010b0 <HAL_I2C_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hi2c->Lock = HAL_UNLOCKED;
80010a2: 687b ldr r3, [r7, #4]
80010a4: 2200 movs r2, #0
80010a6: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Init the low level hardware : GPIO, CLOCK, NVIC */
hi2c->MspInitCallback(hi2c);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_I2C_MspInit(hi2c);
80010aa: 6878 ldr r0, [r7, #4]
80010ac: f7ff faf0 bl 8000690 <HAL_I2C_MspInit>
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
hi2c->State = HAL_I2C_STATE_BUSY;
80010b0: 687b ldr r3, [r7, #4]
80010b2: 2224 movs r2, #36 ; 0x24
80010b4: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
80010b8: 687b ldr r3, [r7, #4]
80010ba: 681b ldr r3, [r3, #0]
80010bc: 681a ldr r2, [r3, #0]
80010be: 687b ldr r3, [r7, #4]
80010c0: 681b ldr r3, [r3, #0]
80010c2: f022 0201 bic.w r2, r2, #1
80010c6: 601a str r2, [r3, #0]
/*Reset I2C*/
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
80010c8: 687b ldr r3, [r7, #4]
80010ca: 681b ldr r3, [r3, #0]
80010cc: 681a ldr r2, [r3, #0]
80010ce: 687b ldr r3, [r7, #4]
80010d0: 681b ldr r3, [r3, #0]
80010d2: f442 4200 orr.w r2, r2, #32768 ; 0x8000
80010d6: 601a str r2, [r3, #0]
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
80010d8: 687b ldr r3, [r7, #4]
80010da: 681b ldr r3, [r3, #0]
80010dc: 681a ldr r2, [r3, #0]
80010de: 687b ldr r3, [r7, #4]
80010e0: 681b ldr r3, [r3, #0]
80010e2: f422 4200 bic.w r2, r2, #32768 ; 0x8000
80010e6: 601a str r2, [r3, #0]
/* Get PCLK1 frequency */
pclk1 = HAL_RCC_GetPCLK1Freq();
80010e8: f002 faae bl 8003648 <HAL_RCC_GetPCLK1Freq>
80010ec: 60f8 str r0, [r7, #12]
/* Check the minimum allowed PCLK1 frequency */
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
80010ee: 687b ldr r3, [r7, #4]
80010f0: 685b ldr r3, [r3, #4]
80010f2: 4a7b ldr r2, [pc, #492] ; (80012e0 <HAL_I2C_Init+0x25c>)
80010f4: 4293 cmp r3, r2
80010f6: d807 bhi.n 8001108 <HAL_I2C_Init+0x84>
80010f8: 68fb ldr r3, [r7, #12]
80010fa: 4a7a ldr r2, [pc, #488] ; (80012e4 <HAL_I2C_Init+0x260>)
80010fc: 4293 cmp r3, r2
80010fe: bf94 ite ls
8001100: 2301 movls r3, #1
8001102: 2300 movhi r3, #0
8001104: b2db uxtb r3, r3
8001106: e006 b.n 8001116 <HAL_I2C_Init+0x92>
8001108: 68fb ldr r3, [r7, #12]
800110a: 4a77 ldr r2, [pc, #476] ; (80012e8 <HAL_I2C_Init+0x264>)
800110c: 4293 cmp r3, r2
800110e: bf94 ite ls
8001110: 2301 movls r3, #1
8001112: 2300 movhi r3, #0
8001114: b2db uxtb r3, r3
8001116: 2b00 cmp r3, #0
8001118: d001 beq.n 800111e <HAL_I2C_Init+0x9a>
{
return HAL_ERROR;
800111a: 2301 movs r3, #1
800111c: e0db b.n 80012d6 <HAL_I2C_Init+0x252>
}
/* Calculate frequency range */
freqrange = I2C_FREQRANGE(pclk1);
800111e: 68fb ldr r3, [r7, #12]
8001120: 4a72 ldr r2, [pc, #456] ; (80012ec <HAL_I2C_Init+0x268>)
8001122: fba2 2303 umull r2, r3, r2, r3
8001126: 0c9b lsrs r3, r3, #18
8001128: 60bb str r3, [r7, #8]
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
/* Configure I2Cx: Frequency range */
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
800112a: 687b ldr r3, [r7, #4]
800112c: 681b ldr r3, [r3, #0]
800112e: 685b ldr r3, [r3, #4]
8001130: f023 013f bic.w r1, r3, #63 ; 0x3f
8001134: 687b ldr r3, [r7, #4]
8001136: 681b ldr r3, [r3, #0]
8001138: 68ba ldr r2, [r7, #8]
800113a: 430a orrs r2, r1
800113c: 605a str r2, [r3, #4]
/*---------------------------- I2Cx TRISE Configuration --------------------*/
/* Configure I2Cx: Rise Time */
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
800113e: 687b ldr r3, [r7, #4]
8001140: 681b ldr r3, [r3, #0]
8001142: 6a1b ldr r3, [r3, #32]
8001144: f023 013f bic.w r1, r3, #63 ; 0x3f
8001148: 687b ldr r3, [r7, #4]
800114a: 685b ldr r3, [r3, #4]
800114c: 4a64 ldr r2, [pc, #400] ; (80012e0 <HAL_I2C_Init+0x25c>)
800114e: 4293 cmp r3, r2
8001150: d802 bhi.n 8001158 <HAL_I2C_Init+0xd4>
8001152: 68bb ldr r3, [r7, #8]
8001154: 3301 adds r3, #1
8001156: e009 b.n 800116c <HAL_I2C_Init+0xe8>
8001158: 68bb ldr r3, [r7, #8]
800115a: f44f 7296 mov.w r2, #300 ; 0x12c
800115e: fb02 f303 mul.w r3, r2, r3
8001162: 4a63 ldr r2, [pc, #396] ; (80012f0 <HAL_I2C_Init+0x26c>)
8001164: fba2 2303 umull r2, r3, r2, r3
8001168: 099b lsrs r3, r3, #6
800116a: 3301 adds r3, #1
800116c: 687a ldr r2, [r7, #4]
800116e: 6812 ldr r2, [r2, #0]
8001170: 430b orrs r3, r1
8001172: 6213 str r3, [r2, #32]
/*---------------------------- I2Cx CCR Configuration ----------------------*/
/* Configure I2Cx: Speed */
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
8001174: 687b ldr r3, [r7, #4]
8001176: 681b ldr r3, [r3, #0]
8001178: 69db ldr r3, [r3, #28]
800117a: f423 424f bic.w r2, r3, #52992 ; 0xcf00
800117e: f022 02ff bic.w r2, r2, #255 ; 0xff
8001182: 687b ldr r3, [r7, #4]
8001184: 685b ldr r3, [r3, #4]
8001186: 4956 ldr r1, [pc, #344] ; (80012e0 <HAL_I2C_Init+0x25c>)
8001188: 428b cmp r3, r1
800118a: d80d bhi.n 80011a8 <HAL_I2C_Init+0x124>
800118c: 68fb ldr r3, [r7, #12]
800118e: 1e59 subs r1, r3, #1
8001190: 687b ldr r3, [r7, #4]
8001192: 685b ldr r3, [r3, #4]
8001194: 005b lsls r3, r3, #1
8001196: fbb1 f3f3 udiv r3, r1, r3
800119a: 3301 adds r3, #1
800119c: f3c3 030b ubfx r3, r3, #0, #12
80011a0: 2b04 cmp r3, #4
80011a2: bf38 it cc
80011a4: 2304 movcc r3, #4
80011a6: e04f b.n 8001248 <HAL_I2C_Init+0x1c4>
80011a8: 687b ldr r3, [r7, #4]
80011aa: 689b ldr r3, [r3, #8]
80011ac: 2b00 cmp r3, #0
80011ae: d111 bne.n 80011d4 <HAL_I2C_Init+0x150>
80011b0: 68fb ldr r3, [r7, #12]
80011b2: 1e58 subs r0, r3, #1
80011b4: 687b ldr r3, [r7, #4]
80011b6: 6859 ldr r1, [r3, #4]
80011b8: 460b mov r3, r1
80011ba: 005b lsls r3, r3, #1
80011bc: 440b add r3, r1
80011be: fbb0 f3f3 udiv r3, r0, r3
80011c2: 3301 adds r3, #1
80011c4: f3c3 030b ubfx r3, r3, #0, #12
80011c8: 2b00 cmp r3, #0
80011ca: bf0c ite eq
80011cc: 2301 moveq r3, #1
80011ce: 2300 movne r3, #0
80011d0: b2db uxtb r3, r3
80011d2: e012 b.n 80011fa <HAL_I2C_Init+0x176>
80011d4: 68fb ldr r3, [r7, #12]
80011d6: 1e58 subs r0, r3, #1
80011d8: 687b ldr r3, [r7, #4]
80011da: 6859 ldr r1, [r3, #4]
80011dc: 460b mov r3, r1
80011de: 009b lsls r3, r3, #2
80011e0: 440b add r3, r1
80011e2: 0099 lsls r1, r3, #2
80011e4: 440b add r3, r1
80011e6: fbb0 f3f3 udiv r3, r0, r3
80011ea: 3301 adds r3, #1
80011ec: f3c3 030b ubfx r3, r3, #0, #12
80011f0: 2b00 cmp r3, #0
80011f2: bf0c ite eq
80011f4: 2301 moveq r3, #1
80011f6: 2300 movne r3, #0
80011f8: b2db uxtb r3, r3
80011fa: 2b00 cmp r3, #0
80011fc: d001 beq.n 8001202 <HAL_I2C_Init+0x17e>
80011fe: 2301 movs r3, #1
8001200: e022 b.n 8001248 <HAL_I2C_Init+0x1c4>
8001202: 687b ldr r3, [r7, #4]
8001204: 689b ldr r3, [r3, #8]
8001206: 2b00 cmp r3, #0
8001208: d10e bne.n 8001228 <HAL_I2C_Init+0x1a4>
800120a: 68fb ldr r3, [r7, #12]
800120c: 1e58 subs r0, r3, #1
800120e: 687b ldr r3, [r7, #4]
8001210: 6859 ldr r1, [r3, #4]
8001212: 460b mov r3, r1
8001214: 005b lsls r3, r3, #1
8001216: 440b add r3, r1
8001218: fbb0 f3f3 udiv r3, r0, r3
800121c: 3301 adds r3, #1
800121e: f3c3 030b ubfx r3, r3, #0, #12
8001222: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8001226: e00f b.n 8001248 <HAL_I2C_Init+0x1c4>
8001228: 68fb ldr r3, [r7, #12]
800122a: 1e58 subs r0, r3, #1
800122c: 687b ldr r3, [r7, #4]
800122e: 6859 ldr r1, [r3, #4]
8001230: 460b mov r3, r1
8001232: 009b lsls r3, r3, #2
8001234: 440b add r3, r1
8001236: 0099 lsls r1, r3, #2
8001238: 440b add r3, r1
800123a: fbb0 f3f3 udiv r3, r0, r3
800123e: 3301 adds r3, #1
8001240: f3c3 030b ubfx r3, r3, #0, #12
8001244: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8001248: 6879 ldr r1, [r7, #4]
800124a: 6809 ldr r1, [r1, #0]
800124c: 4313 orrs r3, r2
800124e: 61cb str r3, [r1, #28]
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
/* Configure I2Cx: Generalcall and NoStretch mode */
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
8001250: 687b ldr r3, [r7, #4]
8001252: 681b ldr r3, [r3, #0]
8001254: 681b ldr r3, [r3, #0]
8001256: f023 01c0 bic.w r1, r3, #192 ; 0xc0
800125a: 687b ldr r3, [r7, #4]
800125c: 69da ldr r2, [r3, #28]
800125e: 687b ldr r3, [r7, #4]
8001260: 6a1b ldr r3, [r3, #32]
8001262: 431a orrs r2, r3
8001264: 687b ldr r3, [r7, #4]
8001266: 681b ldr r3, [r3, #0]
8001268: 430a orrs r2, r1
800126a: 601a str r2, [r3, #0]
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
/* Configure I2Cx: Own Address1 and addressing mode */
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
800126c: 687b ldr r3, [r7, #4]
800126e: 681b ldr r3, [r3, #0]
8001270: 689b ldr r3, [r3, #8]
8001272: f423 4303 bic.w r3, r3, #33536 ; 0x8300
8001276: f023 03ff bic.w r3, r3, #255 ; 0xff
800127a: 687a ldr r2, [r7, #4]
800127c: 6911 ldr r1, [r2, #16]
800127e: 687a ldr r2, [r7, #4]
8001280: 68d2 ldr r2, [r2, #12]
8001282: 4311 orrs r1, r2
8001284: 687a ldr r2, [r7, #4]
8001286: 6812 ldr r2, [r2, #0]
8001288: 430b orrs r3, r1
800128a: 6093 str r3, [r2, #8]
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
/* Configure I2Cx: Dual mode and Own Address2 */
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
800128c: 687b ldr r3, [r7, #4]
800128e: 681b ldr r3, [r3, #0]
8001290: 68db ldr r3, [r3, #12]
8001292: f023 01ff bic.w r1, r3, #255 ; 0xff
8001296: 687b ldr r3, [r7, #4]
8001298: 695a ldr r2, [r3, #20]
800129a: 687b ldr r3, [r7, #4]
800129c: 699b ldr r3, [r3, #24]
800129e: 431a orrs r2, r3
80012a0: 687b ldr r3, [r7, #4]
80012a2: 681b ldr r3, [r3, #0]
80012a4: 430a orrs r2, r1
80012a6: 60da str r2, [r3, #12]
/* Enable the selected I2C peripheral */
__HAL_I2C_ENABLE(hi2c);
80012a8: 687b ldr r3, [r7, #4]
80012aa: 681b ldr r3, [r3, #0]
80012ac: 681a ldr r2, [r3, #0]
80012ae: 687b ldr r3, [r7, #4]
80012b0: 681b ldr r3, [r3, #0]
80012b2: f042 0201 orr.w r2, r2, #1
80012b6: 601a str r2, [r3, #0]
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
80012b8: 687b ldr r3, [r7, #4]
80012ba: 2200 movs r2, #0
80012bc: 641a str r2, [r3, #64] ; 0x40
hi2c->State = HAL_I2C_STATE_READY;
80012be: 687b ldr r3, [r7, #4]
80012c0: 2220 movs r2, #32
80012c2: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->PreviousState = I2C_STATE_NONE;
80012c6: 687b ldr r3, [r7, #4]
80012c8: 2200 movs r2, #0
80012ca: 631a str r2, [r3, #48] ; 0x30
hi2c->Mode = HAL_I2C_MODE_NONE;
80012cc: 687b ldr r3, [r7, #4]
80012ce: 2200 movs r2, #0
80012d0: f883 203e strb.w r2, [r3, #62] ; 0x3e
return HAL_OK;
80012d4: 2300 movs r3, #0
}
80012d6: 4618 mov r0, r3
80012d8: 3710 adds r7, #16
80012da: 46bd mov sp, r7
80012dc: bd80 pop {r7, pc}
80012de: bf00 nop
80012e0: 000186a0 .word 0x000186a0
80012e4: 001e847f .word 0x001e847f
80012e8: 003d08ff .word 0x003d08ff
80012ec: 431bde83 .word 0x431bde83
80012f0: 10624dd3 .word 0x10624dd3
080012f4 <HAL_I2C_Slave_Receive>:
* @param Size Amount of data to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
80012f4: b580 push {r7, lr}
80012f6: b08a sub sp, #40 ; 0x28
80012f8: af02 add r7, sp, #8
80012fa: 60f8 str r0, [r7, #12]
80012fc: 60b9 str r1, [r7, #8]
80012fe: 603b str r3, [r7, #0]
8001300: 4613 mov r3, r2
8001302: 80fb strh r3, [r7, #6]
/* Init tickstart for timeout management*/
uint32_t tickstart = HAL_GetTick();
8001304: f7ff fb36 bl 8000974 <HAL_GetTick>
8001308: 61f8 str r0, [r7, #28]
if (hi2c->State == HAL_I2C_STATE_READY)
800130a: 68fb ldr r3, [r7, #12]
800130c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8001310: b2db uxtb r3, r3
8001312: 2b20 cmp r3, #32
8001314: f040 80ee bne.w 80014f4 <HAL_I2C_Slave_Receive+0x200>
{
if ((pData == NULL) || (Size == (uint16_t)0))
8001318: 68bb ldr r3, [r7, #8]
800131a: 2b00 cmp r3, #0
800131c: d002 beq.n 8001324 <HAL_I2C_Slave_Receive+0x30>
800131e: 88fb ldrh r3, [r7, #6]
8001320: 2b00 cmp r3, #0
8001322: d101 bne.n 8001328 <HAL_I2C_Slave_Receive+0x34>
{
return HAL_ERROR;
8001324: 2301 movs r3, #1
8001326: e0e6 b.n 80014f6 <HAL_I2C_Slave_Receive+0x202>
}
/* Process Locked */
__HAL_LOCK(hi2c);
8001328: 68fb ldr r3, [r7, #12]
800132a: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
800132e: 2b01 cmp r3, #1
8001330: d101 bne.n 8001336 <HAL_I2C_Slave_Receive+0x42>
8001332: 2302 movs r3, #2
8001334: e0df b.n 80014f6 <HAL_I2C_Slave_Receive+0x202>
8001336: 68fb ldr r3, [r7, #12]
8001338: 2201 movs r2, #1
800133a: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Check if the I2C is already enabled */
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
800133e: 68fb ldr r3, [r7, #12]
8001340: 681b ldr r3, [r3, #0]
8001342: 681b ldr r3, [r3, #0]
8001344: f003 0301 and.w r3, r3, #1
8001348: 2b01 cmp r3, #1
800134a: d007 beq.n 800135c <HAL_I2C_Slave_Receive+0x68>
{
/* Enable I2C peripheral */
__HAL_I2C_ENABLE(hi2c);
800134c: 68fb ldr r3, [r7, #12]
800134e: 681b ldr r3, [r3, #0]
8001350: 681a ldr r2, [r3, #0]
8001352: 68fb ldr r3, [r7, #12]
8001354: 681b ldr r3, [r3, #0]
8001356: f042 0201 orr.w r2, r2, #1
800135a: 601a str r2, [r3, #0]
}
/* Disable Pos */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
800135c: 68fb ldr r3, [r7, #12]
800135e: 681b ldr r3, [r3, #0]
8001360: 681a ldr r2, [r3, #0]
8001362: 68fb ldr r3, [r7, #12]
8001364: 681b ldr r3, [r3, #0]
8001366: f422 6200 bic.w r2, r2, #2048 ; 0x800
800136a: 601a str r2, [r3, #0]
hi2c->State = HAL_I2C_STATE_BUSY_RX;
800136c: 68fb ldr r3, [r7, #12]
800136e: 2222 movs r2, #34 ; 0x22
8001370: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_SLAVE;
8001374: 68fb ldr r3, [r7, #12]
8001376: 2220 movs r2, #32
8001378: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
800137c: 68fb ldr r3, [r7, #12]
800137e: 2200 movs r2, #0
8001380: 641a str r2, [r3, #64] ; 0x40
/* Prepare transfer parameters */
hi2c->pBuffPtr = pData;
8001382: 68fb ldr r3, [r7, #12]
8001384: 68ba ldr r2, [r7, #8]
8001386: 625a str r2, [r3, #36] ; 0x24
hi2c->XferCount = Size;
8001388: 68fb ldr r3, [r7, #12]
800138a: 88fa ldrh r2, [r7, #6]
800138c: 855a strh r2, [r3, #42] ; 0x2a
hi2c->XferSize = hi2c->XferCount;
800138e: 68fb ldr r3, [r7, #12]
8001390: 8d5b ldrh r3, [r3, #42] ; 0x2a
8001392: b29a uxth r2, r3
8001394: 68fb ldr r3, [r7, #12]
8001396: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
8001398: 68fb ldr r3, [r7, #12]
800139a: 4a59 ldr r2, [pc, #356] ; (8001500 <HAL_I2C_Slave_Receive+0x20c>)
800139c: 62da str r2, [r3, #44] ; 0x2c
/* Enable Address Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
800139e: 68fb ldr r3, [r7, #12]
80013a0: 681b ldr r3, [r3, #0]
80013a2: 681a ldr r2, [r3, #0]
80013a4: 68fb ldr r3, [r7, #12]
80013a6: 681b ldr r3, [r3, #0]
80013a8: f442 6280 orr.w r2, r2, #1024 ; 0x400
80013ac: 601a str r2, [r3, #0]
/* Wait until ADDR flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
80013ae: 69fb ldr r3, [r7, #28]
80013b0: 9300 str r3, [sp, #0]
80013b2: 683b ldr r3, [r7, #0]
80013b4: 2200 movs r2, #0
80013b6: 4953 ldr r1, [pc, #332] ; (8001504 <HAL_I2C_Slave_Receive+0x210>)
80013b8: 68f8 ldr r0, [r7, #12]
80013ba: f000 f8a5 bl 8001508 <I2C_WaitOnFlagUntilTimeout>
80013be: 4603 mov r3, r0
80013c0: 2b00 cmp r3, #0
80013c2: d001 beq.n 80013c8 <HAL_I2C_Slave_Receive+0xd4>
{
return HAL_ERROR;
80013c4: 2301 movs r3, #1
80013c6: e096 b.n 80014f6 <HAL_I2C_Slave_Receive+0x202>
}
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
80013c8: 2300 movs r3, #0
80013ca: 61bb str r3, [r7, #24]
80013cc: 68fb ldr r3, [r7, #12]
80013ce: 681b ldr r3, [r3, #0]
80013d0: 695b ldr r3, [r3, #20]
80013d2: 61bb str r3, [r7, #24]
80013d4: 68fb ldr r3, [r7, #12]
80013d6: 681b ldr r3, [r3, #0]
80013d8: 699b ldr r3, [r3, #24]
80013da: 61bb str r3, [r7, #24]
80013dc: 69bb ldr r3, [r7, #24]
while (hi2c->XferSize > 0U)
80013de: e04e b.n 800147e <HAL_I2C_Slave_Receive+0x18a>
{
/* Wait until RXNE flag is set */
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
80013e0: 69fa ldr r2, [r7, #28]
80013e2: 6839 ldr r1, [r7, #0]
80013e4: 68f8 ldr r0, [r7, #12]
80013e6: f000 f923 bl 8001630 <I2C_WaitOnRXNEFlagUntilTimeout>
80013ea: 4603 mov r3, r0
80013ec: 2b00 cmp r3, #0
80013ee: d009 beq.n 8001404 <HAL_I2C_Slave_Receive+0x110>
{
/* Disable Address Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
80013f0: 68fb ldr r3, [r7, #12]
80013f2: 681b ldr r3, [r3, #0]
80013f4: 681a ldr r2, [r3, #0]
80013f6: 68fb ldr r3, [r7, #12]
80013f8: 681b ldr r3, [r3, #0]
80013fa: f422 6280 bic.w r2, r2, #1024 ; 0x400
80013fe: 601a str r2, [r3, #0]
return HAL_ERROR;
8001400: 2301 movs r3, #1
8001402: e078 b.n 80014f6 <HAL_I2C_Slave_Receive+0x202>
}
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
8001404: 68fb ldr r3, [r7, #12]
8001406: 681b ldr r3, [r3, #0]
8001408: 691a ldr r2, [r3, #16]
800140a: 68fb ldr r3, [r7, #12]
800140c: 6a5b ldr r3, [r3, #36] ; 0x24
800140e: b2d2 uxtb r2, r2
8001410: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
8001412: 68fb ldr r3, [r7, #12]
8001414: 6a5b ldr r3, [r3, #36] ; 0x24
8001416: 1c5a adds r2, r3, #1
8001418: 68fb ldr r3, [r7, #12]
800141a: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
800141c: 68fb ldr r3, [r7, #12]
800141e: 8d1b ldrh r3, [r3, #40] ; 0x28
8001420: 3b01 subs r3, #1
8001422: b29a uxth r2, r3
8001424: 68fb ldr r3, [r7, #12]
8001426: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
8001428: 68fb ldr r3, [r7, #12]
800142a: 8d5b ldrh r3, [r3, #42] ; 0x2a
800142c: b29b uxth r3, r3
800142e: 3b01 subs r3, #1
8001430: b29a uxth r2, r3
8001432: 68fb ldr r3, [r7, #12]
8001434: 855a strh r2, [r3, #42] ; 0x2a
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
8001436: 68fb ldr r3, [r7, #12]
8001438: 681b ldr r3, [r3, #0]
800143a: 695b ldr r3, [r3, #20]
800143c: f003 0304 and.w r3, r3, #4
8001440: 2b04 cmp r3, #4
8001442: d11c bne.n 800147e <HAL_I2C_Slave_Receive+0x18a>
8001444: 68fb ldr r3, [r7, #12]
8001446: 8d1b ldrh r3, [r3, #40] ; 0x28
8001448: 2b00 cmp r3, #0
800144a: d018 beq.n 800147e <HAL_I2C_Slave_Receive+0x18a>
{
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
800144c: 68fb ldr r3, [r7, #12]
800144e: 681b ldr r3, [r3, #0]
8001450: 691a ldr r2, [r3, #16]
8001452: 68fb ldr r3, [r7, #12]
8001454: 6a5b ldr r3, [r3, #36] ; 0x24
8001456: b2d2 uxtb r2, r2
8001458: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
800145a: 68fb ldr r3, [r7, #12]
800145c: 6a5b ldr r3, [r3, #36] ; 0x24
800145e: 1c5a adds r2, r3, #1
8001460: 68fb ldr r3, [r7, #12]
8001462: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
8001464: 68fb ldr r3, [r7, #12]
8001466: 8d1b ldrh r3, [r3, #40] ; 0x28
8001468: 3b01 subs r3, #1
800146a: b29a uxth r2, r3
800146c: 68fb ldr r3, [r7, #12]
800146e: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
8001470: 68fb ldr r3, [r7, #12]
8001472: 8d5b ldrh r3, [r3, #42] ; 0x2a
8001474: b29b uxth r3, r3
8001476: 3b01 subs r3, #1
8001478: b29a uxth r2, r3
800147a: 68fb ldr r3, [r7, #12]
800147c: 855a strh r2, [r3, #42] ; 0x2a
while (hi2c->XferSize > 0U)
800147e: 68fb ldr r3, [r7, #12]
8001480: 8d1b ldrh r3, [r3, #40] ; 0x28
8001482: 2b00 cmp r3, #0
8001484: d1ac bne.n 80013e0 <HAL_I2C_Slave_Receive+0xec>
}
}
/* Wait until STOP flag is set */
if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
8001486: 69fa ldr r2, [r7, #28]
8001488: 6839 ldr r1, [r7, #0]
800148a: 68f8 ldr r0, [r7, #12]
800148c: f000 f893 bl 80015b6 <I2C_WaitOnSTOPFlagUntilTimeout>
8001490: 4603 mov r3, r0
8001492: 2b00 cmp r3, #0
8001494: d009 beq.n 80014aa <HAL_I2C_Slave_Receive+0x1b6>
{
/* Disable Address Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
8001496: 68fb ldr r3, [r7, #12]
8001498: 681b ldr r3, [r3, #0]
800149a: 681a ldr r2, [r3, #0]
800149c: 68fb ldr r3, [r7, #12]
800149e: 681b ldr r3, [r3, #0]
80014a0: f422 6280 bic.w r2, r2, #1024 ; 0x400
80014a4: 601a str r2, [r3, #0]
return HAL_ERROR;
80014a6: 2301 movs r3, #1
80014a8: e025 b.n 80014f6 <HAL_I2C_Slave_Receive+0x202>
}
/* Clear STOP flag */
__HAL_I2C_CLEAR_STOPFLAG(hi2c);
80014aa: 2300 movs r3, #0
80014ac: 617b str r3, [r7, #20]
80014ae: 68fb ldr r3, [r7, #12]
80014b0: 681b ldr r3, [r3, #0]
80014b2: 695b ldr r3, [r3, #20]
80014b4: 617b str r3, [r7, #20]
80014b6: 68fb ldr r3, [r7, #12]
80014b8: 681b ldr r3, [r3, #0]
80014ba: 681a ldr r2, [r3, #0]
80014bc: 68fb ldr r3, [r7, #12]
80014be: 681b ldr r3, [r3, #0]
80014c0: f042 0201 orr.w r2, r2, #1
80014c4: 601a str r2, [r3, #0]
80014c6: 697b ldr r3, [r7, #20]
/* Disable Address Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
80014c8: 68fb ldr r3, [r7, #12]
80014ca: 681b ldr r3, [r3, #0]
80014cc: 681a ldr r2, [r3, #0]
80014ce: 68fb ldr r3, [r7, #12]
80014d0: 681b ldr r3, [r3, #0]
80014d2: f422 6280 bic.w r2, r2, #1024 ; 0x400
80014d6: 601a str r2, [r3, #0]
hi2c->State = HAL_I2C_STATE_READY;
80014d8: 68fb ldr r3, [r7, #12]
80014da: 2220 movs r2, #32
80014dc: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
80014e0: 68fb ldr r3, [r7, #12]
80014e2: 2200 movs r2, #0
80014e4: f883 203e strb.w r2, [r3, #62] ; 0x3e
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
80014e8: 68fb ldr r3, [r7, #12]
80014ea: 2200 movs r2, #0
80014ec: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_OK;
80014f0: 2300 movs r3, #0
80014f2: e000 b.n 80014f6 <HAL_I2C_Slave_Receive+0x202>
}
else
{
return HAL_BUSY;
80014f4: 2302 movs r3, #2
}
}
80014f6: 4618 mov r0, r3
80014f8: 3720 adds r7, #32
80014fa: 46bd mov sp, r7
80014fc: bd80 pop {r7, pc}
80014fe: bf00 nop
8001500: ffff0000 .word 0xffff0000
8001504: 00010002 .word 0x00010002
08001508 <I2C_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
{
8001508: b580 push {r7, lr}
800150a: b084 sub sp, #16
800150c: af00 add r7, sp, #0
800150e: 60f8 str r0, [r7, #12]
8001510: 60b9 str r1, [r7, #8]
8001512: 603b str r3, [r7, #0]
8001514: 4613 mov r3, r2
8001516: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
8001518: e025 b.n 8001566 <I2C_WaitOnFlagUntilTimeout+0x5e>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
800151a: 683b ldr r3, [r7, #0]
800151c: f1b3 3fff cmp.w r3, #4294967295
8001520: d021 beq.n 8001566 <I2C_WaitOnFlagUntilTimeout+0x5e>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8001522: f7ff fa27 bl 8000974 <HAL_GetTick>
8001526: 4602 mov r2, r0
8001528: 69bb ldr r3, [r7, #24]
800152a: 1ad3 subs r3, r2, r3
800152c: 683a ldr r2, [r7, #0]
800152e: 429a cmp r2, r3
8001530: d302 bcc.n 8001538 <I2C_WaitOnFlagUntilTimeout+0x30>
8001532: 683b ldr r3, [r7, #0]
8001534: 2b00 cmp r3, #0
8001536: d116 bne.n 8001566 <I2C_WaitOnFlagUntilTimeout+0x5e>
{
hi2c->PreviousState = I2C_STATE_NONE;
8001538: 68fb ldr r3, [r7, #12]
800153a: 2200 movs r2, #0
800153c: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
800153e: 68fb ldr r3, [r7, #12]
8001540: 2220 movs r2, #32
8001542: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8001546: 68fb ldr r3, [r7, #12]
8001548: 2200 movs r2, #0
800154a: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
800154e: 68fb ldr r3, [r7, #12]
8001550: 6c1b ldr r3, [r3, #64] ; 0x40
8001552: f043 0220 orr.w r2, r3, #32
8001556: 68fb ldr r3, [r7, #12]
8001558: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
800155a: 68fb ldr r3, [r7, #12]
800155c: 2200 movs r2, #0
800155e: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8001562: 2301 movs r3, #1
8001564: e023 b.n 80015ae <I2C_WaitOnFlagUntilTimeout+0xa6>
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
8001566: 68bb ldr r3, [r7, #8]
8001568: 0c1b lsrs r3, r3, #16
800156a: b2db uxtb r3, r3
800156c: 2b01 cmp r3, #1
800156e: d10d bne.n 800158c <I2C_WaitOnFlagUntilTimeout+0x84>
8001570: 68fb ldr r3, [r7, #12]
8001572: 681b ldr r3, [r3, #0]
8001574: 695b ldr r3, [r3, #20]
8001576: 43da mvns r2, r3
8001578: 68bb ldr r3, [r7, #8]
800157a: 4013 ands r3, r2
800157c: b29b uxth r3, r3
800157e: 2b00 cmp r3, #0
8001580: bf0c ite eq
8001582: 2301 moveq r3, #1
8001584: 2300 movne r3, #0
8001586: b2db uxtb r3, r3
8001588: 461a mov r2, r3
800158a: e00c b.n 80015a6 <I2C_WaitOnFlagUntilTimeout+0x9e>
800158c: 68fb ldr r3, [r7, #12]
800158e: 681b ldr r3, [r3, #0]
8001590: 699b ldr r3, [r3, #24]
8001592: 43da mvns r2, r3
8001594: 68bb ldr r3, [r7, #8]
8001596: 4013 ands r3, r2
8001598: b29b uxth r3, r3
800159a: 2b00 cmp r3, #0
800159c: bf0c ite eq
800159e: 2301 moveq r3, #1
80015a0: 2300 movne r3, #0
80015a2: b2db uxtb r3, r3
80015a4: 461a mov r2, r3
80015a6: 79fb ldrb r3, [r7, #7]
80015a8: 429a cmp r2, r3
80015aa: d0b6 beq.n 800151a <I2C_WaitOnFlagUntilTimeout+0x12>
}
}
}
return HAL_OK;
80015ac: 2300 movs r3, #0
}
80015ae: 4618 mov r0, r3
80015b0: 3710 adds r7, #16
80015b2: 46bd mov sp, r7
80015b4: bd80 pop {r7, pc}
080015b6 <I2C_WaitOnSTOPFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
{
80015b6: b580 push {r7, lr}
80015b8: b084 sub sp, #16
80015ba: af00 add r7, sp, #0
80015bc: 60f8 str r0, [r7, #12]
80015be: 60b9 str r1, [r7, #8]
80015c0: 607a str r2, [r7, #4]
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
80015c2: e029 b.n 8001618 <I2C_WaitOnSTOPFlagUntilTimeout+0x62>
{
/* Check if a NACK is detected */
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
80015c4: 68f8 ldr r0, [r7, #12]
80015c6: f000 f889 bl 80016dc <I2C_IsAcknowledgeFailed>
80015ca: 4603 mov r3, r0
80015cc: 2b00 cmp r3, #0
80015ce: d001 beq.n 80015d4 <I2C_WaitOnSTOPFlagUntilTimeout+0x1e>
{
return HAL_ERROR;
80015d0: 2301 movs r3, #1
80015d2: e029 b.n 8001628 <I2C_WaitOnSTOPFlagUntilTimeout+0x72>
}
/* Check for the Timeout */
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
80015d4: f7ff f9ce bl 8000974 <HAL_GetTick>
80015d8: 4602 mov r2, r0
80015da: 687b ldr r3, [r7, #4]
80015dc: 1ad3 subs r3, r2, r3
80015de: 68ba ldr r2, [r7, #8]
80015e0: 429a cmp r2, r3
80015e2: d302 bcc.n 80015ea <I2C_WaitOnSTOPFlagUntilTimeout+0x34>
80015e4: 68bb ldr r3, [r7, #8]
80015e6: 2b00 cmp r3, #0
80015e8: d116 bne.n 8001618 <I2C_WaitOnSTOPFlagUntilTimeout+0x62>
{
hi2c->PreviousState = I2C_STATE_NONE;
80015ea: 68fb ldr r3, [r7, #12]
80015ec: 2200 movs r2, #0
80015ee: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
80015f0: 68fb ldr r3, [r7, #12]
80015f2: 2220 movs r2, #32
80015f4: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
80015f8: 68fb ldr r3, [r7, #12]
80015fa: 2200 movs r2, #0
80015fc: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
8001600: 68fb ldr r3, [r7, #12]
8001602: 6c1b ldr r3, [r3, #64] ; 0x40
8001604: f043 0220 orr.w r2, r3, #32
8001608: 68fb ldr r3, [r7, #12]
800160a: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
800160c: 68fb ldr r3, [r7, #12]
800160e: 2200 movs r2, #0
8001610: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8001614: 2301 movs r3, #1
8001616: e007 b.n 8001628 <I2C_WaitOnSTOPFlagUntilTimeout+0x72>
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
8001618: 68fb ldr r3, [r7, #12]
800161a: 681b ldr r3, [r3, #0]
800161c: 695b ldr r3, [r3, #20]
800161e: f003 0310 and.w r3, r3, #16
8001622: 2b10 cmp r3, #16
8001624: d1ce bne.n 80015c4 <I2C_WaitOnSTOPFlagUntilTimeout+0xe>
}
}
return HAL_OK;
8001626: 2300 movs r3, #0
}
8001628: 4618 mov r0, r3
800162a: 3710 adds r7, #16
800162c: 46bd mov sp, r7
800162e: bd80 pop {r7, pc}
08001630 <I2C_WaitOnRXNEFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
{
8001630: b580 push {r7, lr}
8001632: b084 sub sp, #16
8001634: af00 add r7, sp, #0
8001636: 60f8 str r0, [r7, #12]
8001638: 60b9 str r1, [r7, #8]
800163a: 607a str r2, [r7, #4]
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
800163c: e042 b.n 80016c4 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
{
/* Check if a STOPF is detected */
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
800163e: 68fb ldr r3, [r7, #12]
8001640: 681b ldr r3, [r3, #0]
8001642: 695b ldr r3, [r3, #20]
8001644: f003 0310 and.w r3, r3, #16
8001648: 2b10 cmp r3, #16
800164a: d119 bne.n 8001680 <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
{
/* Clear STOP Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
800164c: 68fb ldr r3, [r7, #12]
800164e: 681b ldr r3, [r3, #0]
8001650: f06f 0210 mvn.w r2, #16
8001654: 615a str r2, [r3, #20]
hi2c->PreviousState = I2C_STATE_NONE;
8001656: 68fb ldr r3, [r7, #12]
8001658: 2200 movs r2, #0
800165a: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
800165c: 68fb ldr r3, [r7, #12]
800165e: 2220 movs r2, #32
8001660: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8001664: 68fb ldr r3, [r7, #12]
8001666: 2200 movs r2, #0
8001668: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
800166c: 68fb ldr r3, [r7, #12]
800166e: 6c1a ldr r2, [r3, #64] ; 0x40
8001670: 68fb ldr r3, [r7, #12]
8001672: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8001674: 68fb ldr r3, [r7, #12]
8001676: 2200 movs r2, #0
8001678: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
800167c: 2301 movs r3, #1
800167e: e029 b.n 80016d4 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
}
/* Check for the Timeout */
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8001680: f7ff f978 bl 8000974 <HAL_GetTick>
8001684: 4602 mov r2, r0
8001686: 687b ldr r3, [r7, #4]
8001688: 1ad3 subs r3, r2, r3
800168a: 68ba ldr r2, [r7, #8]
800168c: 429a cmp r2, r3
800168e: d302 bcc.n 8001696 <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
8001690: 68bb ldr r3, [r7, #8]
8001692: 2b00 cmp r3, #0
8001694: d116 bne.n 80016c4 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
{
hi2c->PreviousState = I2C_STATE_NONE;
8001696: 68fb ldr r3, [r7, #12]
8001698: 2200 movs r2, #0
800169a: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
800169c: 68fb ldr r3, [r7, #12]
800169e: 2220 movs r2, #32
80016a0: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
80016a4: 68fb ldr r3, [r7, #12]
80016a6: 2200 movs r2, #0
80016a8: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
80016ac: 68fb ldr r3, [r7, #12]
80016ae: 6c1b ldr r3, [r3, #64] ; 0x40
80016b0: f043 0220 orr.w r2, r3, #32
80016b4: 68fb ldr r3, [r7, #12]
80016b6: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
80016b8: 68fb ldr r3, [r7, #12]
80016ba: 2200 movs r2, #0
80016bc: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
80016c0: 2301 movs r3, #1
80016c2: e007 b.n 80016d4 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
80016c4: 68fb ldr r3, [r7, #12]
80016c6: 681b ldr r3, [r3, #0]
80016c8: 695b ldr r3, [r3, #20]
80016ca: f003 0340 and.w r3, r3, #64 ; 0x40
80016ce: 2b40 cmp r3, #64 ; 0x40
80016d0: d1b5 bne.n 800163e <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
}
}
return HAL_OK;
80016d2: 2300 movs r3, #0
}
80016d4: 4618 mov r0, r3
80016d6: 3710 adds r7, #16
80016d8: 46bd mov sp, r7
80016da: bd80 pop {r7, pc}
080016dc <I2C_IsAcknowledgeFailed>:
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
{
80016dc: b480 push {r7}
80016de: b083 sub sp, #12
80016e0: af00 add r7, sp, #0
80016e2: 6078 str r0, [r7, #4]
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
80016e4: 687b ldr r3, [r7, #4]
80016e6: 681b ldr r3, [r3, #0]
80016e8: 695b ldr r3, [r3, #20]
80016ea: f403 6380 and.w r3, r3, #1024 ; 0x400
80016ee: f5b3 6f80 cmp.w r3, #1024 ; 0x400
80016f2: d11b bne.n 800172c <I2C_IsAcknowledgeFailed+0x50>
{
/* Clear NACKF Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
80016f4: 687b ldr r3, [r7, #4]
80016f6: 681b ldr r3, [r3, #0]
80016f8: f46f 6280 mvn.w r2, #1024 ; 0x400
80016fc: 615a str r2, [r3, #20]
hi2c->PreviousState = I2C_STATE_NONE;
80016fe: 687b ldr r3, [r7, #4]
8001700: 2200 movs r2, #0
8001702: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
8001704: 687b ldr r3, [r7, #4]
8001706: 2220 movs r2, #32
8001708: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
800170c: 687b ldr r3, [r7, #4]
800170e: 2200 movs r2, #0
8001710: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
8001714: 687b ldr r3, [r7, #4]
8001716: 6c1b ldr r3, [r3, #64] ; 0x40
8001718: f043 0204 orr.w r2, r3, #4
800171c: 687b ldr r3, [r7, #4]
800171e: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8001720: 687b ldr r3, [r7, #4]
8001722: 2200 movs r2, #0
8001724: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8001728: 2301 movs r3, #1
800172a: e000 b.n 800172e <I2C_IsAcknowledgeFailed+0x52>
}
return HAL_OK;
800172c: 2300 movs r3, #0
}
800172e: 4618 mov r0, r3
8001730: 370c adds r7, #12
8001732: 46bd mov sp, r7
8001734: bc80 pop {r7}
8001736: 4770 bx lr
08001738 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8001738: b5f0 push {r4, r5, r6, r7, lr}
800173a: b08b sub sp, #44 ; 0x2c
800173c: af06 add r7, sp, #24
800173e: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx;
#endif /* defined (USB_OTG_FS) */
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8001740: 687b ldr r3, [r7, #4]
8001742: 2b00 cmp r3, #0
8001744: d101 bne.n 800174a <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8001746: 2301 movs r3, #1
8001748: e0fd b.n 8001946 <HAL_PCD_Init+0x20e>
#if defined (USB_OTG_FS)
USBx = hpcd->Instance;
#endif /* defined (USB_OTG_FS) */
if (hpcd->State == HAL_PCD_STATE_RESET)
800174a: 687b ldr r3, [r7, #4]
800174c: f893 32a9 ldrb.w r3, [r3, #681] ; 0x2a9
8001750: b2db uxtb r3, r3
8001752: 2b00 cmp r3, #0
8001754: d106 bne.n 8001764 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8001756: 687b ldr r3, [r7, #4]
8001758: 2200 movs r2, #0
800175a: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
800175e: 6878 ldr r0, [r7, #4]
8001760: f008 fc34 bl 8009fcc <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8001764: 687b ldr r3, [r7, #4]
8001766: 2203 movs r2, #3
8001768: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
hpcd->Init.dma_enable = 0U;
}
#endif /* defined (USB_OTG_FS) */
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
800176c: 687b ldr r3, [r7, #4]
800176e: 681b ldr r3, [r3, #0]
8001770: 4618 mov r0, r3
8001772: f003 ff1f bl 80055b4 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8001776: 687b ldr r3, [r7, #4]
8001778: 681b ldr r3, [r3, #0]
800177a: 603b str r3, [r7, #0]
800177c: 687e ldr r6, [r7, #4]
800177e: 466d mov r5, sp
8001780: f106 0410 add.w r4, r6, #16
8001784: cc0f ldmia r4!, {r0, r1, r2, r3}
8001786: c50f stmia r5!, {r0, r1, r2, r3}
8001788: 6823 ldr r3, [r4, #0]
800178a: 602b str r3, [r5, #0]
800178c: 1d33 adds r3, r6, #4
800178e: cb0e ldmia r3, {r1, r2, r3}
8001790: 6838 ldr r0, [r7, #0]
8001792: f003 fee9 bl 8005568 <USB_CoreInit>
8001796: 4603 mov r3, r0
8001798: 2b00 cmp r3, #0
800179a: d005 beq.n 80017a8 <HAL_PCD_Init+0x70>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800179c: 687b ldr r3, [r7, #4]
800179e: 2202 movs r2, #2
80017a0: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
return HAL_ERROR;
80017a4: 2301 movs r3, #1
80017a6: e0ce b.n 8001946 <HAL_PCD_Init+0x20e>
}
/* Force Device Mode*/
(void)USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE);
80017a8: 687b ldr r3, [r7, #4]
80017aa: 681b ldr r3, [r3, #0]
80017ac: 2100 movs r1, #0
80017ae: 4618 mov r0, r3
80017b0: f003 ff1a bl 80055e8 <USB_SetCurrentMode>
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80017b4: 2300 movs r3, #0
80017b6: 73fb strb r3, [r7, #15]
80017b8: e04c b.n 8001854 <HAL_PCD_Init+0x11c>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
80017ba: 7bfb ldrb r3, [r7, #15]
80017bc: 6879 ldr r1, [r7, #4]
80017be: 1c5a adds r2, r3, #1
80017c0: 4613 mov r3, r2
80017c2: 009b lsls r3, r3, #2
80017c4: 4413 add r3, r2
80017c6: 00db lsls r3, r3, #3
80017c8: 440b add r3, r1
80017ca: 3301 adds r3, #1
80017cc: 2201 movs r2, #1
80017ce: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
80017d0: 7bfb ldrb r3, [r7, #15]
80017d2: 6879 ldr r1, [r7, #4]
80017d4: 1c5a adds r2, r3, #1
80017d6: 4613 mov r3, r2
80017d8: 009b lsls r3, r3, #2
80017da: 4413 add r3, r2
80017dc: 00db lsls r3, r3, #3
80017de: 440b add r3, r1
80017e0: 7bfa ldrb r2, [r7, #15]
80017e2: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].tx_fifo_num = i;
80017e4: 7bfa ldrb r2, [r7, #15]
80017e6: 7bfb ldrb r3, [r7, #15]
80017e8: b298 uxth r0, r3
80017ea: 6879 ldr r1, [r7, #4]
80017ec: 4613 mov r3, r2
80017ee: 009b lsls r3, r3, #2
80017f0: 4413 add r3, r2
80017f2: 00db lsls r3, r3, #3
80017f4: 440b add r3, r1
80017f6: 3336 adds r3, #54 ; 0x36
80017f8: 4602 mov r2, r0
80017fa: 801a strh r2, [r3, #0]
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
80017fc: 7bfb ldrb r3, [r7, #15]
80017fe: 6879 ldr r1, [r7, #4]
8001800: 1c5a adds r2, r3, #1
8001802: 4613 mov r3, r2
8001804: 009b lsls r3, r3, #2
8001806: 4413 add r3, r2
8001808: 00db lsls r3, r3, #3
800180a: 440b add r3, r1
800180c: 3303 adds r3, #3
800180e: 2200 movs r2, #0
8001810: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8001812: 7bfa ldrb r2, [r7, #15]
8001814: 6879 ldr r1, [r7, #4]
8001816: 4613 mov r3, r2
8001818: 009b lsls r3, r3, #2
800181a: 4413 add r3, r2
800181c: 00db lsls r3, r3, #3
800181e: 440b add r3, r1
8001820: 3338 adds r3, #56 ; 0x38
8001822: 2200 movs r2, #0
8001824: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8001826: 7bfa ldrb r2, [r7, #15]
8001828: 6879 ldr r1, [r7, #4]
800182a: 4613 mov r3, r2
800182c: 009b lsls r3, r3, #2
800182e: 4413 add r3, r2
8001830: 00db lsls r3, r3, #3
8001832: 440b add r3, r1
8001834: 333c adds r3, #60 ; 0x3c
8001836: 2200 movs r2, #0
8001838: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
800183a: 7bfa ldrb r2, [r7, #15]
800183c: 6879 ldr r1, [r7, #4]
800183e: 4613 mov r3, r2
8001840: 009b lsls r3, r3, #2
8001842: 4413 add r3, r2
8001844: 00db lsls r3, r3, #3
8001846: 440b add r3, r1
8001848: 3340 adds r3, #64 ; 0x40
800184a: 2200 movs r2, #0
800184c: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800184e: 7bfb ldrb r3, [r7, #15]
8001850: 3301 adds r3, #1
8001852: 73fb strb r3, [r7, #15]
8001854: 7bfa ldrb r2, [r7, #15]
8001856: 687b ldr r3, [r7, #4]
8001858: 685b ldr r3, [r3, #4]
800185a: 429a cmp r2, r3
800185c: d3ad bcc.n 80017ba <HAL_PCD_Init+0x82>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800185e: 2300 movs r3, #0
8001860: 73fb strb r3, [r7, #15]
8001862: e044 b.n 80018ee <HAL_PCD_Init+0x1b6>
{
hpcd->OUT_ep[i].is_in = 0U;
8001864: 7bfa ldrb r2, [r7, #15]
8001866: 6879 ldr r1, [r7, #4]
8001868: 4613 mov r3, r2
800186a: 009b lsls r3, r3, #2
800186c: 4413 add r3, r2
800186e: 00db lsls r3, r3, #3
8001870: 440b add r3, r1
8001872: f203 1369 addw r3, r3, #361 ; 0x169
8001876: 2200 movs r2, #0
8001878: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
800187a: 7bfa ldrb r2, [r7, #15]
800187c: 6879 ldr r1, [r7, #4]
800187e: 4613 mov r3, r2
8001880: 009b lsls r3, r3, #2
8001882: 4413 add r3, r2
8001884: 00db lsls r3, r3, #3
8001886: 440b add r3, r1
8001888: f503 73b4 add.w r3, r3, #360 ; 0x168
800188c: 7bfa ldrb r2, [r7, #15]
800188e: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8001890: 7bfa ldrb r2, [r7, #15]
8001892: 6879 ldr r1, [r7, #4]
8001894: 4613 mov r3, r2
8001896: 009b lsls r3, r3, #2
8001898: 4413 add r3, r2
800189a: 00db lsls r3, r3, #3
800189c: 440b add r3, r1
800189e: f203 136b addw r3, r3, #363 ; 0x16b
80018a2: 2200 movs r2, #0
80018a4: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
80018a6: 7bfa ldrb r2, [r7, #15]
80018a8: 6879 ldr r1, [r7, #4]
80018aa: 4613 mov r3, r2
80018ac: 009b lsls r3, r3, #2
80018ae: 4413 add r3, r2
80018b0: 00db lsls r3, r3, #3
80018b2: 440b add r3, r1
80018b4: f503 73bc add.w r3, r3, #376 ; 0x178
80018b8: 2200 movs r2, #0
80018ba: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
80018bc: 7bfa ldrb r2, [r7, #15]
80018be: 6879 ldr r1, [r7, #4]
80018c0: 4613 mov r3, r2
80018c2: 009b lsls r3, r3, #2
80018c4: 4413 add r3, r2
80018c6: 00db lsls r3, r3, #3
80018c8: 440b add r3, r1
80018ca: f503 73be add.w r3, r3, #380 ; 0x17c
80018ce: 2200 movs r2, #0
80018d0: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
80018d2: 7bfa ldrb r2, [r7, #15]
80018d4: 6879 ldr r1, [r7, #4]
80018d6: 4613 mov r3, r2
80018d8: 009b lsls r3, r3, #2
80018da: 4413 add r3, r2
80018dc: 00db lsls r3, r3, #3
80018de: 440b add r3, r1
80018e0: f503 73c0 add.w r3, r3, #384 ; 0x180
80018e4: 2200 movs r2, #0
80018e6: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80018e8: 7bfb ldrb r3, [r7, #15]
80018ea: 3301 adds r3, #1
80018ec: 73fb strb r3, [r7, #15]
80018ee: 7bfa ldrb r2, [r7, #15]
80018f0: 687b ldr r3, [r7, #4]
80018f2: 685b ldr r3, [r3, #4]
80018f4: 429a cmp r2, r3
80018f6: d3b5 bcc.n 8001864 <HAL_PCD_Init+0x12c>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80018f8: 687b ldr r3, [r7, #4]
80018fa: 681b ldr r3, [r3, #0]
80018fc: 603b str r3, [r7, #0]
80018fe: 687e ldr r6, [r7, #4]
8001900: 466d mov r5, sp
8001902: f106 0410 add.w r4, r6, #16
8001906: cc0f ldmia r4!, {r0, r1, r2, r3}
8001908: c50f stmia r5!, {r0, r1, r2, r3}
800190a: 6823 ldr r3, [r4, #0]
800190c: 602b str r3, [r5, #0]
800190e: 1d33 adds r3, r6, #4
8001910: cb0e ldmia r3, {r1, r2, r3}
8001912: 6838 ldr r0, [r7, #0]
8001914: f003 fe74 bl 8005600 <USB_DevInit>
8001918: 4603 mov r3, r0
800191a: 2b00 cmp r3, #0
800191c: d005 beq.n 800192a <HAL_PCD_Init+0x1f2>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800191e: 687b ldr r3, [r7, #4]
8001920: 2202 movs r2, #2
8001922: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
return HAL_ERROR;
8001926: 2301 movs r3, #1
8001928: e00d b.n 8001946 <HAL_PCD_Init+0x20e>
}
hpcd->USB_Address = 0U;
800192a: 687b ldr r3, [r7, #4]
800192c: 2200 movs r2, #0
800192e: f883 2024 strb.w r2, [r3, #36] ; 0x24
hpcd->State = HAL_PCD_STATE_READY;
8001932: 687b ldr r3, [r7, #4]
8001934: 2201 movs r2, #1
8001936: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
(void)USB_DevDisconnect(hpcd->Instance);
800193a: 687b ldr r3, [r7, #4]
800193c: 681b ldr r3, [r3, #0]
800193e: 4618 mov r0, r3
8001940: f005 fe24 bl 800758c <USB_DevDisconnect>
return HAL_OK;
8001944: 2300 movs r3, #0
}
8001946: 4618 mov r0, r3
8001948: 3714 adds r7, #20
800194a: 46bd mov sp, r7
800194c: bdf0 pop {r4, r5, r6, r7, pc}
0800194e <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
800194e: b580 push {r7, lr}
8001950: b082 sub sp, #8
8001952: af00 add r7, sp, #0
8001954: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8001956: 687b ldr r3, [r7, #4]
8001958: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
800195c: 2b01 cmp r3, #1
800195e: d101 bne.n 8001964 <HAL_PCD_Start+0x16>
8001960: 2302 movs r3, #2
8001962: e016 b.n 8001992 <HAL_PCD_Start+0x44>
8001964: 687b ldr r3, [r7, #4]
8001966: 2201 movs r2, #1
8001968: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
__HAL_PCD_ENABLE(hpcd);
800196c: 687b ldr r3, [r7, #4]
800196e: 681b ldr r3, [r3, #0]
8001970: 4618 mov r0, r3
8001972: f003 fe09 bl 8005588 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8001976: 2101 movs r1, #1
8001978: 6878 ldr r0, [r7, #4]
800197a: f008 fdb0 bl 800a4de <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
800197e: 687b ldr r3, [r7, #4]
8001980: 681b ldr r3, [r3, #0]
8001982: 4618 mov r0, r3
8001984: f005 fdf8 bl 8007578 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8001988: 687b ldr r3, [r7, #4]
800198a: 2200 movs r2, #0
800198c: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001990: 2300 movs r3, #0
}
8001992: 4618 mov r0, r3
8001994: 3708 adds r7, #8
8001996: 46bd mov sp, r7
8001998: bd80 pop {r7, pc}
0800199a <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
800199a: b580 push {r7, lr}
800199c: b088 sub sp, #32
800199e: af00 add r7, sp, #0
80019a0: 6078 str r0, [r7, #4]
uint16_t store_ep[8];
uint8_t i;
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
80019a2: 687b ldr r3, [r7, #4]
80019a4: 681b ldr r3, [r3, #0]
80019a6: 4618 mov r0, r3
80019a8: f005 fdfa bl 80075a0 <USB_ReadInterrupts>
80019ac: 4603 mov r3, r0
80019ae: f403 4300 and.w r3, r3, #32768 ; 0x8000
80019b2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
80019b6: d102 bne.n 80019be <HAL_PCD_IRQHandler+0x24>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
80019b8: 6878 ldr r0, [r7, #4]
80019ba: f000 fb8e bl 80020da <PCD_EP_ISR_Handler>
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET))
80019be: 687b ldr r3, [r7, #4]
80019c0: 681b ldr r3, [r3, #0]
80019c2: 4618 mov r0, r3
80019c4: f005 fdec bl 80075a0 <USB_ReadInterrupts>
80019c8: 4603 mov r3, r0
80019ca: f403 6380 and.w r3, r3, #1024 ; 0x400
80019ce: f5b3 6f80 cmp.w r3, #1024 ; 0x400
80019d2: d112 bne.n 80019fa <HAL_PCD_IRQHandler+0x60>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
80019d4: 687b ldr r3, [r7, #4]
80019d6: 681b ldr r3, [r3, #0]
80019d8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80019dc: b29a uxth r2, r3
80019de: 687b ldr r3, [r7, #4]
80019e0: 681b ldr r3, [r3, #0]
80019e2: f422 6280 bic.w r2, r2, #1024 ; 0x400
80019e6: b292 uxth r2, r2
80019e8: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
80019ec: 6878 ldr r0, [r7, #4]
80019ee: f008 fb68 bl 800a0c2 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
80019f2: 2100 movs r1, #0
80019f4: 6878 ldr r0, [r7, #4]
80019f6: f000 f925 bl 8001c44 <HAL_PCD_SetAddress>
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR))
80019fa: 687b ldr r3, [r7, #4]
80019fc: 681b ldr r3, [r3, #0]
80019fe: 4618 mov r0, r3
8001a00: f005 fdce bl 80075a0 <USB_ReadInterrupts>
8001a04: 4603 mov r3, r0
8001a06: f403 4380 and.w r3, r3, #16384 ; 0x4000
8001a0a: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
8001a0e: d10b bne.n 8001a28 <HAL_PCD_IRQHandler+0x8e>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8001a10: 687b ldr r3, [r7, #4]
8001a12: 681b ldr r3, [r3, #0]
8001a14: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001a18: b29a uxth r2, r3
8001a1a: 687b ldr r3, [r7, #4]
8001a1c: 681b ldr r3, [r3, #0]
8001a1e: f422 4280 bic.w r2, r2, #16384 ; 0x4000
8001a22: b292 uxth r2, r2
8001a24: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR))
8001a28: 687b ldr r3, [r7, #4]
8001a2a: 681b ldr r3, [r3, #0]
8001a2c: 4618 mov r0, r3
8001a2e: f005 fdb7 bl 80075a0 <USB_ReadInterrupts>
8001a32: 4603 mov r3, r0
8001a34: f403 5300 and.w r3, r3, #8192 ; 0x2000
8001a38: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
8001a3c: d10b bne.n 8001a56 <HAL_PCD_IRQHandler+0xbc>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8001a3e: 687b ldr r3, [r7, #4]
8001a40: 681b ldr r3, [r3, #0]
8001a42: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001a46: b29a uxth r2, r3
8001a48: 687b ldr r3, [r7, #4]
8001a4a: 681b ldr r3, [r3, #0]
8001a4c: f422 5200 bic.w r2, r2, #8192 ; 0x2000
8001a50: b292 uxth r2, r2
8001a52: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
8001a56: 687b ldr r3, [r7, #4]
8001a58: 681b ldr r3, [r3, #0]
8001a5a: 4618 mov r0, r3
8001a5c: f005 fda0 bl 80075a0 <USB_ReadInterrupts>
8001a60: 4603 mov r3, r0
8001a62: f403 5380 and.w r3, r3, #4096 ; 0x1000
8001a66: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
8001a6a: d126 bne.n 8001aba <HAL_PCD_IRQHandler+0x120>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8001a6c: 687b ldr r3, [r7, #4]
8001a6e: 681b ldr r3, [r3, #0]
8001a70: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8001a74: b29a uxth r2, r3
8001a76: 687b ldr r3, [r7, #4]
8001a78: 681b ldr r3, [r3, #0]
8001a7a: f022 0204 bic.w r2, r2, #4
8001a7e: b292 uxth r2, r2
8001a80: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8001a84: 687b ldr r3, [r7, #4]
8001a86: 681b ldr r3, [r3, #0]
8001a88: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8001a8c: b29a uxth r2, r3
8001a8e: 687b ldr r3, [r7, #4]
8001a90: 681b ldr r3, [r3, #0]
8001a92: f022 0208 bic.w r2, r2, #8
8001a96: b292 uxth r2, r2
8001a98: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8001a9c: 6878 ldr r0, [r7, #4]
8001a9e: f008 fb49 bl 800a134 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8001aa2: 687b ldr r3, [r7, #4]
8001aa4: 681b ldr r3, [r3, #0]
8001aa6: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001aaa: b29a uxth r2, r3
8001aac: 687b ldr r3, [r7, #4]
8001aae: 681b ldr r3, [r3, #0]
8001ab0: f422 5280 bic.w r2, r2, #4096 ; 0x1000
8001ab4: b292 uxth r2, r2
8001ab6: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
8001aba: 687b ldr r3, [r7, #4]
8001abc: 681b ldr r3, [r3, #0]
8001abe: 4618 mov r0, r3
8001ac0: f005 fd6e bl 80075a0 <USB_ReadInterrupts>
8001ac4: 4603 mov r3, r0
8001ac6: f403 6300 and.w r3, r3, #2048 ; 0x800
8001aca: f5b3 6f00 cmp.w r3, #2048 ; 0x800
8001ace: f040 8084 bne.w 8001bda <HAL_PCD_IRQHandler+0x240>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint register */
for (i = 0U; i < 8U; i++)
8001ad2: 2300 movs r3, #0
8001ad4: 77fb strb r3, [r7, #31]
8001ad6: e011 b.n 8001afc <HAL_PCD_IRQHandler+0x162>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8001ad8: 687b ldr r3, [r7, #4]
8001ada: 681b ldr r3, [r3, #0]
8001adc: 461a mov r2, r3
8001ade: 7ffb ldrb r3, [r7, #31]
8001ae0: 009b lsls r3, r3, #2
8001ae2: 441a add r2, r3
8001ae4: 7ffb ldrb r3, [r7, #31]
8001ae6: 8812 ldrh r2, [r2, #0]
8001ae8: b292 uxth r2, r2
8001aea: 005b lsls r3, r3, #1
8001aec: f107 0120 add.w r1, r7, #32
8001af0: 440b add r3, r1
8001af2: f823 2c14 strh.w r2, [r3, #-20]
for (i = 0U; i < 8U; i++)
8001af6: 7ffb ldrb r3, [r7, #31]
8001af8: 3301 adds r3, #1
8001afa: 77fb strb r3, [r7, #31]
8001afc: 7ffb ldrb r3, [r7, #31]
8001afe: 2b07 cmp r3, #7
8001b00: d9ea bls.n 8001ad8 <HAL_PCD_IRQHandler+0x13e>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8001b02: 687b ldr r3, [r7, #4]
8001b04: 681b ldr r3, [r3, #0]
8001b06: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8001b0a: b29a uxth r2, r3
8001b0c: 687b ldr r3, [r7, #4]
8001b0e: 681b ldr r3, [r3, #0]
8001b10: f042 0201 orr.w r2, r2, #1
8001b14: b292 uxth r2, r2
8001b16: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8001b1a: 687b ldr r3, [r7, #4]
8001b1c: 681b ldr r3, [r3, #0]
8001b1e: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8001b22: b29a uxth r2, r3
8001b24: 687b ldr r3, [r7, #4]
8001b26: 681b ldr r3, [r3, #0]
8001b28: f022 0201 bic.w r2, r2, #1
8001b2c: b292 uxth r2, r2
8001b2e: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8001b32: bf00 nop
8001b34: 687b ldr r3, [r7, #4]
8001b36: 681b ldr r3, [r3, #0]
8001b38: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001b3c: b29b uxth r3, r3
8001b3e: f403 6380 and.w r3, r3, #1024 ; 0x400
8001b42: 2b00 cmp r3, #0
8001b44: d0f6 beq.n 8001b34 <HAL_PCD_IRQHandler+0x19a>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8001b46: 687b ldr r3, [r7, #4]
8001b48: 681b ldr r3, [r3, #0]
8001b4a: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001b4e: b29a uxth r2, r3
8001b50: 687b ldr r3, [r7, #4]
8001b52: 681b ldr r3, [r3, #0]
8001b54: f422 6280 bic.w r2, r2, #1024 ; 0x400
8001b58: b292 uxth r2, r2
8001b5a: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8001b5e: 2300 movs r3, #0
8001b60: 77fb strb r3, [r7, #31]
8001b62: e010 b.n 8001b86 <HAL_PCD_IRQHandler+0x1ec>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8001b64: 7ffb ldrb r3, [r7, #31]
8001b66: 687a ldr r2, [r7, #4]
8001b68: 6812 ldr r2, [r2, #0]
8001b6a: 4611 mov r1, r2
8001b6c: 7ffa ldrb r2, [r7, #31]
8001b6e: 0092 lsls r2, r2, #2
8001b70: 440a add r2, r1
8001b72: 005b lsls r3, r3, #1
8001b74: f107 0120 add.w r1, r7, #32
8001b78: 440b add r3, r1
8001b7a: f833 3c14 ldrh.w r3, [r3, #-20]
8001b7e: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8001b80: 7ffb ldrb r3, [r7, #31]
8001b82: 3301 adds r3, #1
8001b84: 77fb strb r3, [r7, #31]
8001b86: 7ffb ldrb r3, [r7, #31]
8001b88: 2b07 cmp r3, #7
8001b8a: d9eb bls.n 8001b64 <HAL_PCD_IRQHandler+0x1ca>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8001b8c: 687b ldr r3, [r7, #4]
8001b8e: 681b ldr r3, [r3, #0]
8001b90: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8001b94: b29a uxth r2, r3
8001b96: 687b ldr r3, [r7, #4]
8001b98: 681b ldr r3, [r3, #0]
8001b9a: f042 0208 orr.w r2, r2, #8
8001b9e: b292 uxth r2, r2
8001ba0: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8001ba4: 687b ldr r3, [r7, #4]
8001ba6: 681b ldr r3, [r3, #0]
8001ba8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001bac: b29a uxth r2, r3
8001bae: 687b ldr r3, [r7, #4]
8001bb0: 681b ldr r3, [r3, #0]
8001bb2: f422 6200 bic.w r2, r2, #2048 ; 0x800
8001bb6: b292 uxth r2, r2
8001bb8: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8001bbc: 687b ldr r3, [r7, #4]
8001bbe: 681b ldr r3, [r3, #0]
8001bc0: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8001bc4: b29a uxth r2, r3
8001bc6: 687b ldr r3, [r7, #4]
8001bc8: 681b ldr r3, [r3, #0]
8001bca: f042 0204 orr.w r2, r2, #4
8001bce: b292 uxth r2, r2
8001bd0: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8001bd4: 6878 ldr r0, [r7, #4]
8001bd6: f008 fa93 bl 800a100 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF))
8001bda: 687b ldr r3, [r7, #4]
8001bdc: 681b ldr r3, [r3, #0]
8001bde: 4618 mov r0, r3
8001be0: f005 fcde bl 80075a0 <USB_ReadInterrupts>
8001be4: 4603 mov r3, r0
8001be6: f403 7300 and.w r3, r3, #512 ; 0x200
8001bea: f5b3 7f00 cmp.w r3, #512 ; 0x200
8001bee: d10e bne.n 8001c0e <HAL_PCD_IRQHandler+0x274>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8001bf0: 687b ldr r3, [r7, #4]
8001bf2: 681b ldr r3, [r3, #0]
8001bf4: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001bf8: b29a uxth r2, r3
8001bfa: 687b ldr r3, [r7, #4]
8001bfc: 681b ldr r3, [r3, #0]
8001bfe: f422 7200 bic.w r2, r2, #512 ; 0x200
8001c02: b292 uxth r2, r2
8001c04: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8001c08: 6878 ldr r0, [r7, #4]
8001c0a: f008 fa4c bl 800a0a6 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF))
8001c0e: 687b ldr r3, [r7, #4]
8001c10: 681b ldr r3, [r3, #0]
8001c12: 4618 mov r0, r3
8001c14: f005 fcc4 bl 80075a0 <USB_ReadInterrupts>
8001c18: 4603 mov r3, r0
8001c1a: f403 7380 and.w r3, r3, #256 ; 0x100
8001c1e: f5b3 7f80 cmp.w r3, #256 ; 0x100
8001c22: d10b bne.n 8001c3c <HAL_PCD_IRQHandler+0x2a2>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8001c24: 687b ldr r3, [r7, #4]
8001c26: 681b ldr r3, [r3, #0]
8001c28: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001c2c: b29a uxth r2, r3
8001c2e: 687b ldr r3, [r7, #4]
8001c30: 681b ldr r3, [r3, #0]
8001c32: f422 7280 bic.w r2, r2, #256 ; 0x100
8001c36: b292 uxth r2, r2
8001c38: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
}
8001c3c: bf00 nop
8001c3e: 3720 adds r7, #32
8001c40: 46bd mov sp, r7
8001c42: bd80 pop {r7, pc}
08001c44 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8001c44: b580 push {r7, lr}
8001c46: b082 sub sp, #8
8001c48: af00 add r7, sp, #0
8001c4a: 6078 str r0, [r7, #4]
8001c4c: 460b mov r3, r1
8001c4e: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8001c50: 687b ldr r3, [r7, #4]
8001c52: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8001c56: 2b01 cmp r3, #1
8001c58: d101 bne.n 8001c5e <HAL_PCD_SetAddress+0x1a>
8001c5a: 2302 movs r3, #2
8001c5c: e013 b.n 8001c86 <HAL_PCD_SetAddress+0x42>
8001c5e: 687b ldr r3, [r7, #4]
8001c60: 2201 movs r2, #1
8001c62: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
hpcd->USB_Address = address;
8001c66: 687b ldr r3, [r7, #4]
8001c68: 78fa ldrb r2, [r7, #3]
8001c6a: f883 2024 strb.w r2, [r3, #36] ; 0x24
(void)USB_SetDevAddress(hpcd->Instance, address);
8001c6e: 687b ldr r3, [r7, #4]
8001c70: 681b ldr r3, [r3, #0]
8001c72: 78fa ldrb r2, [r7, #3]
8001c74: 4611 mov r1, r2
8001c76: 4618 mov r0, r3
8001c78: f005 fc6b bl 8007552 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8001c7c: 687b ldr r3, [r7, #4]
8001c7e: 2200 movs r2, #0
8001c80: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001c84: 2300 movs r3, #0
}
8001c86: 4618 mov r0, r3
8001c88: 3708 adds r7, #8
8001c8a: 46bd mov sp, r7
8001c8c: bd80 pop {r7, pc}
08001c8e <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8001c8e: b580 push {r7, lr}
8001c90: b084 sub sp, #16
8001c92: af00 add r7, sp, #0
8001c94: 6078 str r0, [r7, #4]
8001c96: 4608 mov r0, r1
8001c98: 4611 mov r1, r2
8001c9a: 461a mov r2, r3
8001c9c: 4603 mov r3, r0
8001c9e: 70fb strb r3, [r7, #3]
8001ca0: 460b mov r3, r1
8001ca2: 803b strh r3, [r7, #0]
8001ca4: 4613 mov r3, r2
8001ca6: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8001ca8: 2300 movs r3, #0
8001caa: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8001cac: f997 3003 ldrsb.w r3, [r7, #3]
8001cb0: 2b00 cmp r3, #0
8001cb2: da0e bge.n 8001cd2 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001cb4: 78fb ldrb r3, [r7, #3]
8001cb6: f003 0307 and.w r3, r3, #7
8001cba: 1c5a adds r2, r3, #1
8001cbc: 4613 mov r3, r2
8001cbe: 009b lsls r3, r3, #2
8001cc0: 4413 add r3, r2
8001cc2: 00db lsls r3, r3, #3
8001cc4: 687a ldr r2, [r7, #4]
8001cc6: 4413 add r3, r2
8001cc8: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001cca: 68fb ldr r3, [r7, #12]
8001ccc: 2201 movs r2, #1
8001cce: 705a strb r2, [r3, #1]
8001cd0: e00e b.n 8001cf0 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001cd2: 78fb ldrb r3, [r7, #3]
8001cd4: f003 0207 and.w r2, r3, #7
8001cd8: 4613 mov r3, r2
8001cda: 009b lsls r3, r3, #2
8001cdc: 4413 add r3, r2
8001cde: 00db lsls r3, r3, #3
8001ce0: f503 73b4 add.w r3, r3, #360 ; 0x168
8001ce4: 687a ldr r2, [r7, #4]
8001ce6: 4413 add r3, r2
8001ce8: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001cea: 68fb ldr r3, [r7, #12]
8001cec: 2200 movs r2, #0
8001cee: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001cf0: 78fb ldrb r3, [r7, #3]
8001cf2: f003 0307 and.w r3, r3, #7
8001cf6: b2da uxtb r2, r3
8001cf8: 68fb ldr r3, [r7, #12]
8001cfa: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8001cfc: 883a ldrh r2, [r7, #0]
8001cfe: 68fb ldr r3, [r7, #12]
8001d00: 611a str r2, [r3, #16]
ep->type = ep_type;
8001d02: 68fb ldr r3, [r7, #12]
8001d04: 78ba ldrb r2, [r7, #2]
8001d06: 70da strb r2, [r3, #3]
if (ep->is_in != 0U)
8001d08: 68fb ldr r3, [r7, #12]
8001d0a: 785b ldrb r3, [r3, #1]
8001d0c: 2b00 cmp r3, #0
8001d0e: d004 beq.n 8001d1a <HAL_PCD_EP_Open+0x8c>
{
/* Assign a Tx FIFO */
ep->tx_fifo_num = ep->num;
8001d10: 68fb ldr r3, [r7, #12]
8001d12: 781b ldrb r3, [r3, #0]
8001d14: b29a uxth r2, r3
8001d16: 68fb ldr r3, [r7, #12]
8001d18: 81da strh r2, [r3, #14]
}
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8001d1a: 78bb ldrb r3, [r7, #2]
8001d1c: 2b02 cmp r3, #2
8001d1e: d102 bne.n 8001d26 <HAL_PCD_EP_Open+0x98>
{
ep->data_pid_start = 0U;
8001d20: 68fb ldr r3, [r7, #12]
8001d22: 2200 movs r2, #0
8001d24: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8001d26: 687b ldr r3, [r7, #4]
8001d28: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8001d2c: 2b01 cmp r3, #1
8001d2e: d101 bne.n 8001d34 <HAL_PCD_EP_Open+0xa6>
8001d30: 2302 movs r3, #2
8001d32: e00e b.n 8001d52 <HAL_PCD_EP_Open+0xc4>
8001d34: 687b ldr r3, [r7, #4]
8001d36: 2201 movs r2, #1
8001d38: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8001d3c: 687b ldr r3, [r7, #4]
8001d3e: 681b ldr r3, [r3, #0]
8001d40: 68f9 ldr r1, [r7, #12]
8001d42: 4618 mov r0, r3
8001d44: f003 fc92 bl 800566c <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8001d48: 687b ldr r3, [r7, #4]
8001d4a: 2200 movs r2, #0
8001d4c: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return ret;
8001d50: 7afb ldrb r3, [r7, #11]
}
8001d52: 4618 mov r0, r3
8001d54: 3710 adds r7, #16
8001d56: 46bd mov sp, r7
8001d58: bd80 pop {r7, pc}
08001d5a <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001d5a: b580 push {r7, lr}
8001d5c: b084 sub sp, #16
8001d5e: af00 add r7, sp, #0
8001d60: 6078 str r0, [r7, #4]
8001d62: 460b mov r3, r1
8001d64: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8001d66: f997 3003 ldrsb.w r3, [r7, #3]
8001d6a: 2b00 cmp r3, #0
8001d6c: da0e bge.n 8001d8c <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001d6e: 78fb ldrb r3, [r7, #3]
8001d70: f003 0307 and.w r3, r3, #7
8001d74: 1c5a adds r2, r3, #1
8001d76: 4613 mov r3, r2
8001d78: 009b lsls r3, r3, #2
8001d7a: 4413 add r3, r2
8001d7c: 00db lsls r3, r3, #3
8001d7e: 687a ldr r2, [r7, #4]
8001d80: 4413 add r3, r2
8001d82: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001d84: 68fb ldr r3, [r7, #12]
8001d86: 2201 movs r2, #1
8001d88: 705a strb r2, [r3, #1]
8001d8a: e00e b.n 8001daa <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001d8c: 78fb ldrb r3, [r7, #3]
8001d8e: f003 0207 and.w r2, r3, #7
8001d92: 4613 mov r3, r2
8001d94: 009b lsls r3, r3, #2
8001d96: 4413 add r3, r2
8001d98: 00db lsls r3, r3, #3
8001d9a: f503 73b4 add.w r3, r3, #360 ; 0x168
8001d9e: 687a ldr r2, [r7, #4]
8001da0: 4413 add r3, r2
8001da2: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001da4: 68fb ldr r3, [r7, #12]
8001da6: 2200 movs r2, #0
8001da8: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001daa: 78fb ldrb r3, [r7, #3]
8001dac: f003 0307 and.w r3, r3, #7
8001db0: b2da uxtb r2, r3
8001db2: 68fb ldr r3, [r7, #12]
8001db4: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001db6: 687b ldr r3, [r7, #4]
8001db8: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8001dbc: 2b01 cmp r3, #1
8001dbe: d101 bne.n 8001dc4 <HAL_PCD_EP_Close+0x6a>
8001dc0: 2302 movs r3, #2
8001dc2: e00e b.n 8001de2 <HAL_PCD_EP_Close+0x88>
8001dc4: 687b ldr r3, [r7, #4]
8001dc6: 2201 movs r2, #1
8001dc8: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8001dcc: 687b ldr r3, [r7, #4]
8001dce: 681b ldr r3, [r3, #0]
8001dd0: 68f9 ldr r1, [r7, #12]
8001dd2: 4618 mov r0, r3
8001dd4: f003 ffb4 bl 8005d40 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8001dd8: 687b ldr r3, [r7, #4]
8001dda: 2200 movs r2, #0
8001ddc: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001de0: 2300 movs r3, #0
}
8001de2: 4618 mov r0, r3
8001de4: 3710 adds r7, #16
8001de6: 46bd mov sp, r7
8001de8: bd80 pop {r7, pc}
08001dea <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8001dea: b580 push {r7, lr}
8001dec: b086 sub sp, #24
8001dee: af00 add r7, sp, #0
8001df0: 60f8 str r0, [r7, #12]
8001df2: 607a str r2, [r7, #4]
8001df4: 603b str r3, [r7, #0]
8001df6: 460b mov r3, r1
8001df8: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001dfa: 7afb ldrb r3, [r7, #11]
8001dfc: f003 0207 and.w r2, r3, #7
8001e00: 4613 mov r3, r2
8001e02: 009b lsls r3, r3, #2
8001e04: 4413 add r3, r2
8001e06: 00db lsls r3, r3, #3
8001e08: f503 73b4 add.w r3, r3, #360 ; 0x168
8001e0c: 68fa ldr r2, [r7, #12]
8001e0e: 4413 add r3, r2
8001e10: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001e12: 697b ldr r3, [r7, #20]
8001e14: 687a ldr r2, [r7, #4]
8001e16: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001e18: 697b ldr r3, [r7, #20]
8001e1a: 683a ldr r2, [r7, #0]
8001e1c: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8001e1e: 697b ldr r3, [r7, #20]
8001e20: 2200 movs r2, #0
8001e22: 61da str r2, [r3, #28]
ep->is_in = 0U;
8001e24: 697b ldr r3, [r7, #20]
8001e26: 2200 movs r2, #0
8001e28: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001e2a: 7afb ldrb r3, [r7, #11]
8001e2c: f003 0307 and.w r3, r3, #7
8001e30: b2da uxtb r2, r3
8001e32: 697b ldr r3, [r7, #20]
8001e34: 701a strb r2, [r3, #0]
if ((ep_addr & EP_ADDR_MSK) == 0U)
8001e36: 7afb ldrb r3, [r7, #11]
8001e38: f003 0307 and.w r3, r3, #7
8001e3c: 2b00 cmp r3, #0
8001e3e: d106 bne.n 8001e4e <HAL_PCD_EP_Receive+0x64>
{
(void)USB_EP0StartXfer(hpcd->Instance, ep);
8001e40: 68fb ldr r3, [r7, #12]
8001e42: 681b ldr r3, [r3, #0]
8001e44: 6979 ldr r1, [r7, #20]
8001e46: 4618 mov r0, r3
8001e48: f004 f966 bl 8006118 <USB_EPStartXfer>
8001e4c: e005 b.n 8001e5a <HAL_PCD_EP_Receive+0x70>
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001e4e: 68fb ldr r3, [r7, #12]
8001e50: 681b ldr r3, [r3, #0]
8001e52: 6979 ldr r1, [r7, #20]
8001e54: 4618 mov r0, r3
8001e56: f004 f95f bl 8006118 <USB_EPStartXfer>
}
return HAL_OK;
8001e5a: 2300 movs r3, #0
}
8001e5c: 4618 mov r0, r3
8001e5e: 3718 adds r7, #24
8001e60: 46bd mov sp, r7
8001e62: bd80 pop {r7, pc}
08001e64 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001e64: b480 push {r7}
8001e66: b083 sub sp, #12
8001e68: af00 add r7, sp, #0
8001e6a: 6078 str r0, [r7, #4]
8001e6c: 460b mov r3, r1
8001e6e: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8001e70: 78fb ldrb r3, [r7, #3]
8001e72: f003 0207 and.w r2, r3, #7
8001e76: 6879 ldr r1, [r7, #4]
8001e78: 4613 mov r3, r2
8001e7a: 009b lsls r3, r3, #2
8001e7c: 4413 add r3, r2
8001e7e: 00db lsls r3, r3, #3
8001e80: 440b add r3, r1
8001e82: f503 73c2 add.w r3, r3, #388 ; 0x184
8001e86: 681b ldr r3, [r3, #0]
}
8001e88: 4618 mov r0, r3
8001e8a: 370c adds r7, #12
8001e8c: 46bd mov sp, r7
8001e8e: bc80 pop {r7}
8001e90: 4770 bx lr
08001e92 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8001e92: b580 push {r7, lr}
8001e94: b086 sub sp, #24
8001e96: af00 add r7, sp, #0
8001e98: 60f8 str r0, [r7, #12]
8001e9a: 607a str r2, [r7, #4]
8001e9c: 603b str r3, [r7, #0]
8001e9e: 460b mov r3, r1
8001ea0: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001ea2: 7afb ldrb r3, [r7, #11]
8001ea4: f003 0307 and.w r3, r3, #7
8001ea8: 1c5a adds r2, r3, #1
8001eaa: 4613 mov r3, r2
8001eac: 009b lsls r3, r3, #2
8001eae: 4413 add r3, r2
8001eb0: 00db lsls r3, r3, #3
8001eb2: 68fa ldr r2, [r7, #12]
8001eb4: 4413 add r3, r2
8001eb6: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001eb8: 697b ldr r3, [r7, #20]
8001eba: 687a ldr r2, [r7, #4]
8001ebc: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001ebe: 697b ldr r3, [r7, #20]
8001ec0: 683a ldr r2, [r7, #0]
8001ec2: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8001ec4: 697b ldr r3, [r7, #20]
8001ec6: 2201 movs r2, #1
8001ec8: f883 2024 strb.w r2, [r3, #36] ; 0x24
ep->xfer_len_db = len;
8001ecc: 697b ldr r3, [r7, #20]
8001ece: 683a ldr r2, [r7, #0]
8001ed0: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8001ed2: 697b ldr r3, [r7, #20]
8001ed4: 2200 movs r2, #0
8001ed6: 61da str r2, [r3, #28]
ep->is_in = 1U;
8001ed8: 697b ldr r3, [r7, #20]
8001eda: 2201 movs r2, #1
8001edc: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001ede: 7afb ldrb r3, [r7, #11]
8001ee0: f003 0307 and.w r3, r3, #7
8001ee4: b2da uxtb r2, r3
8001ee6: 697b ldr r3, [r7, #20]
8001ee8: 701a strb r2, [r3, #0]
if ((ep_addr & EP_ADDR_MSK) == 0U)
8001eea: 7afb ldrb r3, [r7, #11]
8001eec: f003 0307 and.w r3, r3, #7
8001ef0: 2b00 cmp r3, #0
8001ef2: d106 bne.n 8001f02 <HAL_PCD_EP_Transmit+0x70>
{
(void)USB_EP0StartXfer(hpcd->Instance, ep);
8001ef4: 68fb ldr r3, [r7, #12]
8001ef6: 681b ldr r3, [r3, #0]
8001ef8: 6979 ldr r1, [r7, #20]
8001efa: 4618 mov r0, r3
8001efc: f004 f90c bl 8006118 <USB_EPStartXfer>
8001f00: e005 b.n 8001f0e <HAL_PCD_EP_Transmit+0x7c>
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001f02: 68fb ldr r3, [r7, #12]
8001f04: 681b ldr r3, [r3, #0]
8001f06: 6979 ldr r1, [r7, #20]
8001f08: 4618 mov r0, r3
8001f0a: f004 f905 bl 8006118 <USB_EPStartXfer>
}
return HAL_OK;
8001f0e: 2300 movs r3, #0
}
8001f10: 4618 mov r0, r3
8001f12: 3718 adds r7, #24
8001f14: 46bd mov sp, r7
8001f16: bd80 pop {r7, pc}
08001f18 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001f18: b580 push {r7, lr}
8001f1a: b084 sub sp, #16
8001f1c: af00 add r7, sp, #0
8001f1e: 6078 str r0, [r7, #4]
8001f20: 460b mov r3, r1
8001f22: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8001f24: 78fb ldrb r3, [r7, #3]
8001f26: f003 0207 and.w r2, r3, #7
8001f2a: 687b ldr r3, [r7, #4]
8001f2c: 685b ldr r3, [r3, #4]
8001f2e: 429a cmp r2, r3
8001f30: d901 bls.n 8001f36 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8001f32: 2301 movs r3, #1
8001f34: e04c b.n 8001fd0 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8001f36: f997 3003 ldrsb.w r3, [r7, #3]
8001f3a: 2b00 cmp r3, #0
8001f3c: da0e bge.n 8001f5c <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001f3e: 78fb ldrb r3, [r7, #3]
8001f40: f003 0307 and.w r3, r3, #7
8001f44: 1c5a adds r2, r3, #1
8001f46: 4613 mov r3, r2
8001f48: 009b lsls r3, r3, #2
8001f4a: 4413 add r3, r2
8001f4c: 00db lsls r3, r3, #3
8001f4e: 687a ldr r2, [r7, #4]
8001f50: 4413 add r3, r2
8001f52: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001f54: 68fb ldr r3, [r7, #12]
8001f56: 2201 movs r2, #1
8001f58: 705a strb r2, [r3, #1]
8001f5a: e00c b.n 8001f76 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8001f5c: 78fa ldrb r2, [r7, #3]
8001f5e: 4613 mov r3, r2
8001f60: 009b lsls r3, r3, #2
8001f62: 4413 add r3, r2
8001f64: 00db lsls r3, r3, #3
8001f66: f503 73b4 add.w r3, r3, #360 ; 0x168
8001f6a: 687a ldr r2, [r7, #4]
8001f6c: 4413 add r3, r2
8001f6e: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001f70: 68fb ldr r3, [r7, #12]
8001f72: 2200 movs r2, #0
8001f74: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8001f76: 68fb ldr r3, [r7, #12]
8001f78: 2201 movs r2, #1
8001f7a: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8001f7c: 78fb ldrb r3, [r7, #3]
8001f7e: f003 0307 and.w r3, r3, #7
8001f82: b2da uxtb r2, r3
8001f84: 68fb ldr r3, [r7, #12]
8001f86: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001f88: 687b ldr r3, [r7, #4]
8001f8a: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8001f8e: 2b01 cmp r3, #1
8001f90: d101 bne.n 8001f96 <HAL_PCD_EP_SetStall+0x7e>
8001f92: 2302 movs r3, #2
8001f94: e01c b.n 8001fd0 <HAL_PCD_EP_SetStall+0xb8>
8001f96: 687b ldr r3, [r7, #4]
8001f98: 2201 movs r2, #1
8001f9a: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_EPSetStall(hpcd->Instance, ep);
8001f9e: 687b ldr r3, [r7, #4]
8001fa0: 681b ldr r3, [r3, #0]
8001fa2: 68f9 ldr r1, [r7, #12]
8001fa4: 4618 mov r0, r3
8001fa6: f005 f9d7 bl 8007358 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8001faa: 78fb ldrb r3, [r7, #3]
8001fac: f003 0307 and.w r3, r3, #7
8001fb0: 2b00 cmp r3, #0
8001fb2: d108 bne.n 8001fc6 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8001fb4: 687b ldr r3, [r7, #4]
8001fb6: 681a ldr r2, [r3, #0]
8001fb8: 687b ldr r3, [r7, #4]
8001fba: f503 732c add.w r3, r3, #688 ; 0x2b0
8001fbe: 4619 mov r1, r3
8001fc0: 4610 mov r0, r2
8001fc2: f005 fafc bl 80075be <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8001fc6: 687b ldr r3, [r7, #4]
8001fc8: 2200 movs r2, #0
8001fca: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001fce: 2300 movs r3, #0
}
8001fd0: 4618 mov r0, r3
8001fd2: 3710 adds r7, #16
8001fd4: 46bd mov sp, r7
8001fd6: bd80 pop {r7, pc}
08001fd8 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001fd8: b580 push {r7, lr}
8001fda: b084 sub sp, #16
8001fdc: af00 add r7, sp, #0
8001fde: 6078 str r0, [r7, #4]
8001fe0: 460b mov r3, r1
8001fe2: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8001fe4: 78fb ldrb r3, [r7, #3]
8001fe6: f003 020f and.w r2, r3, #15
8001fea: 687b ldr r3, [r7, #4]
8001fec: 685b ldr r3, [r3, #4]
8001fee: 429a cmp r2, r3
8001ff0: d901 bls.n 8001ff6 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8001ff2: 2301 movs r3, #1
8001ff4: e040 b.n 8002078 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8001ff6: f997 3003 ldrsb.w r3, [r7, #3]
8001ffa: 2b00 cmp r3, #0
8001ffc: da0e bge.n 800201c <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001ffe: 78fb ldrb r3, [r7, #3]
8002000: f003 0307 and.w r3, r3, #7
8002004: 1c5a adds r2, r3, #1
8002006: 4613 mov r3, r2
8002008: 009b lsls r3, r3, #2
800200a: 4413 add r3, r2
800200c: 00db lsls r3, r3, #3
800200e: 687a ldr r2, [r7, #4]
8002010: 4413 add r3, r2
8002012: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002014: 68fb ldr r3, [r7, #12]
8002016: 2201 movs r2, #1
8002018: 705a strb r2, [r3, #1]
800201a: e00e b.n 800203a <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800201c: 78fb ldrb r3, [r7, #3]
800201e: f003 0207 and.w r2, r3, #7
8002022: 4613 mov r3, r2
8002024: 009b lsls r3, r3, #2
8002026: 4413 add r3, r2
8002028: 00db lsls r3, r3, #3
800202a: f503 73b4 add.w r3, r3, #360 ; 0x168
800202e: 687a ldr r2, [r7, #4]
8002030: 4413 add r3, r2
8002032: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002034: 68fb ldr r3, [r7, #12]
8002036: 2200 movs r2, #0
8002038: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
800203a: 68fb ldr r3, [r7, #12]
800203c: 2200 movs r2, #0
800203e: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8002040: 78fb ldrb r3, [r7, #3]
8002042: f003 0307 and.w r3, r3, #7
8002046: b2da uxtb r2, r3
8002048: 68fb ldr r3, [r7, #12]
800204a: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800204c: 687b ldr r3, [r7, #4]
800204e: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8002052: 2b01 cmp r3, #1
8002054: d101 bne.n 800205a <HAL_PCD_EP_ClrStall+0x82>
8002056: 2302 movs r3, #2
8002058: e00e b.n 8002078 <HAL_PCD_EP_ClrStall+0xa0>
800205a: 687b ldr r3, [r7, #4]
800205c: 2201 movs r2, #1
800205e: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_EPClearStall(hpcd->Instance, ep);
8002062: 687b ldr r3, [r7, #4]
8002064: 681b ldr r3, [r3, #0]
8002066: 68f9 ldr r1, [r7, #12]
8002068: 4618 mov r0, r3
800206a: f005 f9c5 bl 80073f8 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
800206e: 687b ldr r3, [r7, #4]
8002070: 2200 movs r2, #0
8002072: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8002076: 2300 movs r3, #0
}
8002078: 4618 mov r0, r3
800207a: 3710 adds r7, #16
800207c: 46bd mov sp, r7
800207e: bd80 pop {r7, pc}
08002080 <HAL_PCD_EP_Flush>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8002080: b580 push {r7, lr}
8002082: b082 sub sp, #8
8002084: af00 add r7, sp, #0
8002086: 6078 str r0, [r7, #4]
8002088: 460b mov r3, r1
800208a: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
800208c: 687b ldr r3, [r7, #4]
800208e: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8002092: 2b01 cmp r3, #1
8002094: d101 bne.n 800209a <HAL_PCD_EP_Flush+0x1a>
8002096: 2302 movs r3, #2
8002098: e01b b.n 80020d2 <HAL_PCD_EP_Flush+0x52>
800209a: 687b ldr r3, [r7, #4]
800209c: 2201 movs r2, #1
800209e: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
if ((ep_addr & 0x80U) == 0x80U)
80020a2: f997 3003 ldrsb.w r3, [r7, #3]
80020a6: 2b00 cmp r3, #0
80020a8: da09 bge.n 80020be <HAL_PCD_EP_Flush+0x3e>
{
(void)USB_FlushTxFifo(hpcd->Instance, (uint32_t)ep_addr & EP_ADDR_MSK);
80020aa: 687b ldr r3, [r7, #4]
80020ac: 681a ldr r2, [r3, #0]
80020ae: 78fb ldrb r3, [r7, #3]
80020b0: f003 0307 and.w r3, r3, #7
80020b4: 4619 mov r1, r3
80020b6: 4610 mov r0, r2
80020b8: f003 fac2 bl 8005640 <USB_FlushTxFifo>
80020bc: e004 b.n 80020c8 <HAL_PCD_EP_Flush+0x48>
}
else
{
(void)USB_FlushRxFifo(hpcd->Instance);
80020be: 687b ldr r3, [r7, #4]
80020c0: 681b ldr r3, [r3, #0]
80020c2: 4618 mov r0, r3
80020c4: f003 fac7 bl 8005656 <USB_FlushRxFifo>
}
__HAL_UNLOCK(hpcd);
80020c8: 687b ldr r3, [r7, #4]
80020ca: 2200 movs r2, #0
80020cc: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
80020d0: 2300 movs r3, #0
}
80020d2: 4618 mov r0, r3
80020d4: 3708 adds r7, #8
80020d6: 46bd mov sp, r7
80020d8: bd80 pop {r7, pc}
080020da <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
80020da: b580 push {r7, lr}
80020dc: b08e sub sp, #56 ; 0x38
80020de: af00 add r7, sp, #0
80020e0: 6078 str r0, [r7, #4]
PCD_EPTypeDef *ep;
uint16_t count, wIstr, wEPVal, TxByteNbre;
uint8_t epindex;
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
80020e2: e2df b.n 80026a4 <PCD_EP_ISR_Handler+0x5ca>
{
wIstr = hpcd->Instance->ISTR;
80020e4: 687b ldr r3, [r7, #4]
80020e6: 681b ldr r3, [r3, #0]
80020e8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80020ec: 85fb strh r3, [r7, #46] ; 0x2e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
80020ee: 8dfb ldrh r3, [r7, #46] ; 0x2e
80020f0: b2db uxtb r3, r3
80020f2: f003 030f and.w r3, r3, #15
80020f6: f887 302d strb.w r3, [r7, #45] ; 0x2d
if (epindex == 0U)
80020fa: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
80020fe: 2b00 cmp r3, #0
8002100: f040 8158 bne.w 80023b4 <PCD_EP_ISR_Handler+0x2da>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8002104: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002106: f003 0310 and.w r3, r3, #16
800210a: 2b00 cmp r3, #0
800210c: d152 bne.n 80021b4 <PCD_EP_ISR_Handler+0xda>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
800210e: 687b ldr r3, [r7, #4]
8002110: 681b ldr r3, [r3, #0]
8002112: 881b ldrh r3, [r3, #0]
8002114: b29b uxth r3, r3
8002116: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
800211a: f023 0370 bic.w r3, r3, #112 ; 0x70
800211e: 81fb strh r3, [r7, #14]
8002120: 687b ldr r3, [r7, #4]
8002122: 681a ldr r2, [r3, #0]
8002124: 89fb ldrh r3, [r7, #14]
8002126: ea6f 4343 mvn.w r3, r3, lsl #17
800212a: ea6f 4353 mvn.w r3, r3, lsr #17
800212e: b29b uxth r3, r3
8002130: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8002132: 687b ldr r3, [r7, #4]
8002134: 3328 adds r3, #40 ; 0x28
8002136: 627b str r3, [r7, #36] ; 0x24
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8002138: 687b ldr r3, [r7, #4]
800213a: 681b ldr r3, [r3, #0]
800213c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002140: b29b uxth r3, r3
8002142: 461a mov r2, r3
8002144: 6a7b ldr r3, [r7, #36] ; 0x24
8002146: 781b ldrb r3, [r3, #0]
8002148: 00db lsls r3, r3, #3
800214a: 4413 add r3, r2
800214c: 3302 adds r3, #2
800214e: 005b lsls r3, r3, #1
8002150: 687a ldr r2, [r7, #4]
8002152: 6812 ldr r2, [r2, #0]
8002154: 4413 add r3, r2
8002156: f503 6380 add.w r3, r3, #1024 ; 0x400
800215a: 881b ldrh r3, [r3, #0]
800215c: f3c3 0209 ubfx r2, r3, #0, #10
8002160: 6a7b ldr r3, [r7, #36] ; 0x24
8002162: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8002164: 6a7b ldr r3, [r7, #36] ; 0x24
8002166: 695a ldr r2, [r3, #20]
8002168: 6a7b ldr r3, [r7, #36] ; 0x24
800216a: 69db ldr r3, [r3, #28]
800216c: 441a add r2, r3
800216e: 6a7b ldr r3, [r7, #36] ; 0x24
8002170: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
8002172: 2100 movs r1, #0
8002174: 6878 ldr r0, [r7, #4]
8002176: f007 ff7c bl 800a072 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
800217a: 687b ldr r3, [r7, #4]
800217c: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8002180: b2db uxtb r3, r3
8002182: 2b00 cmp r3, #0
8002184: f000 828e beq.w 80026a4 <PCD_EP_ISR_Handler+0x5ca>
8002188: 6a7b ldr r3, [r7, #36] ; 0x24
800218a: 699b ldr r3, [r3, #24]
800218c: 2b00 cmp r3, #0
800218e: f040 8289 bne.w 80026a4 <PCD_EP_ISR_Handler+0x5ca>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8002192: 687b ldr r3, [r7, #4]
8002194: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8002198: b2db uxtb r3, r3
800219a: f063 037f orn r3, r3, #127 ; 0x7f
800219e: b2da uxtb r2, r3
80021a0: 687b ldr r3, [r7, #4]
80021a2: 681b ldr r3, [r3, #0]
80021a4: b292 uxth r2, r2
80021a6: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
hpcd->USB_Address = 0U;
80021aa: 687b ldr r3, [r7, #4]
80021ac: 2200 movs r2, #0
80021ae: f883 2024 strb.w r2, [r3, #36] ; 0x24
80021b2: e277 b.n 80026a4 <PCD_EP_ISR_Handler+0x5ca>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
80021b4: 687b ldr r3, [r7, #4]
80021b6: f503 73b4 add.w r3, r3, #360 ; 0x168
80021ba: 627b str r3, [r7, #36] ; 0x24
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80021bc: 687b ldr r3, [r7, #4]
80021be: 681b ldr r3, [r3, #0]
80021c0: 881b ldrh r3, [r3, #0]
80021c2: 857b strh r3, [r7, #42] ; 0x2a
if ((wEPVal & USB_EP_SETUP) != 0U)
80021c4: 8d7b ldrh r3, [r7, #42] ; 0x2a
80021c6: f403 6300 and.w r3, r3, #2048 ; 0x800
80021ca: 2b00 cmp r3, #0
80021cc: d034 beq.n 8002238 <PCD_EP_ISR_Handler+0x15e>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80021ce: 687b ldr r3, [r7, #4]
80021d0: 681b ldr r3, [r3, #0]
80021d2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80021d6: b29b uxth r3, r3
80021d8: 461a mov r2, r3
80021da: 6a7b ldr r3, [r7, #36] ; 0x24
80021dc: 781b ldrb r3, [r3, #0]
80021de: 00db lsls r3, r3, #3
80021e0: 4413 add r3, r2
80021e2: 3306 adds r3, #6
80021e4: 005b lsls r3, r3, #1
80021e6: 687a ldr r2, [r7, #4]
80021e8: 6812 ldr r2, [r2, #0]
80021ea: 4413 add r3, r2
80021ec: f503 6380 add.w r3, r3, #1024 ; 0x400
80021f0: 881b ldrh r3, [r3, #0]
80021f2: f3c3 0209 ubfx r2, r3, #0, #10
80021f6: 6a7b ldr r3, [r7, #36] ; 0x24
80021f8: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80021fa: 687b ldr r3, [r7, #4]
80021fc: 6818 ldr r0, [r3, #0]
80021fe: 687b ldr r3, [r7, #4]
8002200: f503 712c add.w r1, r3, #688 ; 0x2b0
8002204: 6a7b ldr r3, [r7, #36] ; 0x24
8002206: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8002208: 6a7b ldr r3, [r7, #36] ; 0x24
800220a: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800220c: b29b uxth r3, r3
800220e: f005 fa25 bl 800765c <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8002212: 687b ldr r3, [r7, #4]
8002214: 681b ldr r3, [r3, #0]
8002216: 881b ldrh r3, [r3, #0]
8002218: b29a uxth r2, r3
800221a: f640 738f movw r3, #3983 ; 0xf8f
800221e: 4013 ands r3, r2
8002220: 823b strh r3, [r7, #16]
8002222: 687b ldr r3, [r7, #4]
8002224: 681b ldr r3, [r3, #0]
8002226: 8a3a ldrh r2, [r7, #16]
8002228: f042 0280 orr.w r2, r2, #128 ; 0x80
800222c: b292 uxth r2, r2
800222e: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8002230: 6878 ldr r0, [r7, #4]
8002232: f007 fef1 bl 800a018 <HAL_PCD_SetupStageCallback>
8002236: e235 b.n 80026a4 <PCD_EP_ISR_Handler+0x5ca>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8002238: f9b7 302a ldrsh.w r3, [r7, #42] ; 0x2a
800223c: 2b00 cmp r3, #0
800223e: f280 8231 bge.w 80026a4 <PCD_EP_ISR_Handler+0x5ca>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8002242: 687b ldr r3, [r7, #4]
8002244: 681b ldr r3, [r3, #0]
8002246: 881b ldrh r3, [r3, #0]
8002248: b29a uxth r2, r3
800224a: f640 738f movw r3, #3983 ; 0xf8f
800224e: 4013 ands r3, r2
8002250: 83bb strh r3, [r7, #28]
8002252: 687b ldr r3, [r7, #4]
8002254: 681b ldr r3, [r3, #0]
8002256: 8bba ldrh r2, [r7, #28]
8002258: f042 0280 orr.w r2, r2, #128 ; 0x80
800225c: b292 uxth r2, r2
800225e: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8002260: 687b ldr r3, [r7, #4]
8002262: 681b ldr r3, [r3, #0]
8002264: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002268: b29b uxth r3, r3
800226a: 461a mov r2, r3
800226c: 6a7b ldr r3, [r7, #36] ; 0x24
800226e: 781b ldrb r3, [r3, #0]
8002270: 00db lsls r3, r3, #3
8002272: 4413 add r3, r2
8002274: 3306 adds r3, #6
8002276: 005b lsls r3, r3, #1
8002278: 687a ldr r2, [r7, #4]
800227a: 6812 ldr r2, [r2, #0]
800227c: 4413 add r3, r2
800227e: f503 6380 add.w r3, r3, #1024 ; 0x400
8002282: 881b ldrh r3, [r3, #0]
8002284: f3c3 0209 ubfx r2, r3, #0, #10
8002288: 6a7b ldr r3, [r7, #36] ; 0x24
800228a: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
800228c: 6a7b ldr r3, [r7, #36] ; 0x24
800228e: 69db ldr r3, [r3, #28]
8002290: 2b00 cmp r3, #0
8002292: d019 beq.n 80022c8 <PCD_EP_ISR_Handler+0x1ee>
8002294: 6a7b ldr r3, [r7, #36] ; 0x24
8002296: 695b ldr r3, [r3, #20]
8002298: 2b00 cmp r3, #0
800229a: d015 beq.n 80022c8 <PCD_EP_ISR_Handler+0x1ee>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800229c: 687b ldr r3, [r7, #4]
800229e: 6818 ldr r0, [r3, #0]
80022a0: 6a7b ldr r3, [r7, #36] ; 0x24
80022a2: 6959 ldr r1, [r3, #20]
80022a4: 6a7b ldr r3, [r7, #36] ; 0x24
80022a6: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80022a8: 6a7b ldr r3, [r7, #36] ; 0x24
80022aa: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80022ac: b29b uxth r3, r3
80022ae: f005 f9d5 bl 800765c <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
80022b2: 6a7b ldr r3, [r7, #36] ; 0x24
80022b4: 695a ldr r2, [r3, #20]
80022b6: 6a7b ldr r3, [r7, #36] ; 0x24
80022b8: 69db ldr r3, [r3, #28]
80022ba: 441a add r2, r3
80022bc: 6a7b ldr r3, [r7, #36] ; 0x24
80022be: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
80022c0: 2100 movs r1, #0
80022c2: 6878 ldr r0, [r7, #4]
80022c4: f007 feba bl 800a03c <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
80022c8: 687b ldr r3, [r7, #4]
80022ca: 681b ldr r3, [r3, #0]
80022cc: 61bb str r3, [r7, #24]
80022ce: 687b ldr r3, [r7, #4]
80022d0: 681b ldr r3, [r3, #0]
80022d2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80022d6: b29b uxth r3, r3
80022d8: 461a mov r2, r3
80022da: 69bb ldr r3, [r7, #24]
80022dc: 4413 add r3, r2
80022de: 61bb str r3, [r7, #24]
80022e0: 69bb ldr r3, [r7, #24]
80022e2: f203 430c addw r3, r3, #1036 ; 0x40c
80022e6: 617b str r3, [r7, #20]
80022e8: 6a7b ldr r3, [r7, #36] ; 0x24
80022ea: 691b ldr r3, [r3, #16]
80022ec: 2b00 cmp r3, #0
80022ee: d112 bne.n 8002316 <PCD_EP_ISR_Handler+0x23c>
80022f0: 697b ldr r3, [r7, #20]
80022f2: 881b ldrh r3, [r3, #0]
80022f4: b29b uxth r3, r3
80022f6: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80022fa: b29a uxth r2, r3
80022fc: 697b ldr r3, [r7, #20]
80022fe: 801a strh r2, [r3, #0]
8002300: 697b ldr r3, [r7, #20]
8002302: 881b ldrh r3, [r3, #0]
8002304: b29b uxth r3, r3
8002306: ea6f 4343 mvn.w r3, r3, lsl #17
800230a: ea6f 4353 mvn.w r3, r3, lsr #17
800230e: b29a uxth r2, r3
8002310: 697b ldr r3, [r7, #20]
8002312: 801a strh r2, [r3, #0]
8002314: e02f b.n 8002376 <PCD_EP_ISR_Handler+0x29c>
8002316: 6a7b ldr r3, [r7, #36] ; 0x24
8002318: 691b ldr r3, [r3, #16]
800231a: 2b3e cmp r3, #62 ; 0x3e
800231c: d813 bhi.n 8002346 <PCD_EP_ISR_Handler+0x26c>
800231e: 6a7b ldr r3, [r7, #36] ; 0x24
8002320: 691b ldr r3, [r3, #16]
8002322: 085b lsrs r3, r3, #1
8002324: 633b str r3, [r7, #48] ; 0x30
8002326: 6a7b ldr r3, [r7, #36] ; 0x24
8002328: 691b ldr r3, [r3, #16]
800232a: f003 0301 and.w r3, r3, #1
800232e: 2b00 cmp r3, #0
8002330: d002 beq.n 8002338 <PCD_EP_ISR_Handler+0x25e>
8002332: 6b3b ldr r3, [r7, #48] ; 0x30
8002334: 3301 adds r3, #1
8002336: 633b str r3, [r7, #48] ; 0x30
8002338: 6b3b ldr r3, [r7, #48] ; 0x30
800233a: b29b uxth r3, r3
800233c: 029b lsls r3, r3, #10
800233e: b29a uxth r2, r3
8002340: 697b ldr r3, [r7, #20]
8002342: 801a strh r2, [r3, #0]
8002344: e017 b.n 8002376 <PCD_EP_ISR_Handler+0x29c>
8002346: 6a7b ldr r3, [r7, #36] ; 0x24
8002348: 691b ldr r3, [r3, #16]
800234a: 095b lsrs r3, r3, #5
800234c: 633b str r3, [r7, #48] ; 0x30
800234e: 6a7b ldr r3, [r7, #36] ; 0x24
8002350: 691b ldr r3, [r3, #16]
8002352: f003 031f and.w r3, r3, #31
8002356: 2b00 cmp r3, #0
8002358: d102 bne.n 8002360 <PCD_EP_ISR_Handler+0x286>
800235a: 6b3b ldr r3, [r7, #48] ; 0x30
800235c: 3b01 subs r3, #1
800235e: 633b str r3, [r7, #48] ; 0x30
8002360: 6b3b ldr r3, [r7, #48] ; 0x30
8002362: b29b uxth r3, r3
8002364: 029b lsls r3, r3, #10
8002366: b29b uxth r3, r3
8002368: ea6f 4343 mvn.w r3, r3, lsl #17
800236c: ea6f 4353 mvn.w r3, r3, lsr #17
8002370: b29a uxth r2, r3
8002372: 697b ldr r3, [r7, #20]
8002374: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8002376: 687b ldr r3, [r7, #4]
8002378: 681b ldr r3, [r3, #0]
800237a: 881b ldrh r3, [r3, #0]
800237c: b29b uxth r3, r3
800237e: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8002382: f023 0370 bic.w r3, r3, #112 ; 0x70
8002386: 827b strh r3, [r7, #18]
8002388: 8a7b ldrh r3, [r7, #18]
800238a: f483 5380 eor.w r3, r3, #4096 ; 0x1000
800238e: 827b strh r3, [r7, #18]
8002390: 8a7b ldrh r3, [r7, #18]
8002392: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8002396: 827b strh r3, [r7, #18]
8002398: 687b ldr r3, [r7, #4]
800239a: 681a ldr r2, [r3, #0]
800239c: 8a7b ldrh r3, [r7, #18]
800239e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80023a2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80023a6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80023aa: f043 0380 orr.w r3, r3, #128 ; 0x80
80023ae: b29b uxth r3, r3
80023b0: 8013 strh r3, [r2, #0]
80023b2: e177 b.n 80026a4 <PCD_EP_ISR_Handler+0x5ca>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
80023b4: 687b ldr r3, [r7, #4]
80023b6: 681b ldr r3, [r3, #0]
80023b8: 461a mov r2, r3
80023ba: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
80023be: 009b lsls r3, r3, #2
80023c0: 4413 add r3, r2
80023c2: 881b ldrh r3, [r3, #0]
80023c4: 857b strh r3, [r7, #42] ; 0x2a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
80023c6: f9b7 302a ldrsh.w r3, [r7, #42] ; 0x2a
80023ca: 2b00 cmp r3, #0
80023cc: f280 80ea bge.w 80025a4 <PCD_EP_ISR_Handler+0x4ca>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
80023d0: 687b ldr r3, [r7, #4]
80023d2: 681b ldr r3, [r3, #0]
80023d4: 461a mov r2, r3
80023d6: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
80023da: 009b lsls r3, r3, #2
80023dc: 4413 add r3, r2
80023de: 881b ldrh r3, [r3, #0]
80023e0: b29a uxth r2, r3
80023e2: f640 738f movw r3, #3983 ; 0xf8f
80023e6: 4013 ands r3, r2
80023e8: 853b strh r3, [r7, #40] ; 0x28
80023ea: 687b ldr r3, [r7, #4]
80023ec: 681b ldr r3, [r3, #0]
80023ee: 461a mov r2, r3
80023f0: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
80023f4: 009b lsls r3, r3, #2
80023f6: 4413 add r3, r2
80023f8: 8d3a ldrh r2, [r7, #40] ; 0x28
80023fa: f042 0280 orr.w r2, r2, #128 ; 0x80
80023fe: b292 uxth r2, r2
8002400: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
8002402: f897 202d ldrb.w r2, [r7, #45] ; 0x2d
8002406: 4613 mov r3, r2
8002408: 009b lsls r3, r3, #2
800240a: 4413 add r3, r2
800240c: 00db lsls r3, r3, #3
800240e: f503 73b4 add.w r3, r3, #360 ; 0x168
8002412: 687a ldr r2, [r7, #4]
8002414: 4413 add r3, r2
8002416: 627b str r3, [r7, #36] ; 0x24
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8002418: 6a7b ldr r3, [r7, #36] ; 0x24
800241a: 7b1b ldrb r3, [r3, #12]
800241c: 2b00 cmp r3, #0
800241e: d122 bne.n 8002466 <PCD_EP_ISR_Handler+0x38c>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8002420: 687b ldr r3, [r7, #4]
8002422: 681b ldr r3, [r3, #0]
8002424: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002428: b29b uxth r3, r3
800242a: 461a mov r2, r3
800242c: 6a7b ldr r3, [r7, #36] ; 0x24
800242e: 781b ldrb r3, [r3, #0]
8002430: 00db lsls r3, r3, #3
8002432: 4413 add r3, r2
8002434: 3306 adds r3, #6
8002436: 005b lsls r3, r3, #1
8002438: 687a ldr r2, [r7, #4]
800243a: 6812 ldr r2, [r2, #0]
800243c: 4413 add r3, r2
800243e: f503 6380 add.w r3, r3, #1024 ; 0x400
8002442: 881b ldrh r3, [r3, #0]
8002444: f3c3 0309 ubfx r3, r3, #0, #10
8002448: 86fb strh r3, [r7, #54] ; 0x36
if (count != 0U)
800244a: 8efb ldrh r3, [r7, #54] ; 0x36
800244c: 2b00 cmp r3, #0
800244e: f000 8087 beq.w 8002560 <PCD_EP_ISR_Handler+0x486>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8002452: 687b ldr r3, [r7, #4]
8002454: 6818 ldr r0, [r3, #0]
8002456: 6a7b ldr r3, [r7, #36] ; 0x24
8002458: 6959 ldr r1, [r3, #20]
800245a: 6a7b ldr r3, [r7, #36] ; 0x24
800245c: 88da ldrh r2, [r3, #6]
800245e: 8efb ldrh r3, [r7, #54] ; 0x36
8002460: f005 f8fc bl 800765c <USB_ReadPMA>
8002464: e07c b.n 8002560 <PCD_EP_ISR_Handler+0x486>
}
}
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8002466: 6a7b ldr r3, [r7, #36] ; 0x24
8002468: 78db ldrb r3, [r3, #3]
800246a: 2b02 cmp r3, #2
800246c: d108 bne.n 8002480 <PCD_EP_ISR_Handler+0x3a6>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
800246e: 8d7b ldrh r3, [r7, #42] ; 0x2a
8002470: 461a mov r2, r3
8002472: 6a79 ldr r1, [r7, #36] ; 0x24
8002474: 6878 ldr r0, [r7, #4]
8002476: f000 f923 bl 80026c0 <HAL_PCD_EP_DB_Receive>
800247a: 4603 mov r3, r0
800247c: 86fb strh r3, [r7, #54] ; 0x36
800247e: e06f b.n 8002560 <PCD_EP_ISR_Handler+0x486>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
8002480: 687b ldr r3, [r7, #4]
8002482: 681b ldr r3, [r3, #0]
8002484: 461a mov r2, r3
8002486: 6a7b ldr r3, [r7, #36] ; 0x24
8002488: 781b ldrb r3, [r3, #0]
800248a: 009b lsls r3, r3, #2
800248c: 4413 add r3, r2
800248e: 881b ldrh r3, [r3, #0]
8002490: b29b uxth r3, r3
8002492: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002496: f023 0370 bic.w r3, r3, #112 ; 0x70
800249a: 847b strh r3, [r7, #34] ; 0x22
800249c: 687b ldr r3, [r7, #4]
800249e: 681b ldr r3, [r3, #0]
80024a0: 461a mov r2, r3
80024a2: 6a7b ldr r3, [r7, #36] ; 0x24
80024a4: 781b ldrb r3, [r3, #0]
80024a6: 009b lsls r3, r3, #2
80024a8: 441a add r2, r3
80024aa: 8c7b ldrh r3, [r7, #34] ; 0x22
80024ac: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80024b0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80024b4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80024b8: f043 03c0 orr.w r3, r3, #192 ; 0xc0
80024bc: b29b uxth r3, r3
80024be: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
80024c0: 687b ldr r3, [r7, #4]
80024c2: 681b ldr r3, [r3, #0]
80024c4: 461a mov r2, r3
80024c6: 6a7b ldr r3, [r7, #36] ; 0x24
80024c8: 781b ldrb r3, [r3, #0]
80024ca: 009b lsls r3, r3, #2
80024cc: 4413 add r3, r2
80024ce: 881b ldrh r3, [r3, #0]
80024d0: b29b uxth r3, r3
80024d2: f403 4380 and.w r3, r3, #16384 ; 0x4000
80024d6: 2b00 cmp r3, #0
80024d8: d021 beq.n 800251e <PCD_EP_ISR_Handler+0x444>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80024da: 687b ldr r3, [r7, #4]
80024dc: 681b ldr r3, [r3, #0]
80024de: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80024e2: b29b uxth r3, r3
80024e4: 461a mov r2, r3
80024e6: 6a7b ldr r3, [r7, #36] ; 0x24
80024e8: 781b ldrb r3, [r3, #0]
80024ea: 00db lsls r3, r3, #3
80024ec: 4413 add r3, r2
80024ee: 3302 adds r3, #2
80024f0: 005b lsls r3, r3, #1
80024f2: 687a ldr r2, [r7, #4]
80024f4: 6812 ldr r2, [r2, #0]
80024f6: 4413 add r3, r2
80024f8: f503 6380 add.w r3, r3, #1024 ; 0x400
80024fc: 881b ldrh r3, [r3, #0]
80024fe: f3c3 0309 ubfx r3, r3, #0, #10
8002502: 86fb strh r3, [r7, #54] ; 0x36
if (count != 0U)
8002504: 8efb ldrh r3, [r7, #54] ; 0x36
8002506: 2b00 cmp r3, #0
8002508: d02a beq.n 8002560 <PCD_EP_ISR_Handler+0x486>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
800250a: 687b ldr r3, [r7, #4]
800250c: 6818 ldr r0, [r3, #0]
800250e: 6a7b ldr r3, [r7, #36] ; 0x24
8002510: 6959 ldr r1, [r3, #20]
8002512: 6a7b ldr r3, [r7, #36] ; 0x24
8002514: 891a ldrh r2, [r3, #8]
8002516: 8efb ldrh r3, [r7, #54] ; 0x36
8002518: f005 f8a0 bl 800765c <USB_ReadPMA>
800251c: e020 b.n 8002560 <PCD_EP_ISR_Handler+0x486>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800251e: 687b ldr r3, [r7, #4]
8002520: 681b ldr r3, [r3, #0]
8002522: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002526: b29b uxth r3, r3
8002528: 461a mov r2, r3
800252a: 6a7b ldr r3, [r7, #36] ; 0x24
800252c: 781b ldrb r3, [r3, #0]
800252e: 00db lsls r3, r3, #3
8002530: 4413 add r3, r2
8002532: 3306 adds r3, #6
8002534: 005b lsls r3, r3, #1
8002536: 687a ldr r2, [r7, #4]
8002538: 6812 ldr r2, [r2, #0]
800253a: 4413 add r3, r2
800253c: f503 6380 add.w r3, r3, #1024 ; 0x400
8002540: 881b ldrh r3, [r3, #0]
8002542: f3c3 0309 ubfx r3, r3, #0, #10
8002546: 86fb strh r3, [r7, #54] ; 0x36
if (count != 0U)
8002548: 8efb ldrh r3, [r7, #54] ; 0x36
800254a: 2b00 cmp r3, #0
800254c: d008 beq.n 8002560 <PCD_EP_ISR_Handler+0x486>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
800254e: 687b ldr r3, [r7, #4]
8002550: 6818 ldr r0, [r3, #0]
8002552: 6a7b ldr r3, [r7, #36] ; 0x24
8002554: 6959 ldr r1, [r3, #20]
8002556: 6a7b ldr r3, [r7, #36] ; 0x24
8002558: 895a ldrh r2, [r3, #10]
800255a: 8efb ldrh r3, [r7, #54] ; 0x36
800255c: f005 f87e bl 800765c <USB_ReadPMA>
}
}
}
}
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8002560: 6a7b ldr r3, [r7, #36] ; 0x24
8002562: 69da ldr r2, [r3, #28]
8002564: 8efb ldrh r3, [r7, #54] ; 0x36
8002566: 441a add r2, r3
8002568: 6a7b ldr r3, [r7, #36] ; 0x24
800256a: 61da str r2, [r3, #28]
ep->xfer_buff += count;
800256c: 6a7b ldr r3, [r7, #36] ; 0x24
800256e: 695a ldr r2, [r3, #20]
8002570: 8efb ldrh r3, [r7, #54] ; 0x36
8002572: 441a add r2, r3
8002574: 6a7b ldr r3, [r7, #36] ; 0x24
8002576: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8002578: 6a7b ldr r3, [r7, #36] ; 0x24
800257a: 699b ldr r3, [r3, #24]
800257c: 2b00 cmp r3, #0
800257e: d004 beq.n 800258a <PCD_EP_ISR_Handler+0x4b0>
8002580: 8efa ldrh r2, [r7, #54] ; 0x36
8002582: 6a7b ldr r3, [r7, #36] ; 0x24
8002584: 691b ldr r3, [r3, #16]
8002586: 429a cmp r2, r3
8002588: d206 bcs.n 8002598 <PCD_EP_ISR_Handler+0x4be>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
800258a: 6a7b ldr r3, [r7, #36] ; 0x24
800258c: 781b ldrb r3, [r3, #0]
800258e: 4619 mov r1, r3
8002590: 6878 ldr r0, [r7, #4]
8002592: f007 fd53 bl 800a03c <HAL_PCD_DataOutStageCallback>
8002596: e005 b.n 80025a4 <PCD_EP_ISR_Handler+0x4ca>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void) USB_EPStartXfer(hpcd->Instance, ep);
8002598: 687b ldr r3, [r7, #4]
800259a: 681b ldr r3, [r3, #0]
800259c: 6a79 ldr r1, [r7, #36] ; 0x24
800259e: 4618 mov r0, r3
80025a0: f003 fdba bl 8006118 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
80025a4: 8d7b ldrh r3, [r7, #42] ; 0x2a
80025a6: f003 0380 and.w r3, r3, #128 ; 0x80
80025aa: 2b00 cmp r3, #0
80025ac: d07a beq.n 80026a4 <PCD_EP_ISR_Handler+0x5ca>
{
ep = &hpcd->IN_ep[epindex];
80025ae: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
80025b2: 1c5a adds r2, r3, #1
80025b4: 4613 mov r3, r2
80025b6: 009b lsls r3, r3, #2
80025b8: 4413 add r3, r2
80025ba: 00db lsls r3, r3, #3
80025bc: 687a ldr r2, [r7, #4]
80025be: 4413 add r3, r2
80025c0: 627b str r3, [r7, #36] ; 0x24
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
80025c2: 687b ldr r3, [r7, #4]
80025c4: 681b ldr r3, [r3, #0]
80025c6: 461a mov r2, r3
80025c8: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
80025cc: 009b lsls r3, r3, #2
80025ce: 4413 add r3, r2
80025d0: 881b ldrh r3, [r3, #0]
80025d2: b29b uxth r3, r3
80025d4: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
80025d8: f023 0370 bic.w r3, r3, #112 ; 0x70
80025dc: 843b strh r3, [r7, #32]
80025de: 687b ldr r3, [r7, #4]
80025e0: 681b ldr r3, [r3, #0]
80025e2: 461a mov r2, r3
80025e4: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
80025e8: 009b lsls r3, r3, #2
80025ea: 441a add r2, r3
80025ec: 8c3b ldrh r3, [r7, #32]
80025ee: ea6f 4343 mvn.w r3, r3, lsl #17
80025f2: ea6f 4353 mvn.w r3, r3, lsr #17
80025f6: b29b uxth r3, r3
80025f8: 8013 strh r3, [r2, #0]
/* Manage all non bulk transaction or Bulk Single Buffer Transaction */
if ((ep->type != EP_TYPE_BULK) ||
80025fa: 6a7b ldr r3, [r7, #36] ; 0x24
80025fc: 78db ldrb r3, [r3, #3]
80025fe: 2b02 cmp r3, #2
8002600: d108 bne.n 8002614 <PCD_EP_ISR_Handler+0x53a>
((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
8002602: 6a7b ldr r3, [r7, #36] ; 0x24
8002604: 78db ldrb r3, [r3, #3]
if ((ep->type != EP_TYPE_BULK) ||
8002606: 2b02 cmp r3, #2
8002608: d146 bne.n 8002698 <PCD_EP_ISR_Handler+0x5be>
((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
800260a: 8d7b ldrh r3, [r7, #42] ; 0x2a
800260c: f403 7380 and.w r3, r3, #256 ; 0x100
8002610: 2b00 cmp r3, #0
8002612: d141 bne.n 8002698 <PCD_EP_ISR_Handler+0x5be>
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8002614: 687b ldr r3, [r7, #4]
8002616: 681b ldr r3, [r3, #0]
8002618: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800261c: b29b uxth r3, r3
800261e: 461a mov r2, r3
8002620: 6a7b ldr r3, [r7, #36] ; 0x24
8002622: 781b ldrb r3, [r3, #0]
8002624: 00db lsls r3, r3, #3
8002626: 4413 add r3, r2
8002628: 3302 adds r3, #2
800262a: 005b lsls r3, r3, #1
800262c: 687a ldr r2, [r7, #4]
800262e: 6812 ldr r2, [r2, #0]
8002630: 4413 add r3, r2
8002632: f503 6380 add.w r3, r3, #1024 ; 0x400
8002636: 881b ldrh r3, [r3, #0]
8002638: f3c3 0309 ubfx r3, r3, #0, #10
800263c: 83fb strh r3, [r7, #30]
if (ep->xfer_len > TxByteNbre)
800263e: 6a7b ldr r3, [r7, #36] ; 0x24
8002640: 699a ldr r2, [r3, #24]
8002642: 8bfb ldrh r3, [r7, #30]
8002644: 429a cmp r2, r3
8002646: d906 bls.n 8002656 <PCD_EP_ISR_Handler+0x57c>
{
ep->xfer_len -= TxByteNbre;
8002648: 6a7b ldr r3, [r7, #36] ; 0x24
800264a: 699a ldr r2, [r3, #24]
800264c: 8bfb ldrh r3, [r7, #30]
800264e: 1ad2 subs r2, r2, r3
8002650: 6a7b ldr r3, [r7, #36] ; 0x24
8002652: 619a str r2, [r3, #24]
8002654: e002 b.n 800265c <PCD_EP_ISR_Handler+0x582>
}
else
{
ep->xfer_len = 0U;
8002656: 6a7b ldr r3, [r7, #36] ; 0x24
8002658: 2200 movs r2, #0
800265a: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
800265c: 6a7b ldr r3, [r7, #36] ; 0x24
800265e: 699b ldr r3, [r3, #24]
8002660: 2b00 cmp r3, #0
8002662: d106 bne.n 8002672 <PCD_EP_ISR_Handler+0x598>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002664: 6a7b ldr r3, [r7, #36] ; 0x24
8002666: 781b ldrb r3, [r3, #0]
8002668: 4619 mov r1, r3
800266a: 6878 ldr r0, [r7, #4]
800266c: f007 fd01 bl 800a072 <HAL_PCD_DataInStageCallback>
8002670: e018 b.n 80026a4 <PCD_EP_ISR_Handler+0x5ca>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxByteNbre;
8002672: 6a7b ldr r3, [r7, #36] ; 0x24
8002674: 695a ldr r2, [r3, #20]
8002676: 8bfb ldrh r3, [r7, #30]
8002678: 441a add r2, r3
800267a: 6a7b ldr r3, [r7, #36] ; 0x24
800267c: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
800267e: 6a7b ldr r3, [r7, #36] ; 0x24
8002680: 69da ldr r2, [r3, #28]
8002682: 8bfb ldrh r3, [r7, #30]
8002684: 441a add r2, r3
8002686: 6a7b ldr r3, [r7, #36] ; 0x24
8002688: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
800268a: 687b ldr r3, [r7, #4]
800268c: 681b ldr r3, [r3, #0]
800268e: 6a79 ldr r1, [r7, #36] ; 0x24
8002690: 4618 mov r0, r3
8002692: f003 fd41 bl 8006118 <USB_EPStartXfer>
if (ep->xfer_len == 0U)
8002696: e005 b.n 80026a4 <PCD_EP_ISR_Handler+0x5ca>
}
}
/* bulk in double buffer enable in case of transferLen> Ep_Mps */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8002698: 8d7b ldrh r3, [r7, #42] ; 0x2a
800269a: 461a mov r2, r3
800269c: 6a79 ldr r1, [r7, #36] ; 0x24
800269e: 6878 ldr r0, [r7, #4]
80026a0: f000 f91b bl 80028da <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
80026a4: 687b ldr r3, [r7, #4]
80026a6: 681b ldr r3, [r3, #0]
80026a8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80026ac: b29b uxth r3, r3
80026ae: b21b sxth r3, r3
80026b0: 2b00 cmp r3, #0
80026b2: f6ff ad17 blt.w 80020e4 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
80026b6: 2300 movs r3, #0
}
80026b8: 4618 mov r0, r3
80026ba: 3738 adds r7, #56 ; 0x38
80026bc: 46bd mov sp, r7
80026be: bd80 pop {r7, pc}
080026c0 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
80026c0: b580 push {r7, lr}
80026c2: b088 sub sp, #32
80026c4: af00 add r7, sp, #0
80026c6: 60f8 str r0, [r7, #12]
80026c8: 60b9 str r1, [r7, #8]
80026ca: 4613 mov r3, r2
80026cc: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
80026ce: 88fb ldrh r3, [r7, #6]
80026d0: f403 4380 and.w r3, r3, #16384 ; 0x4000
80026d4: 2b00 cmp r3, #0
80026d6: d07e beq.n 80027d6 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80026d8: 68fb ldr r3, [r7, #12]
80026da: 681b ldr r3, [r3, #0]
80026dc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80026e0: b29b uxth r3, r3
80026e2: 461a mov r2, r3
80026e4: 68bb ldr r3, [r7, #8]
80026e6: 781b ldrb r3, [r3, #0]
80026e8: 00db lsls r3, r3, #3
80026ea: 4413 add r3, r2
80026ec: 3302 adds r3, #2
80026ee: 005b lsls r3, r3, #1
80026f0: 68fa ldr r2, [r7, #12]
80026f2: 6812 ldr r2, [r2, #0]
80026f4: 4413 add r3, r2
80026f6: f503 6380 add.w r3, r3, #1024 ; 0x400
80026fa: 881b ldrh r3, [r3, #0]
80026fc: f3c3 0309 ubfx r3, r3, #0, #10
8002700: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8002702: 68bb ldr r3, [r7, #8]
8002704: 699a ldr r2, [r3, #24]
8002706: 8b7b ldrh r3, [r7, #26]
8002708: 429a cmp r2, r3
800270a: d306 bcc.n 800271a <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
800270c: 68bb ldr r3, [r7, #8]
800270e: 699a ldr r2, [r3, #24]
8002710: 8b7b ldrh r3, [r7, #26]
8002712: 1ad2 subs r2, r2, r3
8002714: 68bb ldr r3, [r7, #8]
8002716: 619a str r2, [r3, #24]
8002718: e002 b.n 8002720 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
800271a: 68bb ldr r3, [r7, #8]
800271c: 2200 movs r2, #0
800271e: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8002720: 68bb ldr r3, [r7, #8]
8002722: 699b ldr r3, [r3, #24]
8002724: 2b00 cmp r3, #0
8002726: d123 bne.n 8002770 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8002728: 68fb ldr r3, [r7, #12]
800272a: 681b ldr r3, [r3, #0]
800272c: 461a mov r2, r3
800272e: 68bb ldr r3, [r7, #8]
8002730: 781b ldrb r3, [r3, #0]
8002732: 009b lsls r3, r3, #2
8002734: 4413 add r3, r2
8002736: 881b ldrh r3, [r3, #0]
8002738: b29b uxth r3, r3
800273a: f423 4380 bic.w r3, r3, #16384 ; 0x4000
800273e: f023 0370 bic.w r3, r3, #112 ; 0x70
8002742: 833b strh r3, [r7, #24]
8002744: 8b3b ldrh r3, [r7, #24]
8002746: f483 5300 eor.w r3, r3, #8192 ; 0x2000
800274a: 833b strh r3, [r7, #24]
800274c: 68fb ldr r3, [r7, #12]
800274e: 681b ldr r3, [r3, #0]
8002750: 461a mov r2, r3
8002752: 68bb ldr r3, [r7, #8]
8002754: 781b ldrb r3, [r3, #0]
8002756: 009b lsls r3, r3, #2
8002758: 441a add r2, r3
800275a: 8b3b ldrh r3, [r7, #24]
800275c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002760: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002764: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002768: f043 0380 orr.w r3, r3, #128 ; 0x80
800276c: b29b uxth r3, r3
800276e: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked sate which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002770: 88fb ldrh r3, [r7, #6]
8002772: f003 0340 and.w r3, r3, #64 ; 0x40
8002776: 2b00 cmp r3, #0
8002778: d01f beq.n 80027ba <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
800277a: 68fb ldr r3, [r7, #12]
800277c: 681b ldr r3, [r3, #0]
800277e: 461a mov r2, r3
8002780: 68bb ldr r3, [r7, #8]
8002782: 781b ldrb r3, [r3, #0]
8002784: 009b lsls r3, r3, #2
8002786: 4413 add r3, r2
8002788: 881b ldrh r3, [r3, #0]
800278a: b29b uxth r3, r3
800278c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002790: f023 0370 bic.w r3, r3, #112 ; 0x70
8002794: 82fb strh r3, [r7, #22]
8002796: 68fb ldr r3, [r7, #12]
8002798: 681b ldr r3, [r3, #0]
800279a: 461a mov r2, r3
800279c: 68bb ldr r3, [r7, #8]
800279e: 781b ldrb r3, [r3, #0]
80027a0: 009b lsls r3, r3, #2
80027a2: 441a add r2, r3
80027a4: 8afb ldrh r3, [r7, #22]
80027a6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80027aa: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80027ae: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80027b2: f043 03c0 orr.w r3, r3, #192 ; 0xc0
80027b6: b29b uxth r3, r3
80027b8: 8013 strh r3, [r2, #0]
}
if (count != 0U)
80027ba: 8b7b ldrh r3, [r7, #26]
80027bc: 2b00 cmp r3, #0
80027be: f000 8087 beq.w 80028d0 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
80027c2: 68fb ldr r3, [r7, #12]
80027c4: 6818 ldr r0, [r3, #0]
80027c6: 68bb ldr r3, [r7, #8]
80027c8: 6959 ldr r1, [r3, #20]
80027ca: 68bb ldr r3, [r7, #8]
80027cc: 891a ldrh r2, [r3, #8]
80027ce: 8b7b ldrh r3, [r7, #26]
80027d0: f004 ff44 bl 800765c <USB_ReadPMA>
80027d4: e07c b.n 80028d0 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80027d6: 68fb ldr r3, [r7, #12]
80027d8: 681b ldr r3, [r3, #0]
80027da: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80027de: b29b uxth r3, r3
80027e0: 461a mov r2, r3
80027e2: 68bb ldr r3, [r7, #8]
80027e4: 781b ldrb r3, [r3, #0]
80027e6: 00db lsls r3, r3, #3
80027e8: 4413 add r3, r2
80027ea: 3306 adds r3, #6
80027ec: 005b lsls r3, r3, #1
80027ee: 68fa ldr r2, [r7, #12]
80027f0: 6812 ldr r2, [r2, #0]
80027f2: 4413 add r3, r2
80027f4: f503 6380 add.w r3, r3, #1024 ; 0x400
80027f8: 881b ldrh r3, [r3, #0]
80027fa: f3c3 0309 ubfx r3, r3, #0, #10
80027fe: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8002800: 68bb ldr r3, [r7, #8]
8002802: 699a ldr r2, [r3, #24]
8002804: 8b7b ldrh r3, [r7, #26]
8002806: 429a cmp r2, r3
8002808: d306 bcc.n 8002818 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
800280a: 68bb ldr r3, [r7, #8]
800280c: 699a ldr r2, [r3, #24]
800280e: 8b7b ldrh r3, [r7, #26]
8002810: 1ad2 subs r2, r2, r3
8002812: 68bb ldr r3, [r7, #8]
8002814: 619a str r2, [r3, #24]
8002816: e002 b.n 800281e <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8002818: 68bb ldr r3, [r7, #8]
800281a: 2200 movs r2, #0
800281c: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
800281e: 68bb ldr r3, [r7, #8]
8002820: 699b ldr r3, [r3, #24]
8002822: 2b00 cmp r3, #0
8002824: d123 bne.n 800286e <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8002826: 68fb ldr r3, [r7, #12]
8002828: 681b ldr r3, [r3, #0]
800282a: 461a mov r2, r3
800282c: 68bb ldr r3, [r7, #8]
800282e: 781b ldrb r3, [r3, #0]
8002830: 009b lsls r3, r3, #2
8002832: 4413 add r3, r2
8002834: 881b ldrh r3, [r3, #0]
8002836: b29b uxth r3, r3
8002838: f423 4380 bic.w r3, r3, #16384 ; 0x4000
800283c: f023 0370 bic.w r3, r3, #112 ; 0x70
8002840: 83fb strh r3, [r7, #30]
8002842: 8bfb ldrh r3, [r7, #30]
8002844: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8002848: 83fb strh r3, [r7, #30]
800284a: 68fb ldr r3, [r7, #12]
800284c: 681b ldr r3, [r3, #0]
800284e: 461a mov r2, r3
8002850: 68bb ldr r3, [r7, #8]
8002852: 781b ldrb r3, [r3, #0]
8002854: 009b lsls r3, r3, #2
8002856: 441a add r2, r3
8002858: 8bfb ldrh r3, [r7, #30]
800285a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800285e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002862: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002866: f043 0380 orr.w r3, r3, #128 ; 0x80
800286a: b29b uxth r3, r3
800286c: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
800286e: 88fb ldrh r3, [r7, #6]
8002870: f003 0340 and.w r3, r3, #64 ; 0x40
8002874: 2b00 cmp r3, #0
8002876: d11f bne.n 80028b8 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
8002878: 68fb ldr r3, [r7, #12]
800287a: 681b ldr r3, [r3, #0]
800287c: 461a mov r2, r3
800287e: 68bb ldr r3, [r7, #8]
8002880: 781b ldrb r3, [r3, #0]
8002882: 009b lsls r3, r3, #2
8002884: 4413 add r3, r2
8002886: 881b ldrh r3, [r3, #0]
8002888: b29b uxth r3, r3
800288a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800288e: f023 0370 bic.w r3, r3, #112 ; 0x70
8002892: 83bb strh r3, [r7, #28]
8002894: 68fb ldr r3, [r7, #12]
8002896: 681b ldr r3, [r3, #0]
8002898: 461a mov r2, r3
800289a: 68bb ldr r3, [r7, #8]
800289c: 781b ldrb r3, [r3, #0]
800289e: 009b lsls r3, r3, #2
80028a0: 441a add r2, r3
80028a2: 8bbb ldrh r3, [r7, #28]
80028a4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80028a8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80028ac: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80028b0: f043 03c0 orr.w r3, r3, #192 ; 0xc0
80028b4: b29b uxth r3, r3
80028b6: 8013 strh r3, [r2, #0]
}
if (count != 0U)
80028b8: 8b7b ldrh r3, [r7, #26]
80028ba: 2b00 cmp r3, #0
80028bc: d008 beq.n 80028d0 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80028be: 68fb ldr r3, [r7, #12]
80028c0: 6818 ldr r0, [r3, #0]
80028c2: 68bb ldr r3, [r7, #8]
80028c4: 6959 ldr r1, [r3, #20]
80028c6: 68bb ldr r3, [r7, #8]
80028c8: 895a ldrh r2, [r3, #10]
80028ca: 8b7b ldrh r3, [r7, #26]
80028cc: f004 fec6 bl 800765c <USB_ReadPMA>
}
}
return count;
80028d0: 8b7b ldrh r3, [r7, #26]
}
80028d2: 4618 mov r0, r3
80028d4: 3720 adds r7, #32
80028d6: 46bd mov sp, r7
80028d8: bd80 pop {r7, pc}
080028da <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
80028da: b580 push {r7, lr}
80028dc: b092 sub sp, #72 ; 0x48
80028de: af00 add r7, sp, #0
80028e0: 60f8 str r0, [r7, #12]
80028e2: 60b9 str r1, [r7, #8]
80028e4: 4613 mov r3, r2
80028e6: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxByteNbre;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80028e8: 88fb ldrh r3, [r7, #6]
80028ea: f003 0340 and.w r3, r3, #64 ; 0x40
80028ee: 2b00 cmp r3, #0
80028f0: f000 8132 beq.w 8002b58 <HAL_PCD_EP_DB_Transmit+0x27e>
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80028f4: 68fb ldr r3, [r7, #12]
80028f6: 681b ldr r3, [r3, #0]
80028f8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80028fc: b29b uxth r3, r3
80028fe: 461a mov r2, r3
8002900: 68bb ldr r3, [r7, #8]
8002902: 781b ldrb r3, [r3, #0]
8002904: 00db lsls r3, r3, #3
8002906: 4413 add r3, r2
8002908: 3302 adds r3, #2
800290a: 005b lsls r3, r3, #1
800290c: 68fa ldr r2, [r7, #12]
800290e: 6812 ldr r2, [r2, #0]
8002910: 4413 add r3, r2
8002912: f503 6380 add.w r3, r3, #1024 ; 0x400
8002916: 881b ldrh r3, [r3, #0]
8002918: f3c3 0309 ubfx r3, r3, #0, #10
800291c: 85fb strh r3, [r7, #46] ; 0x2e
if (ep->xfer_len > TxByteNbre)
800291e: 68bb ldr r3, [r7, #8]
8002920: 699a ldr r2, [r3, #24]
8002922: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002924: 429a cmp r2, r3
8002926: d906 bls.n 8002936 <HAL_PCD_EP_DB_Transmit+0x5c>
{
ep->xfer_len -= TxByteNbre;
8002928: 68bb ldr r3, [r7, #8]
800292a: 699a ldr r2, [r3, #24]
800292c: 8dfb ldrh r3, [r7, #46] ; 0x2e
800292e: 1ad2 subs r2, r2, r3
8002930: 68bb ldr r3, [r7, #8]
8002932: 619a str r2, [r3, #24]
8002934: e002 b.n 800293c <HAL_PCD_EP_DB_Transmit+0x62>
}
else
{
ep->xfer_len = 0U;
8002936: 68bb ldr r3, [r7, #8]
8002938: 2200 movs r2, #0
800293a: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
800293c: 68bb ldr r3, [r7, #8]
800293e: 699b ldr r3, [r3, #24]
8002940: 2b00 cmp r3, #0
8002942: d12c bne.n 800299e <HAL_PCD_EP_DB_Transmit+0xc4>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002944: 68bb ldr r3, [r7, #8]
8002946: 781b ldrb r3, [r3, #0]
8002948: 4619 mov r1, r3
800294a: 68f8 ldr r0, [r7, #12]
800294c: f007 fb91 bl 800a072 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002950: 88fb ldrh r3, [r7, #6]
8002952: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002956: 2b00 cmp r3, #0
8002958: f000 822f beq.w 8002dba <HAL_PCD_EP_DB_Transmit+0x4e0>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
800295c: 68fb ldr r3, [r7, #12]
800295e: 681b ldr r3, [r3, #0]
8002960: 461a mov r2, r3
8002962: 68bb ldr r3, [r7, #8]
8002964: 781b ldrb r3, [r3, #0]
8002966: 009b lsls r3, r3, #2
8002968: 4413 add r3, r2
800296a: 881b ldrh r3, [r3, #0]
800296c: b29b uxth r3, r3
800296e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002972: f023 0370 bic.w r3, r3, #112 ; 0x70
8002976: 827b strh r3, [r7, #18]
8002978: 68fb ldr r3, [r7, #12]
800297a: 681b ldr r3, [r3, #0]
800297c: 461a mov r2, r3
800297e: 68bb ldr r3, [r7, #8]
8002980: 781b ldrb r3, [r3, #0]
8002982: 009b lsls r3, r3, #2
8002984: 441a add r2, r3
8002986: 8a7b ldrh r3, [r7, #18]
8002988: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800298c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002990: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8002994: f043 0380 orr.w r3, r3, #128 ; 0x80
8002998: b29b uxth r3, r3
800299a: 8013 strh r3, [r2, #0]
800299c: e20d b.n 8002dba <HAL_PCD_EP_DB_Transmit+0x4e0>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800299e: 88fb ldrh r3, [r7, #6]
80029a0: f403 4380 and.w r3, r3, #16384 ; 0x4000
80029a4: 2b00 cmp r3, #0
80029a6: d01f beq.n 80029e8 <HAL_PCD_EP_DB_Transmit+0x10e>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
80029a8: 68fb ldr r3, [r7, #12]
80029aa: 681b ldr r3, [r3, #0]
80029ac: 461a mov r2, r3
80029ae: 68bb ldr r3, [r7, #8]
80029b0: 781b ldrb r3, [r3, #0]
80029b2: 009b lsls r3, r3, #2
80029b4: 4413 add r3, r2
80029b6: 881b ldrh r3, [r3, #0]
80029b8: b29b uxth r3, r3
80029ba: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80029be: f023 0370 bic.w r3, r3, #112 ; 0x70
80029c2: 84bb strh r3, [r7, #36] ; 0x24
80029c4: 68fb ldr r3, [r7, #12]
80029c6: 681b ldr r3, [r3, #0]
80029c8: 461a mov r2, r3
80029ca: 68bb ldr r3, [r7, #8]
80029cc: 781b ldrb r3, [r3, #0]
80029ce: 009b lsls r3, r3, #2
80029d0: 441a add r2, r3
80029d2: 8cbb ldrh r3, [r7, #36] ; 0x24
80029d4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80029d8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80029dc: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80029e0: f043 0380 orr.w r3, r3, #128 ; 0x80
80029e4: b29b uxth r3, r3
80029e6: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80029e8: 68bb ldr r3, [r7, #8]
80029ea: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
80029ee: 2b01 cmp r3, #1
80029f0: f040 81e3 bne.w 8002dba <HAL_PCD_EP_DB_Transmit+0x4e0>
{
ep->xfer_buff += TxByteNbre;
80029f4: 68bb ldr r3, [r7, #8]
80029f6: 695a ldr r2, [r3, #20]
80029f8: 8dfb ldrh r3, [r7, #46] ; 0x2e
80029fa: 441a add r2, r3
80029fc: 68bb ldr r3, [r7, #8]
80029fe: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
8002a00: 68bb ldr r3, [r7, #8]
8002a02: 69da ldr r2, [r3, #28]
8002a04: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002a06: 441a add r2, r3
8002a08: 68bb ldr r3, [r7, #8]
8002a0a: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8002a0c: 68bb ldr r3, [r7, #8]
8002a0e: 6a1a ldr r2, [r3, #32]
8002a10: 68bb ldr r3, [r7, #8]
8002a12: 691b ldr r3, [r3, #16]
8002a14: 429a cmp r2, r3
8002a16: d309 bcc.n 8002a2c <HAL_PCD_EP_DB_Transmit+0x152>
{
len = ep->maxpacket;
8002a18: 68bb ldr r3, [r7, #8]
8002a1a: 691b ldr r3, [r3, #16]
8002a1c: 63bb str r3, [r7, #56] ; 0x38
ep->xfer_len_db -= len;
8002a1e: 68bb ldr r3, [r7, #8]
8002a20: 6a1a ldr r2, [r3, #32]
8002a22: 6bbb ldr r3, [r7, #56] ; 0x38
8002a24: 1ad2 subs r2, r2, r3
8002a26: 68bb ldr r3, [r7, #8]
8002a28: 621a str r2, [r3, #32]
8002a2a: e014 b.n 8002a56 <HAL_PCD_EP_DB_Transmit+0x17c>
}
else if (ep->xfer_len_db == 0U)
8002a2c: 68bb ldr r3, [r7, #8]
8002a2e: 6a1b ldr r3, [r3, #32]
8002a30: 2b00 cmp r3, #0
8002a32: d106 bne.n 8002a42 <HAL_PCD_EP_DB_Transmit+0x168>
{
len = TxByteNbre;
8002a34: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002a36: 63bb str r3, [r7, #56] ; 0x38
ep->xfer_fill_db = 0U;
8002a38: 68bb ldr r3, [r7, #8]
8002a3a: 2200 movs r2, #0
8002a3c: f883 2024 strb.w r2, [r3, #36] ; 0x24
8002a40: e009 b.n 8002a56 <HAL_PCD_EP_DB_Transmit+0x17c>
}
else
{
ep->xfer_fill_db = 0U;
8002a42: 68bb ldr r3, [r7, #8]
8002a44: 2200 movs r2, #0
8002a46: f883 2024 strb.w r2, [r3, #36] ; 0x24
len = ep->xfer_len_db;
8002a4a: 68bb ldr r3, [r7, #8]
8002a4c: 6a1b ldr r3, [r3, #32]
8002a4e: 63bb str r3, [r7, #56] ; 0x38
ep->xfer_len_db = 0U;
8002a50: 68bb ldr r3, [r7, #8]
8002a52: 2200 movs r2, #0
8002a54: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8002a56: 68bb ldr r3, [r7, #8]
8002a58: 785b ldrb r3, [r3, #1]
8002a5a: 2b00 cmp r3, #0
8002a5c: d155 bne.n 8002b0a <HAL_PCD_EP_DB_Transmit+0x230>
8002a5e: 68fb ldr r3, [r7, #12]
8002a60: 681b ldr r3, [r3, #0]
8002a62: 61bb str r3, [r7, #24]
8002a64: 68fb ldr r3, [r7, #12]
8002a66: 681b ldr r3, [r3, #0]
8002a68: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002a6c: b29b uxth r3, r3
8002a6e: 461a mov r2, r3
8002a70: 69bb ldr r3, [r7, #24]
8002a72: 4413 add r3, r2
8002a74: 61bb str r3, [r7, #24]
8002a76: 68bb ldr r3, [r7, #8]
8002a78: 781b ldrb r3, [r3, #0]
8002a7a: 011a lsls r2, r3, #4
8002a7c: 69bb ldr r3, [r7, #24]
8002a7e: 4413 add r3, r2
8002a80: f203 4304 addw r3, r3, #1028 ; 0x404
8002a84: 617b str r3, [r7, #20]
8002a86: 6bbb ldr r3, [r7, #56] ; 0x38
8002a88: 2b00 cmp r3, #0
8002a8a: d112 bne.n 8002ab2 <HAL_PCD_EP_DB_Transmit+0x1d8>
8002a8c: 697b ldr r3, [r7, #20]
8002a8e: 881b ldrh r3, [r3, #0]
8002a90: b29b uxth r3, r3
8002a92: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8002a96: b29a uxth r2, r3
8002a98: 697b ldr r3, [r7, #20]
8002a9a: 801a strh r2, [r3, #0]
8002a9c: 697b ldr r3, [r7, #20]
8002a9e: 881b ldrh r3, [r3, #0]
8002aa0: b29b uxth r3, r3
8002aa2: ea6f 4343 mvn.w r3, r3, lsl #17
8002aa6: ea6f 4353 mvn.w r3, r3, lsr #17
8002aaa: b29a uxth r2, r3
8002aac: 697b ldr r3, [r7, #20]
8002aae: 801a strh r2, [r3, #0]
8002ab0: e047 b.n 8002b42 <HAL_PCD_EP_DB_Transmit+0x268>
8002ab2: 6bbb ldr r3, [r7, #56] ; 0x38
8002ab4: 2b3e cmp r3, #62 ; 0x3e
8002ab6: d811 bhi.n 8002adc <HAL_PCD_EP_DB_Transmit+0x202>
8002ab8: 6bbb ldr r3, [r7, #56] ; 0x38
8002aba: 085b lsrs r3, r3, #1
8002abc: 62bb str r3, [r7, #40] ; 0x28
8002abe: 6bbb ldr r3, [r7, #56] ; 0x38
8002ac0: f003 0301 and.w r3, r3, #1
8002ac4: 2b00 cmp r3, #0
8002ac6: d002 beq.n 8002ace <HAL_PCD_EP_DB_Transmit+0x1f4>
8002ac8: 6abb ldr r3, [r7, #40] ; 0x28
8002aca: 3301 adds r3, #1
8002acc: 62bb str r3, [r7, #40] ; 0x28
8002ace: 6abb ldr r3, [r7, #40] ; 0x28
8002ad0: b29b uxth r3, r3
8002ad2: 029b lsls r3, r3, #10
8002ad4: b29a uxth r2, r3
8002ad6: 697b ldr r3, [r7, #20]
8002ad8: 801a strh r2, [r3, #0]
8002ada: e032 b.n 8002b42 <HAL_PCD_EP_DB_Transmit+0x268>
8002adc: 6bbb ldr r3, [r7, #56] ; 0x38
8002ade: 095b lsrs r3, r3, #5
8002ae0: 62bb str r3, [r7, #40] ; 0x28
8002ae2: 6bbb ldr r3, [r7, #56] ; 0x38
8002ae4: f003 031f and.w r3, r3, #31
8002ae8: 2b00 cmp r3, #0
8002aea: d102 bne.n 8002af2 <HAL_PCD_EP_DB_Transmit+0x218>
8002aec: 6abb ldr r3, [r7, #40] ; 0x28
8002aee: 3b01 subs r3, #1
8002af0: 62bb str r3, [r7, #40] ; 0x28
8002af2: 6abb ldr r3, [r7, #40] ; 0x28
8002af4: b29b uxth r3, r3
8002af6: 029b lsls r3, r3, #10
8002af8: b29b uxth r3, r3
8002afa: ea6f 4343 mvn.w r3, r3, lsl #17
8002afe: ea6f 4353 mvn.w r3, r3, lsr #17
8002b02: b29a uxth r2, r3
8002b04: 697b ldr r3, [r7, #20]
8002b06: 801a strh r2, [r3, #0]
8002b08: e01b b.n 8002b42 <HAL_PCD_EP_DB_Transmit+0x268>
8002b0a: 68bb ldr r3, [r7, #8]
8002b0c: 785b ldrb r3, [r3, #1]
8002b0e: 2b01 cmp r3, #1
8002b10: d117 bne.n 8002b42 <HAL_PCD_EP_DB_Transmit+0x268>
8002b12: 68fb ldr r3, [r7, #12]
8002b14: 681b ldr r3, [r3, #0]
8002b16: 623b str r3, [r7, #32]
8002b18: 68fb ldr r3, [r7, #12]
8002b1a: 681b ldr r3, [r3, #0]
8002b1c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002b20: b29b uxth r3, r3
8002b22: 461a mov r2, r3
8002b24: 6a3b ldr r3, [r7, #32]
8002b26: 4413 add r3, r2
8002b28: 623b str r3, [r7, #32]
8002b2a: 68bb ldr r3, [r7, #8]
8002b2c: 781b ldrb r3, [r3, #0]
8002b2e: 011a lsls r2, r3, #4
8002b30: 6a3b ldr r3, [r7, #32]
8002b32: 4413 add r3, r2
8002b34: f203 4304 addw r3, r3, #1028 ; 0x404
8002b38: 61fb str r3, [r7, #28]
8002b3a: 6bbb ldr r3, [r7, #56] ; 0x38
8002b3c: b29a uxth r2, r3
8002b3e: 69fb ldr r3, [r7, #28]
8002b40: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8002b42: 68fb ldr r3, [r7, #12]
8002b44: 6818 ldr r0, [r3, #0]
8002b46: 68bb ldr r3, [r7, #8]
8002b48: 6959 ldr r1, [r3, #20]
8002b4a: 68bb ldr r3, [r7, #8]
8002b4c: 891a ldrh r2, [r3, #8]
8002b4e: 6bbb ldr r3, [r7, #56] ; 0x38
8002b50: b29b uxth r3, r3
8002b52: f004 fd3f bl 80075d4 <USB_WritePMA>
8002b56: e130 b.n 8002dba <HAL_PCD_EP_DB_Transmit+0x4e0>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002b58: 68fb ldr r3, [r7, #12]
8002b5a: 681b ldr r3, [r3, #0]
8002b5c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002b60: b29b uxth r3, r3
8002b62: 461a mov r2, r3
8002b64: 68bb ldr r3, [r7, #8]
8002b66: 781b ldrb r3, [r3, #0]
8002b68: 00db lsls r3, r3, #3
8002b6a: 4413 add r3, r2
8002b6c: 3306 adds r3, #6
8002b6e: 005b lsls r3, r3, #1
8002b70: 68fa ldr r2, [r7, #12]
8002b72: 6812 ldr r2, [r2, #0]
8002b74: 4413 add r3, r2
8002b76: f503 6380 add.w r3, r3, #1024 ; 0x400
8002b7a: 881b ldrh r3, [r3, #0]
8002b7c: f3c3 0309 ubfx r3, r3, #0, #10
8002b80: 85fb strh r3, [r7, #46] ; 0x2e
if (ep->xfer_len >= TxByteNbre)
8002b82: 68bb ldr r3, [r7, #8]
8002b84: 699a ldr r2, [r3, #24]
8002b86: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002b88: 429a cmp r2, r3
8002b8a: d306 bcc.n 8002b9a <HAL_PCD_EP_DB_Transmit+0x2c0>
{
ep->xfer_len -= TxByteNbre;
8002b8c: 68bb ldr r3, [r7, #8]
8002b8e: 699a ldr r2, [r3, #24]
8002b90: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002b92: 1ad2 subs r2, r2, r3
8002b94: 68bb ldr r3, [r7, #8]
8002b96: 619a str r2, [r3, #24]
8002b98: e002 b.n 8002ba0 <HAL_PCD_EP_DB_Transmit+0x2c6>
}
else
{
ep->xfer_len = 0U;
8002b9a: 68bb ldr r3, [r7, #8]
8002b9c: 2200 movs r2, #0
8002b9e: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8002ba0: 68bb ldr r3, [r7, #8]
8002ba2: 699b ldr r3, [r3, #24]
8002ba4: 2b00 cmp r3, #0
8002ba6: d12c bne.n 8002c02 <HAL_PCD_EP_DB_Transmit+0x328>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002ba8: 68bb ldr r3, [r7, #8]
8002baa: 781b ldrb r3, [r3, #0]
8002bac: 4619 mov r1, r3
8002bae: 68f8 ldr r0, [r7, #12]
8002bb0: f007 fa5f bl 800a072 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/*need to Free USB Buff*/
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8002bb4: 88fb ldrh r3, [r7, #6]
8002bb6: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002bba: 2b00 cmp r3, #0
8002bbc: f040 80fd bne.w 8002dba <HAL_PCD_EP_DB_Transmit+0x4e0>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
8002bc0: 68fb ldr r3, [r7, #12]
8002bc2: 681b ldr r3, [r3, #0]
8002bc4: 461a mov r2, r3
8002bc6: 68bb ldr r3, [r7, #8]
8002bc8: 781b ldrb r3, [r3, #0]
8002bca: 009b lsls r3, r3, #2
8002bcc: 4413 add r3, r2
8002bce: 881b ldrh r3, [r3, #0]
8002bd0: b29b uxth r3, r3
8002bd2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002bd6: f023 0370 bic.w r3, r3, #112 ; 0x70
8002bda: 84fb strh r3, [r7, #38] ; 0x26
8002bdc: 68fb ldr r3, [r7, #12]
8002bde: 681b ldr r3, [r3, #0]
8002be0: 461a mov r2, r3
8002be2: 68bb ldr r3, [r7, #8]
8002be4: 781b ldrb r3, [r3, #0]
8002be6: 009b lsls r3, r3, #2
8002be8: 441a add r2, r3
8002bea: 8cfb ldrh r3, [r7, #38] ; 0x26
8002bec: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002bf0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002bf4: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8002bf8: f043 0380 orr.w r3, r3, #128 ; 0x80
8002bfc: b29b uxth r3, r3
8002bfe: 8013 strh r3, [r2, #0]
8002c00: e0db b.n 8002dba <HAL_PCD_EP_DB_Transmit+0x4e0>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8002c02: 88fb ldrh r3, [r7, #6]
8002c04: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002c08: 2b00 cmp r3, #0
8002c0a: d11f bne.n 8002c4c <HAL_PCD_EP_DB_Transmit+0x372>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
8002c0c: 68fb ldr r3, [r7, #12]
8002c0e: 681b ldr r3, [r3, #0]
8002c10: 461a mov r2, r3
8002c12: 68bb ldr r3, [r7, #8]
8002c14: 781b ldrb r3, [r3, #0]
8002c16: 009b lsls r3, r3, #2
8002c18: 4413 add r3, r2
8002c1a: 881b ldrh r3, [r3, #0]
8002c1c: b29b uxth r3, r3
8002c1e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002c22: f023 0370 bic.w r3, r3, #112 ; 0x70
8002c26: 85bb strh r3, [r7, #44] ; 0x2c
8002c28: 68fb ldr r3, [r7, #12]
8002c2a: 681b ldr r3, [r3, #0]
8002c2c: 461a mov r2, r3
8002c2e: 68bb ldr r3, [r7, #8]
8002c30: 781b ldrb r3, [r3, #0]
8002c32: 009b lsls r3, r3, #2
8002c34: 441a add r2, r3
8002c36: 8dbb ldrh r3, [r7, #44] ; 0x2c
8002c38: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002c3c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002c40: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8002c44: f043 0380 orr.w r3, r3, #128 ; 0x80
8002c48: b29b uxth r3, r3
8002c4a: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8002c4c: 68bb ldr r3, [r7, #8]
8002c4e: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8002c52: 2b01 cmp r3, #1
8002c54: f040 80b1 bne.w 8002dba <HAL_PCD_EP_DB_Transmit+0x4e0>
{
ep->xfer_buff += TxByteNbre;
8002c58: 68bb ldr r3, [r7, #8]
8002c5a: 695a ldr r2, [r3, #20]
8002c5c: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002c5e: 441a add r2, r3
8002c60: 68bb ldr r3, [r7, #8]
8002c62: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
8002c64: 68bb ldr r3, [r7, #8]
8002c66: 69da ldr r2, [r3, #28]
8002c68: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002c6a: 441a add r2, r3
8002c6c: 68bb ldr r3, [r7, #8]
8002c6e: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8002c70: 68bb ldr r3, [r7, #8]
8002c72: 6a1a ldr r2, [r3, #32]
8002c74: 68bb ldr r3, [r7, #8]
8002c76: 691b ldr r3, [r3, #16]
8002c78: 429a cmp r2, r3
8002c7a: d309 bcc.n 8002c90 <HAL_PCD_EP_DB_Transmit+0x3b6>
{
len = ep->maxpacket;
8002c7c: 68bb ldr r3, [r7, #8]
8002c7e: 691b ldr r3, [r3, #16]
8002c80: 63bb str r3, [r7, #56] ; 0x38
ep->xfer_len_db -= len;
8002c82: 68bb ldr r3, [r7, #8]
8002c84: 6a1a ldr r2, [r3, #32]
8002c86: 6bbb ldr r3, [r7, #56] ; 0x38
8002c88: 1ad2 subs r2, r2, r3
8002c8a: 68bb ldr r3, [r7, #8]
8002c8c: 621a str r2, [r3, #32]
8002c8e: e014 b.n 8002cba <HAL_PCD_EP_DB_Transmit+0x3e0>
}
else if (ep->xfer_len_db == 0U)
8002c90: 68bb ldr r3, [r7, #8]
8002c92: 6a1b ldr r3, [r3, #32]
8002c94: 2b00 cmp r3, #0
8002c96: d106 bne.n 8002ca6 <HAL_PCD_EP_DB_Transmit+0x3cc>
{
len = TxByteNbre;
8002c98: 8dfb ldrh r3, [r7, #46] ; 0x2e
8002c9a: 63bb str r3, [r7, #56] ; 0x38
ep->xfer_fill_db = 0U;
8002c9c: 68bb ldr r3, [r7, #8]
8002c9e: 2200 movs r2, #0
8002ca0: f883 2024 strb.w r2, [r3, #36] ; 0x24
8002ca4: e009 b.n 8002cba <HAL_PCD_EP_DB_Transmit+0x3e0>
}
else
{
len = ep->xfer_len_db;
8002ca6: 68bb ldr r3, [r7, #8]
8002ca8: 6a1b ldr r3, [r3, #32]
8002caa: 63bb str r3, [r7, #56] ; 0x38
ep->xfer_len_db = 0U;
8002cac: 68bb ldr r3, [r7, #8]
8002cae: 2200 movs r2, #0
8002cb0: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8002cb2: 68bb ldr r3, [r7, #8]
8002cb4: 2200 movs r2, #0
8002cb6: f883 2024 strb.w r2, [r3, #36] ; 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8002cba: 68fb ldr r3, [r7, #12]
8002cbc: 681b ldr r3, [r3, #0]
8002cbe: 637b str r3, [r7, #52] ; 0x34
8002cc0: 68bb ldr r3, [r7, #8]
8002cc2: 785b ldrb r3, [r3, #1]
8002cc4: 2b00 cmp r3, #0
8002cc6: d155 bne.n 8002d74 <HAL_PCD_EP_DB_Transmit+0x49a>
8002cc8: 68fb ldr r3, [r7, #12]
8002cca: 681b ldr r3, [r3, #0]
8002ccc: 647b str r3, [r7, #68] ; 0x44
8002cce: 68fb ldr r3, [r7, #12]
8002cd0: 681b ldr r3, [r3, #0]
8002cd2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002cd6: b29b uxth r3, r3
8002cd8: 461a mov r2, r3
8002cda: 6c7b ldr r3, [r7, #68] ; 0x44
8002cdc: 4413 add r3, r2
8002cde: 647b str r3, [r7, #68] ; 0x44
8002ce0: 68bb ldr r3, [r7, #8]
8002ce2: 781b ldrb r3, [r3, #0]
8002ce4: 011a lsls r2, r3, #4
8002ce6: 6c7b ldr r3, [r7, #68] ; 0x44
8002ce8: 4413 add r3, r2
8002cea: f203 430c addw r3, r3, #1036 ; 0x40c
8002cee: 643b str r3, [r7, #64] ; 0x40
8002cf0: 6bbb ldr r3, [r7, #56] ; 0x38
8002cf2: 2b00 cmp r3, #0
8002cf4: d112 bne.n 8002d1c <HAL_PCD_EP_DB_Transmit+0x442>
8002cf6: 6c3b ldr r3, [r7, #64] ; 0x40
8002cf8: 881b ldrh r3, [r3, #0]
8002cfa: b29b uxth r3, r3
8002cfc: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8002d00: b29a uxth r2, r3
8002d02: 6c3b ldr r3, [r7, #64] ; 0x40
8002d04: 801a strh r2, [r3, #0]
8002d06: 6c3b ldr r3, [r7, #64] ; 0x40
8002d08: 881b ldrh r3, [r3, #0]
8002d0a: b29b uxth r3, r3
8002d0c: ea6f 4343 mvn.w r3, r3, lsl #17
8002d10: ea6f 4353 mvn.w r3, r3, lsr #17
8002d14: b29a uxth r2, r3
8002d16: 6c3b ldr r3, [r7, #64] ; 0x40
8002d18: 801a strh r2, [r3, #0]
8002d1a: e044 b.n 8002da6 <HAL_PCD_EP_DB_Transmit+0x4cc>
8002d1c: 6bbb ldr r3, [r7, #56] ; 0x38
8002d1e: 2b3e cmp r3, #62 ; 0x3e
8002d20: d811 bhi.n 8002d46 <HAL_PCD_EP_DB_Transmit+0x46c>
8002d22: 6bbb ldr r3, [r7, #56] ; 0x38
8002d24: 085b lsrs r3, r3, #1
8002d26: 63fb str r3, [r7, #60] ; 0x3c
8002d28: 6bbb ldr r3, [r7, #56] ; 0x38
8002d2a: f003 0301 and.w r3, r3, #1
8002d2e: 2b00 cmp r3, #0
8002d30: d002 beq.n 8002d38 <HAL_PCD_EP_DB_Transmit+0x45e>
8002d32: 6bfb ldr r3, [r7, #60] ; 0x3c
8002d34: 3301 adds r3, #1
8002d36: 63fb str r3, [r7, #60] ; 0x3c
8002d38: 6bfb ldr r3, [r7, #60] ; 0x3c
8002d3a: b29b uxth r3, r3
8002d3c: 029b lsls r3, r3, #10
8002d3e: b29a uxth r2, r3
8002d40: 6c3b ldr r3, [r7, #64] ; 0x40
8002d42: 801a strh r2, [r3, #0]
8002d44: e02f b.n 8002da6 <HAL_PCD_EP_DB_Transmit+0x4cc>
8002d46: 6bbb ldr r3, [r7, #56] ; 0x38
8002d48: 095b lsrs r3, r3, #5
8002d4a: 63fb str r3, [r7, #60] ; 0x3c
8002d4c: 6bbb ldr r3, [r7, #56] ; 0x38
8002d4e: f003 031f and.w r3, r3, #31
8002d52: 2b00 cmp r3, #0
8002d54: d102 bne.n 8002d5c <HAL_PCD_EP_DB_Transmit+0x482>
8002d56: 6bfb ldr r3, [r7, #60] ; 0x3c
8002d58: 3b01 subs r3, #1
8002d5a: 63fb str r3, [r7, #60] ; 0x3c
8002d5c: 6bfb ldr r3, [r7, #60] ; 0x3c
8002d5e: b29b uxth r3, r3
8002d60: 029b lsls r3, r3, #10
8002d62: b29b uxth r3, r3
8002d64: ea6f 4343 mvn.w r3, r3, lsl #17
8002d68: ea6f 4353 mvn.w r3, r3, lsr #17
8002d6c: b29a uxth r2, r3
8002d6e: 6c3b ldr r3, [r7, #64] ; 0x40
8002d70: 801a strh r2, [r3, #0]
8002d72: e018 b.n 8002da6 <HAL_PCD_EP_DB_Transmit+0x4cc>
8002d74: 68bb ldr r3, [r7, #8]
8002d76: 785b ldrb r3, [r3, #1]
8002d78: 2b01 cmp r3, #1
8002d7a: d114 bne.n 8002da6 <HAL_PCD_EP_DB_Transmit+0x4cc>
8002d7c: 68fb ldr r3, [r7, #12]
8002d7e: 681b ldr r3, [r3, #0]
8002d80: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002d84: b29b uxth r3, r3
8002d86: 461a mov r2, r3
8002d88: 6b7b ldr r3, [r7, #52] ; 0x34
8002d8a: 4413 add r3, r2
8002d8c: 637b str r3, [r7, #52] ; 0x34
8002d8e: 68bb ldr r3, [r7, #8]
8002d90: 781b ldrb r3, [r3, #0]
8002d92: 011a lsls r2, r3, #4
8002d94: 6b7b ldr r3, [r7, #52] ; 0x34
8002d96: 4413 add r3, r2
8002d98: f203 430c addw r3, r3, #1036 ; 0x40c
8002d9c: 633b str r3, [r7, #48] ; 0x30
8002d9e: 6bbb ldr r3, [r7, #56] ; 0x38
8002da0: b29a uxth r2, r3
8002da2: 6b3b ldr r3, [r7, #48] ; 0x30
8002da4: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8002da6: 68fb ldr r3, [r7, #12]
8002da8: 6818 ldr r0, [r3, #0]
8002daa: 68bb ldr r3, [r7, #8]
8002dac: 6959 ldr r1, [r3, #20]
8002dae: 68bb ldr r3, [r7, #8]
8002db0: 895a ldrh r2, [r3, #10]
8002db2: 6bbb ldr r3, [r7, #56] ; 0x38
8002db4: b29b uxth r3, r3
8002db6: f004 fc0d bl 80075d4 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8002dba: 68fb ldr r3, [r7, #12]
8002dbc: 681b ldr r3, [r3, #0]
8002dbe: 461a mov r2, r3
8002dc0: 68bb ldr r3, [r7, #8]
8002dc2: 781b ldrb r3, [r3, #0]
8002dc4: 009b lsls r3, r3, #2
8002dc6: 4413 add r3, r2
8002dc8: 881b ldrh r3, [r3, #0]
8002dca: b29b uxth r3, r3
8002dcc: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002dd0: f023 0340 bic.w r3, r3, #64 ; 0x40
8002dd4: 823b strh r3, [r7, #16]
8002dd6: 8a3b ldrh r3, [r7, #16]
8002dd8: f083 0310 eor.w r3, r3, #16
8002ddc: 823b strh r3, [r7, #16]
8002dde: 8a3b ldrh r3, [r7, #16]
8002de0: f083 0320 eor.w r3, r3, #32
8002de4: 823b strh r3, [r7, #16]
8002de6: 68fb ldr r3, [r7, #12]
8002de8: 681b ldr r3, [r3, #0]
8002dea: 461a mov r2, r3
8002dec: 68bb ldr r3, [r7, #8]
8002dee: 781b ldrb r3, [r3, #0]
8002df0: 009b lsls r3, r3, #2
8002df2: 441a add r2, r3
8002df4: 8a3b ldrh r3, [r7, #16]
8002df6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002dfa: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002dfe: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002e02: f043 0380 orr.w r3, r3, #128 ; 0x80
8002e06: b29b uxth r3, r3
8002e08: 8013 strh r3, [r2, #0]
return HAL_OK;
8002e0a: 2300 movs r3, #0
}
8002e0c: 4618 mov r0, r3
8002e0e: 3748 adds r7, #72 ; 0x48
8002e10: 46bd mov sp, r7
8002e12: bd80 pop {r7, pc}
08002e14 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8002e14: b480 push {r7}
8002e16: b087 sub sp, #28
8002e18: af00 add r7, sp, #0
8002e1a: 60f8 str r0, [r7, #12]
8002e1c: 607b str r3, [r7, #4]
8002e1e: 460b mov r3, r1
8002e20: 817b strh r3, [r7, #10]
8002e22: 4613 mov r3, r2
8002e24: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8002e26: 897b ldrh r3, [r7, #10]
8002e28: f003 0380 and.w r3, r3, #128 ; 0x80
8002e2c: b29b uxth r3, r3
8002e2e: 2b00 cmp r3, #0
8002e30: d00b beq.n 8002e4a <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002e32: 897b ldrh r3, [r7, #10]
8002e34: f003 0307 and.w r3, r3, #7
8002e38: 1c5a adds r2, r3, #1
8002e3a: 4613 mov r3, r2
8002e3c: 009b lsls r3, r3, #2
8002e3e: 4413 add r3, r2
8002e40: 00db lsls r3, r3, #3
8002e42: 68fa ldr r2, [r7, #12]
8002e44: 4413 add r3, r2
8002e46: 617b str r3, [r7, #20]
8002e48: e009 b.n 8002e5e <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8002e4a: 897a ldrh r2, [r7, #10]
8002e4c: 4613 mov r3, r2
8002e4e: 009b lsls r3, r3, #2
8002e50: 4413 add r3, r2
8002e52: 00db lsls r3, r3, #3
8002e54: f503 73b4 add.w r3, r3, #360 ; 0x168
8002e58: 68fa ldr r2, [r7, #12]
8002e5a: 4413 add r3, r2
8002e5c: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8002e5e: 893b ldrh r3, [r7, #8]
8002e60: 2b00 cmp r3, #0
8002e62: d107 bne.n 8002e74 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8002e64: 697b ldr r3, [r7, #20]
8002e66: 2200 movs r2, #0
8002e68: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8002e6a: 687b ldr r3, [r7, #4]
8002e6c: b29a uxth r2, r3
8002e6e: 697b ldr r3, [r7, #20]
8002e70: 80da strh r2, [r3, #6]
8002e72: e00b b.n 8002e8c <HAL_PCDEx_PMAConfig+0x78>
}
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8002e74: 697b ldr r3, [r7, #20]
8002e76: 2201 movs r2, #1
8002e78: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8002e7a: 687b ldr r3, [r7, #4]
8002e7c: b29a uxth r2, r3
8002e7e: 697b ldr r3, [r7, #20]
8002e80: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8002e82: 687b ldr r3, [r7, #4]
8002e84: 0c1b lsrs r3, r3, #16
8002e86: b29a uxth r2, r3
8002e88: 697b ldr r3, [r7, #20]
8002e8a: 815a strh r2, [r3, #10]
}
return HAL_OK;
8002e8c: 2300 movs r3, #0
}
8002e8e: 4618 mov r0, r3
8002e90: 371c adds r7, #28
8002e92: 46bd mov sp, r7
8002e94: bc80 pop {r7}
8002e96: 4770 bx lr
08002e98 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8002e98: b580 push {r7, lr}
8002e9a: b086 sub sp, #24
8002e9c: af00 add r7, sp, #0
8002e9e: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8002ea0: 687b ldr r3, [r7, #4]
8002ea2: 2b00 cmp r3, #0
8002ea4: d101 bne.n 8002eaa <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8002ea6: 2301 movs r3, #1
8002ea8: e26c b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8002eaa: 687b ldr r3, [r7, #4]
8002eac: 681b ldr r3, [r3, #0]
8002eae: f003 0301 and.w r3, r3, #1
8002eb2: 2b00 cmp r3, #0
8002eb4: f000 8087 beq.w 8002fc6 <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8002eb8: 4b92 ldr r3, [pc, #584] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002eba: 685b ldr r3, [r3, #4]
8002ebc: f003 030c and.w r3, r3, #12
8002ec0: 2b04 cmp r3, #4
8002ec2: d00c beq.n 8002ede <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8002ec4: 4b8f ldr r3, [pc, #572] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002ec6: 685b ldr r3, [r3, #4]
8002ec8: f003 030c and.w r3, r3, #12
8002ecc: 2b08 cmp r3, #8
8002ece: d112 bne.n 8002ef6 <HAL_RCC_OscConfig+0x5e>
8002ed0: 4b8c ldr r3, [pc, #560] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002ed2: 685b ldr r3, [r3, #4]
8002ed4: f403 3380 and.w r3, r3, #65536 ; 0x10000
8002ed8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8002edc: d10b bne.n 8002ef6 <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002ede: 4b89 ldr r3, [pc, #548] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002ee0: 681b ldr r3, [r3, #0]
8002ee2: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002ee6: 2b00 cmp r3, #0
8002ee8: d06c beq.n 8002fc4 <HAL_RCC_OscConfig+0x12c>
8002eea: 687b ldr r3, [r7, #4]
8002eec: 685b ldr r3, [r3, #4]
8002eee: 2b00 cmp r3, #0
8002ef0: d168 bne.n 8002fc4 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8002ef2: 2301 movs r3, #1
8002ef4: e246 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8002ef6: 687b ldr r3, [r7, #4]
8002ef8: 685b ldr r3, [r3, #4]
8002efa: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8002efe: d106 bne.n 8002f0e <HAL_RCC_OscConfig+0x76>
8002f00: 4b80 ldr r3, [pc, #512] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f02: 681b ldr r3, [r3, #0]
8002f04: 4a7f ldr r2, [pc, #508] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f06: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002f0a: 6013 str r3, [r2, #0]
8002f0c: e02e b.n 8002f6c <HAL_RCC_OscConfig+0xd4>
8002f0e: 687b ldr r3, [r7, #4]
8002f10: 685b ldr r3, [r3, #4]
8002f12: 2b00 cmp r3, #0
8002f14: d10c bne.n 8002f30 <HAL_RCC_OscConfig+0x98>
8002f16: 4b7b ldr r3, [pc, #492] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f18: 681b ldr r3, [r3, #0]
8002f1a: 4a7a ldr r2, [pc, #488] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f1c: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8002f20: 6013 str r3, [r2, #0]
8002f22: 4b78 ldr r3, [pc, #480] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f24: 681b ldr r3, [r3, #0]
8002f26: 4a77 ldr r2, [pc, #476] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f28: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8002f2c: 6013 str r3, [r2, #0]
8002f2e: e01d b.n 8002f6c <HAL_RCC_OscConfig+0xd4>
8002f30: 687b ldr r3, [r7, #4]
8002f32: 685b ldr r3, [r3, #4]
8002f34: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
8002f38: d10c bne.n 8002f54 <HAL_RCC_OscConfig+0xbc>
8002f3a: 4b72 ldr r3, [pc, #456] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f3c: 681b ldr r3, [r3, #0]
8002f3e: 4a71 ldr r2, [pc, #452] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f40: f443 2380 orr.w r3, r3, #262144 ; 0x40000
8002f44: 6013 str r3, [r2, #0]
8002f46: 4b6f ldr r3, [pc, #444] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f48: 681b ldr r3, [r3, #0]
8002f4a: 4a6e ldr r2, [pc, #440] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f4c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002f50: 6013 str r3, [r2, #0]
8002f52: e00b b.n 8002f6c <HAL_RCC_OscConfig+0xd4>
8002f54: 4b6b ldr r3, [pc, #428] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f56: 681b ldr r3, [r3, #0]
8002f58: 4a6a ldr r2, [pc, #424] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f5a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8002f5e: 6013 str r3, [r2, #0]
8002f60: 4b68 ldr r3, [pc, #416] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f62: 681b ldr r3, [r3, #0]
8002f64: 4a67 ldr r2, [pc, #412] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f66: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8002f6a: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8002f6c: 687b ldr r3, [r7, #4]
8002f6e: 685b ldr r3, [r3, #4]
8002f70: 2b00 cmp r3, #0
8002f72: d013 beq.n 8002f9c <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002f74: f7fd fcfe bl 8000974 <HAL_GetTick>
8002f78: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002f7a: e008 b.n 8002f8e <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8002f7c: f7fd fcfa bl 8000974 <HAL_GetTick>
8002f80: 4602 mov r2, r0
8002f82: 693b ldr r3, [r7, #16]
8002f84: 1ad3 subs r3, r2, r3
8002f86: 2b64 cmp r3, #100 ; 0x64
8002f88: d901 bls.n 8002f8e <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8002f8a: 2303 movs r3, #3
8002f8c: e1fa b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002f8e: 4b5d ldr r3, [pc, #372] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002f90: 681b ldr r3, [r3, #0]
8002f92: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002f96: 2b00 cmp r3, #0
8002f98: d0f0 beq.n 8002f7c <HAL_RCC_OscConfig+0xe4>
8002f9a: e014 b.n 8002fc6 <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002f9c: f7fd fcea bl 8000974 <HAL_GetTick>
8002fa0: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002fa2: e008 b.n 8002fb6 <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8002fa4: f7fd fce6 bl 8000974 <HAL_GetTick>
8002fa8: 4602 mov r2, r0
8002faa: 693b ldr r3, [r7, #16]
8002fac: 1ad3 subs r3, r2, r3
8002fae: 2b64 cmp r3, #100 ; 0x64
8002fb0: d901 bls.n 8002fb6 <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
8002fb2: 2303 movs r3, #3
8002fb4: e1e6 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002fb6: 4b53 ldr r3, [pc, #332] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002fb8: 681b ldr r3, [r3, #0]
8002fba: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002fbe: 2b00 cmp r3, #0
8002fc0: d1f0 bne.n 8002fa4 <HAL_RCC_OscConfig+0x10c>
8002fc2: e000 b.n 8002fc6 <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002fc4: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8002fc6: 687b ldr r3, [r7, #4]
8002fc8: 681b ldr r3, [r3, #0]
8002fca: f003 0302 and.w r3, r3, #2
8002fce: 2b00 cmp r3, #0
8002fd0: d063 beq.n 800309a <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8002fd2: 4b4c ldr r3, [pc, #304] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002fd4: 685b ldr r3, [r3, #4]
8002fd6: f003 030c and.w r3, r3, #12
8002fda: 2b00 cmp r3, #0
8002fdc: d00b beq.n 8002ff6 <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8002fde: 4b49 ldr r3, [pc, #292] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002fe0: 685b ldr r3, [r3, #4]
8002fe2: f003 030c and.w r3, r3, #12
8002fe6: 2b08 cmp r3, #8
8002fe8: d11c bne.n 8003024 <HAL_RCC_OscConfig+0x18c>
8002fea: 4b46 ldr r3, [pc, #280] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002fec: 685b ldr r3, [r3, #4]
8002fee: f403 3380 and.w r3, r3, #65536 ; 0x10000
8002ff2: 2b00 cmp r3, #0
8002ff4: d116 bne.n 8003024 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002ff6: 4b43 ldr r3, [pc, #268] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8002ff8: 681b ldr r3, [r3, #0]
8002ffa: f003 0302 and.w r3, r3, #2
8002ffe: 2b00 cmp r3, #0
8003000: d005 beq.n 800300e <HAL_RCC_OscConfig+0x176>
8003002: 687b ldr r3, [r7, #4]
8003004: 691b ldr r3, [r3, #16]
8003006: 2b01 cmp r3, #1
8003008: d001 beq.n 800300e <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
800300a: 2301 movs r3, #1
800300c: e1ba b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800300e: 4b3d ldr r3, [pc, #244] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8003010: 681b ldr r3, [r3, #0]
8003012: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8003016: 687b ldr r3, [r7, #4]
8003018: 695b ldr r3, [r3, #20]
800301a: 00db lsls r3, r3, #3
800301c: 4939 ldr r1, [pc, #228] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
800301e: 4313 orrs r3, r2
8003020: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003022: e03a b.n 800309a <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8003024: 687b ldr r3, [r7, #4]
8003026: 691b ldr r3, [r3, #16]
8003028: 2b00 cmp r3, #0
800302a: d020 beq.n 800306e <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
800302c: 4b36 ldr r3, [pc, #216] ; (8003108 <HAL_RCC_OscConfig+0x270>)
800302e: 2201 movs r2, #1
8003030: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003032: f7fd fc9f bl 8000974 <HAL_GetTick>
8003036: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003038: e008 b.n 800304c <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800303a: f7fd fc9b bl 8000974 <HAL_GetTick>
800303e: 4602 mov r2, r0
8003040: 693b ldr r3, [r7, #16]
8003042: 1ad3 subs r3, r2, r3
8003044: 2b02 cmp r3, #2
8003046: d901 bls.n 800304c <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8003048: 2303 movs r3, #3
800304a: e19b b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800304c: 4b2d ldr r3, [pc, #180] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
800304e: 681b ldr r3, [r3, #0]
8003050: f003 0302 and.w r3, r3, #2
8003054: 2b00 cmp r3, #0
8003056: d0f0 beq.n 800303a <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003058: 4b2a ldr r3, [pc, #168] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
800305a: 681b ldr r3, [r3, #0]
800305c: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8003060: 687b ldr r3, [r7, #4]
8003062: 695b ldr r3, [r3, #20]
8003064: 00db lsls r3, r3, #3
8003066: 4927 ldr r1, [pc, #156] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8003068: 4313 orrs r3, r2
800306a: 600b str r3, [r1, #0]
800306c: e015 b.n 800309a <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
800306e: 4b26 ldr r3, [pc, #152] ; (8003108 <HAL_RCC_OscConfig+0x270>)
8003070: 2200 movs r2, #0
8003072: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003074: f7fd fc7e bl 8000974 <HAL_GetTick>
8003078: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800307a: e008 b.n 800308e <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800307c: f7fd fc7a bl 8000974 <HAL_GetTick>
8003080: 4602 mov r2, r0
8003082: 693b ldr r3, [r7, #16]
8003084: 1ad3 subs r3, r2, r3
8003086: 2b02 cmp r3, #2
8003088: d901 bls.n 800308e <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
800308a: 2303 movs r3, #3
800308c: e17a b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800308e: 4b1d ldr r3, [pc, #116] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
8003090: 681b ldr r3, [r3, #0]
8003092: f003 0302 and.w r3, r3, #2
8003096: 2b00 cmp r3, #0
8003098: d1f0 bne.n 800307c <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
800309a: 687b ldr r3, [r7, #4]
800309c: 681b ldr r3, [r3, #0]
800309e: f003 0308 and.w r3, r3, #8
80030a2: 2b00 cmp r3, #0
80030a4: d03a beq.n 800311c <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
80030a6: 687b ldr r3, [r7, #4]
80030a8: 699b ldr r3, [r3, #24]
80030aa: 2b00 cmp r3, #0
80030ac: d019 beq.n 80030e2 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
80030ae: 4b17 ldr r3, [pc, #92] ; (800310c <HAL_RCC_OscConfig+0x274>)
80030b0: 2201 movs r2, #1
80030b2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80030b4: f7fd fc5e bl 8000974 <HAL_GetTick>
80030b8: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80030ba: e008 b.n 80030ce <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80030bc: f7fd fc5a bl 8000974 <HAL_GetTick>
80030c0: 4602 mov r2, r0
80030c2: 693b ldr r3, [r7, #16]
80030c4: 1ad3 subs r3, r2, r3
80030c6: 2b02 cmp r3, #2
80030c8: d901 bls.n 80030ce <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
80030ca: 2303 movs r3, #3
80030cc: e15a b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80030ce: 4b0d ldr r3, [pc, #52] ; (8003104 <HAL_RCC_OscConfig+0x26c>)
80030d0: 6a5b ldr r3, [r3, #36] ; 0x24
80030d2: f003 0302 and.w r3, r3, #2
80030d6: 2b00 cmp r3, #0
80030d8: d0f0 beq.n 80030bc <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
80030da: 2001 movs r0, #1
80030dc: f000 fac8 bl 8003670 <RCC_Delay>
80030e0: e01c b.n 800311c <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
80030e2: 4b0a ldr r3, [pc, #40] ; (800310c <HAL_RCC_OscConfig+0x274>)
80030e4: 2200 movs r2, #0
80030e6: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80030e8: f7fd fc44 bl 8000974 <HAL_GetTick>
80030ec: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80030ee: e00f b.n 8003110 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80030f0: f7fd fc40 bl 8000974 <HAL_GetTick>
80030f4: 4602 mov r2, r0
80030f6: 693b ldr r3, [r7, #16]
80030f8: 1ad3 subs r3, r2, r3
80030fa: 2b02 cmp r3, #2
80030fc: d908 bls.n 8003110 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
80030fe: 2303 movs r3, #3
8003100: e140 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
8003102: bf00 nop
8003104: 40021000 .word 0x40021000
8003108: 42420000 .word 0x42420000
800310c: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003110: 4b9e ldr r3, [pc, #632] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003112: 6a5b ldr r3, [r3, #36] ; 0x24
8003114: f003 0302 and.w r3, r3, #2
8003118: 2b00 cmp r3, #0
800311a: d1e9 bne.n 80030f0 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
800311c: 687b ldr r3, [r7, #4]
800311e: 681b ldr r3, [r3, #0]
8003120: f003 0304 and.w r3, r3, #4
8003124: 2b00 cmp r3, #0
8003126: f000 80a6 beq.w 8003276 <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
800312a: 2300 movs r3, #0
800312c: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
800312e: 4b97 ldr r3, [pc, #604] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003130: 69db ldr r3, [r3, #28]
8003132: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8003136: 2b00 cmp r3, #0
8003138: d10d bne.n 8003156 <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
800313a: 4b94 ldr r3, [pc, #592] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
800313c: 69db ldr r3, [r3, #28]
800313e: 4a93 ldr r2, [pc, #588] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003140: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8003144: 61d3 str r3, [r2, #28]
8003146: 4b91 ldr r3, [pc, #580] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003148: 69db ldr r3, [r3, #28]
800314a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
800314e: 60bb str r3, [r7, #8]
8003150: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8003152: 2301 movs r3, #1
8003154: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003156: 4b8e ldr r3, [pc, #568] ; (8003390 <HAL_RCC_OscConfig+0x4f8>)
8003158: 681b ldr r3, [r3, #0]
800315a: f403 7380 and.w r3, r3, #256 ; 0x100
800315e: 2b00 cmp r3, #0
8003160: d118 bne.n 8003194 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8003162: 4b8b ldr r3, [pc, #556] ; (8003390 <HAL_RCC_OscConfig+0x4f8>)
8003164: 681b ldr r3, [r3, #0]
8003166: 4a8a ldr r2, [pc, #552] ; (8003390 <HAL_RCC_OscConfig+0x4f8>)
8003168: f443 7380 orr.w r3, r3, #256 ; 0x100
800316c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800316e: f7fd fc01 bl 8000974 <HAL_GetTick>
8003172: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003174: e008 b.n 8003188 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8003176: f7fd fbfd bl 8000974 <HAL_GetTick>
800317a: 4602 mov r2, r0
800317c: 693b ldr r3, [r7, #16]
800317e: 1ad3 subs r3, r2, r3
8003180: 2b64 cmp r3, #100 ; 0x64
8003182: d901 bls.n 8003188 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8003184: 2303 movs r3, #3
8003186: e0fd b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003188: 4b81 ldr r3, [pc, #516] ; (8003390 <HAL_RCC_OscConfig+0x4f8>)
800318a: 681b ldr r3, [r3, #0]
800318c: f403 7380 and.w r3, r3, #256 ; 0x100
8003190: 2b00 cmp r3, #0
8003192: d0f0 beq.n 8003176 <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8003194: 687b ldr r3, [r7, #4]
8003196: 68db ldr r3, [r3, #12]
8003198: 2b01 cmp r3, #1
800319a: d106 bne.n 80031aa <HAL_RCC_OscConfig+0x312>
800319c: 4b7b ldr r3, [pc, #492] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
800319e: 6a1b ldr r3, [r3, #32]
80031a0: 4a7a ldr r2, [pc, #488] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031a2: f043 0301 orr.w r3, r3, #1
80031a6: 6213 str r3, [r2, #32]
80031a8: e02d b.n 8003206 <HAL_RCC_OscConfig+0x36e>
80031aa: 687b ldr r3, [r7, #4]
80031ac: 68db ldr r3, [r3, #12]
80031ae: 2b00 cmp r3, #0
80031b0: d10c bne.n 80031cc <HAL_RCC_OscConfig+0x334>
80031b2: 4b76 ldr r3, [pc, #472] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031b4: 6a1b ldr r3, [r3, #32]
80031b6: 4a75 ldr r2, [pc, #468] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031b8: f023 0301 bic.w r3, r3, #1
80031bc: 6213 str r3, [r2, #32]
80031be: 4b73 ldr r3, [pc, #460] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031c0: 6a1b ldr r3, [r3, #32]
80031c2: 4a72 ldr r2, [pc, #456] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031c4: f023 0304 bic.w r3, r3, #4
80031c8: 6213 str r3, [r2, #32]
80031ca: e01c b.n 8003206 <HAL_RCC_OscConfig+0x36e>
80031cc: 687b ldr r3, [r7, #4]
80031ce: 68db ldr r3, [r3, #12]
80031d0: 2b05 cmp r3, #5
80031d2: d10c bne.n 80031ee <HAL_RCC_OscConfig+0x356>
80031d4: 4b6d ldr r3, [pc, #436] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031d6: 6a1b ldr r3, [r3, #32]
80031d8: 4a6c ldr r2, [pc, #432] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031da: f043 0304 orr.w r3, r3, #4
80031de: 6213 str r3, [r2, #32]
80031e0: 4b6a ldr r3, [pc, #424] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031e2: 6a1b ldr r3, [r3, #32]
80031e4: 4a69 ldr r2, [pc, #420] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031e6: f043 0301 orr.w r3, r3, #1
80031ea: 6213 str r3, [r2, #32]
80031ec: e00b b.n 8003206 <HAL_RCC_OscConfig+0x36e>
80031ee: 4b67 ldr r3, [pc, #412] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031f0: 6a1b ldr r3, [r3, #32]
80031f2: 4a66 ldr r2, [pc, #408] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031f4: f023 0301 bic.w r3, r3, #1
80031f8: 6213 str r3, [r2, #32]
80031fa: 4b64 ldr r3, [pc, #400] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80031fc: 6a1b ldr r3, [r3, #32]
80031fe: 4a63 ldr r2, [pc, #396] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003200: f023 0304 bic.w r3, r3, #4
8003204: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8003206: 687b ldr r3, [r7, #4]
8003208: 68db ldr r3, [r3, #12]
800320a: 2b00 cmp r3, #0
800320c: d015 beq.n 800323a <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800320e: f7fd fbb1 bl 8000974 <HAL_GetTick>
8003212: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003214: e00a b.n 800322c <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8003216: f7fd fbad bl 8000974 <HAL_GetTick>
800321a: 4602 mov r2, r0
800321c: 693b ldr r3, [r7, #16]
800321e: 1ad3 subs r3, r2, r3
8003220: f241 3288 movw r2, #5000 ; 0x1388
8003224: 4293 cmp r3, r2
8003226: d901 bls.n 800322c <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8003228: 2303 movs r3, #3
800322a: e0ab b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800322c: 4b57 ldr r3, [pc, #348] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
800322e: 6a1b ldr r3, [r3, #32]
8003230: f003 0302 and.w r3, r3, #2
8003234: 2b00 cmp r3, #0
8003236: d0ee beq.n 8003216 <HAL_RCC_OscConfig+0x37e>
8003238: e014 b.n 8003264 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800323a: f7fd fb9b bl 8000974 <HAL_GetTick>
800323e: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8003240: e00a b.n 8003258 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8003242: f7fd fb97 bl 8000974 <HAL_GetTick>
8003246: 4602 mov r2, r0
8003248: 693b ldr r3, [r7, #16]
800324a: 1ad3 subs r3, r2, r3
800324c: f241 3288 movw r2, #5000 ; 0x1388
8003250: 4293 cmp r3, r2
8003252: d901 bls.n 8003258 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8003254: 2303 movs r3, #3
8003256: e095 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8003258: 4b4c ldr r3, [pc, #304] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
800325a: 6a1b ldr r3, [r3, #32]
800325c: f003 0302 and.w r3, r3, #2
8003260: 2b00 cmp r3, #0
8003262: d1ee bne.n 8003242 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8003264: 7dfb ldrb r3, [r7, #23]
8003266: 2b01 cmp r3, #1
8003268: d105 bne.n 8003276 <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
800326a: 4b48 ldr r3, [pc, #288] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
800326c: 69db ldr r3, [r3, #28]
800326e: 4a47 ldr r2, [pc, #284] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003270: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
8003274: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8003276: 687b ldr r3, [r7, #4]
8003278: 69db ldr r3, [r3, #28]
800327a: 2b00 cmp r3, #0
800327c: f000 8081 beq.w 8003382 <HAL_RCC_OscConfig+0x4ea>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8003280: 4b42 ldr r3, [pc, #264] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003282: 685b ldr r3, [r3, #4]
8003284: f003 030c and.w r3, r3, #12
8003288: 2b08 cmp r3, #8
800328a: d061 beq.n 8003350 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
800328c: 687b ldr r3, [r7, #4]
800328e: 69db ldr r3, [r3, #28]
8003290: 2b02 cmp r3, #2
8003292: d146 bne.n 8003322 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8003294: 4b3f ldr r3, [pc, #252] ; (8003394 <HAL_RCC_OscConfig+0x4fc>)
8003296: 2200 movs r2, #0
8003298: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800329a: f7fd fb6b bl 8000974 <HAL_GetTick>
800329e: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80032a0: e008 b.n 80032b4 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80032a2: f7fd fb67 bl 8000974 <HAL_GetTick>
80032a6: 4602 mov r2, r0
80032a8: 693b ldr r3, [r7, #16]
80032aa: 1ad3 subs r3, r2, r3
80032ac: 2b02 cmp r3, #2
80032ae: d901 bls.n 80032b4 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
80032b0: 2303 movs r3, #3
80032b2: e067 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80032b4: 4b35 ldr r3, [pc, #212] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80032b6: 681b ldr r3, [r3, #0]
80032b8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
80032bc: 2b00 cmp r3, #0
80032be: d1f0 bne.n 80032a2 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
80032c0: 687b ldr r3, [r7, #4]
80032c2: 6a1b ldr r3, [r3, #32]
80032c4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
80032c8: d108 bne.n 80032dc <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
80032ca: 4b30 ldr r3, [pc, #192] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80032cc: 685b ldr r3, [r3, #4]
80032ce: f423 3200 bic.w r2, r3, #131072 ; 0x20000
80032d2: 687b ldr r3, [r7, #4]
80032d4: 689b ldr r3, [r3, #8]
80032d6: 492d ldr r1, [pc, #180] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80032d8: 4313 orrs r3, r2
80032da: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
80032dc: 4b2b ldr r3, [pc, #172] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80032de: 685b ldr r3, [r3, #4]
80032e0: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
80032e4: 687b ldr r3, [r7, #4]
80032e6: 6a19 ldr r1, [r3, #32]
80032e8: 687b ldr r3, [r7, #4]
80032ea: 6a5b ldr r3, [r3, #36] ; 0x24
80032ec: 430b orrs r3, r1
80032ee: 4927 ldr r1, [pc, #156] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
80032f0: 4313 orrs r3, r2
80032f2: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80032f4: 4b27 ldr r3, [pc, #156] ; (8003394 <HAL_RCC_OscConfig+0x4fc>)
80032f6: 2201 movs r2, #1
80032f8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80032fa: f7fd fb3b bl 8000974 <HAL_GetTick>
80032fe: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003300: e008 b.n 8003314 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8003302: f7fd fb37 bl 8000974 <HAL_GetTick>
8003306: 4602 mov r2, r0
8003308: 693b ldr r3, [r7, #16]
800330a: 1ad3 subs r3, r2, r3
800330c: 2b02 cmp r3, #2
800330e: d901 bls.n 8003314 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8003310: 2303 movs r3, #3
8003312: e037 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003314: 4b1d ldr r3, [pc, #116] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003316: 681b ldr r3, [r3, #0]
8003318: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
800331c: 2b00 cmp r3, #0
800331e: d0f0 beq.n 8003302 <HAL_RCC_OscConfig+0x46a>
8003320: e02f b.n 8003382 <HAL_RCC_OscConfig+0x4ea>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8003322: 4b1c ldr r3, [pc, #112] ; (8003394 <HAL_RCC_OscConfig+0x4fc>)
8003324: 2200 movs r2, #0
8003326: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003328: f7fd fb24 bl 8000974 <HAL_GetTick>
800332c: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800332e: e008 b.n 8003342 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8003330: f7fd fb20 bl 8000974 <HAL_GetTick>
8003334: 4602 mov r2, r0
8003336: 693b ldr r3, [r7, #16]
8003338: 1ad3 subs r3, r2, r3
800333a: 2b02 cmp r3, #2
800333c: d901 bls.n 8003342 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
800333e: 2303 movs r3, #3
8003340: e020 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8003342: 4b12 ldr r3, [pc, #72] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
8003344: 681b ldr r3, [r3, #0]
8003346: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
800334a: 2b00 cmp r3, #0
800334c: d1f0 bne.n 8003330 <HAL_RCC_OscConfig+0x498>
800334e: e018 b.n 8003382 <HAL_RCC_OscConfig+0x4ea>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8003350: 687b ldr r3, [r7, #4]
8003352: 69db ldr r3, [r3, #28]
8003354: 2b01 cmp r3, #1
8003356: d101 bne.n 800335c <HAL_RCC_OscConfig+0x4c4>
{
return HAL_ERROR;
8003358: 2301 movs r3, #1
800335a: e013 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
800335c: 4b0b ldr r3, [pc, #44] ; (800338c <HAL_RCC_OscConfig+0x4f4>)
800335e: 685b ldr r3, [r3, #4]
8003360: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8003362: 68fb ldr r3, [r7, #12]
8003364: f403 3280 and.w r2, r3, #65536 ; 0x10000
8003368: 687b ldr r3, [r7, #4]
800336a: 6a1b ldr r3, [r3, #32]
800336c: 429a cmp r2, r3
800336e: d106 bne.n 800337e <HAL_RCC_OscConfig+0x4e6>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8003370: 68fb ldr r3, [r7, #12]
8003372: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
8003376: 687b ldr r3, [r7, #4]
8003378: 6a5b ldr r3, [r3, #36] ; 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800337a: 429a cmp r2, r3
800337c: d001 beq.n 8003382 <HAL_RCC_OscConfig+0x4ea>
{
return HAL_ERROR;
800337e: 2301 movs r3, #1
8003380: e000 b.n 8003384 <HAL_RCC_OscConfig+0x4ec>
}
}
}
}
return HAL_OK;
8003382: 2300 movs r3, #0
}
8003384: 4618 mov r0, r3
8003386: 3718 adds r7, #24
8003388: 46bd mov sp, r7
800338a: bd80 pop {r7, pc}
800338c: 40021000 .word 0x40021000
8003390: 40007000 .word 0x40007000
8003394: 42420060 .word 0x42420060
08003398 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8003398: b580 push {r7, lr}
800339a: b084 sub sp, #16
800339c: af00 add r7, sp, #0
800339e: 6078 str r0, [r7, #4]
80033a0: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
80033a2: 687b ldr r3, [r7, #4]
80033a4: 2b00 cmp r3, #0
80033a6: d101 bne.n 80033ac <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
80033a8: 2301 movs r3, #1
80033aa: e0d0 b.n 800354e <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
80033ac: 4b6a ldr r3, [pc, #424] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80033ae: 681b ldr r3, [r3, #0]
80033b0: f003 0307 and.w r3, r3, #7
80033b4: 683a ldr r2, [r7, #0]
80033b6: 429a cmp r2, r3
80033b8: d910 bls.n 80033dc <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80033ba: 4b67 ldr r3, [pc, #412] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80033bc: 681b ldr r3, [r3, #0]
80033be: f023 0207 bic.w r2, r3, #7
80033c2: 4965 ldr r1, [pc, #404] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80033c4: 683b ldr r3, [r7, #0]
80033c6: 4313 orrs r3, r2
80033c8: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80033ca: 4b63 ldr r3, [pc, #396] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80033cc: 681b ldr r3, [r3, #0]
80033ce: f003 0307 and.w r3, r3, #7
80033d2: 683a ldr r2, [r7, #0]
80033d4: 429a cmp r2, r3
80033d6: d001 beq.n 80033dc <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
80033d8: 2301 movs r3, #1
80033da: e0b8 b.n 800354e <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80033dc: 687b ldr r3, [r7, #4]
80033de: 681b ldr r3, [r3, #0]
80033e0: f003 0302 and.w r3, r3, #2
80033e4: 2b00 cmp r3, #0
80033e6: d020 beq.n 800342a <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80033e8: 687b ldr r3, [r7, #4]
80033ea: 681b ldr r3, [r3, #0]
80033ec: f003 0304 and.w r3, r3, #4
80033f0: 2b00 cmp r3, #0
80033f2: d005 beq.n 8003400 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
80033f4: 4b59 ldr r3, [pc, #356] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
80033f6: 685b ldr r3, [r3, #4]
80033f8: 4a58 ldr r2, [pc, #352] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
80033fa: f443 63e0 orr.w r3, r3, #1792 ; 0x700
80033fe: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8003400: 687b ldr r3, [r7, #4]
8003402: 681b ldr r3, [r3, #0]
8003404: f003 0308 and.w r3, r3, #8
8003408: 2b00 cmp r3, #0
800340a: d005 beq.n 8003418 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
800340c: 4b53 ldr r3, [pc, #332] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
800340e: 685b ldr r3, [r3, #4]
8003410: 4a52 ldr r2, [pc, #328] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003412: f443 5360 orr.w r3, r3, #14336 ; 0x3800
8003416: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8003418: 4b50 ldr r3, [pc, #320] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
800341a: 685b ldr r3, [r3, #4]
800341c: f023 02f0 bic.w r2, r3, #240 ; 0xf0
8003420: 687b ldr r3, [r7, #4]
8003422: 689b ldr r3, [r3, #8]
8003424: 494d ldr r1, [pc, #308] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003426: 4313 orrs r3, r2
8003428: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800342a: 687b ldr r3, [r7, #4]
800342c: 681b ldr r3, [r3, #0]
800342e: f003 0301 and.w r3, r3, #1
8003432: 2b00 cmp r3, #0
8003434: d040 beq.n 80034b8 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8003436: 687b ldr r3, [r7, #4]
8003438: 685b ldr r3, [r3, #4]
800343a: 2b01 cmp r3, #1
800343c: d107 bne.n 800344e <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800343e: 4b47 ldr r3, [pc, #284] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003440: 681b ldr r3, [r3, #0]
8003442: f403 3300 and.w r3, r3, #131072 ; 0x20000
8003446: 2b00 cmp r3, #0
8003448: d115 bne.n 8003476 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800344a: 2301 movs r3, #1
800344c: e07f b.n 800354e <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
800344e: 687b ldr r3, [r7, #4]
8003450: 685b ldr r3, [r3, #4]
8003452: 2b02 cmp r3, #2
8003454: d107 bne.n 8003466 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003456: 4b41 ldr r3, [pc, #260] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003458: 681b ldr r3, [r3, #0]
800345a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
800345e: 2b00 cmp r3, #0
8003460: d109 bne.n 8003476 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003462: 2301 movs r3, #1
8003464: e073 b.n 800354e <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003466: 4b3d ldr r3, [pc, #244] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003468: 681b ldr r3, [r3, #0]
800346a: f003 0302 and.w r3, r3, #2
800346e: 2b00 cmp r3, #0
8003470: d101 bne.n 8003476 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003472: 2301 movs r3, #1
8003474: e06b b.n 800354e <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8003476: 4b39 ldr r3, [pc, #228] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003478: 685b ldr r3, [r3, #4]
800347a: f023 0203 bic.w r2, r3, #3
800347e: 687b ldr r3, [r7, #4]
8003480: 685b ldr r3, [r3, #4]
8003482: 4936 ldr r1, [pc, #216] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003484: 4313 orrs r3, r2
8003486: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003488: f7fd fa74 bl 8000974 <HAL_GetTick>
800348c: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800348e: e00a b.n 80034a6 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8003490: f7fd fa70 bl 8000974 <HAL_GetTick>
8003494: 4602 mov r2, r0
8003496: 68fb ldr r3, [r7, #12]
8003498: 1ad3 subs r3, r2, r3
800349a: f241 3288 movw r2, #5000 ; 0x1388
800349e: 4293 cmp r3, r2
80034a0: d901 bls.n 80034a6 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
80034a2: 2303 movs r3, #3
80034a4: e053 b.n 800354e <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80034a6: 4b2d ldr r3, [pc, #180] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
80034a8: 685b ldr r3, [r3, #4]
80034aa: f003 020c and.w r2, r3, #12
80034ae: 687b ldr r3, [r7, #4]
80034b0: 685b ldr r3, [r3, #4]
80034b2: 009b lsls r3, r3, #2
80034b4: 429a cmp r2, r3
80034b6: d1eb bne.n 8003490 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
80034b8: 4b27 ldr r3, [pc, #156] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80034ba: 681b ldr r3, [r3, #0]
80034bc: f003 0307 and.w r3, r3, #7
80034c0: 683a ldr r2, [r7, #0]
80034c2: 429a cmp r2, r3
80034c4: d210 bcs.n 80034e8 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80034c6: 4b24 ldr r3, [pc, #144] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80034c8: 681b ldr r3, [r3, #0]
80034ca: f023 0207 bic.w r2, r3, #7
80034ce: 4922 ldr r1, [pc, #136] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80034d0: 683b ldr r3, [r7, #0]
80034d2: 4313 orrs r3, r2
80034d4: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80034d6: 4b20 ldr r3, [pc, #128] ; (8003558 <HAL_RCC_ClockConfig+0x1c0>)
80034d8: 681b ldr r3, [r3, #0]
80034da: f003 0307 and.w r3, r3, #7
80034de: 683a ldr r2, [r7, #0]
80034e0: 429a cmp r2, r3
80034e2: d001 beq.n 80034e8 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
80034e4: 2301 movs r3, #1
80034e6: e032 b.n 800354e <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80034e8: 687b ldr r3, [r7, #4]
80034ea: 681b ldr r3, [r3, #0]
80034ec: f003 0304 and.w r3, r3, #4
80034f0: 2b00 cmp r3, #0
80034f2: d008 beq.n 8003506 <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80034f4: 4b19 ldr r3, [pc, #100] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
80034f6: 685b ldr r3, [r3, #4]
80034f8: f423 62e0 bic.w r2, r3, #1792 ; 0x700
80034fc: 687b ldr r3, [r7, #4]
80034fe: 68db ldr r3, [r3, #12]
8003500: 4916 ldr r1, [pc, #88] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003502: 4313 orrs r3, r2
8003504: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8003506: 687b ldr r3, [r7, #4]
8003508: 681b ldr r3, [r3, #0]
800350a: f003 0308 and.w r3, r3, #8
800350e: 2b00 cmp r3, #0
8003510: d009 beq.n 8003526 <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8003512: 4b12 ldr r3, [pc, #72] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003514: 685b ldr r3, [r3, #4]
8003516: f423 5260 bic.w r2, r3, #14336 ; 0x3800
800351a: 687b ldr r3, [r7, #4]
800351c: 691b ldr r3, [r3, #16]
800351e: 00db lsls r3, r3, #3
8003520: 490e ldr r1, [pc, #56] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
8003522: 4313 orrs r3, r2
8003524: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8003526: f000 f821 bl 800356c <HAL_RCC_GetSysClockFreq>
800352a: 4601 mov r1, r0
800352c: 4b0b ldr r3, [pc, #44] ; (800355c <HAL_RCC_ClockConfig+0x1c4>)
800352e: 685b ldr r3, [r3, #4]
8003530: 091b lsrs r3, r3, #4
8003532: f003 030f and.w r3, r3, #15
8003536: 4a0a ldr r2, [pc, #40] ; (8003560 <HAL_RCC_ClockConfig+0x1c8>)
8003538: 5cd3 ldrb r3, [r2, r3]
800353a: fa21 f303 lsr.w r3, r1, r3
800353e: 4a09 ldr r2, [pc, #36] ; (8003564 <HAL_RCC_ClockConfig+0x1cc>)
8003540: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8003542: 4b09 ldr r3, [pc, #36] ; (8003568 <HAL_RCC_ClockConfig+0x1d0>)
8003544: 681b ldr r3, [r3, #0]
8003546: 4618 mov r0, r3
8003548: f7fd f9d2 bl 80008f0 <HAL_InitTick>
return HAL_OK;
800354c: 2300 movs r3, #0
}
800354e: 4618 mov r0, r3
8003550: 3710 adds r7, #16
8003552: 46bd mov sp, r7
8003554: bd80 pop {r7, pc}
8003556: bf00 nop
8003558: 40022000 .word 0x40022000
800355c: 40021000 .word 0x40021000
8003560: 0800a614 .word 0x0800a614
8003564: 20000004 .word 0x20000004
8003568: 20000008 .word 0x20000008
0800356c <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
800356c: b490 push {r4, r7}
800356e: b08a sub sp, #40 ; 0x28
8003570: af00 add r7, sp, #0
#if defined(RCC_CFGR2_PREDIV1SRC)
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
#else
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
8003572: 4b2a ldr r3, [pc, #168] ; (800361c <HAL_RCC_GetSysClockFreq+0xb0>)
8003574: 1d3c adds r4, r7, #4
8003576: cb0f ldmia r3, {r0, r1, r2, r3}
8003578: e884 000f stmia.w r4, {r0, r1, r2, r3}
#if defined(RCC_CFGR2_PREDIV1)
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
#else
const uint8_t aPredivFactorTable[2] = {1, 2};
800357c: 4b28 ldr r3, [pc, #160] ; (8003620 <HAL_RCC_GetSysClockFreq+0xb4>)
800357e: 881b ldrh r3, [r3, #0]
8003580: 803b strh r3, [r7, #0]
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8003582: 2300 movs r3, #0
8003584: 61fb str r3, [r7, #28]
8003586: 2300 movs r3, #0
8003588: 61bb str r3, [r7, #24]
800358a: 2300 movs r3, #0
800358c: 627b str r3, [r7, #36] ; 0x24
800358e: 2300 movs r3, #0
8003590: 617b str r3, [r7, #20]
uint32_t sysclockfreq = 0U;
8003592: 2300 movs r3, #0
8003594: 623b str r3, [r7, #32]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
8003596: 4b23 ldr r3, [pc, #140] ; (8003624 <HAL_RCC_GetSysClockFreq+0xb8>)
8003598: 685b ldr r3, [r3, #4]
800359a: 61fb str r3, [r7, #28]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
800359c: 69fb ldr r3, [r7, #28]
800359e: f003 030c and.w r3, r3, #12
80035a2: 2b04 cmp r3, #4
80035a4: d002 beq.n 80035ac <HAL_RCC_GetSysClockFreq+0x40>
80035a6: 2b08 cmp r3, #8
80035a8: d003 beq.n 80035b2 <HAL_RCC_GetSysClockFreq+0x46>
80035aa: e02d b.n 8003608 <HAL_RCC_GetSysClockFreq+0x9c>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
80035ac: 4b1e ldr r3, [pc, #120] ; (8003628 <HAL_RCC_GetSysClockFreq+0xbc>)
80035ae: 623b str r3, [r7, #32]
break;
80035b0: e02d b.n 800360e <HAL_RCC_GetSysClockFreq+0xa2>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
80035b2: 69fb ldr r3, [r7, #28]
80035b4: 0c9b lsrs r3, r3, #18
80035b6: f003 030f and.w r3, r3, #15
80035ba: f107 0228 add.w r2, r7, #40 ; 0x28
80035be: 4413 add r3, r2
80035c0: f813 3c24 ldrb.w r3, [r3, #-36]
80035c4: 617b str r3, [r7, #20]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
80035c6: 69fb ldr r3, [r7, #28]
80035c8: f403 3380 and.w r3, r3, #65536 ; 0x10000
80035cc: 2b00 cmp r3, #0
80035ce: d013 beq.n 80035f8 <HAL_RCC_GetSysClockFreq+0x8c>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
80035d0: 4b14 ldr r3, [pc, #80] ; (8003624 <HAL_RCC_GetSysClockFreq+0xb8>)
80035d2: 685b ldr r3, [r3, #4]
80035d4: 0c5b lsrs r3, r3, #17
80035d6: f003 0301 and.w r3, r3, #1
80035da: f107 0228 add.w r2, r7, #40 ; 0x28
80035de: 4413 add r3, r2
80035e0: f813 3c28 ldrb.w r3, [r3, #-40]
80035e4: 61bb str r3, [r7, #24]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
80035e6: 697b ldr r3, [r7, #20]
80035e8: 4a0f ldr r2, [pc, #60] ; (8003628 <HAL_RCC_GetSysClockFreq+0xbc>)
80035ea: fb02 f203 mul.w r2, r2, r3
80035ee: 69bb ldr r3, [r7, #24]
80035f0: fbb2 f3f3 udiv r3, r2, r3
80035f4: 627b str r3, [r7, #36] ; 0x24
80035f6: e004 b.n 8003602 <HAL_RCC_GetSysClockFreq+0x96>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
80035f8: 697b ldr r3, [r7, #20]
80035fa: 4a0c ldr r2, [pc, #48] ; (800362c <HAL_RCC_GetSysClockFreq+0xc0>)
80035fc: fb02 f303 mul.w r3, r2, r3
8003600: 627b str r3, [r7, #36] ; 0x24
}
sysclockfreq = pllclk;
8003602: 6a7b ldr r3, [r7, #36] ; 0x24
8003604: 623b str r3, [r7, #32]
break;
8003606: e002 b.n 800360e <HAL_RCC_GetSysClockFreq+0xa2>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8003608: 4b09 ldr r3, [pc, #36] ; (8003630 <HAL_RCC_GetSysClockFreq+0xc4>)
800360a: 623b str r3, [r7, #32]
break;
800360c: bf00 nop
}
}
return sysclockfreq;
800360e: 6a3b ldr r3, [r7, #32]
}
8003610: 4618 mov r0, r3
8003612: 3728 adds r7, #40 ; 0x28
8003614: 46bd mov sp, r7
8003616: bc90 pop {r4, r7}
8003618: 4770 bx lr
800361a: bf00 nop
800361c: 0800a5bc .word 0x0800a5bc
8003620: 0800a5cc .word 0x0800a5cc
8003624: 40021000 .word 0x40021000
8003628: 00f42400 .word 0x00f42400
800362c: 003d0900 .word 0x003d0900
8003630: 007a1200 .word 0x007a1200
08003634 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8003634: b480 push {r7}
8003636: af00 add r7, sp, #0
return SystemCoreClock;
8003638: 4b02 ldr r3, [pc, #8] ; (8003644 <HAL_RCC_GetHCLKFreq+0x10>)
800363a: 681b ldr r3, [r3, #0]
}
800363c: 4618 mov r0, r3
800363e: 46bd mov sp, r7
8003640: bc80 pop {r7}
8003642: 4770 bx lr
8003644: 20000004 .word 0x20000004
08003648 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8003648: b580 push {r7, lr}
800364a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
800364c: f7ff fff2 bl 8003634 <HAL_RCC_GetHCLKFreq>
8003650: 4601 mov r1, r0
8003652: 4b05 ldr r3, [pc, #20] ; (8003668 <HAL_RCC_GetPCLK1Freq+0x20>)
8003654: 685b ldr r3, [r3, #4]
8003656: 0a1b lsrs r3, r3, #8
8003658: f003 0307 and.w r3, r3, #7
800365c: 4a03 ldr r2, [pc, #12] ; (800366c <HAL_RCC_GetPCLK1Freq+0x24>)
800365e: 5cd3 ldrb r3, [r2, r3]
8003660: fa21 f303 lsr.w r3, r1, r3
}
8003664: 4618 mov r0, r3
8003666: bd80 pop {r7, pc}
8003668: 40021000 .word 0x40021000
800366c: 0800a624 .word 0x0800a624
08003670 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8003670: b480 push {r7}
8003672: b085 sub sp, #20
8003674: af00 add r7, sp, #0
8003676: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8003678: 4b0a ldr r3, [pc, #40] ; (80036a4 <RCC_Delay+0x34>)
800367a: 681b ldr r3, [r3, #0]
800367c: 4a0a ldr r2, [pc, #40] ; (80036a8 <RCC_Delay+0x38>)
800367e: fba2 2303 umull r2, r3, r2, r3
8003682: 0a5b lsrs r3, r3, #9
8003684: 687a ldr r2, [r7, #4]
8003686: fb02 f303 mul.w r3, r2, r3
800368a: 60fb str r3, [r7, #12]
do
{
__NOP();
800368c: bf00 nop
}
while (Delay --);
800368e: 68fb ldr r3, [r7, #12]
8003690: 1e5a subs r2, r3, #1
8003692: 60fa str r2, [r7, #12]
8003694: 2b00 cmp r3, #0
8003696: d1f9 bne.n 800368c <RCC_Delay+0x1c>
}
8003698: bf00 nop
800369a: 3714 adds r7, #20
800369c: 46bd mov sp, r7
800369e: bc80 pop {r7}
80036a0: 4770 bx lr
80036a2: bf00 nop
80036a4: 20000004 .word 0x20000004
80036a8: 10624dd3 .word 0x10624dd3
080036ac <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
80036ac: b580 push {r7, lr}
80036ae: b086 sub sp, #24
80036b0: af00 add r7, sp, #0
80036b2: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
80036b4: 2300 movs r3, #0
80036b6: 613b str r3, [r7, #16]
80036b8: 2300 movs r3, #0
80036ba: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
80036bc: 687b ldr r3, [r7, #4]
80036be: 681b ldr r3, [r3, #0]
80036c0: f003 0301 and.w r3, r3, #1
80036c4: 2b00 cmp r3, #0
80036c6: d07d beq.n 80037c4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
/* check for RTC Parameters used to output RTCCLK */
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
FlagStatus pwrclkchanged = RESET;
80036c8: 2300 movs r3, #0
80036ca: 75fb strb r3, [r7, #23]
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80036cc: 4b4f ldr r3, [pc, #316] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80036ce: 69db ldr r3, [r3, #28]
80036d0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80036d4: 2b00 cmp r3, #0
80036d6: d10d bne.n 80036f4 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
80036d8: 4b4c ldr r3, [pc, #304] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80036da: 69db ldr r3, [r3, #28]
80036dc: 4a4b ldr r2, [pc, #300] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80036de: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
80036e2: 61d3 str r3, [r2, #28]
80036e4: 4b49 ldr r3, [pc, #292] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80036e6: 69db ldr r3, [r3, #28]
80036e8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80036ec: 60bb str r3, [r7, #8]
80036ee: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80036f0: 2301 movs r3, #1
80036f2: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80036f4: 4b46 ldr r3, [pc, #280] ; (8003810 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80036f6: 681b ldr r3, [r3, #0]
80036f8: f403 7380 and.w r3, r3, #256 ; 0x100
80036fc: 2b00 cmp r3, #0
80036fe: d118 bne.n 8003732 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8003700: 4b43 ldr r3, [pc, #268] ; (8003810 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003702: 681b ldr r3, [r3, #0]
8003704: 4a42 ldr r2, [pc, #264] ; (8003810 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003706: f443 7380 orr.w r3, r3, #256 ; 0x100
800370a: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800370c: f7fd f932 bl 8000974 <HAL_GetTick>
8003710: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003712: e008 b.n 8003726 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8003714: f7fd f92e bl 8000974 <HAL_GetTick>
8003718: 4602 mov r2, r0
800371a: 693b ldr r3, [r7, #16]
800371c: 1ad3 subs r3, r2, r3
800371e: 2b64 cmp r3, #100 ; 0x64
8003720: d901 bls.n 8003726 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8003722: 2303 movs r3, #3
8003724: e06d b.n 8003802 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003726: 4b3a ldr r3, [pc, #232] ; (8003810 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003728: 681b ldr r3, [r3, #0]
800372a: f403 7380 and.w r3, r3, #256 ; 0x100
800372e: 2b00 cmp r3, #0
8003730: d0f0 beq.n 8003714 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8003732: 4b36 ldr r3, [pc, #216] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003734: 6a1b ldr r3, [r3, #32]
8003736: f403 7340 and.w r3, r3, #768 ; 0x300
800373a: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
800373c: 68fb ldr r3, [r7, #12]
800373e: 2b00 cmp r3, #0
8003740: d02e beq.n 80037a0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8003742: 687b ldr r3, [r7, #4]
8003744: 685b ldr r3, [r3, #4]
8003746: f403 7340 and.w r3, r3, #768 ; 0x300
800374a: 68fa ldr r2, [r7, #12]
800374c: 429a cmp r2, r3
800374e: d027 beq.n 80037a0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8003750: 4b2e ldr r3, [pc, #184] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003752: 6a1b ldr r3, [r3, #32]
8003754: f423 7340 bic.w r3, r3, #768 ; 0x300
8003758: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800375a: 4b2e ldr r3, [pc, #184] ; (8003814 <HAL_RCCEx_PeriphCLKConfig+0x168>)
800375c: 2201 movs r2, #1
800375e: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8003760: 4b2c ldr r3, [pc, #176] ; (8003814 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003762: 2200 movs r2, #0
8003764: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8003766: 4a29 ldr r2, [pc, #164] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003768: 68fb ldr r3, [r7, #12]
800376a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
800376c: 68fb ldr r3, [r7, #12]
800376e: f003 0301 and.w r3, r3, #1
8003772: 2b00 cmp r3, #0
8003774: d014 beq.n 80037a0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003776: f7fd f8fd bl 8000974 <HAL_GetTick>
800377a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800377c: e00a b.n 8003794 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800377e: f7fd f8f9 bl 8000974 <HAL_GetTick>
8003782: 4602 mov r2, r0
8003784: 693b ldr r3, [r7, #16]
8003786: 1ad3 subs r3, r2, r3
8003788: f241 3288 movw r2, #5000 ; 0x1388
800378c: 4293 cmp r3, r2
800378e: d901 bls.n 8003794 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8003790: 2303 movs r3, #3
8003792: e036 b.n 8003802 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003794: 4b1d ldr r3, [pc, #116] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003796: 6a1b ldr r3, [r3, #32]
8003798: f003 0302 and.w r3, r3, #2
800379c: 2b00 cmp r3, #0
800379e: d0ee beq.n 800377e <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
80037a0: 4b1a ldr r3, [pc, #104] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037a2: 6a1b ldr r3, [r3, #32]
80037a4: f423 7240 bic.w r2, r3, #768 ; 0x300
80037a8: 687b ldr r3, [r7, #4]
80037aa: 685b ldr r3, [r3, #4]
80037ac: 4917 ldr r1, [pc, #92] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037ae: 4313 orrs r3, r2
80037b0: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
80037b2: 7dfb ldrb r3, [r7, #23]
80037b4: 2b01 cmp r3, #1
80037b6: d105 bne.n 80037c4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
80037b8: 4b14 ldr r3, [pc, #80] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037ba: 69db ldr r3, [r3, #28]
80037bc: 4a13 ldr r2, [pc, #76] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037be: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
80037c2: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
80037c4: 687b ldr r3, [r7, #4]
80037c6: 681b ldr r3, [r3, #0]
80037c8: f003 0302 and.w r3, r3, #2
80037cc: 2b00 cmp r3, #0
80037ce: d008 beq.n 80037e2 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
80037d0: 4b0e ldr r3, [pc, #56] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037d2: 685b ldr r3, [r3, #4]
80037d4: f423 4240 bic.w r2, r3, #49152 ; 0xc000
80037d8: 687b ldr r3, [r7, #4]
80037da: 689b ldr r3, [r3, #8]
80037dc: 490b ldr r1, [pc, #44] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037de: 4313 orrs r3, r2
80037e0: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
80037e2: 687b ldr r3, [r7, #4]
80037e4: 681b ldr r3, [r3, #0]
80037e6: f003 0310 and.w r3, r3, #16
80037ea: 2b00 cmp r3, #0
80037ec: d008 beq.n 8003800 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
80037ee: 4b07 ldr r3, [pc, #28] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037f0: 685b ldr r3, [r3, #4]
80037f2: f423 0280 bic.w r2, r3, #4194304 ; 0x400000
80037f6: 687b ldr r3, [r7, #4]
80037f8: 695b ldr r3, [r3, #20]
80037fa: 4904 ldr r1, [pc, #16] ; (800380c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80037fc: 4313 orrs r3, r2
80037fe: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8003800: 2300 movs r3, #0
}
8003802: 4618 mov r0, r3
8003804: 3718 adds r7, #24
8003806: 46bd mov sp, r7
8003808: bd80 pop {r7, pc}
800380a: bf00 nop
800380c: 40021000 .word 0x40021000
8003810: 40007000 .word 0x40007000
8003814: 42420440 .word 0x42420440
08003818 <HAL_SD_Init>:
SD_HandleTypeDef and create the associated handle.
* @param hsd: Pointer to the SD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd)
{
8003818: b580 push {r7, lr}
800381a: b082 sub sp, #8
800381c: af00 add r7, sp, #0
800381e: 6078 str r0, [r7, #4]
/* Check the SD handle allocation */
if(hsd == NULL)
8003820: 687b ldr r3, [r7, #4]
8003822: 2b00 cmp r3, #0
8003824: d101 bne.n 800382a <HAL_SD_Init+0x12>
{
return HAL_ERROR;
8003826: 2301 movs r3, #1
8003828: e022 b.n 8003870 <HAL_SD_Init+0x58>
assert_param(IS_SDIO_CLOCK_POWER_SAVE(hsd->Init.ClockPowerSave));
assert_param(IS_SDIO_BUS_WIDE(hsd->Init.BusWide));
assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(hsd->Init.HardwareFlowControl));
assert_param(IS_SDIO_CLKDIV(hsd->Init.ClockDiv));
if(hsd->State == HAL_SD_STATE_RESET)
800382a: 687b ldr r3, [r7, #4]
800382c: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
8003830: b2db uxtb r3, r3
8003832: 2b00 cmp r3, #0
8003834: d105 bne.n 8003842 <HAL_SD_Init+0x2a>
{
/* Allocate lock resource and initialize it */
hsd->Lock = HAL_UNLOCKED;
8003836: 687b ldr r3, [r7, #4]
8003838: 2200 movs r2, #0
800383a: 771a strb r2, [r3, #28]
/* Init the low level hardware */
hsd->MspInitCallback(hsd);
#else
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
HAL_SD_MspInit(hsd);
800383c: 6878 ldr r0, [r7, #4]
800383e: f7fc ff65 bl 800070c <HAL_SD_MspInit>
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
}
hsd->State = HAL_SD_STATE_BUSY;
8003842: 687b ldr r3, [r7, #4]
8003844: 2203 movs r2, #3
8003846: f883 2034 strb.w r2, [r3, #52] ; 0x34
/* Initialize the Card parameters */
if (HAL_SD_InitCard(hsd) != HAL_OK)
800384a: 6878 ldr r0, [r7, #4]
800384c: f000 f814 bl 8003878 <HAL_SD_InitCard>
8003850: 4603 mov r3, r0
8003852: 2b00 cmp r3, #0
8003854: d001 beq.n 800385a <HAL_SD_Init+0x42>
{
return HAL_ERROR;
8003856: 2301 movs r3, #1
8003858: e00a b.n 8003870 <HAL_SD_Init+0x58>
}
/* Initialize the error code */
hsd->ErrorCode = HAL_SD_ERROR_NONE;
800385a: 687b ldr r3, [r7, #4]
800385c: 2200 movs r2, #0
800385e: 639a str r2, [r3, #56] ; 0x38
/* Initialize the SD operation */
hsd->Context = SD_CONTEXT_NONE;
8003860: 687b ldr r3, [r7, #4]
8003862: 2200 movs r2, #0
8003864: 631a str r2, [r3, #48] ; 0x30
/* Initialize the SD state */
hsd->State = HAL_SD_STATE_READY;
8003866: 687b ldr r3, [r7, #4]
8003868: 2201 movs r2, #1
800386a: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_OK;
800386e: 2300 movs r3, #0
}
8003870: 4618 mov r0, r3
8003872: 3708 adds r7, #8
8003874: 46bd mov sp, r7
8003876: bd80 pop {r7, pc}
08003878 <HAL_SD_InitCard>:
* @note This function initializes the SD card. It could be used when a card
re-initialization is needed.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
{
8003878: b5b0 push {r4, r5, r7, lr}
800387a: b08e sub sp, #56 ; 0x38
800387c: af04 add r7, sp, #16
800387e: 6078 str r0, [r7, #4]
uint32_t errorstate;
HAL_StatusTypeDef status;
SD_InitTypeDef Init;
/* Default SDIO peripheral configuration for SD card initialization */
Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
8003880: 2300 movs r3, #0
8003882: 60bb str r3, [r7, #8]
Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
8003884: 2300 movs r3, #0
8003886: 60fb str r3, [r7, #12]
Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
8003888: 2300 movs r3, #0
800388a: 613b str r3, [r7, #16]
Init.BusWide = SDIO_BUS_WIDE_1B;
800388c: 2300 movs r3, #0
800388e: 617b str r3, [r7, #20]
Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
8003890: 2300 movs r3, #0
8003892: 61bb str r3, [r7, #24]
Init.ClockDiv = SDIO_INIT_CLK_DIV;
8003894: 2376 movs r3, #118 ; 0x76
8003896: 61fb str r3, [r7, #28]
/* Initialize SDIO peripheral interface with default configuration */
status = SDIO_Init(hsd->Instance, Init);
8003898: 687b ldr r3, [r7, #4]
800389a: 681d ldr r5, [r3, #0]
800389c: 466c mov r4, sp
800389e: f107 0314 add.w r3, r7, #20
80038a2: e893 0007 ldmia.w r3, {r0, r1, r2}
80038a6: e884 0007 stmia.w r4, {r0, r1, r2}
80038aa: f107 0308 add.w r3, r7, #8
80038ae: cb0e ldmia r3, {r1, r2, r3}
80038b0: 4628 mov r0, r5
80038b2: f001 f912 bl 8004ada <SDIO_Init>
80038b6: 4603 mov r3, r0
80038b8: f887 3027 strb.w r3, [r7, #39] ; 0x27
if(status != HAL_OK)
80038bc: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
80038c0: 2b00 cmp r3, #0
80038c2: d001 beq.n 80038c8 <HAL_SD_InitCard+0x50>
{
return HAL_ERROR;
80038c4: 2301 movs r3, #1
80038c6: e031 b.n 800392c <HAL_SD_InitCard+0xb4>
}
/* Disable SDIO Clock */
__HAL_SD_DISABLE(hsd);
80038c8: 4b1a ldr r3, [pc, #104] ; (8003934 <HAL_SD_InitCard+0xbc>)
80038ca: 2200 movs r2, #0
80038cc: 601a str r2, [r3, #0]
/* Set Power State to ON */
(void)SDIO_PowerState_ON(hsd->Instance);
80038ce: 687b ldr r3, [r7, #4]
80038d0: 681b ldr r3, [r3, #0]
80038d2: 4618 mov r0, r3
80038d4: f001 f947 bl 8004b66 <SDIO_PowerState_ON>
/* Enable SDIO Clock */
__HAL_SD_ENABLE(hsd);
80038d8: 4b16 ldr r3, [pc, #88] ; (8003934 <HAL_SD_InitCard+0xbc>)
80038da: 2201 movs r2, #1
80038dc: 601a str r2, [r3, #0]
/* Identify card operating voltage */
errorstate = SD_PowerON(hsd);
80038de: 6878 ldr r0, [r7, #4]
80038e0: f000 ff00 bl 80046e4 <SD_PowerON>
80038e4: 6238 str r0, [r7, #32]
if(errorstate != HAL_SD_ERROR_NONE)
80038e6: 6a3b ldr r3, [r7, #32]
80038e8: 2b00 cmp r3, #0
80038ea: d00b beq.n 8003904 <HAL_SD_InitCard+0x8c>
{
hsd->State = HAL_SD_STATE_READY;
80038ec: 687b ldr r3, [r7, #4]
80038ee: 2201 movs r2, #1
80038f0: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->ErrorCode |= errorstate;
80038f4: 687b ldr r3, [r7, #4]
80038f6: 6b9a ldr r2, [r3, #56] ; 0x38
80038f8: 6a3b ldr r3, [r7, #32]
80038fa: 431a orrs r2, r3
80038fc: 687b ldr r3, [r7, #4]
80038fe: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
8003900: 2301 movs r3, #1
8003902: e013 b.n 800392c <HAL_SD_InitCard+0xb4>
}
/* Card initialization */
errorstate = SD_InitCard(hsd);
8003904: 6878 ldr r0, [r7, #4]
8003906: f000 fe1f bl 8004548 <SD_InitCard>
800390a: 6238 str r0, [r7, #32]
if(errorstate != HAL_SD_ERROR_NONE)
800390c: 6a3b ldr r3, [r7, #32]
800390e: 2b00 cmp r3, #0
8003910: d00b beq.n 800392a <HAL_SD_InitCard+0xb2>
{
hsd->State = HAL_SD_STATE_READY;
8003912: 687b ldr r3, [r7, #4]
8003914: 2201 movs r2, #1
8003916: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->ErrorCode |= errorstate;
800391a: 687b ldr r3, [r7, #4]
800391c: 6b9a ldr r2, [r3, #56] ; 0x38
800391e: 6a3b ldr r3, [r7, #32]
8003920: 431a orrs r2, r3
8003922: 687b ldr r3, [r7, #4]
8003924: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
8003926: 2301 movs r3, #1
8003928: e000 b.n 800392c <HAL_SD_InitCard+0xb4>
}
return HAL_OK;
800392a: 2300 movs r3, #0
}
800392c: 4618 mov r0, r3
800392e: 3728 adds r7, #40 ; 0x28
8003930: 46bd mov sp, r7
8003932: bdb0 pop {r4, r5, r7, pc}
8003934: 423000a0 .word 0x423000a0
08003938 <HAL_SD_DeInit>:
* @brief De-Initializes the SD card.
* @param hsd: Pointer to SD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd)
{
8003938: b580 push {r7, lr}
800393a: b082 sub sp, #8
800393c: af00 add r7, sp, #0
800393e: 6078 str r0, [r7, #4]
/* Check the SD handle allocation */
if(hsd == NULL)
8003940: 687b ldr r3, [r7, #4]
8003942: 2b00 cmp r3, #0
8003944: d101 bne.n 800394a <HAL_SD_DeInit+0x12>
{
return HAL_ERROR;
8003946: 2301 movs r3, #1
8003948: e011 b.n 800396e <HAL_SD_DeInit+0x36>
}
/* Check the parameters */
assert_param(IS_SDIO_ALL_INSTANCE(hsd->Instance));
hsd->State = HAL_SD_STATE_BUSY;
800394a: 687b ldr r3, [r7, #4]
800394c: 2203 movs r2, #3
800394e: f883 2034 strb.w r2, [r3, #52] ; 0x34
/* Set SD power state to off */
SD_PowerOFF(hsd);
8003952: 6878 ldr r0, [r7, #4]
8003954: f000 ff54 bl 8004800 <SD_PowerOFF>
/* DeInit the low level hardware */
hsd->MspDeInitCallback(hsd);
#else
/* De-Initialize the MSP layer */
HAL_SD_MspDeInit(hsd);
8003958: 6878 ldr r0, [r7, #4]
800395a: f7fc ff31 bl 80007c0 <HAL_SD_MspDeInit>
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
hsd->ErrorCode = HAL_SD_ERROR_NONE;
800395e: 687b ldr r3, [r7, #4]
8003960: 2200 movs r2, #0
8003962: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_RESET;
8003964: 687b ldr r3, [r7, #4]
8003966: 2200 movs r2, #0
8003968: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_OK;
800396c: 2300 movs r3, #0
}
800396e: 4618 mov r0, r3
8003970: 3708 adds r7, #8
8003972: 46bd mov sp, r7
8003974: bd80 pop {r7, pc}
...
08003978 <HAL_SD_ReadBlocks>:
* @param NumberOfBlocks: Number of SD blocks to read
* @param Timeout: Specify timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
{
8003978: b580 push {r7, lr}
800397a: b092 sub sp, #72 ; 0x48
800397c: af00 add r7, sp, #0
800397e: 60f8 str r0, [r7, #12]
8003980: 60b9 str r1, [r7, #8]
8003982: 607a str r2, [r7, #4]
8003984: 603b str r3, [r7, #0]
SDIO_DataInitTypeDef config;
uint32_t errorstate;
uint32_t tickstart = HAL_GetTick();
8003986: f7fc fff5 bl 8000974 <HAL_GetTick>
800398a: 6338 str r0, [r7, #48] ; 0x30
uint32_t count, data, dataremaining;
uint32_t add = BlockAdd;
800398c: 687b ldr r3, [r7, #4]
800398e: 63bb str r3, [r7, #56] ; 0x38
uint8_t *tempbuff = pData;
8003990: 68bb ldr r3, [r7, #8]
8003992: 637b str r3, [r7, #52] ; 0x34
if(NULL == pData)
8003994: 68bb ldr r3, [r7, #8]
8003996: 2b00 cmp r3, #0
8003998: d107 bne.n 80039aa <HAL_SD_ReadBlocks+0x32>
{
hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
800399a: 68fb ldr r3, [r7, #12]
800399c: 6b9b ldr r3, [r3, #56] ; 0x38
800399e: f043 6200 orr.w r2, r3, #134217728 ; 0x8000000
80039a2: 68fb ldr r3, [r7, #12]
80039a4: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
80039a6: 2301 movs r3, #1
80039a8: e1d9 b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
if(hsd->State == HAL_SD_STATE_READY)
80039aa: 68fb ldr r3, [r7, #12]
80039ac: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
80039b0: b2db uxtb r3, r3
80039b2: 2b01 cmp r3, #1
80039b4: f040 81cc bne.w 8003d50 <HAL_SD_ReadBlocks+0x3d8>
{
hsd->ErrorCode = HAL_SD_ERROR_NONE;
80039b8: 68fb ldr r3, [r7, #12]
80039ba: 2200 movs r2, #0
80039bc: 639a str r2, [r3, #56] ; 0x38
if((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
80039be: 6bba ldr r2, [r7, #56] ; 0x38
80039c0: 683b ldr r3, [r7, #0]
80039c2: 441a add r2, r3
80039c4: 68fb ldr r3, [r7, #12]
80039c6: 6ddb ldr r3, [r3, #92] ; 0x5c
80039c8: 429a cmp r2, r3
80039ca: d907 bls.n 80039dc <HAL_SD_ReadBlocks+0x64>
{
hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
80039cc: 68fb ldr r3, [r7, #12]
80039ce: 6b9b ldr r3, [r3, #56] ; 0x38
80039d0: f043 7200 orr.w r2, r3, #33554432 ; 0x2000000
80039d4: 68fb ldr r3, [r7, #12]
80039d6: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
80039d8: 2301 movs r3, #1
80039da: e1c0 b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
hsd->State = HAL_SD_STATE_BUSY;
80039dc: 68fb ldr r3, [r7, #12]
80039de: 2203 movs r2, #3
80039e0: f883 2034 strb.w r2, [r3, #52] ; 0x34
/* Initialize data control register */
hsd->Instance->DCTRL = 0U;
80039e4: 68fb ldr r3, [r7, #12]
80039e6: 681b ldr r3, [r3, #0]
80039e8: 2200 movs r2, #0
80039ea: 62da str r2, [r3, #44] ; 0x2c
if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
80039ec: 68fb ldr r3, [r7, #12]
80039ee: 6c5b ldr r3, [r3, #68] ; 0x44
80039f0: 2b01 cmp r3, #1
80039f2: d002 beq.n 80039fa <HAL_SD_ReadBlocks+0x82>
{
add *= 512U;
80039f4: 6bbb ldr r3, [r7, #56] ; 0x38
80039f6: 025b lsls r3, r3, #9
80039f8: 63bb str r3, [r7, #56] ; 0x38
}
/* Set Block Size for Card */
errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
80039fa: 68fb ldr r3, [r7, #12]
80039fc: 681b ldr r3, [r3, #0]
80039fe: f44f 7100 mov.w r1, #512 ; 0x200
8003a02: 4618 mov r0, r3
8003a04: f001 f94a bl 8004c9c <SDMMC_CmdBlockLength>
8003a08: 6478 str r0, [r7, #68] ; 0x44
if(errorstate != HAL_SD_ERROR_NONE)
8003a0a: 6c7b ldr r3, [r7, #68] ; 0x44
8003a0c: 2b00 cmp r3, #0
8003a0e: d00f beq.n 8003a30 <HAL_SD_ReadBlocks+0xb8>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003a10: 68fb ldr r3, [r7, #12]
8003a12: 681b ldr r3, [r3, #0]
8003a14: 4a9b ldr r2, [pc, #620] ; (8003c84 <HAL_SD_ReadBlocks+0x30c>)
8003a16: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= errorstate;
8003a18: 68fb ldr r3, [r7, #12]
8003a1a: 6b9a ldr r2, [r3, #56] ; 0x38
8003a1c: 6c7b ldr r3, [r7, #68] ; 0x44
8003a1e: 431a orrs r2, r3
8003a20: 68fb ldr r3, [r7, #12]
8003a22: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003a24: 68fb ldr r3, [r7, #12]
8003a26: 2201 movs r2, #1
8003a28: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_ERROR;
8003a2c: 2301 movs r3, #1
8003a2e: e196 b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
/* Configure the SD DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
8003a30: f04f 33ff mov.w r3, #4294967295
8003a34: 617b str r3, [r7, #20]
config.DataLength = NumberOfBlocks * BLOCKSIZE;
8003a36: 683b ldr r3, [r7, #0]
8003a38: 025b lsls r3, r3, #9
8003a3a: 61bb str r3, [r7, #24]
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
8003a3c: 2390 movs r3, #144 ; 0x90
8003a3e: 61fb str r3, [r7, #28]
config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
8003a40: 2302 movs r3, #2
8003a42: 623b str r3, [r7, #32]
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
8003a44: 2300 movs r3, #0
8003a46: 627b str r3, [r7, #36] ; 0x24
config.DPSM = SDIO_DPSM_ENABLE;
8003a48: 2301 movs r3, #1
8003a4a: 62bb str r3, [r7, #40] ; 0x28
(void)SDIO_ConfigData(hsd->Instance, &config);
8003a4c: 68fb ldr r3, [r7, #12]
8003a4e: 681b ldr r3, [r3, #0]
8003a50: f107 0214 add.w r2, r7, #20
8003a54: 4611 mov r1, r2
8003a56: 4618 mov r0, r3
8003a58: f001 f8f5 bl 8004c46 <SDIO_ConfigData>
/* Read block(s) in polling mode */
if(NumberOfBlocks > 1U)
8003a5c: 683b ldr r3, [r7, #0]
8003a5e: 2b01 cmp r3, #1
8003a60: d90a bls.n 8003a78 <HAL_SD_ReadBlocks+0x100>
{
hsd->Context = SD_CONTEXT_READ_MULTIPLE_BLOCK;
8003a62: 68fb ldr r3, [r7, #12]
8003a64: 2202 movs r2, #2
8003a66: 631a str r2, [r3, #48] ; 0x30
/* Read Multi Block command */
errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add);
8003a68: 68fb ldr r3, [r7, #12]
8003a6a: 681b ldr r3, [r3, #0]
8003a6c: 6bb9 ldr r1, [r7, #56] ; 0x38
8003a6e: 4618 mov r0, r3
8003a70: f001 f958 bl 8004d24 <SDMMC_CmdReadMultiBlock>
8003a74: 6478 str r0, [r7, #68] ; 0x44
8003a76: e009 b.n 8003a8c <HAL_SD_ReadBlocks+0x114>
}
else
{
hsd->Context = SD_CONTEXT_READ_SINGLE_BLOCK;
8003a78: 68fb ldr r3, [r7, #12]
8003a7a: 2201 movs r2, #1
8003a7c: 631a str r2, [r3, #48] ; 0x30
/* Read Single Block command */
errorstate = SDMMC_CmdReadSingleBlock(hsd->Instance, add);
8003a7e: 68fb ldr r3, [r7, #12]
8003a80: 681b ldr r3, [r3, #0]
8003a82: 6bb9 ldr r1, [r7, #56] ; 0x38
8003a84: 4618 mov r0, r3
8003a86: f001 f92b bl 8004ce0 <SDMMC_CmdReadSingleBlock>
8003a8a: 6478 str r0, [r7, #68] ; 0x44
}
if(errorstate != HAL_SD_ERROR_NONE)
8003a8c: 6c7b ldr r3, [r7, #68] ; 0x44
8003a8e: 2b00 cmp r3, #0
8003a90: d012 beq.n 8003ab8 <HAL_SD_ReadBlocks+0x140>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003a92: 68fb ldr r3, [r7, #12]
8003a94: 681b ldr r3, [r3, #0]
8003a96: 4a7b ldr r2, [pc, #492] ; (8003c84 <HAL_SD_ReadBlocks+0x30c>)
8003a98: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= errorstate;
8003a9a: 68fb ldr r3, [r7, #12]
8003a9c: 6b9a ldr r2, [r3, #56] ; 0x38
8003a9e: 6c7b ldr r3, [r7, #68] ; 0x44
8003aa0: 431a orrs r2, r3
8003aa2: 68fb ldr r3, [r7, #12]
8003aa4: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003aa6: 68fb ldr r3, [r7, #12]
8003aa8: 2201 movs r2, #1
8003aaa: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003aae: 68fb ldr r3, [r7, #12]
8003ab0: 2200 movs r2, #0
8003ab2: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003ab4: 2301 movs r3, #1
8003ab6: e152 b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
/* Poll on SDIO flags */
dataremaining = config.DataLength;
8003ab8: 69bb ldr r3, [r7, #24]
8003aba: 63fb str r3, [r7, #60] ; 0x3c
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
8003abc: e061 b.n 8003b82 <HAL_SD_ReadBlocks+0x20a>
{
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXFIFOHF) && (dataremaining > 0U))
8003abe: 68fb ldr r3, [r7, #12]
8003ac0: 681b ldr r3, [r3, #0]
8003ac2: 6b5b ldr r3, [r3, #52] ; 0x34
8003ac4: f403 4300 and.w r3, r3, #32768 ; 0x8000
8003ac8: 2b00 cmp r3, #0
8003aca: d03c beq.n 8003b46 <HAL_SD_ReadBlocks+0x1ce>
8003acc: 6bfb ldr r3, [r7, #60] ; 0x3c
8003ace: 2b00 cmp r3, #0
8003ad0: d039 beq.n 8003b46 <HAL_SD_ReadBlocks+0x1ce>
{
/* Read data from SDIO Rx FIFO */
for(count = 0U; count < 8U; count++)
8003ad2: 2300 movs r3, #0
8003ad4: 643b str r3, [r7, #64] ; 0x40
8003ad6: e033 b.n 8003b40 <HAL_SD_ReadBlocks+0x1c8>
{
data = SDIO_ReadFIFO(hsd->Instance);
8003ad8: 68fb ldr r3, [r7, #12]
8003ada: 681b ldr r3, [r3, #0]
8003adc: 4618 mov r0, r3
8003ade: f001 f826 bl 8004b2e <SDIO_ReadFIFO>
8003ae2: 62f8 str r0, [r7, #44] ; 0x2c
*tempbuff = (uint8_t)(data & 0xFFU);
8003ae4: 6afb ldr r3, [r7, #44] ; 0x2c
8003ae6: b2da uxtb r2, r3
8003ae8: 6b7b ldr r3, [r7, #52] ; 0x34
8003aea: 701a strb r2, [r3, #0]
tempbuff++;
8003aec: 6b7b ldr r3, [r7, #52] ; 0x34
8003aee: 3301 adds r3, #1
8003af0: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003af2: 6bfb ldr r3, [r7, #60] ; 0x3c
8003af4: 3b01 subs r3, #1
8003af6: 63fb str r3, [r7, #60] ; 0x3c
*tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
8003af8: 6afb ldr r3, [r7, #44] ; 0x2c
8003afa: 0a1b lsrs r3, r3, #8
8003afc: b2da uxtb r2, r3
8003afe: 6b7b ldr r3, [r7, #52] ; 0x34
8003b00: 701a strb r2, [r3, #0]
tempbuff++;
8003b02: 6b7b ldr r3, [r7, #52] ; 0x34
8003b04: 3301 adds r3, #1
8003b06: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003b08: 6bfb ldr r3, [r7, #60] ; 0x3c
8003b0a: 3b01 subs r3, #1
8003b0c: 63fb str r3, [r7, #60] ; 0x3c
*tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
8003b0e: 6afb ldr r3, [r7, #44] ; 0x2c
8003b10: 0c1b lsrs r3, r3, #16
8003b12: b2da uxtb r2, r3
8003b14: 6b7b ldr r3, [r7, #52] ; 0x34
8003b16: 701a strb r2, [r3, #0]
tempbuff++;
8003b18: 6b7b ldr r3, [r7, #52] ; 0x34
8003b1a: 3301 adds r3, #1
8003b1c: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003b1e: 6bfb ldr r3, [r7, #60] ; 0x3c
8003b20: 3b01 subs r3, #1
8003b22: 63fb str r3, [r7, #60] ; 0x3c
*tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
8003b24: 6afb ldr r3, [r7, #44] ; 0x2c
8003b26: 0e1b lsrs r3, r3, #24
8003b28: b2da uxtb r2, r3
8003b2a: 6b7b ldr r3, [r7, #52] ; 0x34
8003b2c: 701a strb r2, [r3, #0]
tempbuff++;
8003b2e: 6b7b ldr r3, [r7, #52] ; 0x34
8003b30: 3301 adds r3, #1
8003b32: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003b34: 6bfb ldr r3, [r7, #60] ; 0x3c
8003b36: 3b01 subs r3, #1
8003b38: 63fb str r3, [r7, #60] ; 0x3c
for(count = 0U; count < 8U; count++)
8003b3a: 6c3b ldr r3, [r7, #64] ; 0x40
8003b3c: 3301 adds r3, #1
8003b3e: 643b str r3, [r7, #64] ; 0x40
8003b40: 6c3b ldr r3, [r7, #64] ; 0x40
8003b42: 2b07 cmp r3, #7
8003b44: d9c8 bls.n 8003ad8 <HAL_SD_ReadBlocks+0x160>
}
}
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
8003b46: f7fc ff15 bl 8000974 <HAL_GetTick>
8003b4a: 4602 mov r2, r0
8003b4c: 6b3b ldr r3, [r7, #48] ; 0x30
8003b4e: 1ad3 subs r3, r2, r3
8003b50: 6d3a ldr r2, [r7, #80] ; 0x50
8003b52: 429a cmp r2, r3
8003b54: d902 bls.n 8003b5c <HAL_SD_ReadBlocks+0x1e4>
8003b56: 6d3b ldr r3, [r7, #80] ; 0x50
8003b58: 2b00 cmp r3, #0
8003b5a: d112 bne.n 8003b82 <HAL_SD_ReadBlocks+0x20a>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003b5c: 68fb ldr r3, [r7, #12]
8003b5e: 681b ldr r3, [r3, #0]
8003b60: 4a48 ldr r2, [pc, #288] ; (8003c84 <HAL_SD_ReadBlocks+0x30c>)
8003b62: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_TIMEOUT;
8003b64: 68fb ldr r3, [r7, #12]
8003b66: 6b9b ldr r3, [r3, #56] ; 0x38
8003b68: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000
8003b6c: 68fb ldr r3, [r7, #12]
8003b6e: 639a str r2, [r3, #56] ; 0x38
hsd->State= HAL_SD_STATE_READY;
8003b70: 68fb ldr r3, [r7, #12]
8003b72: 2201 movs r2, #1
8003b74: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003b78: 68fb ldr r3, [r7, #12]
8003b7a: 2200 movs r2, #0
8003b7c: 631a str r2, [r3, #48] ; 0x30
return HAL_TIMEOUT;
8003b7e: 2303 movs r3, #3
8003b80: e0ed b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
8003b82: 68fb ldr r3, [r7, #12]
8003b84: 681b ldr r3, [r3, #0]
8003b86: 6b5a ldr r2, [r3, #52] ; 0x34
8003b88: f240 332a movw r3, #810 ; 0x32a
8003b8c: 4013 ands r3, r2
8003b8e: 2b00 cmp r3, #0
8003b90: d095 beq.n 8003abe <HAL_SD_ReadBlocks+0x146>
}
}
/* Send stop transmission command in case of multiblock read */
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DATAEND) && (NumberOfBlocks > 1U))
8003b92: 68fb ldr r3, [r7, #12]
8003b94: 681b ldr r3, [r3, #0]
8003b96: 6b5b ldr r3, [r3, #52] ; 0x34
8003b98: f403 7380 and.w r3, r3, #256 ; 0x100
8003b9c: 2b00 cmp r3, #0
8003b9e: d022 beq.n 8003be6 <HAL_SD_ReadBlocks+0x26e>
8003ba0: 683b ldr r3, [r7, #0]
8003ba2: 2b01 cmp r3, #1
8003ba4: d91f bls.n 8003be6 <HAL_SD_ReadBlocks+0x26e>
{
if(hsd->SdCard.CardType != CARD_SECURED)
8003ba6: 68fb ldr r3, [r7, #12]
8003ba8: 6c5b ldr r3, [r3, #68] ; 0x44
8003baa: 2b03 cmp r3, #3
8003bac: d01b beq.n 8003be6 <HAL_SD_ReadBlocks+0x26e>
{
/* Send stop transmission command */
errorstate = SDMMC_CmdStopTransfer(hsd->Instance);
8003bae: 68fb ldr r3, [r7, #12]
8003bb0: 681b ldr r3, [r3, #0]
8003bb2: 4618 mov r0, r3
8003bb4: f001 f91c bl 8004df0 <SDMMC_CmdStopTransfer>
8003bb8: 6478 str r0, [r7, #68] ; 0x44
if(errorstate != HAL_SD_ERROR_NONE)
8003bba: 6c7b ldr r3, [r7, #68] ; 0x44
8003bbc: 2b00 cmp r3, #0
8003bbe: d012 beq.n 8003be6 <HAL_SD_ReadBlocks+0x26e>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003bc0: 68fb ldr r3, [r7, #12]
8003bc2: 681b ldr r3, [r3, #0]
8003bc4: 4a2f ldr r2, [pc, #188] ; (8003c84 <HAL_SD_ReadBlocks+0x30c>)
8003bc6: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= errorstate;
8003bc8: 68fb ldr r3, [r7, #12]
8003bca: 6b9a ldr r2, [r3, #56] ; 0x38
8003bcc: 6c7b ldr r3, [r7, #68] ; 0x44
8003bce: 431a orrs r2, r3
8003bd0: 68fb ldr r3, [r7, #12]
8003bd2: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003bd4: 68fb ldr r3, [r7, #12]
8003bd6: 2201 movs r2, #1
8003bd8: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003bdc: 68fb ldr r3, [r7, #12]
8003bde: 2200 movs r2, #0
8003be0: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003be2: 2301 movs r3, #1
8003be4: e0bb b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
}
}
/* Get error state */
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
8003be6: 68fb ldr r3, [r7, #12]
8003be8: 681b ldr r3, [r3, #0]
8003bea: 6b5b ldr r3, [r3, #52] ; 0x34
8003bec: f003 0308 and.w r3, r3, #8
8003bf0: 2b00 cmp r3, #0
8003bf2: d012 beq.n 8003c1a <HAL_SD_ReadBlocks+0x2a2>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003bf4: 68fb ldr r3, [r7, #12]
8003bf6: 681b ldr r3, [r3, #0]
8003bf8: 4a22 ldr r2, [pc, #136] ; (8003c84 <HAL_SD_ReadBlocks+0x30c>)
8003bfa: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_DATA_TIMEOUT;
8003bfc: 68fb ldr r3, [r7, #12]
8003bfe: 6b9b ldr r3, [r3, #56] ; 0x38
8003c00: f043 0208 orr.w r2, r3, #8
8003c04: 68fb ldr r3, [r7, #12]
8003c06: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003c08: 68fb ldr r3, [r7, #12]
8003c0a: 2201 movs r2, #1
8003c0c: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003c10: 68fb ldr r3, [r7, #12]
8003c12: 2200 movs r2, #0
8003c14: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003c16: 2301 movs r3, #1
8003c18: e0a1 b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DCRCFAIL))
8003c1a: 68fb ldr r3, [r7, #12]
8003c1c: 681b ldr r3, [r3, #0]
8003c1e: 6b5b ldr r3, [r3, #52] ; 0x34
8003c20: f003 0302 and.w r3, r3, #2
8003c24: 2b00 cmp r3, #0
8003c26: d012 beq.n 8003c4e <HAL_SD_ReadBlocks+0x2d6>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003c28: 68fb ldr r3, [r7, #12]
8003c2a: 681b ldr r3, [r3, #0]
8003c2c: 4a15 ldr r2, [pc, #84] ; (8003c84 <HAL_SD_ReadBlocks+0x30c>)
8003c2e: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_DATA_CRC_FAIL;
8003c30: 68fb ldr r3, [r7, #12]
8003c32: 6b9b ldr r3, [r3, #56] ; 0x38
8003c34: f043 0202 orr.w r2, r3, #2
8003c38: 68fb ldr r3, [r7, #12]
8003c3a: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003c3c: 68fb ldr r3, [r7, #12]
8003c3e: 2201 movs r2, #1
8003c40: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003c44: 68fb ldr r3, [r7, #12]
8003c46: 2200 movs r2, #0
8003c48: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003c4a: 2301 movs r3, #1
8003c4c: e087 b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR))
8003c4e: 68fb ldr r3, [r7, #12]
8003c50: 681b ldr r3, [r3, #0]
8003c52: 6b5b ldr r3, [r3, #52] ; 0x34
8003c54: f003 0320 and.w r3, r3, #32
8003c58: 2b00 cmp r3, #0
8003c5a: d064 beq.n 8003d26 <HAL_SD_ReadBlocks+0x3ae>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003c5c: 68fb ldr r3, [r7, #12]
8003c5e: 681b ldr r3, [r3, #0]
8003c60: 4a08 ldr r2, [pc, #32] ; (8003c84 <HAL_SD_ReadBlocks+0x30c>)
8003c62: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_RX_OVERRUN;
8003c64: 68fb ldr r3, [r7, #12]
8003c66: 6b9b ldr r3, [r3, #56] ; 0x38
8003c68: f043 0220 orr.w r2, r3, #32
8003c6c: 68fb ldr r3, [r7, #12]
8003c6e: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003c70: 68fb ldr r3, [r7, #12]
8003c72: 2201 movs r2, #1
8003c74: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003c78: 68fb ldr r3, [r7, #12]
8003c7a: 2200 movs r2, #0
8003c7c: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003c7e: 2301 movs r3, #1
8003c80: e06d b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
8003c82: bf00 nop
8003c84: 004005ff .word 0x004005ff
}
/* Empty FIFO if there is still any data */
while ((__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXDAVL)) && (dataremaining > 0U))
{
data = SDIO_ReadFIFO(hsd->Instance);
8003c88: 68fb ldr r3, [r7, #12]
8003c8a: 681b ldr r3, [r3, #0]
8003c8c: 4618 mov r0, r3
8003c8e: f000 ff4e bl 8004b2e <SDIO_ReadFIFO>
8003c92: 62f8 str r0, [r7, #44] ; 0x2c
*tempbuff = (uint8_t)(data & 0xFFU);
8003c94: 6afb ldr r3, [r7, #44] ; 0x2c
8003c96: b2da uxtb r2, r3
8003c98: 6b7b ldr r3, [r7, #52] ; 0x34
8003c9a: 701a strb r2, [r3, #0]
tempbuff++;
8003c9c: 6b7b ldr r3, [r7, #52] ; 0x34
8003c9e: 3301 adds r3, #1
8003ca0: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003ca2: 6bfb ldr r3, [r7, #60] ; 0x3c
8003ca4: 3b01 subs r3, #1
8003ca6: 63fb str r3, [r7, #60] ; 0x3c
*tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
8003ca8: 6afb ldr r3, [r7, #44] ; 0x2c
8003caa: 0a1b lsrs r3, r3, #8
8003cac: b2da uxtb r2, r3
8003cae: 6b7b ldr r3, [r7, #52] ; 0x34
8003cb0: 701a strb r2, [r3, #0]
tempbuff++;
8003cb2: 6b7b ldr r3, [r7, #52] ; 0x34
8003cb4: 3301 adds r3, #1
8003cb6: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003cb8: 6bfb ldr r3, [r7, #60] ; 0x3c
8003cba: 3b01 subs r3, #1
8003cbc: 63fb str r3, [r7, #60] ; 0x3c
*tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
8003cbe: 6afb ldr r3, [r7, #44] ; 0x2c
8003cc0: 0c1b lsrs r3, r3, #16
8003cc2: b2da uxtb r2, r3
8003cc4: 6b7b ldr r3, [r7, #52] ; 0x34
8003cc6: 701a strb r2, [r3, #0]
tempbuff++;
8003cc8: 6b7b ldr r3, [r7, #52] ; 0x34
8003cca: 3301 adds r3, #1
8003ccc: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003cce: 6bfb ldr r3, [r7, #60] ; 0x3c
8003cd0: 3b01 subs r3, #1
8003cd2: 63fb str r3, [r7, #60] ; 0x3c
*tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
8003cd4: 6afb ldr r3, [r7, #44] ; 0x2c
8003cd6: 0e1b lsrs r3, r3, #24
8003cd8: b2da uxtb r2, r3
8003cda: 6b7b ldr r3, [r7, #52] ; 0x34
8003cdc: 701a strb r2, [r3, #0]
tempbuff++;
8003cde: 6b7b ldr r3, [r7, #52] ; 0x34
8003ce0: 3301 adds r3, #1
8003ce2: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003ce4: 6bfb ldr r3, [r7, #60] ; 0x3c
8003ce6: 3b01 subs r3, #1
8003ce8: 63fb str r3, [r7, #60] ; 0x3c
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
8003cea: f7fc fe43 bl 8000974 <HAL_GetTick>
8003cee: 4602 mov r2, r0
8003cf0: 6b3b ldr r3, [r7, #48] ; 0x30
8003cf2: 1ad3 subs r3, r2, r3
8003cf4: 6d3a ldr r2, [r7, #80] ; 0x50
8003cf6: 429a cmp r2, r3
8003cf8: d902 bls.n 8003d00 <HAL_SD_ReadBlocks+0x388>
8003cfa: 6d3b ldr r3, [r7, #80] ; 0x50
8003cfc: 2b00 cmp r3, #0
8003cfe: d112 bne.n 8003d26 <HAL_SD_ReadBlocks+0x3ae>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003d00: 68fb ldr r3, [r7, #12]
8003d02: 681b ldr r3, [r3, #0]
8003d04: 4a18 ldr r2, [pc, #96] ; (8003d68 <HAL_SD_ReadBlocks+0x3f0>)
8003d06: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_TIMEOUT;
8003d08: 68fb ldr r3, [r7, #12]
8003d0a: 6b9b ldr r3, [r3, #56] ; 0x38
8003d0c: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000
8003d10: 68fb ldr r3, [r7, #12]
8003d12: 639a str r2, [r3, #56] ; 0x38
hsd->State= HAL_SD_STATE_READY;
8003d14: 68fb ldr r3, [r7, #12]
8003d16: 2201 movs r2, #1
8003d18: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003d1c: 68fb ldr r3, [r7, #12]
8003d1e: 2200 movs r2, #0
8003d20: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003d22: 2301 movs r3, #1
8003d24: e01b b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
while ((__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXDAVL)) && (dataremaining > 0U))
8003d26: 68fb ldr r3, [r7, #12]
8003d28: 681b ldr r3, [r3, #0]
8003d2a: 6b5b ldr r3, [r3, #52] ; 0x34
8003d2c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8003d30: 2b00 cmp r3, #0
8003d32: d002 beq.n 8003d3a <HAL_SD_ReadBlocks+0x3c2>
8003d34: 6bfb ldr r3, [r7, #60] ; 0x3c
8003d36: 2b00 cmp r3, #0
8003d38: d1a6 bne.n 8003c88 <HAL_SD_ReadBlocks+0x310>
}
}
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
8003d3a: 68fb ldr r3, [r7, #12]
8003d3c: 681b ldr r3, [r3, #0]
8003d3e: f240 523a movw r2, #1338 ; 0x53a
8003d42: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003d44: 68fb ldr r3, [r7, #12]
8003d46: 2201 movs r2, #1
8003d48: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_OK;
8003d4c: 2300 movs r3, #0
8003d4e: e006 b.n 8003d5e <HAL_SD_ReadBlocks+0x3e6>
}
else
{
hsd->ErrorCode |= HAL_SD_ERROR_BUSY;
8003d50: 68fb ldr r3, [r7, #12]
8003d52: 6b9b ldr r3, [r3, #56] ; 0x38
8003d54: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000
8003d58: 68fb ldr r3, [r7, #12]
8003d5a: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
8003d5c: 2301 movs r3, #1
}
}
8003d5e: 4618 mov r0, r3
8003d60: 3748 adds r7, #72 ; 0x48
8003d62: 46bd mov sp, r7
8003d64: bd80 pop {r7, pc}
8003d66: bf00 nop
8003d68: 004005ff .word 0x004005ff
08003d6c <HAL_SD_WriteBlocks>:
* @param NumberOfBlocks: Number of SD blocks to write
* @param Timeout: Specify timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
{
8003d6c: b580 push {r7, lr}
8003d6e: b092 sub sp, #72 ; 0x48
8003d70: af00 add r7, sp, #0
8003d72: 60f8 str r0, [r7, #12]
8003d74: 60b9 str r1, [r7, #8]
8003d76: 607a str r2, [r7, #4]
8003d78: 603b str r3, [r7, #0]
SDIO_DataInitTypeDef config;
uint32_t errorstate;
uint32_t tickstart = HAL_GetTick();
8003d7a: f7fc fdfb bl 8000974 <HAL_GetTick>
8003d7e: 6338 str r0, [r7, #48] ; 0x30
uint32_t count, data, dataremaining;
uint32_t add = BlockAdd;
8003d80: 687b ldr r3, [r7, #4]
8003d82: 63bb str r3, [r7, #56] ; 0x38
uint8_t *tempbuff = pData;
8003d84: 68bb ldr r3, [r7, #8]
8003d86: 637b str r3, [r7, #52] ; 0x34
if(NULL == pData)
8003d88: 68bb ldr r3, [r7, #8]
8003d8a: 2b00 cmp r3, #0
8003d8c: d107 bne.n 8003d9e <HAL_SD_WriteBlocks+0x32>
{
hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
8003d8e: 68fb ldr r3, [r7, #12]
8003d90: 6b9b ldr r3, [r3, #56] ; 0x38
8003d92: f043 6200 orr.w r2, r3, #134217728 ; 0x8000000
8003d96: 68fb ldr r3, [r7, #12]
8003d98: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
8003d9a: 2301 movs r3, #1
8003d9c: e184 b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
if(hsd->State == HAL_SD_STATE_READY)
8003d9e: 68fb ldr r3, [r7, #12]
8003da0: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
8003da4: b2db uxtb r3, r3
8003da6: 2b01 cmp r3, #1
8003da8: f040 8177 bne.w 800409a <HAL_SD_WriteBlocks+0x32e>
{
hsd->ErrorCode = HAL_SD_ERROR_NONE;
8003dac: 68fb ldr r3, [r7, #12]
8003dae: 2200 movs r2, #0
8003db0: 639a str r2, [r3, #56] ; 0x38
if((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
8003db2: 6bba ldr r2, [r7, #56] ; 0x38
8003db4: 683b ldr r3, [r7, #0]
8003db6: 441a add r2, r3
8003db8: 68fb ldr r3, [r7, #12]
8003dba: 6ddb ldr r3, [r3, #92] ; 0x5c
8003dbc: 429a cmp r2, r3
8003dbe: d907 bls.n 8003dd0 <HAL_SD_WriteBlocks+0x64>
{
hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
8003dc0: 68fb ldr r3, [r7, #12]
8003dc2: 6b9b ldr r3, [r3, #56] ; 0x38
8003dc4: f043 7200 orr.w r2, r3, #33554432 ; 0x2000000
8003dc8: 68fb ldr r3, [r7, #12]
8003dca: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
8003dcc: 2301 movs r3, #1
8003dce: e16b b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
hsd->State = HAL_SD_STATE_BUSY;
8003dd0: 68fb ldr r3, [r7, #12]
8003dd2: 2203 movs r2, #3
8003dd4: f883 2034 strb.w r2, [r3, #52] ; 0x34
/* Initialize data control register */
hsd->Instance->DCTRL = 0U;
8003dd8: 68fb ldr r3, [r7, #12]
8003dda: 681b ldr r3, [r3, #0]
8003ddc: 2200 movs r2, #0
8003dde: 62da str r2, [r3, #44] ; 0x2c
if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
8003de0: 68fb ldr r3, [r7, #12]
8003de2: 6c5b ldr r3, [r3, #68] ; 0x44
8003de4: 2b01 cmp r3, #1
8003de6: d002 beq.n 8003dee <HAL_SD_WriteBlocks+0x82>
{
add *= 512U;
8003de8: 6bbb ldr r3, [r7, #56] ; 0x38
8003dea: 025b lsls r3, r3, #9
8003dec: 63bb str r3, [r7, #56] ; 0x38
}
/* Set Block Size for Card */
errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
8003dee: 68fb ldr r3, [r7, #12]
8003df0: 681b ldr r3, [r3, #0]
8003df2: f44f 7100 mov.w r1, #512 ; 0x200
8003df6: 4618 mov r0, r3
8003df8: f000 ff50 bl 8004c9c <SDMMC_CmdBlockLength>
8003dfc: 6478 str r0, [r7, #68] ; 0x44
if(errorstate != HAL_SD_ERROR_NONE)
8003dfe: 6c7b ldr r3, [r7, #68] ; 0x44
8003e00: 2b00 cmp r3, #0
8003e02: d00f beq.n 8003e24 <HAL_SD_WriteBlocks+0xb8>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003e04: 68fb ldr r3, [r7, #12]
8003e06: 681b ldr r3, [r3, #0]
8003e08: 4a9d ldr r2, [pc, #628] ; (8004080 <HAL_SD_WriteBlocks+0x314>)
8003e0a: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= errorstate;
8003e0c: 68fb ldr r3, [r7, #12]
8003e0e: 6b9a ldr r2, [r3, #56] ; 0x38
8003e10: 6c7b ldr r3, [r7, #68] ; 0x44
8003e12: 431a orrs r2, r3
8003e14: 68fb ldr r3, [r7, #12]
8003e16: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003e18: 68fb ldr r3, [r7, #12]
8003e1a: 2201 movs r2, #1
8003e1c: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_ERROR;
8003e20: 2301 movs r3, #1
8003e22: e141 b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
/* Configure the SD DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
8003e24: f04f 33ff mov.w r3, #4294967295
8003e28: 61bb str r3, [r7, #24]
config.DataLength = NumberOfBlocks * BLOCKSIZE;
8003e2a: 683b ldr r3, [r7, #0]
8003e2c: 025b lsls r3, r3, #9
8003e2e: 61fb str r3, [r7, #28]
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
8003e30: 2390 movs r3, #144 ; 0x90
8003e32: 623b str r3, [r7, #32]
config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD;
8003e34: 2300 movs r3, #0
8003e36: 627b str r3, [r7, #36] ; 0x24
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
8003e38: 2300 movs r3, #0
8003e3a: 62bb str r3, [r7, #40] ; 0x28
config.DPSM = SDIO_DPSM_ENABLE;
8003e3c: 2301 movs r3, #1
8003e3e: 62fb str r3, [r7, #44] ; 0x2c
(void)SDIO_ConfigData(hsd->Instance, &config);
8003e40: 68fb ldr r3, [r7, #12]
8003e42: 681b ldr r3, [r3, #0]
8003e44: f107 0218 add.w r2, r7, #24
8003e48: 4611 mov r1, r2
8003e4a: 4618 mov r0, r3
8003e4c: f000 fefb bl 8004c46 <SDIO_ConfigData>
/* Write Blocks in Polling mode */
if(NumberOfBlocks > 1U)
8003e50: 683b ldr r3, [r7, #0]
8003e52: 2b01 cmp r3, #1
8003e54: d90a bls.n 8003e6c <HAL_SD_WriteBlocks+0x100>
{
hsd->Context = SD_CONTEXT_WRITE_MULTIPLE_BLOCK;
8003e56: 68fb ldr r3, [r7, #12]
8003e58: 2220 movs r2, #32
8003e5a: 631a str r2, [r3, #48] ; 0x30
/* Write Multi Block command */
errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
8003e5c: 68fb ldr r3, [r7, #12]
8003e5e: 681b ldr r3, [r3, #0]
8003e60: 6bb9 ldr r1, [r7, #56] ; 0x38
8003e62: 4618 mov r0, r3
8003e64: f000 ffa2 bl 8004dac <SDMMC_CmdWriteMultiBlock>
8003e68: 6478 str r0, [r7, #68] ; 0x44
8003e6a: e009 b.n 8003e80 <HAL_SD_WriteBlocks+0x114>
}
else
{
hsd->Context = SD_CONTEXT_WRITE_SINGLE_BLOCK;
8003e6c: 68fb ldr r3, [r7, #12]
8003e6e: 2210 movs r2, #16
8003e70: 631a str r2, [r3, #48] ; 0x30
/* Write Single Block command */
errorstate = SDMMC_CmdWriteSingleBlock(hsd->Instance, add);
8003e72: 68fb ldr r3, [r7, #12]
8003e74: 681b ldr r3, [r3, #0]
8003e76: 6bb9 ldr r1, [r7, #56] ; 0x38
8003e78: 4618 mov r0, r3
8003e7a: f000 ff75 bl 8004d68 <SDMMC_CmdWriteSingleBlock>
8003e7e: 6478 str r0, [r7, #68] ; 0x44
}
if(errorstate != HAL_SD_ERROR_NONE)
8003e80: 6c7b ldr r3, [r7, #68] ; 0x44
8003e82: 2b00 cmp r3, #0
8003e84: d012 beq.n 8003eac <HAL_SD_WriteBlocks+0x140>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003e86: 68fb ldr r3, [r7, #12]
8003e88: 681b ldr r3, [r3, #0]
8003e8a: 4a7d ldr r2, [pc, #500] ; (8004080 <HAL_SD_WriteBlocks+0x314>)
8003e8c: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= errorstate;
8003e8e: 68fb ldr r3, [r7, #12]
8003e90: 6b9a ldr r2, [r3, #56] ; 0x38
8003e92: 6c7b ldr r3, [r7, #68] ; 0x44
8003e94: 431a orrs r2, r3
8003e96: 68fb ldr r3, [r7, #12]
8003e98: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003e9a: 68fb ldr r3, [r7, #12]
8003e9c: 2201 movs r2, #1
8003e9e: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003ea2: 68fb ldr r3, [r7, #12]
8003ea4: 2200 movs r2, #0
8003ea6: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003ea8: 2301 movs r3, #1
8003eaa: e0fd b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
/* Write block(s) in polling mode */
dataremaining = config.DataLength;
8003eac: 69fb ldr r3, [r7, #28]
8003eae: 63fb str r3, [r7, #60] ; 0x3c
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
8003eb0: e065 b.n 8003f7e <HAL_SD_WriteBlocks+0x212>
{
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXFIFOHE) && (dataremaining > 0U))
8003eb2: 68fb ldr r3, [r7, #12]
8003eb4: 681b ldr r3, [r3, #0]
8003eb6: 6b5b ldr r3, [r3, #52] ; 0x34
8003eb8: f403 4380 and.w r3, r3, #16384 ; 0x4000
8003ebc: 2b00 cmp r3, #0
8003ebe: d040 beq.n 8003f42 <HAL_SD_WriteBlocks+0x1d6>
8003ec0: 6bfb ldr r3, [r7, #60] ; 0x3c
8003ec2: 2b00 cmp r3, #0
8003ec4: d03d beq.n 8003f42 <HAL_SD_WriteBlocks+0x1d6>
{
/* Write data to SDIO Tx FIFO */
for(count = 0U; count < 8U; count++)
8003ec6: 2300 movs r3, #0
8003ec8: 643b str r3, [r7, #64] ; 0x40
8003eca: e037 b.n 8003f3c <HAL_SD_WriteBlocks+0x1d0>
{
data = (uint32_t)(*tempbuff);
8003ecc: 6b7b ldr r3, [r7, #52] ; 0x34
8003ece: 781b ldrb r3, [r3, #0]
8003ed0: 617b str r3, [r7, #20]
tempbuff++;
8003ed2: 6b7b ldr r3, [r7, #52] ; 0x34
8003ed4: 3301 adds r3, #1
8003ed6: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003ed8: 6bfb ldr r3, [r7, #60] ; 0x3c
8003eda: 3b01 subs r3, #1
8003edc: 63fb str r3, [r7, #60] ; 0x3c
data |= ((uint32_t)(*tempbuff) << 8U);
8003ede: 6b7b ldr r3, [r7, #52] ; 0x34
8003ee0: 781b ldrb r3, [r3, #0]
8003ee2: 021a lsls r2, r3, #8
8003ee4: 697b ldr r3, [r7, #20]
8003ee6: 4313 orrs r3, r2
8003ee8: 617b str r3, [r7, #20]
tempbuff++;
8003eea: 6b7b ldr r3, [r7, #52] ; 0x34
8003eec: 3301 adds r3, #1
8003eee: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003ef0: 6bfb ldr r3, [r7, #60] ; 0x3c
8003ef2: 3b01 subs r3, #1
8003ef4: 63fb str r3, [r7, #60] ; 0x3c
data |= ((uint32_t)(*tempbuff) << 16U);
8003ef6: 6b7b ldr r3, [r7, #52] ; 0x34
8003ef8: 781b ldrb r3, [r3, #0]
8003efa: 041a lsls r2, r3, #16
8003efc: 697b ldr r3, [r7, #20]
8003efe: 4313 orrs r3, r2
8003f00: 617b str r3, [r7, #20]
tempbuff++;
8003f02: 6b7b ldr r3, [r7, #52] ; 0x34
8003f04: 3301 adds r3, #1
8003f06: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003f08: 6bfb ldr r3, [r7, #60] ; 0x3c
8003f0a: 3b01 subs r3, #1
8003f0c: 63fb str r3, [r7, #60] ; 0x3c
data |= ((uint32_t)(*tempbuff) << 24U);
8003f0e: 6b7b ldr r3, [r7, #52] ; 0x34
8003f10: 781b ldrb r3, [r3, #0]
8003f12: 061a lsls r2, r3, #24
8003f14: 697b ldr r3, [r7, #20]
8003f16: 4313 orrs r3, r2
8003f18: 617b str r3, [r7, #20]
tempbuff++;
8003f1a: 6b7b ldr r3, [r7, #52] ; 0x34
8003f1c: 3301 adds r3, #1
8003f1e: 637b str r3, [r7, #52] ; 0x34
dataremaining--;
8003f20: 6bfb ldr r3, [r7, #60] ; 0x3c
8003f22: 3b01 subs r3, #1
8003f24: 63fb str r3, [r7, #60] ; 0x3c
(void)SDIO_WriteFIFO(hsd->Instance, &data);
8003f26: 68fb ldr r3, [r7, #12]
8003f28: 681b ldr r3, [r3, #0]
8003f2a: f107 0214 add.w r2, r7, #20
8003f2e: 4611 mov r1, r2
8003f30: 4618 mov r0, r3
8003f32: f000 fe08 bl 8004b46 <SDIO_WriteFIFO>
for(count = 0U; count < 8U; count++)
8003f36: 6c3b ldr r3, [r7, #64] ; 0x40
8003f38: 3301 adds r3, #1
8003f3a: 643b str r3, [r7, #64] ; 0x40
8003f3c: 6c3b ldr r3, [r7, #64] ; 0x40
8003f3e: 2b07 cmp r3, #7
8003f40: d9c4 bls.n 8003ecc <HAL_SD_WriteBlocks+0x160>
}
}
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
8003f42: f7fc fd17 bl 8000974 <HAL_GetTick>
8003f46: 4602 mov r2, r0
8003f48: 6b3b ldr r3, [r7, #48] ; 0x30
8003f4a: 1ad3 subs r3, r2, r3
8003f4c: 6d3a ldr r2, [r7, #80] ; 0x50
8003f4e: 429a cmp r2, r3
8003f50: d902 bls.n 8003f58 <HAL_SD_WriteBlocks+0x1ec>
8003f52: 6d3b ldr r3, [r7, #80] ; 0x50
8003f54: 2b00 cmp r3, #0
8003f56: d112 bne.n 8003f7e <HAL_SD_WriteBlocks+0x212>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003f58: 68fb ldr r3, [r7, #12]
8003f5a: 681b ldr r3, [r3, #0]
8003f5c: 4a48 ldr r2, [pc, #288] ; (8004080 <HAL_SD_WriteBlocks+0x314>)
8003f5e: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= errorstate;
8003f60: 68fb ldr r3, [r7, #12]
8003f62: 6b9a ldr r2, [r3, #56] ; 0x38
8003f64: 6c7b ldr r3, [r7, #68] ; 0x44
8003f66: 431a orrs r2, r3
8003f68: 68fb ldr r3, [r7, #12]
8003f6a: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003f6c: 68fb ldr r3, [r7, #12]
8003f6e: 2201 movs r2, #1
8003f70: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003f74: 68fb ldr r3, [r7, #12]
8003f76: 2200 movs r2, #0
8003f78: 631a str r2, [r3, #48] ; 0x30
return HAL_TIMEOUT;
8003f7a: 2303 movs r3, #3
8003f7c: e094 b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
8003f7e: 68fb ldr r3, [r7, #12]
8003f80: 681b ldr r3, [r3, #0]
8003f82: 6b5a ldr r2, [r3, #52] ; 0x34
8003f84: f240 331a movw r3, #794 ; 0x31a
8003f88: 4013 ands r3, r2
8003f8a: 2b00 cmp r3, #0
8003f8c: d091 beq.n 8003eb2 <HAL_SD_WriteBlocks+0x146>
}
}
/* Send stop transmission command in case of multiblock write */
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DATAEND) && (NumberOfBlocks > 1U))
8003f8e: 68fb ldr r3, [r7, #12]
8003f90: 681b ldr r3, [r3, #0]
8003f92: 6b5b ldr r3, [r3, #52] ; 0x34
8003f94: f403 7380 and.w r3, r3, #256 ; 0x100
8003f98: 2b00 cmp r3, #0
8003f9a: d022 beq.n 8003fe2 <HAL_SD_WriteBlocks+0x276>
8003f9c: 683b ldr r3, [r7, #0]
8003f9e: 2b01 cmp r3, #1
8003fa0: d91f bls.n 8003fe2 <HAL_SD_WriteBlocks+0x276>
{
if(hsd->SdCard.CardType != CARD_SECURED)
8003fa2: 68fb ldr r3, [r7, #12]
8003fa4: 6c5b ldr r3, [r3, #68] ; 0x44
8003fa6: 2b03 cmp r3, #3
8003fa8: d01b beq.n 8003fe2 <HAL_SD_WriteBlocks+0x276>
{
/* Send stop transmission command */
errorstate = SDMMC_CmdStopTransfer(hsd->Instance);
8003faa: 68fb ldr r3, [r7, #12]
8003fac: 681b ldr r3, [r3, #0]
8003fae: 4618 mov r0, r3
8003fb0: f000 ff1e bl 8004df0 <SDMMC_CmdStopTransfer>
8003fb4: 6478 str r0, [r7, #68] ; 0x44
if(errorstate != HAL_SD_ERROR_NONE)
8003fb6: 6c7b ldr r3, [r7, #68] ; 0x44
8003fb8: 2b00 cmp r3, #0
8003fba: d012 beq.n 8003fe2 <HAL_SD_WriteBlocks+0x276>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003fbc: 68fb ldr r3, [r7, #12]
8003fbe: 681b ldr r3, [r3, #0]
8003fc0: 4a2f ldr r2, [pc, #188] ; (8004080 <HAL_SD_WriteBlocks+0x314>)
8003fc2: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= errorstate;
8003fc4: 68fb ldr r3, [r7, #12]
8003fc6: 6b9a ldr r2, [r3, #56] ; 0x38
8003fc8: 6c7b ldr r3, [r7, #68] ; 0x44
8003fca: 431a orrs r2, r3
8003fcc: 68fb ldr r3, [r7, #12]
8003fce: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8003fd0: 68fb ldr r3, [r7, #12]
8003fd2: 2201 movs r2, #1
8003fd4: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8003fd8: 68fb ldr r3, [r7, #12]
8003fda: 2200 movs r2, #0
8003fdc: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8003fde: 2301 movs r3, #1
8003fe0: e062 b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
}
}
/* Get error state */
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
8003fe2: 68fb ldr r3, [r7, #12]
8003fe4: 681b ldr r3, [r3, #0]
8003fe6: 6b5b ldr r3, [r3, #52] ; 0x34
8003fe8: f003 0308 and.w r3, r3, #8
8003fec: 2b00 cmp r3, #0
8003fee: d012 beq.n 8004016 <HAL_SD_WriteBlocks+0x2aa>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8003ff0: 68fb ldr r3, [r7, #12]
8003ff2: 681b ldr r3, [r3, #0]
8003ff4: 4a22 ldr r2, [pc, #136] ; (8004080 <HAL_SD_WriteBlocks+0x314>)
8003ff6: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_DATA_TIMEOUT;
8003ff8: 68fb ldr r3, [r7, #12]
8003ffa: 6b9b ldr r3, [r3, #56] ; 0x38
8003ffc: f043 0208 orr.w r2, r3, #8
8004000: 68fb ldr r3, [r7, #12]
8004002: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8004004: 68fb ldr r3, [r7, #12]
8004006: 2201 movs r2, #1
8004008: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
800400c: 68fb ldr r3, [r7, #12]
800400e: 2200 movs r2, #0
8004010: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8004012: 2301 movs r3, #1
8004014: e048 b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DCRCFAIL))
8004016: 68fb ldr r3, [r7, #12]
8004018: 681b ldr r3, [r3, #0]
800401a: 6b5b ldr r3, [r3, #52] ; 0x34
800401c: f003 0302 and.w r3, r3, #2
8004020: 2b00 cmp r3, #0
8004022: d012 beq.n 800404a <HAL_SD_WriteBlocks+0x2de>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8004024: 68fb ldr r3, [r7, #12]
8004026: 681b ldr r3, [r3, #0]
8004028: 4a15 ldr r2, [pc, #84] ; (8004080 <HAL_SD_WriteBlocks+0x314>)
800402a: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_DATA_CRC_FAIL;
800402c: 68fb ldr r3, [r7, #12]
800402e: 6b9b ldr r3, [r3, #56] ; 0x38
8004030: f043 0202 orr.w r2, r3, #2
8004034: 68fb ldr r3, [r7, #12]
8004036: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
8004038: 68fb ldr r3, [r7, #12]
800403a: 2201 movs r2, #1
800403c: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8004040: 68fb ldr r3, [r7, #12]
8004042: 2200 movs r2, #0
8004044: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
8004046: 2301 movs r3, #1
8004048: e02e b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_TXUNDERR))
800404a: 68fb ldr r3, [r7, #12]
800404c: 681b ldr r3, [r3, #0]
800404e: 6b5b ldr r3, [r3, #52] ; 0x34
8004050: f003 0310 and.w r3, r3, #16
8004054: 2b00 cmp r3, #0
8004056: d015 beq.n 8004084 <HAL_SD_WriteBlocks+0x318>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
8004058: 68fb ldr r3, [r7, #12]
800405a: 681b ldr r3, [r3, #0]
800405c: 4a08 ldr r2, [pc, #32] ; (8004080 <HAL_SD_WriteBlocks+0x314>)
800405e: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_TX_UNDERRUN;
8004060: 68fb ldr r3, [r7, #12]
8004062: 6b9b ldr r3, [r3, #56] ; 0x38
8004064: f043 0210 orr.w r2, r3, #16
8004068: 68fb ldr r3, [r7, #12]
800406a: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
800406c: 68fb ldr r3, [r7, #12]
800406e: 2201 movs r2, #1
8004070: f883 2034 strb.w r2, [r3, #52] ; 0x34
hsd->Context = SD_CONTEXT_NONE;
8004074: 68fb ldr r3, [r7, #12]
8004076: 2200 movs r2, #0
8004078: 631a str r2, [r3, #48] ; 0x30
return HAL_ERROR;
800407a: 2301 movs r3, #1
800407c: e014 b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
800407e: bf00 nop
8004080: 004005ff .word 0x004005ff
{
/* Nothing to do */
}
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
8004084: 68fb ldr r3, [r7, #12]
8004086: 681b ldr r3, [r3, #0]
8004088: f240 523a movw r2, #1338 ; 0x53a
800408c: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
800408e: 68fb ldr r3, [r7, #12]
8004090: 2201 movs r2, #1
8004092: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_OK;
8004096: 2300 movs r3, #0
8004098: e006 b.n 80040a8 <HAL_SD_WriteBlocks+0x33c>
}
else
{
hsd->ErrorCode |= HAL_SD_ERROR_BUSY;
800409a: 68fb ldr r3, [r7, #12]
800409c: 6b9b ldr r3, [r3, #56] ; 0x38
800409e: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000
80040a2: 68fb ldr r3, [r7, #12]
80040a4: 639a str r2, [r3, #56] ; 0x38
return HAL_ERROR;
80040a6: 2301 movs r3, #1
}
}
80040a8: 4618 mov r0, r3
80040aa: 3748 adds r7, #72 ; 0x48
80040ac: 46bd mov sp, r7
80040ae: bd80 pop {r7, pc}
080040b0 <HAL_SD_GetCardCSD>:
* @param pCSD: Pointer to a HAL_SD_CardCSDTypeDef structure that
* contains all CSD register parameters
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD)
{
80040b0: b480 push {r7}
80040b2: b083 sub sp, #12
80040b4: af00 add r7, sp, #0
80040b6: 6078 str r0, [r7, #4]
80040b8: 6039 str r1, [r7, #0]
pCSD->CSDStruct = (uint8_t)((hsd->CSD[0] & 0xC0000000U) >> 30U);
80040ba: 687b ldr r3, [r7, #4]
80040bc: 6e5b ldr r3, [r3, #100] ; 0x64
80040be: 0f9b lsrs r3, r3, #30
80040c0: b2da uxtb r2, r3
80040c2: 683b ldr r3, [r7, #0]
80040c4: 701a strb r2, [r3, #0]
pCSD->SysSpecVersion = (uint8_t)((hsd->CSD[0] & 0x3C000000U) >> 26U);
80040c6: 687b ldr r3, [r7, #4]
80040c8: 6e5b ldr r3, [r3, #100] ; 0x64
80040ca: 0e9b lsrs r3, r3, #26
80040cc: b2db uxtb r3, r3
80040ce: f003 030f and.w r3, r3, #15
80040d2: b2da uxtb r2, r3
80040d4: 683b ldr r3, [r7, #0]
80040d6: 705a strb r2, [r3, #1]
pCSD->Reserved1 = (uint8_t)((hsd->CSD[0] & 0x03000000U) >> 24U);
80040d8: 687b ldr r3, [r7, #4]
80040da: 6e5b ldr r3, [r3, #100] ; 0x64
80040dc: 0e1b lsrs r3, r3, #24
80040de: b2db uxtb r3, r3
80040e0: f003 0303 and.w r3, r3, #3
80040e4: b2da uxtb r2, r3
80040e6: 683b ldr r3, [r7, #0]
80040e8: 709a strb r2, [r3, #2]
pCSD->TAAC = (uint8_t)((hsd->CSD[0] & 0x00FF0000U) >> 16U);
80040ea: 687b ldr r3, [r7, #4]
80040ec: 6e5b ldr r3, [r3, #100] ; 0x64
80040ee: 0c1b lsrs r3, r3, #16
80040f0: b2da uxtb r2, r3
80040f2: 683b ldr r3, [r7, #0]
80040f4: 70da strb r2, [r3, #3]
pCSD->NSAC = (uint8_t)((hsd->CSD[0] & 0x0000FF00U) >> 8U);
80040f6: 687b ldr r3, [r7, #4]
80040f8: 6e5b ldr r3, [r3, #100] ; 0x64
80040fa: 0a1b lsrs r3, r3, #8
80040fc: b2da uxtb r2, r3
80040fe: 683b ldr r3, [r7, #0]
8004100: 711a strb r2, [r3, #4]
pCSD->MaxBusClkFrec = (uint8_t)(hsd->CSD[0] & 0x000000FFU);
8004102: 687b ldr r3, [r7, #4]
8004104: 6e5b ldr r3, [r3, #100] ; 0x64
8004106: b2da uxtb r2, r3
8004108: 683b ldr r3, [r7, #0]
800410a: 715a strb r2, [r3, #5]
pCSD->CardComdClasses = (uint16_t)((hsd->CSD[1] & 0xFFF00000U) >> 20U);
800410c: 687b ldr r3, [r7, #4]
800410e: 6e9b ldr r3, [r3, #104] ; 0x68
8004110: 0d1b lsrs r3, r3, #20
8004112: b29a uxth r2, r3
8004114: 683b ldr r3, [r7, #0]
8004116: 80da strh r2, [r3, #6]
pCSD->RdBlockLen = (uint8_t)((hsd->CSD[1] & 0x000F0000U) >> 16U);
8004118: 687b ldr r3, [r7, #4]
800411a: 6e9b ldr r3, [r3, #104] ; 0x68
800411c: 0c1b lsrs r3, r3, #16
800411e: b2db uxtb r3, r3
8004120: f003 030f and.w r3, r3, #15
8004124: b2da uxtb r2, r3
8004126: 683b ldr r3, [r7, #0]
8004128: 721a strb r2, [r3, #8]
pCSD->PartBlockRead = (uint8_t)((hsd->CSD[1] & 0x00008000U) >> 15U);
800412a: 687b ldr r3, [r7, #4]
800412c: 6e9b ldr r3, [r3, #104] ; 0x68
800412e: 0bdb lsrs r3, r3, #15
8004130: b2db uxtb r3, r3
8004132: f003 0301 and.w r3, r3, #1
8004136: b2da uxtb r2, r3
8004138: 683b ldr r3, [r7, #0]
800413a: 725a strb r2, [r3, #9]
pCSD->WrBlockMisalign = (uint8_t)((hsd->CSD[1] & 0x00004000U) >> 14U);
800413c: 687b ldr r3, [r7, #4]
800413e: 6e9b ldr r3, [r3, #104] ; 0x68
8004140: 0b9b lsrs r3, r3, #14
8004142: b2db uxtb r3, r3
8004144: f003 0301 and.w r3, r3, #1
8004148: b2da uxtb r2, r3
800414a: 683b ldr r3, [r7, #0]
800414c: 729a strb r2, [r3, #10]
pCSD->RdBlockMisalign = (uint8_t)((hsd->CSD[1] & 0x00002000U) >> 13U);
800414e: 687b ldr r3, [r7, #4]
8004150: 6e9b ldr r3, [r3, #104] ; 0x68
8004152: 0b5b lsrs r3, r3, #13
8004154: b2db uxtb r3, r3
8004156: f003 0301 and.w r3, r3, #1
800415a: b2da uxtb r2, r3
800415c: 683b ldr r3, [r7, #0]
800415e: 72da strb r2, [r3, #11]
pCSD->DSRImpl = (uint8_t)((hsd->CSD[1] & 0x00001000U) >> 12U);
8004160: 687b ldr r3, [r7, #4]
8004162: 6e9b ldr r3, [r3, #104] ; 0x68
8004164: 0b1b lsrs r3, r3, #12
8004166: b2db uxtb r3, r3
8004168: f003 0301 and.w r3, r3, #1
800416c: b2da uxtb r2, r3
800416e: 683b ldr r3, [r7, #0]
8004170: 731a strb r2, [r3, #12]
pCSD->Reserved2 = 0U; /*!< Reserved */
8004172: 683b ldr r3, [r7, #0]
8004174: 2200 movs r2, #0
8004176: 735a strb r2, [r3, #13]
if(hsd->SdCard.CardType == CARD_SDSC)
8004178: 687b ldr r3, [r7, #4]
800417a: 6c5b ldr r3, [r3, #68] ; 0x44
800417c: 2b00 cmp r3, #0
800417e: d163 bne.n 8004248 <HAL_SD_GetCardCSD+0x198>
{
pCSD->DeviceSize = (((hsd->CSD[1] & 0x000003FFU) << 2U) | ((hsd->CSD[2] & 0xC0000000U) >> 30U));
8004180: 687b ldr r3, [r7, #4]
8004182: 6e9b ldr r3, [r3, #104] ; 0x68
8004184: 009a lsls r2, r3, #2
8004186: f640 73fc movw r3, #4092 ; 0xffc
800418a: 4013 ands r3, r2
800418c: 687a ldr r2, [r7, #4]
800418e: 6ed2 ldr r2, [r2, #108] ; 0x6c
8004190: 0f92 lsrs r2, r2, #30
8004192: 431a orrs r2, r3
8004194: 683b ldr r3, [r7, #0]
8004196: 611a str r2, [r3, #16]
pCSD->MaxRdCurrentVDDMin = (uint8_t)((hsd->CSD[2] & 0x38000000U) >> 27U);
8004198: 687b ldr r3, [r7, #4]
800419a: 6edb ldr r3, [r3, #108] ; 0x6c
800419c: 0edb lsrs r3, r3, #27
800419e: b2db uxtb r3, r3
80041a0: f003 0307 and.w r3, r3, #7
80041a4: b2da uxtb r2, r3
80041a6: 683b ldr r3, [r7, #0]
80041a8: 751a strb r2, [r3, #20]
pCSD->MaxRdCurrentVDDMax = (uint8_t)((hsd->CSD[2] & 0x07000000U) >> 24U);
80041aa: 687b ldr r3, [r7, #4]
80041ac: 6edb ldr r3, [r3, #108] ; 0x6c
80041ae: 0e1b lsrs r3, r3, #24
80041b0: b2db uxtb r3, r3
80041b2: f003 0307 and.w r3, r3, #7
80041b6: b2da uxtb r2, r3
80041b8: 683b ldr r3, [r7, #0]
80041ba: 755a strb r2, [r3, #21]
pCSD->MaxWrCurrentVDDMin = (uint8_t)((hsd->CSD[2] & 0x00E00000U) >> 21U);
80041bc: 687b ldr r3, [r7, #4]
80041be: 6edb ldr r3, [r3, #108] ; 0x6c
80041c0: 0d5b lsrs r3, r3, #21
80041c2: b2db uxtb r3, r3
80041c4: f003 0307 and.w r3, r3, #7
80041c8: b2da uxtb r2, r3
80041ca: 683b ldr r3, [r7, #0]
80041cc: 759a strb r2, [r3, #22]
pCSD->MaxWrCurrentVDDMax = (uint8_t)((hsd->CSD[2] & 0x001C0000U) >> 18U);
80041ce: 687b ldr r3, [r7, #4]
80041d0: 6edb ldr r3, [r3, #108] ; 0x6c
80041d2: 0c9b lsrs r3, r3, #18
80041d4: b2db uxtb r3, r3
80041d6: f003 0307 and.w r3, r3, #7
80041da: b2da uxtb r2, r3
80041dc: 683b ldr r3, [r7, #0]
80041de: 75da strb r2, [r3, #23]
pCSD->DeviceSizeMul = (uint8_t)((hsd->CSD[2] & 0x00038000U) >> 15U);
80041e0: 687b ldr r3, [r7, #4]
80041e2: 6edb ldr r3, [r3, #108] ; 0x6c
80041e4: 0bdb lsrs r3, r3, #15
80041e6: b2db uxtb r3, r3
80041e8: f003 0307 and.w r3, r3, #7
80041ec: b2da uxtb r2, r3
80041ee: 683b ldr r3, [r7, #0]
80041f0: 761a strb r2, [r3, #24]
hsd->SdCard.BlockNbr = (pCSD->DeviceSize + 1U) ;
80041f2: 683b ldr r3, [r7, #0]
80041f4: 691b ldr r3, [r3, #16]
80041f6: 1c5a adds r2, r3, #1
80041f8: 687b ldr r3, [r7, #4]
80041fa: 655a str r2, [r3, #84] ; 0x54
hsd->SdCard.BlockNbr *= (1UL << ((pCSD->DeviceSizeMul & 0x07U) + 2U));
80041fc: 683b ldr r3, [r7, #0]
80041fe: 7e1b ldrb r3, [r3, #24]
8004200: b2db uxtb r3, r3
8004202: f003 0307 and.w r3, r3, #7
8004206: 3302 adds r3, #2
8004208: 2201 movs r2, #1
800420a: fa02 f303 lsl.w r3, r2, r3
800420e: 687a ldr r2, [r7, #4]
8004210: 6d52 ldr r2, [r2, #84] ; 0x54
8004212: fb02 f203 mul.w r2, r2, r3
8004216: 687b ldr r3, [r7, #4]
8004218: 655a str r2, [r3, #84] ; 0x54
hsd->SdCard.BlockSize = (1UL << (pCSD->RdBlockLen & 0x0FU));
800421a: 683b ldr r3, [r7, #0]
800421c: 7a1b ldrb r3, [r3, #8]
800421e: b2db uxtb r3, r3
8004220: f003 030f and.w r3, r3, #15
8004224: 2201 movs r2, #1
8004226: 409a lsls r2, r3
8004228: 687b ldr r3, [r7, #4]
800422a: 659a str r2, [r3, #88] ; 0x58
hsd->SdCard.LogBlockNbr = (hsd->SdCard.BlockNbr) * ((hsd->SdCard.BlockSize) / 512U);
800422c: 687b ldr r3, [r7, #4]
800422e: 6d5b ldr r3, [r3, #84] ; 0x54
8004230: 687a ldr r2, [r7, #4]
8004232: 6d92 ldr r2, [r2, #88] ; 0x58
8004234: 0a52 lsrs r2, r2, #9
8004236: fb02 f203 mul.w r2, r2, r3
800423a: 687b ldr r3, [r7, #4]
800423c: 65da str r2, [r3, #92] ; 0x5c
hsd->SdCard.LogBlockSize = 512U;
800423e: 687b ldr r3, [r7, #4]
8004240: f44f 7200 mov.w r2, #512 ; 0x200
8004244: 661a str r2, [r3, #96] ; 0x60
8004246: e031 b.n 80042ac <HAL_SD_GetCardCSD+0x1fc>
}
else if(hsd->SdCard.CardType == CARD_SDHC_SDXC)
8004248: 687b ldr r3, [r7, #4]
800424a: 6c5b ldr r3, [r3, #68] ; 0x44
800424c: 2b01 cmp r3, #1
800424e: d11d bne.n 800428c <HAL_SD_GetCardCSD+0x1dc>
{
/* Byte 7 */
pCSD->DeviceSize = (((hsd->CSD[1] & 0x0000003FU) << 16U) | ((hsd->CSD[2] & 0xFFFF0000U) >> 16U));
8004250: 687b ldr r3, [r7, #4]
8004252: 6e9b ldr r3, [r3, #104] ; 0x68
8004254: 041b lsls r3, r3, #16
8004256: f403 127c and.w r2, r3, #4128768 ; 0x3f0000
800425a: 687b ldr r3, [r7, #4]
800425c: 6edb ldr r3, [r3, #108] ; 0x6c
800425e: 0c1b lsrs r3, r3, #16
8004260: 431a orrs r2, r3
8004262: 683b ldr r3, [r7, #0]
8004264: 611a str r2, [r3, #16]
hsd->SdCard.BlockNbr = ((pCSD->DeviceSize + 1U) * 1024U);
8004266: 683b ldr r3, [r7, #0]
8004268: 691b ldr r3, [r3, #16]
800426a: 3301 adds r3, #1
800426c: 029a lsls r2, r3, #10
800426e: 687b ldr r3, [r7, #4]
8004270: 655a str r2, [r3, #84] ; 0x54
hsd->SdCard.LogBlockNbr = hsd->SdCard.BlockNbr;
8004272: 687b ldr r3, [r7, #4]
8004274: 6d5a ldr r2, [r3, #84] ; 0x54
8004276: 687b ldr r3, [r7, #4]
8004278: 65da str r2, [r3, #92] ; 0x5c
hsd->SdCard.BlockSize = 512U;
800427a: 687b ldr r3, [r7, #4]
800427c: f44f 7200 mov.w r2, #512 ; 0x200
8004280: 659a str r2, [r3, #88] ; 0x58
hsd->SdCard.LogBlockSize = hsd->SdCard.BlockSize;
8004282: 687b ldr r3, [r7, #4]
8004284: 6d9a ldr r2, [r3, #88] ; 0x58
8004286: 687b ldr r3, [r7, #4]
8004288: 661a str r2, [r3, #96] ; 0x60
800428a: e00f b.n 80042ac <HAL_SD_GetCardCSD+0x1fc>
}
else
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
800428c: 687b ldr r3, [r7, #4]
800428e: 681b ldr r3, [r3, #0]
8004290: 4a58 ldr r2, [pc, #352] ; (80043f4 <HAL_SD_GetCardCSD+0x344>)
8004292: 639a str r2, [r3, #56] ; 0x38
hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE;
8004294: 687b ldr r3, [r7, #4]
8004296: 6b9b ldr r3, [r3, #56] ; 0x38
8004298: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000
800429c: 687b ldr r3, [r7, #4]
800429e: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
80042a0: 687b ldr r3, [r7, #4]
80042a2: 2201 movs r2, #1
80042a4: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_ERROR;
80042a8: 2301 movs r3, #1
80042aa: e09d b.n 80043e8 <HAL_SD_GetCardCSD+0x338>
}
pCSD->EraseGrSize = (uint8_t)((hsd->CSD[2] & 0x00004000U) >> 14U);
80042ac: 687b ldr r3, [r7, #4]
80042ae: 6edb ldr r3, [r3, #108] ; 0x6c
80042b0: 0b9b lsrs r3, r3, #14
80042b2: b2db uxtb r3, r3
80042b4: f003 0301 and.w r3, r3, #1
80042b8: b2da uxtb r2, r3
80042ba: 683b ldr r3, [r7, #0]
80042bc: 765a strb r2, [r3, #25]
pCSD->EraseGrMul = (uint8_t)((hsd->CSD[2] & 0x00003F80U) >> 7U);
80042be: 687b ldr r3, [r7, #4]
80042c0: 6edb ldr r3, [r3, #108] ; 0x6c
80042c2: 09db lsrs r3, r3, #7
80042c4: b2db uxtb r3, r3
80042c6: f003 037f and.w r3, r3, #127 ; 0x7f
80042ca: b2da uxtb r2, r3
80042cc: 683b ldr r3, [r7, #0]
80042ce: 769a strb r2, [r3, #26]
pCSD->WrProtectGrSize = (uint8_t)(hsd->CSD[2] & 0x0000007FU);
80042d0: 687b ldr r3, [r7, #4]
80042d2: 6edb ldr r3, [r3, #108] ; 0x6c
80042d4: b2db uxtb r3, r3
80042d6: f003 037f and.w r3, r3, #127 ; 0x7f
80042da: b2da uxtb r2, r3
80042dc: 683b ldr r3, [r7, #0]
80042de: 76da strb r2, [r3, #27]
pCSD->WrProtectGrEnable = (uint8_t)((hsd->CSD[3] & 0x80000000U) >> 31U);
80042e0: 687b ldr r3, [r7, #4]
80042e2: 6f1b ldr r3, [r3, #112] ; 0x70
80042e4: 0fdb lsrs r3, r3, #31
80042e6: b2da uxtb r2, r3
80042e8: 683b ldr r3, [r7, #0]
80042ea: 771a strb r2, [r3, #28]
pCSD->ManDeflECC = (uint8_t)((hsd->CSD[3] & 0x60000000U) >> 29U);
80042ec: 687b ldr r3, [r7, #4]
80042ee: 6f1b ldr r3, [r3, #112] ; 0x70
80042f0: 0f5b lsrs r3, r3, #29
80042f2: b2db uxtb r3, r3
80042f4: f003 0303 and.w r3, r3, #3
80042f8: b2da uxtb r2, r3
80042fa: 683b ldr r3, [r7, #0]
80042fc: 775a strb r2, [r3, #29]
pCSD->WrSpeedFact = (uint8_t)((hsd->CSD[3] & 0x1C000000U) >> 26U);
80042fe: 687b ldr r3, [r7, #4]
8004300: 6f1b ldr r3, [r3, #112] ; 0x70
8004302: 0e9b lsrs r3, r3, #26
8004304: b2db uxtb r3, r3
8004306: f003 0307 and.w r3, r3, #7
800430a: b2da uxtb r2, r3
800430c: 683b ldr r3, [r7, #0]
800430e: 779a strb r2, [r3, #30]
pCSD->MaxWrBlockLen= (uint8_t)((hsd->CSD[3] & 0x03C00000U) >> 22U);
8004310: 687b ldr r3, [r7, #4]
8004312: 6f1b ldr r3, [r3, #112] ; 0x70
8004314: 0d9b lsrs r3, r3, #22
8004316: b2db uxtb r3, r3
8004318: f003 030f and.w r3, r3, #15
800431c: b2da uxtb r2, r3
800431e: 683b ldr r3, [r7, #0]
8004320: 77da strb r2, [r3, #31]
pCSD->WriteBlockPaPartial = (uint8_t)((hsd->CSD[3] & 0x00200000U) >> 21U);
8004322: 687b ldr r3, [r7, #4]
8004324: 6f1b ldr r3, [r3, #112] ; 0x70
8004326: 0d5b lsrs r3, r3, #21
8004328: b2db uxtb r3, r3
800432a: f003 0301 and.w r3, r3, #1
800432e: b2da uxtb r2, r3
8004330: 683b ldr r3, [r7, #0]
8004332: f883 2020 strb.w r2, [r3, #32]
pCSD->Reserved3 = 0;
8004336: 683b ldr r3, [r7, #0]
8004338: 2200 movs r2, #0
800433a: f883 2021 strb.w r2, [r3, #33] ; 0x21
pCSD->ContentProtectAppli = (uint8_t)((hsd->CSD[3] & 0x00010000U) >> 16U);
800433e: 687b ldr r3, [r7, #4]
8004340: 6f1b ldr r3, [r3, #112] ; 0x70
8004342: 0c1b lsrs r3, r3, #16
8004344: b2db uxtb r3, r3
8004346: f003 0301 and.w r3, r3, #1
800434a: b2da uxtb r2, r3
800434c: 683b ldr r3, [r7, #0]
800434e: f883 2022 strb.w r2, [r3, #34] ; 0x22
pCSD->FileFormatGroup = (uint8_t)((hsd->CSD[3] & 0x00008000U) >> 15U);
8004352: 687b ldr r3, [r7, #4]
8004354: 6f1b ldr r3, [r3, #112] ; 0x70
8004356: 0bdb lsrs r3, r3, #15
8004358: b2db uxtb r3, r3
800435a: f003 0301 and.w r3, r3, #1
800435e: b2da uxtb r2, r3
8004360: 683b ldr r3, [r7, #0]
8004362: f883 2023 strb.w r2, [r3, #35] ; 0x23
pCSD->CopyFlag = (uint8_t)((hsd->CSD[3] & 0x00004000U) >> 14U);
8004366: 687b ldr r3, [r7, #4]
8004368: 6f1b ldr r3, [r3, #112] ; 0x70
800436a: 0b9b lsrs r3, r3, #14
800436c: b2db uxtb r3, r3
800436e: f003 0301 and.w r3, r3, #1
8004372: b2da uxtb r2, r3
8004374: 683b ldr r3, [r7, #0]
8004376: f883 2024 strb.w r2, [r3, #36] ; 0x24
pCSD->PermWrProtect = (uint8_t)((hsd->CSD[3] & 0x00002000U) >> 13U);
800437a: 687b ldr r3, [r7, #4]
800437c: 6f1b ldr r3, [r3, #112] ; 0x70
800437e: 0b5b lsrs r3, r3, #13
8004380: b2db uxtb r3, r3
8004382: f003 0301 and.w r3, r3, #1
8004386: b2da uxtb r2, r3
8004388: 683b ldr r3, [r7, #0]
800438a: f883 2025 strb.w r2, [r3, #37] ; 0x25
pCSD->TempWrProtect = (uint8_t)((hsd->CSD[3] & 0x00001000U) >> 12U);
800438e: 687b ldr r3, [r7, #4]
8004390: 6f1b ldr r3, [r3, #112] ; 0x70
8004392: 0b1b lsrs r3, r3, #12
8004394: b2db uxtb r3, r3
8004396: f003 0301 and.w r3, r3, #1
800439a: b2da uxtb r2, r3
800439c: 683b ldr r3, [r7, #0]
800439e: f883 2026 strb.w r2, [r3, #38] ; 0x26
pCSD->FileFormat = (uint8_t)((hsd->CSD[3] & 0x00000C00U) >> 10U);
80043a2: 687b ldr r3, [r7, #4]
80043a4: 6f1b ldr r3, [r3, #112] ; 0x70
80043a6: 0a9b lsrs r3, r3, #10
80043a8: b2db uxtb r3, r3
80043aa: f003 0303 and.w r3, r3, #3
80043ae: b2da uxtb r2, r3
80043b0: 683b ldr r3, [r7, #0]
80043b2: f883 2027 strb.w r2, [r3, #39] ; 0x27
pCSD->ECC= (uint8_t)((hsd->CSD[3] & 0x00000300U) >> 8U);
80043b6: 687b ldr r3, [r7, #4]
80043b8: 6f1b ldr r3, [r3, #112] ; 0x70
80043ba: 0a1b lsrs r3, r3, #8
80043bc: b2db uxtb r3, r3
80043be: f003 0303 and.w r3, r3, #3
80043c2: b2da uxtb r2, r3
80043c4: 683b ldr r3, [r7, #0]
80043c6: f883 2028 strb.w r2, [r3, #40] ; 0x28
pCSD->CSD_CRC = (uint8_t)((hsd->CSD[3] & 0x000000FEU) >> 1U);
80043ca: 687b ldr r3, [r7, #4]
80043cc: 6f1b ldr r3, [r3, #112] ; 0x70
80043ce: 085b lsrs r3, r3, #1
80043d0: b2db uxtb r3, r3
80043d2: f003 037f and.w r3, r3, #127 ; 0x7f
80043d6: b2da uxtb r2, r3
80043d8: 683b ldr r3, [r7, #0]
80043da: f883 2029 strb.w r2, [r3, #41] ; 0x29
pCSD->Reserved4 = 1;
80043de: 683b ldr r3, [r7, #0]
80043e0: 2201 movs r2, #1
80043e2: f883 202a strb.w r2, [r3, #42] ; 0x2a
return HAL_OK;
80043e6: 2300 movs r3, #0
}
80043e8: 4618 mov r0, r3
80043ea: 370c adds r7, #12
80043ec: 46bd mov sp, r7
80043ee: bc80 pop {r7}
80043f0: 4770 bx lr
80043f2: bf00 nop
80043f4: 004005ff .word 0x004005ff
080043f8 <HAL_SD_GetCardInfo>:
* @param pCardInfo: Pointer to the HAL_SD_CardInfoTypeDef structure that
* will contain the SD card status information
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo)
{
80043f8: b480 push {r7}
80043fa: b083 sub sp, #12
80043fc: af00 add r7, sp, #0
80043fe: 6078 str r0, [r7, #4]
8004400: 6039 str r1, [r7, #0]
pCardInfo->CardType = (uint32_t)(hsd->SdCard.CardType);
8004402: 687b ldr r3, [r7, #4]
8004404: 6c5a ldr r2, [r3, #68] ; 0x44
8004406: 683b ldr r3, [r7, #0]
8004408: 601a str r2, [r3, #0]
pCardInfo->CardVersion = (uint32_t)(hsd->SdCard.CardVersion);
800440a: 687b ldr r3, [r7, #4]
800440c: 6c9a ldr r2, [r3, #72] ; 0x48
800440e: 683b ldr r3, [r7, #0]
8004410: 605a str r2, [r3, #4]
pCardInfo->Class = (uint32_t)(hsd->SdCard.Class);
8004412: 687b ldr r3, [r7, #4]
8004414: 6cda ldr r2, [r3, #76] ; 0x4c
8004416: 683b ldr r3, [r7, #0]
8004418: 609a str r2, [r3, #8]
pCardInfo->RelCardAdd = (uint32_t)(hsd->SdCard.RelCardAdd);
800441a: 687b ldr r3, [r7, #4]
800441c: 6d1a ldr r2, [r3, #80] ; 0x50
800441e: 683b ldr r3, [r7, #0]
8004420: 60da str r2, [r3, #12]
pCardInfo->BlockNbr = (uint32_t)(hsd->SdCard.BlockNbr);
8004422: 687b ldr r3, [r7, #4]
8004424: 6d5a ldr r2, [r3, #84] ; 0x54
8004426: 683b ldr r3, [r7, #0]
8004428: 611a str r2, [r3, #16]
pCardInfo->BlockSize = (uint32_t)(hsd->SdCard.BlockSize);
800442a: 687b ldr r3, [r7, #4]
800442c: 6d9a ldr r2, [r3, #88] ; 0x58
800442e: 683b ldr r3, [r7, #0]
8004430: 615a str r2, [r3, #20]
pCardInfo->LogBlockNbr = (uint32_t)(hsd->SdCard.LogBlockNbr);
8004432: 687b ldr r3, [r7, #4]
8004434: 6dda ldr r2, [r3, #92] ; 0x5c
8004436: 683b ldr r3, [r7, #0]
8004438: 619a str r2, [r3, #24]
pCardInfo->LogBlockSize = (uint32_t)(hsd->SdCard.LogBlockSize);
800443a: 687b ldr r3, [r7, #4]
800443c: 6e1a ldr r2, [r3, #96] ; 0x60
800443e: 683b ldr r3, [r7, #0]
8004440: 61da str r2, [r3, #28]
return HAL_OK;
8004442: 2300 movs r3, #0
}
8004444: 4618 mov r0, r3
8004446: 370c adds r7, #12
8004448: 46bd mov sp, r7
800444a: bc80 pop {r7}
800444c: 4770 bx lr
...
08004450 <HAL_SD_ConfigWideBusOperation>:
* @arg SDIO_BUS_WIDE_4B: 4-bit data transfer
* @arg SDIO_BUS_WIDE_1B: 1-bit data transfer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode)
{
8004450: b5b0 push {r4, r5, r7, lr}
8004452: b08e sub sp, #56 ; 0x38
8004454: af04 add r7, sp, #16
8004456: 6078 str r0, [r7, #4]
8004458: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_SDIO_BUS_WIDE(WideMode));
/* Change State */
hsd->State = HAL_SD_STATE_BUSY;
800445a: 687b ldr r3, [r7, #4]
800445c: 2203 movs r2, #3
800445e: f883 2034 strb.w r2, [r3, #52] ; 0x34
if(hsd->SdCard.CardType != CARD_SECURED)
8004462: 687b ldr r3, [r7, #4]
8004464: 6c5b ldr r3, [r3, #68] ; 0x44
8004466: 2b03 cmp r3, #3
8004468: d02e beq.n 80044c8 <HAL_SD_ConfigWideBusOperation+0x78>
{
if(WideMode == SDIO_BUS_WIDE_8B)
800446a: 683b ldr r3, [r7, #0]
800446c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
8004470: d106 bne.n 8004480 <HAL_SD_ConfigWideBusOperation+0x30>
{
hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE;
8004472: 687b ldr r3, [r7, #4]
8004474: 6b9b ldr r3, [r3, #56] ; 0x38
8004476: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000
800447a: 687b ldr r3, [r7, #4]
800447c: 639a str r2, [r3, #56] ; 0x38
800447e: e029 b.n 80044d4 <HAL_SD_ConfigWideBusOperation+0x84>
}
else if(WideMode == SDIO_BUS_WIDE_4B)
8004480: 683b ldr r3, [r7, #0]
8004482: f5b3 6f00 cmp.w r3, #2048 ; 0x800
8004486: d10a bne.n 800449e <HAL_SD_ConfigWideBusOperation+0x4e>
{
errorstate = SD_WideBus_Enable(hsd);
8004488: 6878 ldr r0, [r7, #4]
800448a: f000 f9c6 bl 800481a <SD_WideBus_Enable>
800448e: 6278 str r0, [r7, #36] ; 0x24
hsd->ErrorCode |= errorstate;
8004490: 687b ldr r3, [r7, #4]
8004492: 6b9a ldr r2, [r3, #56] ; 0x38
8004494: 6a7b ldr r3, [r7, #36] ; 0x24
8004496: 431a orrs r2, r3
8004498: 687b ldr r3, [r7, #4]
800449a: 639a str r2, [r3, #56] ; 0x38
800449c: e01a b.n 80044d4 <HAL_SD_ConfigWideBusOperation+0x84>
}
else if(WideMode == SDIO_BUS_WIDE_1B)
800449e: 683b ldr r3, [r7, #0]
80044a0: 2b00 cmp r3, #0
80044a2: d10a bne.n 80044ba <HAL_SD_ConfigWideBusOperation+0x6a>
{
errorstate = SD_WideBus_Disable(hsd);
80044a4: 6878 ldr r0, [r7, #4]
80044a6: f000 fa03 bl 80048b0 <SD_WideBus_Disable>
80044aa: 6278 str r0, [r7, #36] ; 0x24
hsd->ErrorCode |= errorstate;
80044ac: 687b ldr r3, [r7, #4]
80044ae: 6b9a ldr r2, [r3, #56] ; 0x38
80044b0: 6a7b ldr r3, [r7, #36] ; 0x24
80044b2: 431a orrs r2, r3
80044b4: 687b ldr r3, [r7, #4]
80044b6: 639a str r2, [r3, #56] ; 0x38
80044b8: e00c b.n 80044d4 <HAL_SD_ConfigWideBusOperation+0x84>
}
else
{
/* WideMode is not a valid argument*/
hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
80044ba: 687b ldr r3, [r7, #4]
80044bc: 6b9b ldr r3, [r3, #56] ; 0x38
80044be: f043 6200 orr.w r2, r3, #134217728 ; 0x8000000
80044c2: 687b ldr r3, [r7, #4]
80044c4: 639a str r2, [r3, #56] ; 0x38
80044c6: e005 b.n 80044d4 <HAL_SD_ConfigWideBusOperation+0x84>
}
}
else
{
/* MMC Card does not support this feature */
hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE;
80044c8: 687b ldr r3, [r7, #4]
80044ca: 6b9b ldr r3, [r3, #56] ; 0x38
80044cc: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000
80044d0: 687b ldr r3, [r7, #4]
80044d2: 639a str r2, [r3, #56] ; 0x38
}
if(hsd->ErrorCode != HAL_SD_ERROR_NONE)
80044d4: 687b ldr r3, [r7, #4]
80044d6: 6b9b ldr r3, [r3, #56] ; 0x38
80044d8: 2b00 cmp r3, #0
80044da: d009 beq.n 80044f0 <HAL_SD_ConfigWideBusOperation+0xa0>
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
80044dc: 687b ldr r3, [r7, #4]
80044de: 681b ldr r3, [r3, #0]
80044e0: 4a18 ldr r2, [pc, #96] ; (8004544 <HAL_SD_ConfigWideBusOperation+0xf4>)
80044e2: 639a str r2, [r3, #56] ; 0x38
hsd->State = HAL_SD_STATE_READY;
80044e4: 687b ldr r3, [r7, #4]
80044e6: 2201 movs r2, #1
80044e8: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_ERROR;
80044ec: 2301 movs r3, #1
80044ee: e024 b.n 800453a <HAL_SD_ConfigWideBusOperation+0xea>
}
else
{
/* Configure the SDIO peripheral */
Init.ClockEdge = hsd->Init.ClockEdge;
80044f0: 687b ldr r3, [r7, #4]
80044f2: 685b ldr r3, [r3, #4]
80044f4: 60fb str r3, [r7, #12]
Init.ClockBypass = hsd->Init.ClockBypass;
80044f6: 687b ldr r3, [r7, #4]
80044f8: 689b ldr r3, [r3, #8]
80044fa: 613b str r3, [r7, #16]
Init.ClockPowerSave = hsd->Init.ClockPowerSave;
80044fc: 687b ldr r3, [r7, #4]
80044fe: 68db ldr r3, [r3, #12]
8004500: 617b str r3, [r7, #20]
Init.BusWide = WideMode;
8004502: 683b ldr r3, [r7, #0]
8004504: 61bb str r3, [r7, #24]
Init.HardwareFlowControl = hsd->Init.HardwareFlowControl;
8004506: 687b ldr r3, [r7, #4]
8004508: 695b ldr r3, [r3, #20]
800450a: 61fb str r3, [r7, #28]
Init.ClockDiv = hsd->Init.ClockDiv;
800450c: 687b ldr r3, [r7, #4]
800450e: 699b ldr r3, [r3, #24]
8004510: 623b str r3, [r7, #32]
(void)SDIO_Init(hsd->Instance, Init);
8004512: 687b ldr r3, [r7, #4]
8004514: 681d ldr r5, [r3, #0]
8004516: 466c mov r4, sp
8004518: f107 0318 add.w r3, r7, #24
800451c: e893 0007 ldmia.w r3, {r0, r1, r2}
8004520: e884 0007 stmia.w r4, {r0, r1, r2}
8004524: f107 030c add.w r3, r7, #12
8004528: cb0e ldmia r3, {r1, r2, r3}
800452a: 4628 mov r0, r5
800452c: f000 fad5 bl 8004ada <SDIO_Init>
}
/* Change State */
hsd->State = HAL_SD_STATE_READY;
8004530: 687b ldr r3, [r7, #4]
8004532: 2201 movs r2, #1
8004534: f883 2034 strb.w r2, [r3, #52] ; 0x34
return HAL_OK;
8004538: 2300 movs r3, #0
}
800453a: 4618 mov r0, r3
800453c: 3728 adds r7, #40 ; 0x28
800453e: 46bd mov sp, r7
8004540: bdb0 pop {r4, r5, r7, pc}
8004542: bf00 nop
8004544: 004005ff .word 0x004005ff
08004548 <SD_InitCard>:
* @brief Initializes the sd card.
* @param hsd: Pointer to SD handle
* @retval SD Card error state
*/
static uint32_t SD_InitCard(SD_HandleTypeDef *hsd)
{
8004548: b5b0 push {r4, r5, r7, lr}
800454a: b094 sub sp, #80 ; 0x50
800454c: af04 add r7, sp, #16
800454e: 6078 str r0, [r7, #4]
HAL_SD_CardCSDTypeDef CSD;
uint32_t errorstate;
uint16_t sd_rca = 1U;
8004550: 2301 movs r3, #1
8004552: 81fb strh r3, [r7, #14]
/* Check the power State */
if(SDIO_GetPowerState(hsd->Instance) == 0U)
8004554: 687b ldr r3, [r7, #4]
8004556: 681b ldr r3, [r3, #0]
8004558: 4618 mov r0, r3
800455a: f000 fb20 bl 8004b9e <SDIO_GetPowerState>
800455e: 4603 mov r3, r0
8004560: 2b00 cmp r3, #0
8004562: d102 bne.n 800456a <SD_InitCard+0x22>
{
/* Power off */
return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE;
8004564: f04f 6380 mov.w r3, #67108864 ; 0x4000000
8004568: e0b7 b.n 80046da <SD_InitCard+0x192>
}
if(hsd->SdCard.CardType != CARD_SECURED)
800456a: 687b ldr r3, [r7, #4]
800456c: 6c5b ldr r3, [r3, #68] ; 0x44
800456e: 2b03 cmp r3, #3
8004570: d02f beq.n 80045d2 <SD_InitCard+0x8a>
{
/* Send CMD2 ALL_SEND_CID */
errorstate = SDMMC_CmdSendCID(hsd->Instance);
8004572: 687b ldr r3, [r7, #4]
8004574: 681b ldr r3, [r3, #0]
8004576: 4618 mov r0, r3
8004578: f000 fd44 bl 8005004 <SDMMC_CmdSendCID>
800457c: 63f8 str r0, [r7, #60] ; 0x3c
if(errorstate != HAL_SD_ERROR_NONE)
800457e: 6bfb ldr r3, [r7, #60] ; 0x3c
8004580: 2b00 cmp r3, #0
8004582: d001 beq.n 8004588 <SD_InitCard+0x40>
{
return errorstate;
8004584: 6bfb ldr r3, [r7, #60] ; 0x3c
8004586: e0a8 b.n 80046da <SD_InitCard+0x192>
}
else
{
/* Get Card identification number data */
hsd->CID[0U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP1);
8004588: 687b ldr r3, [r7, #4]
800458a: 681b ldr r3, [r3, #0]
800458c: 2100 movs r1, #0
800458e: 4618 mov r0, r3
8004590: f000 fb47 bl 8004c22 <SDIO_GetResponse>
8004594: 4602 mov r2, r0
8004596: 687b ldr r3, [r7, #4]
8004598: 675a str r2, [r3, #116] ; 0x74
hsd->CID[1U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP2);
800459a: 687b ldr r3, [r7, #4]
800459c: 681b ldr r3, [r3, #0]
800459e: 2104 movs r1, #4
80045a0: 4618 mov r0, r3
80045a2: f000 fb3e bl 8004c22 <SDIO_GetResponse>
80045a6: 4602 mov r2, r0
80045a8: 687b ldr r3, [r7, #4]
80045aa: 679a str r2, [r3, #120] ; 0x78
hsd->CID[2U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP3);
80045ac: 687b ldr r3, [r7, #4]
80045ae: 681b ldr r3, [r3, #0]
80045b0: 2108 movs r1, #8
80045b2: 4618 mov r0, r3
80045b4: f000 fb35 bl 8004c22 <SDIO_GetResponse>
80045b8: 4602 mov r2, r0
80045ba: 687b ldr r3, [r7, #4]
80045bc: 67da str r2, [r3, #124] ; 0x7c
hsd->CID[3U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP4);
80045be: 687b ldr r3, [r7, #4]
80045c0: 681b ldr r3, [r3, #0]
80045c2: 210c movs r1, #12
80045c4: 4618 mov r0, r3
80045c6: f000 fb2c bl 8004c22 <SDIO_GetResponse>
80045ca: 4602 mov r2, r0
80045cc: 687b ldr r3, [r7, #4]
80045ce: f8c3 2080 str.w r2, [r3, #128] ; 0x80
}
}
if(hsd->SdCard.CardType != CARD_SECURED)
80045d2: 687b ldr r3, [r7, #4]
80045d4: 6c5b ldr r3, [r3, #68] ; 0x44
80045d6: 2b03 cmp r3, #3
80045d8: d00d beq.n 80045f6 <SD_InitCard+0xae>
{
/* Send CMD3 SET_REL_ADDR with argument 0 */
/* SD Card publishes its RCA. */
errorstate = SDMMC_CmdSetRelAdd(hsd->Instance, &sd_rca);
80045da: 687b ldr r3, [r7, #4]
80045dc: 681b ldr r3, [r3, #0]
80045de: f107 020e add.w r2, r7, #14
80045e2: 4611 mov r1, r2
80045e4: 4618 mov r0, r3
80045e6: f000 fd4a bl 800507e <SDMMC_CmdSetRelAdd>
80045ea: 63f8 str r0, [r7, #60] ; 0x3c
if(errorstate != HAL_SD_ERROR_NONE)
80045ec: 6bfb ldr r3, [r7, #60] ; 0x3c
80045ee: 2b00 cmp r3, #0
80045f0: d001 beq.n 80045f6 <SD_InitCard+0xae>
{
return errorstate;
80045f2: 6bfb ldr r3, [r7, #60] ; 0x3c
80045f4: e071 b.n 80046da <SD_InitCard+0x192>
}
}
if(hsd->SdCard.CardType != CARD_SECURED)
80045f6: 687b ldr r3, [r7, #4]
80045f8: 6c5b ldr r3, [r3, #68] ; 0x44
80045fa: 2b03 cmp r3, #3
80045fc: d036 beq.n 800466c <SD_InitCard+0x124>
{
/* Get the SD card RCA */
hsd->SdCard.RelCardAdd = sd_rca;
80045fe: 89fb ldrh r3, [r7, #14]
8004600: 461a mov r2, r3
8004602: 687b ldr r3, [r7, #4]
8004604: 651a str r2, [r3, #80] ; 0x50
/* Send CMD9 SEND_CSD with argument as card's RCA */
errorstate = SDMMC_CmdSendCSD(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U));
8004606: 687b ldr r3, [r7, #4]
8004608: 681a ldr r2, [r3, #0]
800460a: 687b ldr r3, [r7, #4]
800460c: 6d1b ldr r3, [r3, #80] ; 0x50
800460e: 041b lsls r3, r3, #16
8004610: 4619 mov r1, r3
8004612: 4610 mov r0, r2
8004614: f000 fd14 bl 8005040 <SDMMC_CmdSendCSD>
8004618: 63f8 str r0, [r7, #60] ; 0x3c
if(errorstate != HAL_SD_ERROR_NONE)
800461a: 6bfb ldr r3, [r7, #60] ; 0x3c
800461c: 2b00 cmp r3, #0
800461e: d001 beq.n 8004624 <SD_InitCard+0xdc>
{
return errorstate;
8004620: 6bfb ldr r3, [r7, #60] ; 0x3c
8004622: e05a b.n 80046da <SD_InitCard+0x192>
}
else
{
/* Get Card Specific Data */
hsd->CSD[0U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP1);
8004624: 687b ldr r3, [r7, #4]
8004626: 681b ldr r3, [r3, #0]
8004628: 2100 movs r1, #0
800462a: 4618 mov r0, r3
800462c: f000 faf9 bl 8004c22 <SDIO_GetResponse>
8004630: 4602 mov r2, r0
8004632: 687b ldr r3, [r7, #4]
8004634: 665a str r2, [r3, #100] ; 0x64
hsd->CSD[1U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP2);
8004636: 687b ldr r3, [r7, #4]
8004638: 681b ldr r3, [r3, #0]
800463a: 2104 movs r1, #4
800463c: 4618 mov r0, r3
800463e: f000 faf0 bl 8004c22 <SDIO_GetResponse>
8004642: 4602 mov r2, r0
8004644: 687b ldr r3, [r7, #4]
8004646: 669a str r2, [r3, #104] ; 0x68
hsd->CSD[2U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP3);
8004648: 687b ldr r3, [r7, #4]
800464a: 681b ldr r3, [r3, #0]
800464c: 2108 movs r1, #8
800464e: 4618 mov r0, r3
8004650: f000 fae7 bl 8004c22 <SDIO_GetResponse>
8004654: 4602 mov r2, r0
8004656: 687b ldr r3, [r7, #4]
8004658: 66da str r2, [r3, #108] ; 0x6c
hsd->CSD[3U] = SDIO_GetResponse(hsd->Instance, SDIO_RESP4);
800465a: 687b ldr r3, [r7, #4]
800465c: 681b ldr r3, [r3, #0]
800465e: 210c movs r1, #12
8004660: 4618 mov r0, r3
8004662: f000 fade bl 8004c22 <SDIO_GetResponse>
8004666: 4602 mov r2, r0
8004668: 687b ldr r3, [r7, #4]
800466a: 671a str r2, [r3, #112] ; 0x70
}
}
/* Get the Card Class */
hsd->SdCard.Class = (SDIO_GetResponse(hsd->Instance, SDIO_RESP2) >> 20U);
800466c: 687b ldr r3, [r7, #4]
800466e: 681b ldr r3, [r3, #0]
8004670: 2104 movs r1, #4
8004672: 4618 mov r0, r3
8004674: f000 fad5 bl 8004c22 <SDIO_GetResponse>
8004678: 4603 mov r3, r0
800467a: 0d1a lsrs r2, r3, #20
800467c: 687b ldr r3, [r7, #4]
800467e: 64da str r2, [r3, #76] ; 0x4c
/* Get CSD parameters */
if (HAL_SD_GetCardCSD(hsd, &CSD) != HAL_OK)
8004680: f107 0310 add.w r3, r7, #16
8004684: 4619 mov r1, r3
8004686: 6878 ldr r0, [r7, #4]
8004688: f7ff fd12 bl 80040b0 <HAL_SD_GetCardCSD>
800468c: 4603 mov r3, r0
800468e: 2b00 cmp r3, #0
8004690: d002 beq.n 8004698 <SD_InitCard+0x150>
{
return HAL_SD_ERROR_UNSUPPORTED_FEATURE;
8004692: f04f 5380 mov.w r3, #268435456 ; 0x10000000
8004696: e020 b.n 80046da <SD_InitCard+0x192>
}
/* Select the Card */
errorstate = SDMMC_CmdSelDesel(hsd->Instance, (uint32_t)(((uint32_t)hsd->SdCard.RelCardAdd) << 16U));
8004698: 687b ldr r3, [r7, #4]
800469a: 6819 ldr r1, [r3, #0]
800469c: 687b ldr r3, [r7, #4]
800469e: 6d1b ldr r3, [r3, #80] ; 0x50
80046a0: 041b lsls r3, r3, #16
80046a2: f04f 0400 mov.w r4, #0
80046a6: 461a mov r2, r3
80046a8: 4623 mov r3, r4
80046aa: 4608 mov r0, r1
80046ac: f000 fbc2 bl 8004e34 <SDMMC_CmdSelDesel>
80046b0: 63f8 str r0, [r7, #60] ; 0x3c
if(errorstate != HAL_SD_ERROR_NONE)
80046b2: 6bfb ldr r3, [r7, #60] ; 0x3c
80046b4: 2b00 cmp r3, #0
80046b6: d001 beq.n 80046bc <SD_InitCard+0x174>
{
return errorstate;
80046b8: 6bfb ldr r3, [r7, #60] ; 0x3c
80046ba: e00e b.n 80046da <SD_InitCard+0x192>
}
/* Configure SDIO peripheral interface */
(void)SDIO_Init(hsd->Instance, hsd->Init);
80046bc: 687b ldr r3, [r7, #4]
80046be: 681d ldr r5, [r3, #0]
80046c0: 687b ldr r3, [r7, #4]
80046c2: 466c mov r4, sp
80046c4: f103 0210 add.w r2, r3, #16
80046c8: ca07 ldmia r2, {r0, r1, r2}
80046ca: e884 0007 stmia.w r4, {r0, r1, r2}
80046ce: 3304 adds r3, #4
80046d0: cb0e ldmia r3, {r1, r2, r3}
80046d2: 4628 mov r0, r5
80046d4: f000 fa01 bl 8004ada <SDIO_Init>
/* All cards are initialized */
return HAL_SD_ERROR_NONE;
80046d8: 2300 movs r3, #0
}
80046da: 4618 mov r0, r3
80046dc: 3740 adds r7, #64 ; 0x40
80046de: 46bd mov sp, r7
80046e0: bdb0 pop {r4, r5, r7, pc}
...
080046e4 <SD_PowerON>:
* in the SD handle.
* @param hsd: Pointer to SD handle
* @retval error state
*/
static uint32_t SD_PowerON(SD_HandleTypeDef *hsd)
{
80046e4: b580 push {r7, lr}
80046e6: b086 sub sp, #24
80046e8: af00 add r7, sp, #0
80046ea: 6078 str r0, [r7, #4]
__IO uint32_t count = 0U;
80046ec: 2300 movs r3, #0
80046ee: 60bb str r3, [r7, #8]
uint32_t response = 0U, validvoltage = 0U;
80046f0: 2300 movs r3, #0
80046f2: 617b str r3, [r7, #20]
80046f4: 2300 movs r3, #0
80046f6: 613b str r3, [r7, #16]
uint32_t errorstate;
/* CMD0: GO_IDLE_STATE */
errorstate = SDMMC_CmdGoIdleState(hsd->Instance);
80046f8: 687b ldr r3, [r7, #4]
80046fa: 681b ldr r3, [r3, #0]
80046fc: 4618 mov r0, r3
80046fe: f000 fbbc bl 8004e7a <SDMMC_CmdGoIdleState>
8004702: 60f8 str r0, [r7, #12]
if(errorstate != HAL_SD_ERROR_NONE)
8004704: 68fb ldr r3, [r7, #12]
8004706: 2b00 cmp r3, #0
8004708: d001 beq.n 800470e <SD_PowerON+0x2a>
{
return errorstate;
800470a: 68fb ldr r3, [r7, #12]
800470c: e072 b.n 80047f4 <SD_PowerON+0x110>
}
/* CMD8: SEND_IF_COND: Command available only on V2.0 cards */
errorstate = SDMMC_CmdOperCond(hsd->Instance);
800470e: 687b ldr r3, [r7, #4]
8004710: 681b ldr r3, [r3, #0]
8004712: 4618 mov r0, r3
8004714: f000 fbcf bl 8004eb6 <SDMMC_CmdOperCond>
8004718: 60f8 str r0, [r7, #12]
if(errorstate != HAL_SD_ERROR_NONE)
800471a: 68fb ldr r3, [r7, #12]
800471c: 2b00 cmp r3, #0
800471e: d00d beq.n 800473c <SD_PowerON+0x58>
{
hsd->SdCard.CardVersion = CARD_V1_X;
8004720: 687b ldr r3, [r7, #4]
8004722: 2200 movs r2, #0
8004724: 649a str r2, [r3, #72] ; 0x48
/* CMD0: GO_IDLE_STATE */
errorstate = SDMMC_CmdGoIdleState(hsd->Instance);
8004726: 687b ldr r3, [r7, #4]
8004728: 681b ldr r3, [r3, #0]
800472a: 4618 mov r0, r3
800472c: f000 fba5 bl 8004e7a <SDMMC_CmdGoIdleState>
8004730: 60f8 str r0, [r7, #12]
if(errorstate != HAL_SD_ERROR_NONE)
8004732: 68fb ldr r3, [r7, #12]
8004734: 2b00 cmp r3, #0
8004736: d004 beq.n 8004742 <SD_PowerON+0x5e>
{
return errorstate;
8004738: 68fb ldr r3, [r7, #12]
800473a: e05b b.n 80047f4 <SD_PowerON+0x110>
}
}
else
{
hsd->SdCard.CardVersion = CARD_V2_X;
800473c: 687b ldr r3, [r7, #4]
800473e: 2201 movs r2, #1
8004740: 649a str r2, [r3, #72] ; 0x48
}
if( hsd->SdCard.CardVersion == CARD_V2_X)
8004742: 687b ldr r3, [r7, #4]
8004744: 6c9b ldr r3, [r3, #72] ; 0x48
8004746: 2b01 cmp r3, #1
8004748: d137 bne.n 80047ba <SD_PowerON+0xd6>
{
/* SEND CMD55 APP_CMD with RCA as 0 */
errorstate = SDMMC_CmdAppCommand(hsd->Instance, 0);
800474a: 687b ldr r3, [r7, #4]
800474c: 681b ldr r3, [r3, #0]
800474e: 2100 movs r1, #0
8004750: 4618 mov r0, r3
8004752: f000 fbcf bl 8004ef4 <SDMMC_CmdAppCommand>
8004756: 60f8 str r0, [r7, #12]
if(errorstate != HAL_SD_ERROR_NONE)
8004758: 68fb ldr r3, [r7, #12]
800475a: 2b00 cmp r3, #0
800475c: d02d beq.n 80047ba <SD_PowerON+0xd6>
{
return HAL_SD_ERROR_UNSUPPORTED_FEATURE;
800475e: f04f 5380 mov.w r3, #268435456 ; 0x10000000
8004762: e047 b.n 80047f4 <SD_PowerON+0x110>
/* SD CARD */
/* Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */
while((count < SDMMC_MAX_VOLT_TRIAL) && (validvoltage == 0U))
{
/* SEND CMD55 APP_CMD with RCA as 0 */
errorstate = SDMMC_CmdAppCommand(hsd->Instance, 0);
8004764: 687b ldr r3, [r7, #4]
8004766: 681b ldr r3, [r3, #0]
8004768: 2100 movs r1, #0
800476a: 4618 mov r0, r3
800476c: f000 fbc2 bl 8004ef4 <SDMMC_CmdAppCommand>
8004770: 60f8 str r0, [r7, #12]
if(errorstate != HAL_SD_ERROR_NONE)
8004772: 68fb ldr r3, [r7, #12]
8004774: 2b00 cmp r3, #0
8004776: d001 beq.n 800477c <SD_PowerON+0x98>
{
return errorstate;
8004778: 68fb ldr r3, [r7, #12]
800477a: e03b b.n 80047f4 <SD_PowerON+0x110>
}
/* Send CMD41 */
errorstate = SDMMC_CmdAppOperCommand(hsd->Instance, SDMMC_VOLTAGE_WINDOW_SD | SDMMC_HIGH_CAPACITY | SD_SWITCH_1_8V_CAPACITY);
800477c: 687b ldr r3, [r7, #4]
800477e: 681b ldr r3, [r3, #0]
8004780: 491e ldr r1, [pc, #120] ; (80047fc <SD_PowerON+0x118>)
8004782: 4618 mov r0, r3
8004784: f000 fbd8 bl 8004f38 <SDMMC_CmdAppOperCommand>
8004788: 60f8 str r0, [r7, #12]
if(errorstate != HAL_SD_ERROR_NONE)
800478a: 68fb ldr r3, [r7, #12]
800478c: 2b00 cmp r3, #0
800478e: d002 beq.n 8004796 <SD_PowerON+0xb2>
{
return HAL_SD_ERROR_UNSUPPORTED_FEATURE;
8004790: f04f 5380 mov.w r3, #268435456 ; 0x10000000
8004794: e02e b.n 80047f4 <SD_PowerON+0x110>
}
/* Get command response */
response = SDIO_GetResponse(hsd->Instance, SDIO_RESP1);
8004796: 687b ldr r3, [r7, #4]
8004798: 681b ldr r3, [r3, #0]
800479a: 2100 movs r1, #0
800479c: 4618 mov r0, r3
800479e: f000 fa40 bl 8004c22 <SDIO_GetResponse>
80047a2: 6178 str r0, [r7, #20]
/* Get operating voltage*/
validvoltage = (((response >> 31U) == 1U) ? 1U : 0U);
80047a4: 697b ldr r3, [r7, #20]
80047a6: 0fdb lsrs r3, r3, #31
80047a8: 2b01 cmp r3, #1
80047aa: d101 bne.n 80047b0 <SD_PowerON+0xcc>
80047ac: 2301 movs r3, #1
80047ae: e000 b.n 80047b2 <SD_PowerON+0xce>
80047b0: 2300 movs r3, #0
80047b2: 613b str r3, [r7, #16]
count++;
80047b4: 68bb ldr r3, [r7, #8]
80047b6: 3301 adds r3, #1
80047b8: 60bb str r3, [r7, #8]
while((count < SDMMC_MAX_VOLT_TRIAL) && (validvoltage == 0U))
80047ba: 68bb ldr r3, [r7, #8]
80047bc: f64f 72fe movw r2, #65534 ; 0xfffe
80047c0: 4293 cmp r3, r2
80047c2: d802 bhi.n 80047ca <SD_PowerON+0xe6>
80047c4: 693b ldr r3, [r7, #16]
80047c6: 2b00 cmp r3, #0
80047c8: d0cc beq.n 8004764 <SD_PowerON+0x80>
}
if(count >= SDMMC_MAX_VOLT_TRIAL)
80047ca: 68bb ldr r3, [r7, #8]
80047cc: f64f 72fe movw r2, #65534 ; 0xfffe
80047d0: 4293 cmp r3, r2
80047d2: d902 bls.n 80047da <SD_PowerON+0xf6>
{
return HAL_SD_ERROR_INVALID_VOLTRANGE;
80047d4: f04f 7380 mov.w r3, #16777216 ; 0x1000000
80047d8: e00c b.n 80047f4 <SD_PowerON+0x110>
}
if((response & SDMMC_HIGH_CAPACITY) == SDMMC_HIGH_CAPACITY) /* (response &= SD_HIGH_CAPACITY) */
80047da: 697b ldr r3, [r7, #20]
80047dc: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000
80047e0: 2b00 cmp r3, #0
80047e2: d003 beq.n 80047ec <SD_PowerON+0x108>
{
hsd->SdCard.CardType = CARD_SDHC_SDXC;
80047e4: 687b ldr r3, [r7, #4]
80047e6: 2201 movs r2, #1
80047e8: 645a str r2, [r3, #68] ; 0x44
80047ea: e002 b.n 80047f2 <SD_PowerON+0x10e>
}
else
{
hsd->SdCard.CardType = CARD_SDSC;
80047ec: 687b ldr r3, [r7, #4]
80047ee: 2200 movs r2, #0
80047f0: 645a str r2, [r3, #68] ; 0x44
}
return HAL_SD_ERROR_NONE;
80047f2: 2300 movs r3, #0
}
80047f4: 4618 mov r0, r3
80047f6: 3718 adds r7, #24
80047f8: 46bd mov sp, r7
80047fa: bd80 pop {r7, pc}
80047fc: c1100000 .word 0xc1100000
08004800 <SD_PowerOFF>:
* @brief Turns the SDIO output signals off.
* @param hsd: Pointer to SD handle
* @retval None
*/
static void SD_PowerOFF(SD_HandleTypeDef *hsd)
{
8004800: b580 push {r7, lr}
8004802: b082 sub sp, #8
8004804: af00 add r7, sp, #0
8004806: 6078 str r0, [r7, #4]
/* Set Power State to OFF */
(void)SDIO_PowerState_OFF(hsd->Instance);
8004808: 687b ldr r3, [r7, #4]
800480a: 681b ldr r3, [r3, #0]
800480c: 4618 mov r0, r3
800480e: f000 f9b9 bl 8004b84 <SDIO_PowerState_OFF>
}
8004812: bf00 nop
8004814: 3708 adds r7, #8
8004816: 46bd mov sp, r7
8004818: bd80 pop {r7, pc}
0800481a <SD_WideBus_Enable>:
* @brief Enables the SDIO wide bus mode.
* @param hsd: pointer to SD handle
* @retval error state
*/
static uint32_t SD_WideBus_Enable(SD_HandleTypeDef *hsd)
{
800481a: b580 push {r7, lr}
800481c: b086 sub sp, #24
800481e: af00 add r7, sp, #0
8004820: 6078 str r0, [r7, #4]
uint32_t scr[2U] = {0U, 0U};
8004822: 2300 movs r3, #0
8004824: 60fb str r3, [r7, #12]
8004826: 2300 movs r3, #0
8004828: 613b str r3, [r7, #16]
uint32_t errorstate;
if((SDIO_GetResponse(hsd->Instance, SDIO_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED)
800482a: 687b ldr r3, [r7, #4]
800482c: 681b ldr r3, [r3, #0]
800482e: 2100 movs r1, #0
8004830: 4618 mov r0, r3
8004832: f000 f9f6 bl 8004c22 <SDIO_GetResponse>
8004836: 4603 mov r3, r0
8004838: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
800483c: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
8004840: d102 bne.n 8004848 <SD_WideBus_Enable+0x2e>
{
return HAL_SD_ERROR_LOCK_UNLOCK_FAILED;
8004842: f44f 6300 mov.w r3, #2048 ; 0x800
8004846: e02f b.n 80048a8 <SD_WideBus_Enable+0x8e>
}
/* Get SCR Register */
errorstate = SD_FindSCR(hsd, scr);
8004848: f107 030c add.w r3, r7, #12
800484c: 4619 mov r1, r3
800484e: 6878 ldr r0, [r7, #4]
8004850: f000 f879 bl 8004946 <SD_FindSCR>
8004854: 6178 str r0, [r7, #20]
if(errorstate != HAL_SD_ERROR_NONE)
8004856: 697b ldr r3, [r7, #20]
8004858: 2b00 cmp r3, #0
800485a: d001 beq.n 8004860 <SD_WideBus_Enable+0x46>
{
return errorstate;
800485c: 697b ldr r3, [r7, #20]
800485e: e023 b.n 80048a8 <SD_WideBus_Enable+0x8e>
}
/* If requested card supports wide bus operation */
if((scr[1U] & SDMMC_WIDE_BUS_SUPPORT) != SDMMC_ALLZERO)
8004860: 693b ldr r3, [r7, #16]
8004862: f403 2380 and.w r3, r3, #262144 ; 0x40000
8004866: 2b00 cmp r3, #0
8004868: d01c beq.n 80048a4 <SD_WideBus_Enable+0x8a>
{
/* Send CMD55 APP_CMD with argument as card's RCA.*/
errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U));
800486a: 687b ldr r3, [r7, #4]
800486c: 681a ldr r2, [r3, #0]
800486e: 687b ldr r3, [r7, #4]
8004870: 6d1b ldr r3, [r3, #80] ; 0x50
8004872: 041b lsls r3, r3, #16
8004874: 4619 mov r1, r3
8004876: 4610 mov r0, r2
8004878: f000 fb3c bl 8004ef4 <SDMMC_CmdAppCommand>
800487c: 6178 str r0, [r7, #20]
if(errorstate != HAL_SD_ERROR_NONE)
800487e: 697b ldr r3, [r7, #20]
8004880: 2b00 cmp r3, #0
8004882: d001 beq.n 8004888 <SD_WideBus_Enable+0x6e>
{
return errorstate;
8004884: 697b ldr r3, [r7, #20]
8004886: e00f b.n 80048a8 <SD_WideBus_Enable+0x8e>
}
/* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */
errorstate = SDMMC_CmdBusWidth(hsd->Instance, 2U);
8004888: 687b ldr r3, [r7, #4]
800488a: 681b ldr r3, [r3, #0]
800488c: 2102 movs r1, #2
800488e: 4618 mov r0, r3
8004890: f000 fb75 bl 8004f7e <SDMMC_CmdBusWidth>
8004894: 6178 str r0, [r7, #20]
if(errorstate != HAL_SD_ERROR_NONE)
8004896: 697b ldr r3, [r7, #20]
8004898: 2b00 cmp r3, #0
800489a: d001 beq.n 80048a0 <SD_WideBus_Enable+0x86>
{
return errorstate;
800489c: 697b ldr r3, [r7, #20]
800489e: e003 b.n 80048a8 <SD_WideBus_Enable+0x8e>
}
return HAL_SD_ERROR_NONE;
80048a0: 2300 movs r3, #0
80048a2: e001 b.n 80048a8 <SD_WideBus_Enable+0x8e>
}
else
{
return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE;
80048a4: f04f 6380 mov.w r3, #67108864 ; 0x4000000
}
}
80048a8: 4618 mov r0, r3
80048aa: 3718 adds r7, #24
80048ac: 46bd mov sp, r7
80048ae: bd80 pop {r7, pc}
080048b0 <SD_WideBus_Disable>:
* @brief Disables the SDIO wide bus mode.
* @param hsd: Pointer to SD handle
* @retval error state
*/
static uint32_t SD_WideBus_Disable(SD_HandleTypeDef *hsd)
{
80048b0: b580 push {r7, lr}
80048b2: b086 sub sp, #24
80048b4: af00 add r7, sp, #0
80048b6: 6078 str r0, [r7, #4]
uint32_t scr[2U] = {0U, 0U};
80048b8: 2300 movs r3, #0
80048ba: 60fb str r3, [r7, #12]
80048bc: 2300 movs r3, #0
80048be: 613b str r3, [r7, #16]
uint32_t errorstate;
if((SDIO_GetResponse(hsd->Instance, SDIO_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED)
80048c0: 687b ldr r3, [r7, #4]
80048c2: 681b ldr r3, [r3, #0]
80048c4: 2100 movs r1, #0
80048c6: 4618 mov r0, r3
80048c8: f000 f9ab bl 8004c22 <SDIO_GetResponse>
80048cc: 4603 mov r3, r0
80048ce: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
80048d2: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
80048d6: d102 bne.n 80048de <SD_WideBus_Disable+0x2e>
{
return HAL_SD_ERROR_LOCK_UNLOCK_FAILED;
80048d8: f44f 6300 mov.w r3, #2048 ; 0x800
80048dc: e02f b.n 800493e <SD_WideBus_Disable+0x8e>
}
/* Get SCR Register */
errorstate = SD_FindSCR(hsd, scr);
80048de: f107 030c add.w r3, r7, #12
80048e2: 4619 mov r1, r3
80048e4: 6878 ldr r0, [r7, #4]
80048e6: f000 f82e bl 8004946 <SD_FindSCR>
80048ea: 6178 str r0, [r7, #20]
if(errorstate != HAL_SD_ERROR_NONE)
80048ec: 697b ldr r3, [r7, #20]
80048ee: 2b00 cmp r3, #0
80048f0: d001 beq.n 80048f6 <SD_WideBus_Disable+0x46>
{
return errorstate;
80048f2: 697b ldr r3, [r7, #20]
80048f4: e023 b.n 800493e <SD_WideBus_Disable+0x8e>
}
/* If requested card supports 1 bit mode operation */
if((scr[1U] & SDMMC_SINGLE_BUS_SUPPORT) != SDMMC_ALLZERO)
80048f6: 693b ldr r3, [r7, #16]
80048f8: f403 3380 and.w r3, r3, #65536 ; 0x10000
80048fc: 2b00 cmp r3, #0
80048fe: d01c beq.n 800493a <SD_WideBus_Disable+0x8a>
{
/* Send CMD55 APP_CMD with argument as card's RCA */
errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U));
8004900: 687b ldr r3, [r7, #4]
8004902: 681a ldr r2, [r3, #0]
8004904: 687b ldr r3, [r7, #4]
8004906: 6d1b ldr r3, [r3, #80] ; 0x50
8004908: 041b lsls r3, r3, #16
800490a: 4619 mov r1, r3
800490c: 4610 mov r0, r2
800490e: f000 faf1 bl 8004ef4 <SDMMC_CmdAppCommand>
8004912: 6178 str r0, [r7, #20]
if(errorstate != HAL_SD_ERROR_NONE)
8004914: 697b ldr r3, [r7, #20]
8004916: 2b00 cmp r3, #0
8004918: d001 beq.n 800491e <SD_WideBus_Disable+0x6e>
{
return errorstate;
800491a: 697b ldr r3, [r7, #20]
800491c: e00f b.n 800493e <SD_WideBus_Disable+0x8e>
}
/* Send ACMD6 APP_CMD with argument as 0 for single bus mode */
errorstate = SDMMC_CmdBusWidth(hsd->Instance, 0U);
800491e: 687b ldr r3, [r7, #4]
8004920: 681b ldr r3, [r3, #0]
8004922: 2100 movs r1, #0
8004924: 4618 mov r0, r3
8004926: f000 fb2a bl 8004f7e <SDMMC_CmdBusWidth>
800492a: 6178 str r0, [r7, #20]
if(errorstate != HAL_SD_ERROR_NONE)
800492c: 697b ldr r3, [r7, #20]
800492e: 2b00 cmp r3, #0
8004930: d001 beq.n 8004936 <SD_WideBus_Disable+0x86>
{
return errorstate;
8004932: 697b ldr r3, [r7, #20]
8004934: e003 b.n 800493e <SD_WideBus_Disable+0x8e>
}
return HAL_SD_ERROR_NONE;
8004936: 2300 movs r3, #0
8004938: e001 b.n 800493e <SD_WideBus_Disable+0x8e>
}
else
{
return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE;
800493a: f04f 6380 mov.w r3, #67108864 ; 0x4000000
}
}
800493e: 4618 mov r0, r3
8004940: 3718 adds r7, #24
8004942: 46bd mov sp, r7
8004944: bd80 pop {r7, pc}
08004946 <SD_FindSCR>:
* @param hsd: Pointer to SD handle
* @param pSCR: pointer to the buffer that will contain the SCR value
* @retval error state
*/
static uint32_t SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR)
{
8004946: b590 push {r4, r7, lr}
8004948: b08f sub sp, #60 ; 0x3c
800494a: af00 add r7, sp, #0
800494c: 6078 str r0, [r7, #4]
800494e: 6039 str r1, [r7, #0]
SDIO_DataInitTypeDef config;
uint32_t errorstate;
uint32_t tickstart = HAL_GetTick();
8004950: f7fc f810 bl 8000974 <HAL_GetTick>
8004954: 6338 str r0, [r7, #48] ; 0x30
uint32_t index = 0U;
8004956: 2300 movs r3, #0
8004958: 637b str r3, [r7, #52] ; 0x34
uint32_t tempscr[2U] = {0U, 0U};
800495a: 2300 movs r3, #0
800495c: 60bb str r3, [r7, #8]
800495e: 2300 movs r3, #0
8004960: 60fb str r3, [r7, #12]
uint32_t *scr = pSCR;
8004962: 683b ldr r3, [r7, #0]
8004964: 62fb str r3, [r7, #44] ; 0x2c
/* Set Block Size To 8 Bytes */
errorstate = SDMMC_CmdBlockLength(hsd->Instance, 8U);
8004966: 687b ldr r3, [r7, #4]
8004968: 681b ldr r3, [r3, #0]
800496a: 2108 movs r1, #8
800496c: 4618 mov r0, r3
800496e: f000 f995 bl 8004c9c <SDMMC_CmdBlockLength>
8004972: 62b8 str r0, [r7, #40] ; 0x28
if(errorstate != HAL_SD_ERROR_NONE)
8004974: 6abb ldr r3, [r7, #40] ; 0x28
8004976: 2b00 cmp r3, #0
8004978: d001 beq.n 800497e <SD_FindSCR+0x38>
{
return errorstate;
800497a: 6abb ldr r3, [r7, #40] ; 0x28
800497c: e0a9 b.n 8004ad2 <SD_FindSCR+0x18c>
}
/* Send CMD55 APP_CMD with argument as card's RCA */
errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)((hsd->SdCard.RelCardAdd) << 16U));
800497e: 687b ldr r3, [r7, #4]
8004980: 681a ldr r2, [r3, #0]
8004982: 687b ldr r3, [r7, #4]
8004984: 6d1b ldr r3, [r3, #80] ; 0x50
8004986: 041b lsls r3, r3, #16
8004988: 4619 mov r1, r3
800498a: 4610 mov r0, r2
800498c: f000 fab2 bl 8004ef4 <SDMMC_CmdAppCommand>
8004990: 62b8 str r0, [r7, #40] ; 0x28
if(errorstate != HAL_SD_ERROR_NONE)
8004992: 6abb ldr r3, [r7, #40] ; 0x28
8004994: 2b00 cmp r3, #0
8004996: d001 beq.n 800499c <SD_FindSCR+0x56>
{
return errorstate;
8004998: 6abb ldr r3, [r7, #40] ; 0x28
800499a: e09a b.n 8004ad2 <SD_FindSCR+0x18c>
}
config.DataTimeOut = SDMMC_DATATIMEOUT;
800499c: f04f 33ff mov.w r3, #4294967295
80049a0: 613b str r3, [r7, #16]
config.DataLength = 8U;
80049a2: 2308 movs r3, #8
80049a4: 617b str r3, [r7, #20]
config.DataBlockSize = SDIO_DATABLOCK_SIZE_8B;
80049a6: 2330 movs r3, #48 ; 0x30
80049a8: 61bb str r3, [r7, #24]
config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
80049aa: 2302 movs r3, #2
80049ac: 61fb str r3, [r7, #28]
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
80049ae: 2300 movs r3, #0
80049b0: 623b str r3, [r7, #32]
config.DPSM = SDIO_DPSM_ENABLE;
80049b2: 2301 movs r3, #1
80049b4: 627b str r3, [r7, #36] ; 0x24
(void)SDIO_ConfigData(hsd->Instance, &config);
80049b6: 687b ldr r3, [r7, #4]
80049b8: 681b ldr r3, [r3, #0]
80049ba: f107 0210 add.w r2, r7, #16
80049be: 4611 mov r1, r2
80049c0: 4618 mov r0, r3
80049c2: f000 f940 bl 8004c46 <SDIO_ConfigData>
/* Send ACMD51 SD_APP_SEND_SCR with argument as 0 */
errorstate = SDMMC_CmdSendSCR(hsd->Instance);
80049c6: 687b ldr r3, [r7, #4]
80049c8: 681b ldr r3, [r3, #0]
80049ca: 4618 mov r0, r3
80049cc: f000 faf9 bl 8004fc2 <SDMMC_CmdSendSCR>
80049d0: 62b8 str r0, [r7, #40] ; 0x28
if(errorstate != HAL_SD_ERROR_NONE)
80049d2: 6abb ldr r3, [r7, #40] ; 0x28
80049d4: 2b00 cmp r3, #0
80049d6: d022 beq.n 8004a1e <SD_FindSCR+0xd8>
{
return errorstate;
80049d8: 6abb ldr r3, [r7, #40] ; 0x28
80049da: e07a b.n 8004ad2 <SD_FindSCR+0x18c>
}
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND))
{
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXDAVL))
80049dc: 687b ldr r3, [r7, #4]
80049de: 681b ldr r3, [r3, #0]
80049e0: 6b5b ldr r3, [r3, #52] ; 0x34
80049e2: f403 1300 and.w r3, r3, #2097152 ; 0x200000
80049e6: 2b00 cmp r3, #0
80049e8: d00e beq.n 8004a08 <SD_FindSCR+0xc2>
{
*(tempscr + index) = SDIO_ReadFIFO(hsd->Instance);
80049ea: 687b ldr r3, [r7, #4]
80049ec: 6819 ldr r1, [r3, #0]
80049ee: 6b7b ldr r3, [r7, #52] ; 0x34
80049f0: 009b lsls r3, r3, #2
80049f2: f107 0208 add.w r2, r7, #8
80049f6: 18d4 adds r4, r2, r3
80049f8: 4608 mov r0, r1
80049fa: f000 f898 bl 8004b2e <SDIO_ReadFIFO>
80049fe: 4603 mov r3, r0
8004a00: 6023 str r3, [r4, #0]
index++;
8004a02: 6b7b ldr r3, [r7, #52] ; 0x34
8004a04: 3301 adds r3, #1
8004a06: 637b str r3, [r7, #52] ; 0x34
}
if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
8004a08: f7fb ffb4 bl 8000974 <HAL_GetTick>
8004a0c: 4602 mov r2, r0
8004a0e: 6b3b ldr r3, [r7, #48] ; 0x30
8004a10: 1ad3 subs r3, r2, r3
8004a12: f1b3 3fff cmp.w r3, #4294967295
8004a16: d102 bne.n 8004a1e <SD_FindSCR+0xd8>
{
return HAL_SD_ERROR_TIMEOUT;
8004a18: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
8004a1c: e059 b.n 8004ad2 <SD_FindSCR+0x18c>
while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND))
8004a1e: 687b ldr r3, [r7, #4]
8004a20: 681b ldr r3, [r3, #0]
8004a22: 6b5a ldr r2, [r3, #52] ; 0x34
8004a24: f240 432a movw r3, #1066 ; 0x42a
8004a28: 4013 ands r3, r2
8004a2a: 2b00 cmp r3, #0
8004a2c: d0d6 beq.n 80049dc <SD_FindSCR+0x96>
}
}
if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
8004a2e: 687b ldr r3, [r7, #4]
8004a30: 681b ldr r3, [r3, #0]
8004a32: 6b5b ldr r3, [r3, #52] ; 0x34
8004a34: f003 0308 and.w r3, r3, #8
8004a38: 2b00 cmp r3, #0
8004a3a: d005 beq.n 8004a48 <SD_FindSCR+0x102>
{
__HAL_SD_CLEAR_FLAG(hsd, SDIO_FLAG_DTIMEOUT);
8004a3c: 687b ldr r3, [r7, #4]
8004a3e: 681b ldr r3, [r3, #0]
8004a40: 2208 movs r2, #8
8004a42: 639a str r2, [r3, #56] ; 0x38
return HAL_SD_ERROR_DATA_TIMEOUT;
8004a44: 2308 movs r3, #8
8004a46: e044 b.n 8004ad2 <SD_FindSCR+0x18c>
}
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DCRCFAIL))
8004a48: 687b ldr r3, [r7, #4]
8004a4a: 681b ldr r3, [r3, #0]
8004a4c: 6b5b ldr r3, [r3, #52] ; 0x34
8004a4e: f003 0302 and.w r3, r3, #2
8004a52: 2b00 cmp r3, #0
8004a54: d005 beq.n 8004a62 <SD_FindSCR+0x11c>
{
__HAL_SD_CLEAR_FLAG(hsd, SDIO_FLAG_DCRCFAIL);
8004a56: 687b ldr r3, [r7, #4]
8004a58: 681b ldr r3, [r3, #0]
8004a5a: 2202 movs r2, #2
8004a5c: 639a str r2, [r3, #56] ; 0x38
return HAL_SD_ERROR_DATA_CRC_FAIL;
8004a5e: 2302 movs r3, #2
8004a60: e037 b.n 8004ad2 <SD_FindSCR+0x18c>
}
else if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR))
8004a62: 687b ldr r3, [r7, #4]
8004a64: 681b ldr r3, [r3, #0]
8004a66: 6b5b ldr r3, [r3, #52] ; 0x34
8004a68: f003 0320 and.w r3, r3, #32
8004a6c: 2b00 cmp r3, #0
8004a6e: d005 beq.n 8004a7c <SD_FindSCR+0x136>
{
__HAL_SD_CLEAR_FLAG(hsd, SDIO_FLAG_RXOVERR);
8004a70: 687b ldr r3, [r7, #4]
8004a72: 681b ldr r3, [r3, #0]
8004a74: 2220 movs r2, #32
8004a76: 639a str r2, [r3, #56] ; 0x38
return HAL_SD_ERROR_RX_OVERRUN;
8004a78: 2320 movs r3, #32
8004a7a: e02a b.n 8004ad2 <SD_FindSCR+0x18c>
}
else
{
/* No error flag set */
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
8004a7c: 687b ldr r3, [r7, #4]
8004a7e: 681b ldr r3, [r3, #0]
8004a80: f240 523a movw r2, #1338 ; 0x53a
8004a84: 639a str r2, [r3, #56] ; 0x38
*scr = (((tempscr[1] & SDMMC_0TO7BITS) << 24) | ((tempscr[1] & SDMMC_8TO15BITS) << 8) |\
8004a86: 68fb ldr r3, [r7, #12]
8004a88: 061a lsls r2, r3, #24
8004a8a: 68fb ldr r3, [r7, #12]
8004a8c: 021b lsls r3, r3, #8
8004a8e: f403 037f and.w r3, r3, #16711680 ; 0xff0000
8004a92: 431a orrs r2, r3
((tempscr[1] & SDMMC_16TO23BITS) >> 8) | ((tempscr[1] & SDMMC_24TO31BITS) >> 24));
8004a94: 68fb ldr r3, [r7, #12]
8004a96: 0a1b lsrs r3, r3, #8
8004a98: f403 437f and.w r3, r3, #65280 ; 0xff00
*scr = (((tempscr[1] & SDMMC_0TO7BITS) << 24) | ((tempscr[1] & SDMMC_8TO15BITS) << 8) |\
8004a9c: 431a orrs r2, r3
((tempscr[1] & SDMMC_16TO23BITS) >> 8) | ((tempscr[1] & SDMMC_24TO31BITS) >> 24));
8004a9e: 68fb ldr r3, [r7, #12]
8004aa0: 0e1b lsrs r3, r3, #24
8004aa2: 431a orrs r2, r3
*scr = (((tempscr[1] & SDMMC_0TO7BITS) << 24) | ((tempscr[1] & SDMMC_8TO15BITS) << 8) |\
8004aa4: 6afb ldr r3, [r7, #44] ; 0x2c
8004aa6: 601a str r2, [r3, #0]
scr++;
8004aa8: 6afb ldr r3, [r7, #44] ; 0x2c
8004aaa: 3304 adds r3, #4
8004aac: 62fb str r3, [r7, #44] ; 0x2c
*scr = (((tempscr[0] & SDMMC_0TO7BITS) << 24) | ((tempscr[0] & SDMMC_8TO15BITS) << 8) |\
8004aae: 68bb ldr r3, [r7, #8]
8004ab0: 061a lsls r2, r3, #24
8004ab2: 68bb ldr r3, [r7, #8]
8004ab4: 021b lsls r3, r3, #8
8004ab6: f403 037f and.w r3, r3, #16711680 ; 0xff0000
8004aba: 431a orrs r2, r3
((tempscr[0] & SDMMC_16TO23BITS) >> 8) | ((tempscr[0] & SDMMC_24TO31BITS) >> 24));
8004abc: 68bb ldr r3, [r7, #8]
8004abe: 0a1b lsrs r3, r3, #8
8004ac0: f403 437f and.w r3, r3, #65280 ; 0xff00
*scr = (((tempscr[0] & SDMMC_0TO7BITS) << 24) | ((tempscr[0] & SDMMC_8TO15BITS) << 8) |\
8004ac4: 431a orrs r2, r3
((tempscr[0] & SDMMC_16TO23BITS) >> 8) | ((tempscr[0] & SDMMC_24TO31BITS) >> 24));
8004ac6: 68bb ldr r3, [r7, #8]
8004ac8: 0e1b lsrs r3, r3, #24
8004aca: 431a orrs r2, r3
*scr = (((tempscr[0] & SDMMC_0TO7BITS) << 24) | ((tempscr[0] & SDMMC_8TO15BITS) << 8) |\
8004acc: 6afb ldr r3, [r7, #44] ; 0x2c
8004ace: 601a str r2, [r3, #0]
}
return HAL_SD_ERROR_NONE;
8004ad0: 2300 movs r3, #0
}
8004ad2: 4618 mov r0, r3
8004ad4: 373c adds r7, #60 ; 0x3c
8004ad6: 46bd mov sp, r7
8004ad8: bd90 pop {r4, r7, pc}
08004ada <SDIO_Init>:
* @param SDIOx: Pointer to SDMMC register base
* @param Init: SDMMC initialization structure
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
{
8004ada: b084 sub sp, #16
8004adc: b480 push {r7}
8004ade: b085 sub sp, #20
8004ae0: af00 add r7, sp, #0
8004ae2: 6078 str r0, [r7, #4]
8004ae4: f107 001c add.w r0, r7, #28
8004ae8: e880 000e stmia.w r0, {r1, r2, r3}
uint32_t tmpreg = 0;
8004aec: 2300 movs r3, #0
8004aee: 60fb str r3, [r7, #12]
assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
/* Set SDMMC configuration parameters */
tmpreg |= (Init.ClockEdge |\
8004af0: 69fa ldr r2, [r7, #28]
Init.ClockBypass |\
8004af2: 6a3b ldr r3, [r7, #32]
tmpreg |= (Init.ClockEdge |\
8004af4: 431a orrs r2, r3
Init.ClockPowerSave |\
8004af6: 6a7b ldr r3, [r7, #36] ; 0x24
Init.ClockBypass |\
8004af8: 431a orrs r2, r3
Init.BusWide |\
8004afa: 6abb ldr r3, [r7, #40] ; 0x28
Init.ClockPowerSave |\
8004afc: 431a orrs r2, r3
Init.HardwareFlowControl |\
8004afe: 6afb ldr r3, [r7, #44] ; 0x2c
Init.BusWide |\
8004b00: 431a orrs r2, r3
Init.ClockDiv
8004b02: 6b3b ldr r3, [r7, #48] ; 0x30
Init.HardwareFlowControl |\
8004b04: 4313 orrs r3, r2
tmpreg |= (Init.ClockEdge |\
8004b06: 68fa ldr r2, [r7, #12]
8004b08: 4313 orrs r3, r2
8004b0a: 60fb str r3, [r7, #12]
);
/* Write to SDMMC CLKCR */
MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
8004b0c: 687b ldr r3, [r7, #4]
8004b0e: 685b ldr r3, [r3, #4]
8004b10: f423 43fd bic.w r3, r3, #32384 ; 0x7e80
8004b14: f023 037f bic.w r3, r3, #127 ; 0x7f
8004b18: 68fa ldr r2, [r7, #12]
8004b1a: 431a orrs r2, r3
8004b1c: 687b ldr r3, [r7, #4]
8004b1e: 605a str r2, [r3, #4]
return HAL_OK;
8004b20: 2300 movs r3, #0
}
8004b22: 4618 mov r0, r3
8004b24: 3714 adds r7, #20
8004b26: 46bd mov sp, r7
8004b28: bc80 pop {r7}
8004b2a: b004 add sp, #16
8004b2c: 4770 bx lr
08004b2e <SDIO_ReadFIFO>:
* @brief Read data (word) from Rx FIFO in blocking mode (polling)
* @param SDIOx: Pointer to SDMMC register base
* @retval HAL status
*/
uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
{
8004b2e: b480 push {r7}
8004b30: b083 sub sp, #12
8004b32: af00 add r7, sp, #0
8004b34: 6078 str r0, [r7, #4]
/* Read data from Rx FIFO */
return (SDIOx->FIFO);
8004b36: 687b ldr r3, [r7, #4]
8004b38: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80
}
8004b3c: 4618 mov r0, r3
8004b3e: 370c adds r7, #12
8004b40: 46bd mov sp, r7
8004b42: bc80 pop {r7}
8004b44: 4770 bx lr
08004b46 <SDIO_WriteFIFO>:
* @param SDIOx: Pointer to SDMMC register base
* @param pWriteData: pointer to data to write
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
{
8004b46: b480 push {r7}
8004b48: b083 sub sp, #12
8004b4a: af00 add r7, sp, #0
8004b4c: 6078 str r0, [r7, #4]
8004b4e: 6039 str r1, [r7, #0]
/* Write data to FIFO */
SDIOx->FIFO = *pWriteData;
8004b50: 683b ldr r3, [r7, #0]
8004b52: 681a ldr r2, [r3, #0]
8004b54: 687b ldr r3, [r7, #4]
8004b56: f8c3 2080 str.w r2, [r3, #128] ; 0x80
return HAL_OK;
8004b5a: 2300 movs r3, #0
}
8004b5c: 4618 mov r0, r3
8004b5e: 370c adds r7, #12
8004b60: 46bd mov sp, r7
8004b62: bc80 pop {r7}
8004b64: 4770 bx lr
08004b66 <SDIO_PowerState_ON>:
* @brief Set SDMMC Power state to ON.
* @param SDIOx: Pointer to SDMMC register base
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
{
8004b66: b580 push {r7, lr}
8004b68: b082 sub sp, #8
8004b6a: af00 add r7, sp, #0
8004b6c: 6078 str r0, [r7, #4]
/* Set power state to ON */
SDIOx->POWER = SDIO_POWER_PWRCTRL;
8004b6e: 687b ldr r3, [r7, #4]
8004b70: 2203 movs r2, #3
8004b72: 601a str r2, [r3, #0]
/* 1ms: required power up waiting time before starting the SD initialization
sequence */
HAL_Delay(2);
8004b74: 2002 movs r0, #2
8004b76: f7fb ff07 bl 8000988 <HAL_Delay>
return HAL_OK;
8004b7a: 2300 movs r3, #0
}
8004b7c: 4618 mov r0, r3
8004b7e: 3708 adds r7, #8
8004b80: 46bd mov sp, r7
8004b82: bd80 pop {r7, pc}
08004b84 <SDIO_PowerState_OFF>:
* @brief Set SDMMC Power state to OFF.
* @param SDIOx: Pointer to SDMMC register base
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
{
8004b84: b480 push {r7}
8004b86: b083 sub sp, #12
8004b88: af00 add r7, sp, #0
8004b8a: 6078 str r0, [r7, #4]
/* Set power state to OFF */
SDIOx->POWER = (uint32_t)0x00000000;
8004b8c: 687b ldr r3, [r7, #4]
8004b8e: 2200 movs r2, #0
8004b90: 601a str r2, [r3, #0]
return HAL_OK;
8004b92: 2300 movs r3, #0
}
8004b94: 4618 mov r0, r3
8004b96: 370c adds r7, #12
8004b98: 46bd mov sp, r7
8004b9a: bc80 pop {r7}
8004b9c: 4770 bx lr
08004b9e <SDIO_GetPowerState>:
* - 0x00: Power OFF
* - 0x02: Power UP
* - 0x03: Power ON
*/
uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
{
8004b9e: b480 push {r7}
8004ba0: b083 sub sp, #12
8004ba2: af00 add r7, sp, #0
8004ba4: 6078 str r0, [r7, #4]
return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
8004ba6: 687b ldr r3, [r7, #4]
8004ba8: 681b ldr r3, [r3, #0]
8004baa: f003 0303 and.w r3, r3, #3
}
8004bae: 4618 mov r0, r3
8004bb0: 370c adds r7, #12
8004bb2: 46bd mov sp, r7
8004bb4: bc80 pop {r7}
8004bb6: 4770 bx lr
08004bb8 <SDIO_SendCommand>:
* @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
* the configuration information for the SDMMC command
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
{
8004bb8: b480 push {r7}
8004bba: b085 sub sp, #20
8004bbc: af00 add r7, sp, #0
8004bbe: 6078 str r0, [r7, #4]
8004bc0: 6039 str r1, [r7, #0]
uint32_t tmpreg = 0;
8004bc2: 2300 movs r3, #0
8004bc4: 60fb str r3, [r7, #12]
assert_param(IS_SDIO_RESPONSE(Command->Response));
assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
assert_param(IS_SDIO_CPSM(Command->CPSM));
/* Set the SDMMC Argument value */
SDIOx->ARG = Command->Argument;
8004bc6: 683b ldr r3, [r7, #0]
8004bc8: 681a ldr r2, [r3, #0]
8004bca: 687b ldr r3, [r7, #4]
8004bcc: 609a str r2, [r3, #8]
/* Set SDMMC command parameters */
tmpreg |= (uint32_t)(Command->CmdIndex |\
8004bce: 683b ldr r3, [r7, #0]
8004bd0: 685a ldr r2, [r3, #4]
Command->Response |\
8004bd2: 683b ldr r3, [r7, #0]
8004bd4: 689b ldr r3, [r3, #8]
tmpreg |= (uint32_t)(Command->CmdIndex |\
8004bd6: 431a orrs r2, r3
Command->WaitForInterrupt |\
8004bd8: 683b ldr r3, [r7, #0]
8004bda: 68db ldr r3, [r3, #12]
Command->Response |\
8004bdc: 431a orrs r2, r3
Command->CPSM);
8004bde: 683b ldr r3, [r7, #0]
8004be0: 691b ldr r3, [r3, #16]
Command->WaitForInterrupt |\
8004be2: 4313 orrs r3, r2
tmpreg |= (uint32_t)(Command->CmdIndex |\
8004be4: 68fa ldr r2, [r7, #12]
8004be6: 4313 orrs r3, r2
8004be8: 60fb str r3, [r7, #12]
/* Write to SDMMC CMD register */
MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
8004bea: 687b ldr r3, [r7, #4]
8004bec: 68db ldr r3, [r3, #12]
8004bee: f423 637f bic.w r3, r3, #4080 ; 0xff0
8004bf2: f023 030f bic.w r3, r3, #15
8004bf6: 68fa ldr r2, [r7, #12]
8004bf8: 431a orrs r2, r3
8004bfa: 687b ldr r3, [r7, #4]
8004bfc: 60da str r2, [r3, #12]
return HAL_OK;
8004bfe: 2300 movs r3, #0
}
8004c00: 4618 mov r0, r3
8004c02: 3714 adds r7, #20
8004c04: 46bd mov sp, r7
8004c06: bc80 pop {r7}
8004c08: 4770 bx lr
08004c0a <SDIO_GetCommandResponse>:
* @brief Return the command index of last command for which response received
* @param SDIOx: Pointer to SDMMC register base
* @retval Command index of the last command response received
*/
uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
{
8004c0a: b480 push {r7}
8004c0c: b083 sub sp, #12
8004c0e: af00 add r7, sp, #0
8004c10: 6078 str r0, [r7, #4]
return (uint8_t)(SDIOx->RESPCMD);
8004c12: 687b ldr r3, [r7, #4]
8004c14: 691b ldr r3, [r3, #16]
8004c16: b2db uxtb r3, r3
}
8004c18: 4618 mov r0, r3
8004c1a: 370c adds r7, #12
8004c1c: 46bd mov sp, r7
8004c1e: bc80 pop {r7}
8004c20: 4770 bx lr
08004c22 <SDIO_GetResponse>:
* @arg SDIO_RESP3: Response Register 3
* @arg SDIO_RESP4: Response Register 4
* @retval The Corresponding response register value
*/
uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
{
8004c22: b480 push {r7}
8004c24: b085 sub sp, #20
8004c26: af00 add r7, sp, #0
8004c28: 6078 str r0, [r7, #4]
8004c2a: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_SDIO_RESP(Response));
/* Get the response */
tmp = (uint32_t)(&(SDIOx->RESP1)) + Response;
8004c2c: 687b ldr r3, [r7, #4]
8004c2e: 3314 adds r3, #20
8004c30: 461a mov r2, r3
8004c32: 683b ldr r3, [r7, #0]
8004c34: 4413 add r3, r2
8004c36: 60fb str r3, [r7, #12]
return (*(__IO uint32_t *) tmp);
8004c38: 68fb ldr r3, [r7, #12]
8004c3a: 681b ldr r3, [r3, #0]
}
8004c3c: 4618 mov r0, r3
8004c3e: 3714 adds r7, #20
8004c40: 46bd mov sp, r7
8004c42: bc80 pop {r7}
8004c44: 4770 bx lr
08004c46 <SDIO_ConfigData>:
* @param Data : pointer to a SDIO_DataInitTypeDef structure
* that contains the configuration information for the SDMMC data.
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
{
8004c46: b480 push {r7}
8004c48: b085 sub sp, #20
8004c4a: af00 add r7, sp, #0
8004c4c: 6078 str r0, [r7, #4]
8004c4e: 6039 str r1, [r7, #0]
uint32_t tmpreg = 0;
8004c50: 2300 movs r3, #0
8004c52: 60fb str r3, [r7, #12]
assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
assert_param(IS_SDIO_DPSM(Data->DPSM));
/* Set the SDMMC Data TimeOut value */
SDIOx->DTIMER = Data->DataTimeOut;
8004c54: 683b ldr r3, [r7, #0]
8004c56: 681a ldr r2, [r3, #0]
8004c58: 687b ldr r3, [r7, #4]
8004c5a: 625a str r2, [r3, #36] ; 0x24
/* Set the SDMMC DataLength value */
SDIOx->DLEN = Data->DataLength;
8004c5c: 683b ldr r3, [r7, #0]
8004c5e: 685a ldr r2, [r3, #4]
8004c60: 687b ldr r3, [r7, #4]
8004c62: 629a str r2, [r3, #40] ; 0x28
/* Set the SDMMC data configuration parameters */
tmpreg |= (uint32_t)(Data->DataBlockSize |\
8004c64: 683b ldr r3, [r7, #0]
8004c66: 689a ldr r2, [r3, #8]
Data->TransferDir |\
8004c68: 683b ldr r3, [r7, #0]
8004c6a: 68db ldr r3, [r3, #12]
tmpreg |= (uint32_t)(Data->DataBlockSize |\
8004c6c: 431a orrs r2, r3
Data->TransferMode |\
8004c6e: 683b ldr r3, [r7, #0]
8004c70: 691b ldr r3, [r3, #16]
Data->TransferDir |\
8004c72: 431a orrs r2, r3
Data->DPSM);
8004c74: 683b ldr r3, [r7, #0]
8004c76: 695b ldr r3, [r3, #20]
Data->TransferMode |\
8004c78: 4313 orrs r3, r2
tmpreg |= (uint32_t)(Data->DataBlockSize |\
8004c7a: 68fa ldr r2, [r7, #12]
8004c7c: 4313 orrs r3, r2
8004c7e: 60fb str r3, [r7, #12]
/* Write to SDMMC DCTRL */
MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
8004c80: 687b ldr r3, [r7, #4]
8004c82: 6adb ldr r3, [r3, #44] ; 0x2c
8004c84: f023 02f7 bic.w r2, r3, #247 ; 0xf7
8004c88: 68fb ldr r3, [r7, #12]
8004c8a: 431a orrs r2, r3
8004c8c: 687b ldr r3, [r7, #4]
8004c8e: 62da str r2, [r3, #44] ; 0x2c
return HAL_OK;
8004c90: 2300 movs r3, #0
}
8004c92: 4618 mov r0, r3
8004c94: 3714 adds r7, #20
8004c96: 46bd mov sp, r7
8004c98: bc80 pop {r7}
8004c9a: 4770 bx lr
08004c9c <SDMMC_CmdBlockLength>:
* @brief Send the Data Block Lenght command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
{
8004c9c: b580 push {r7, lr}
8004c9e: b088 sub sp, #32
8004ca0: af00 add r7, sp, #0
8004ca2: 6078 str r0, [r7, #4]
8004ca4: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
8004ca6: 683b ldr r3, [r7, #0]
8004ca8: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
8004caa: 2310 movs r3, #16
8004cac: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004cae: 2340 movs r3, #64 ; 0x40
8004cb0: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004cb2: 2300 movs r3, #0
8004cb4: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004cb6: f44f 6380 mov.w r3, #1024 ; 0x400
8004cba: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004cbc: f107 0308 add.w r3, r7, #8
8004cc0: 4619 mov r1, r3
8004cc2: 6878 ldr r0, [r7, #4]
8004cc4: f7ff ff78 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
8004cc8: f241 3288 movw r2, #5000 ; 0x1388
8004ccc: 2110 movs r1, #16
8004cce: 6878 ldr r0, [r7, #4]
8004cd0: f000 fa1e bl 8005110 <SDMMC_GetCmdResp1>
8004cd4: 61f8 str r0, [r7, #28]
return errorstate;
8004cd6: 69fb ldr r3, [r7, #28]
}
8004cd8: 4618 mov r0, r3
8004cda: 3720 adds r7, #32
8004cdc: 46bd mov sp, r7
8004cde: bd80 pop {r7, pc}
08004ce0 <SDMMC_CmdReadSingleBlock>:
* @brief Send the Read Single Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
{
8004ce0: b580 push {r7, lr}
8004ce2: b088 sub sp, #32
8004ce4: af00 add r7, sp, #0
8004ce6: 6078 str r0, [r7, #4]
8004ce8: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
8004cea: 683b ldr r3, [r7, #0]
8004cec: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
8004cee: 2311 movs r3, #17
8004cf0: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004cf2: 2340 movs r3, #64 ; 0x40
8004cf4: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004cf6: 2300 movs r3, #0
8004cf8: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004cfa: f44f 6380 mov.w r3, #1024 ; 0x400
8004cfe: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004d00: f107 0308 add.w r3, r7, #8
8004d04: 4619 mov r1, r3
8004d06: 6878 ldr r0, [r7, #4]
8004d08: f7ff ff56 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
8004d0c: f241 3288 movw r2, #5000 ; 0x1388
8004d10: 2111 movs r1, #17
8004d12: 6878 ldr r0, [r7, #4]
8004d14: f000 f9fc bl 8005110 <SDMMC_GetCmdResp1>
8004d18: 61f8 str r0, [r7, #28]
return errorstate;
8004d1a: 69fb ldr r3, [r7, #28]
}
8004d1c: 4618 mov r0, r3
8004d1e: 3720 adds r7, #32
8004d20: 46bd mov sp, r7
8004d22: bd80 pop {r7, pc}
08004d24 <SDMMC_CmdReadMultiBlock>:
* @brief Send the Read Multi Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
{
8004d24: b580 push {r7, lr}
8004d26: b088 sub sp, #32
8004d28: af00 add r7, sp, #0
8004d2a: 6078 str r0, [r7, #4]
8004d2c: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
8004d2e: 683b ldr r3, [r7, #0]
8004d30: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
8004d32: 2312 movs r3, #18
8004d34: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004d36: 2340 movs r3, #64 ; 0x40
8004d38: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004d3a: 2300 movs r3, #0
8004d3c: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004d3e: f44f 6380 mov.w r3, #1024 ; 0x400
8004d42: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004d44: f107 0308 add.w r3, r7, #8
8004d48: 4619 mov r1, r3
8004d4a: 6878 ldr r0, [r7, #4]
8004d4c: f7ff ff34 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
8004d50: f241 3288 movw r2, #5000 ; 0x1388
8004d54: 2112 movs r1, #18
8004d56: 6878 ldr r0, [r7, #4]
8004d58: f000 f9da bl 8005110 <SDMMC_GetCmdResp1>
8004d5c: 61f8 str r0, [r7, #28]
return errorstate;
8004d5e: 69fb ldr r3, [r7, #28]
}
8004d60: 4618 mov r0, r3
8004d62: 3720 adds r7, #32
8004d64: 46bd mov sp, r7
8004d66: bd80 pop {r7, pc}
08004d68 <SDMMC_CmdWriteSingleBlock>:
* @brief Send the Write Single Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
{
8004d68: b580 push {r7, lr}
8004d6a: b088 sub sp, #32
8004d6c: af00 add r7, sp, #0
8004d6e: 6078 str r0, [r7, #4]
8004d70: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
8004d72: 683b ldr r3, [r7, #0]
8004d74: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
8004d76: 2318 movs r3, #24
8004d78: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004d7a: 2340 movs r3, #64 ; 0x40
8004d7c: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004d7e: 2300 movs r3, #0
8004d80: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004d82: f44f 6380 mov.w r3, #1024 ; 0x400
8004d86: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004d88: f107 0308 add.w r3, r7, #8
8004d8c: 4619 mov r1, r3
8004d8e: 6878 ldr r0, [r7, #4]
8004d90: f7ff ff12 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
8004d94: f241 3288 movw r2, #5000 ; 0x1388
8004d98: 2118 movs r1, #24
8004d9a: 6878 ldr r0, [r7, #4]
8004d9c: f000 f9b8 bl 8005110 <SDMMC_GetCmdResp1>
8004da0: 61f8 str r0, [r7, #28]
return errorstate;
8004da2: 69fb ldr r3, [r7, #28]
}
8004da4: 4618 mov r0, r3
8004da6: 3720 adds r7, #32
8004da8: 46bd mov sp, r7
8004daa: bd80 pop {r7, pc}
08004dac <SDMMC_CmdWriteMultiBlock>:
* @brief Send the Write Multi Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
{
8004dac: b580 push {r7, lr}
8004dae: b088 sub sp, #32
8004db0: af00 add r7, sp, #0
8004db2: 6078 str r0, [r7, #4]
8004db4: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
8004db6: 683b ldr r3, [r7, #0]
8004db8: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
8004dba: 2319 movs r3, #25
8004dbc: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004dbe: 2340 movs r3, #64 ; 0x40
8004dc0: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004dc2: 2300 movs r3, #0
8004dc4: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004dc6: f44f 6380 mov.w r3, #1024 ; 0x400
8004dca: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004dcc: f107 0308 add.w r3, r7, #8
8004dd0: 4619 mov r1, r3
8004dd2: 6878 ldr r0, [r7, #4]
8004dd4: f7ff fef0 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
8004dd8: f241 3288 movw r2, #5000 ; 0x1388
8004ddc: 2119 movs r1, #25
8004dde: 6878 ldr r0, [r7, #4]
8004de0: f000 f996 bl 8005110 <SDMMC_GetCmdResp1>
8004de4: 61f8 str r0, [r7, #28]
return errorstate;
8004de6: 69fb ldr r3, [r7, #28]
}
8004de8: 4618 mov r0, r3
8004dea: 3720 adds r7, #32
8004dec: 46bd mov sp, r7
8004dee: bd80 pop {r7, pc}
08004df0 <SDMMC_CmdStopTransfer>:
* @brief Send the Stop Transfer command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
{
8004df0: b580 push {r7, lr}
8004df2: b088 sub sp, #32
8004df4: af00 add r7, sp, #0
8004df6: 6078 str r0, [r7, #4]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD12 STOP_TRANSMISSION */
sdmmc_cmdinit.Argument = 0U;
8004df8: 2300 movs r3, #0
8004dfa: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
8004dfc: 230c movs r3, #12
8004dfe: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004e00: 2340 movs r3, #64 ; 0x40
8004e02: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004e04: 2300 movs r3, #0
8004e06: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004e08: f44f 6380 mov.w r3, #1024 ; 0x400
8004e0c: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004e0e: f107 0308 add.w r3, r7, #8
8004e12: 4619 mov r1, r3
8004e14: 6878 ldr r0, [r7, #4]
8004e16: f7ff fecf bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, SDIO_STOPTRANSFERTIMEOUT);
8004e1a: 4a05 ldr r2, [pc, #20] ; (8004e30 <SDMMC_CmdStopTransfer+0x40>)
8004e1c: 210c movs r1, #12
8004e1e: 6878 ldr r0, [r7, #4]
8004e20: f000 f976 bl 8005110 <SDMMC_GetCmdResp1>
8004e24: 61f8 str r0, [r7, #28]
return errorstate;
8004e26: 69fb ldr r3, [r7, #28]
}
8004e28: 4618 mov r0, r3
8004e2a: 3720 adds r7, #32
8004e2c: 46bd mov sp, r7
8004e2e: bd80 pop {r7, pc}
8004e30: 05f5e100 .word 0x05f5e100
08004e34 <SDMMC_CmdSelDesel>:
* @param SDIOx: Pointer to SDIO register base
* @param addr: Address of the card to be selected
* @retval HAL status
*/
uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
{
8004e34: b580 push {r7, lr}
8004e36: b08a sub sp, #40 ; 0x28
8004e38: af00 add r7, sp, #0
8004e3a: 60f8 str r0, [r7, #12]
8004e3c: e9c7 2300 strd r2, r3, [r7]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD7 SDMMC_SEL_DESEL_CARD */
sdmmc_cmdinit.Argument = (uint32_t)Addr;
8004e40: 683b ldr r3, [r7, #0]
8004e42: 613b str r3, [r7, #16]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
8004e44: 2307 movs r3, #7
8004e46: 617b str r3, [r7, #20]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004e48: 2340 movs r3, #64 ; 0x40
8004e4a: 61bb str r3, [r7, #24]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004e4c: 2300 movs r3, #0
8004e4e: 61fb str r3, [r7, #28]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004e50: f44f 6380 mov.w r3, #1024 ; 0x400
8004e54: 623b str r3, [r7, #32]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004e56: f107 0310 add.w r3, r7, #16
8004e5a: 4619 mov r1, r3
8004e5c: 68f8 ldr r0, [r7, #12]
8004e5e: f7ff feab bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
8004e62: f241 3288 movw r2, #5000 ; 0x1388
8004e66: 2107 movs r1, #7
8004e68: 68f8 ldr r0, [r7, #12]
8004e6a: f000 f951 bl 8005110 <SDMMC_GetCmdResp1>
8004e6e: 6278 str r0, [r7, #36] ; 0x24
return errorstate;
8004e70: 6a7b ldr r3, [r7, #36] ; 0x24
}
8004e72: 4618 mov r0, r3
8004e74: 3728 adds r7, #40 ; 0x28
8004e76: 46bd mov sp, r7
8004e78: bd80 pop {r7, pc}
08004e7a <SDMMC_CmdGoIdleState>:
* @brief Send the Go Idle State command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
{
8004e7a: b580 push {r7, lr}
8004e7c: b088 sub sp, #32
8004e7e: af00 add r7, sp, #0
8004e80: 6078 str r0, [r7, #4]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
sdmmc_cmdinit.Argument = 0U;
8004e82: 2300 movs r3, #0
8004e84: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
8004e86: 2300 movs r3, #0
8004e88: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_NO;
8004e8a: 2300 movs r3, #0
8004e8c: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004e8e: 2300 movs r3, #0
8004e90: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004e92: f44f 6380 mov.w r3, #1024 ; 0x400
8004e96: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004e98: f107 0308 add.w r3, r7, #8
8004e9c: 4619 mov r1, r3
8004e9e: 6878 ldr r0, [r7, #4]
8004ea0: f7ff fe8a bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdError(SDIOx);
8004ea4: 6878 ldr r0, [r7, #4]
8004ea6: f000 f90b bl 80050c0 <SDMMC_GetCmdError>
8004eaa: 61f8 str r0, [r7, #28]
return errorstate;
8004eac: 69fb ldr r3, [r7, #28]
}
8004eae: 4618 mov r0, r3
8004eb0: 3720 adds r7, #32
8004eb2: 46bd mov sp, r7
8004eb4: bd80 pop {r7, pc}
08004eb6 <SDMMC_CmdOperCond>:
* @brief Send the Operating Condition command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
{
8004eb6: b580 push {r7, lr}
8004eb8: b088 sub sp, #32
8004eba: af00 add r7, sp, #0
8004ebc: 6078 str r0, [r7, #4]
/* Send CMD8 to verify SD card interface operating condition */
/* Argument: - [31:12]: Reserved (shall be set to '0')
- [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
- [7:0]: Check Pattern (recommended 0xAA) */
/* CMD Response: R7 */
sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
8004ebe: f44f 73d5 mov.w r3, #426 ; 0x1aa
8004ec2: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
8004ec4: 2308 movs r3, #8
8004ec6: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004ec8: 2340 movs r3, #64 ; 0x40
8004eca: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004ecc: 2300 movs r3, #0
8004ece: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004ed0: f44f 6380 mov.w r3, #1024 ; 0x400
8004ed4: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004ed6: f107 0308 add.w r3, r7, #8
8004eda: 4619 mov r1, r3
8004edc: 6878 ldr r0, [r7, #4]
8004ede: f7ff fe6b bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp7(SDIOx);
8004ee2: 6878 ldr r0, [r7, #4]
8004ee4: f000 faf4 bl 80054d0 <SDMMC_GetCmdResp7>
8004ee8: 61f8 str r0, [r7, #28]
return errorstate;
8004eea: 69fb ldr r3, [r7, #28]
}
8004eec: 4618 mov r0, r3
8004eee: 3720 adds r7, #32
8004ef0: 46bd mov sp, r7
8004ef2: bd80 pop {r7, pc}
08004ef4 <SDMMC_CmdAppCommand>:
* @param SDIOx: Pointer to SDIO register base
* @param Argument: Command Argument
* @retval HAL status
*/
uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
8004ef4: b580 push {r7, lr}
8004ef6: b088 sub sp, #32
8004ef8: af00 add r7, sp, #0
8004efa: 6078 str r0, [r7, #4]
8004efc: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
sdmmc_cmdinit.Argument = (uint32_t)Argument;
8004efe: 683b ldr r3, [r7, #0]
8004f00: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
8004f02: 2337 movs r3, #55 ; 0x37
8004f04: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004f06: 2340 movs r3, #64 ; 0x40
8004f08: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004f0a: 2300 movs r3, #0
8004f0c: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004f0e: f44f 6380 mov.w r3, #1024 ; 0x400
8004f12: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004f14: f107 0308 add.w r3, r7, #8
8004f18: 4619 mov r1, r3
8004f1a: 6878 ldr r0, [r7, #4]
8004f1c: f7ff fe4c bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
/* If there is a HAL_ERROR, it is a MMC card, else
it is a SD card: SD card 2.0 (voltage range mismatch)
or SD card 1.x */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT);
8004f20: f241 3288 movw r2, #5000 ; 0x1388
8004f24: 2137 movs r1, #55 ; 0x37
8004f26: 6878 ldr r0, [r7, #4]
8004f28: f000 f8f2 bl 8005110 <SDMMC_GetCmdResp1>
8004f2c: 61f8 str r0, [r7, #28]
return errorstate;
8004f2e: 69fb ldr r3, [r7, #28]
}
8004f30: 4618 mov r0, r3
8004f32: 3720 adds r7, #32
8004f34: 46bd mov sp, r7
8004f36: bd80 pop {r7, pc}
08004f38 <SDMMC_CmdAppOperCommand>:
* @param SDIOx: Pointer to SDIO register base
* @param Argument: Command Argument
* @retval HAL status
*/
uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
8004f38: b580 push {r7, lr}
8004f3a: b088 sub sp, #32
8004f3c: af00 add r7, sp, #0
8004f3e: 6078 str r0, [r7, #4]
8004f40: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument;
8004f42: 683b ldr r3, [r7, #0]
8004f44: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8004f48: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
8004f4c: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
8004f4e: 2329 movs r3, #41 ; 0x29
8004f50: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004f52: 2340 movs r3, #64 ; 0x40
8004f54: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004f56: 2300 movs r3, #0
8004f58: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004f5a: f44f 6380 mov.w r3, #1024 ; 0x400
8004f5e: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004f60: f107 0308 add.w r3, r7, #8
8004f64: 4619 mov r1, r3
8004f66: 6878 ldr r0, [r7, #4]
8004f68: f7ff fe26 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp3(SDIOx);
8004f6c: 6878 ldr r0, [r7, #4]
8004f6e: f000 fa01 bl 8005374 <SDMMC_GetCmdResp3>
8004f72: 61f8 str r0, [r7, #28]
return errorstate;
8004f74: 69fb ldr r3, [r7, #28]
}
8004f76: 4618 mov r0, r3
8004f78: 3720 adds r7, #32
8004f7a: 46bd mov sp, r7
8004f7c: bd80 pop {r7, pc}
08004f7e <SDMMC_CmdBusWidth>:
* @param SDIOx: Pointer to SDIO register base
* @param BusWidth: BusWidth
* @retval HAL status
*/
uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
{
8004f7e: b580 push {r7, lr}
8004f80: b088 sub sp, #32
8004f82: af00 add r7, sp, #0
8004f84: 6078 str r0, [r7, #4]
8004f86: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
8004f88: 683b ldr r3, [r7, #0]
8004f8a: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
8004f8c: 2306 movs r3, #6
8004f8e: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004f90: 2340 movs r3, #64 ; 0x40
8004f92: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004f94: 2300 movs r3, #0
8004f96: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004f98: f44f 6380 mov.w r3, #1024 ; 0x400
8004f9c: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004f9e: f107 0308 add.w r3, r7, #8
8004fa2: 4619 mov r1, r3
8004fa4: 6878 ldr r0, [r7, #4]
8004fa6: f7ff fe07 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
8004faa: f241 3288 movw r2, #5000 ; 0x1388
8004fae: 2106 movs r1, #6
8004fb0: 6878 ldr r0, [r7, #4]
8004fb2: f000 f8ad bl 8005110 <SDMMC_GetCmdResp1>
8004fb6: 61f8 str r0, [r7, #28]
return errorstate;
8004fb8: 69fb ldr r3, [r7, #28]
}
8004fba: 4618 mov r0, r3
8004fbc: 3720 adds r7, #32
8004fbe: 46bd mov sp, r7
8004fc0: bd80 pop {r7, pc}
08004fc2 <SDMMC_CmdSendSCR>:
* @brief Send the Send SCR command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
{
8004fc2: b580 push {r7, lr}
8004fc4: b088 sub sp, #32
8004fc6: af00 add r7, sp, #0
8004fc8: 6078 str r0, [r7, #4]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD51 SD_APP_SEND_SCR */
sdmmc_cmdinit.Argument = 0U;
8004fca: 2300 movs r3, #0
8004fcc: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
8004fce: 2333 movs r3, #51 ; 0x33
8004fd0: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8004fd2: 2340 movs r3, #64 ; 0x40
8004fd4: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8004fd6: 2300 movs r3, #0
8004fd8: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8004fda: f44f 6380 mov.w r3, #1024 ; 0x400
8004fde: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8004fe0: f107 0308 add.w r3, r7, #8
8004fe4: 4619 mov r1, r3
8004fe6: 6878 ldr r0, [r7, #4]
8004fe8: f7ff fde6 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
8004fec: f241 3288 movw r2, #5000 ; 0x1388
8004ff0: 2133 movs r1, #51 ; 0x33
8004ff2: 6878 ldr r0, [r7, #4]
8004ff4: f000 f88c bl 8005110 <SDMMC_GetCmdResp1>
8004ff8: 61f8 str r0, [r7, #28]
return errorstate;
8004ffa: 69fb ldr r3, [r7, #28]
}
8004ffc: 4618 mov r0, r3
8004ffe: 3720 adds r7, #32
8005000: 46bd mov sp, r7
8005002: bd80 pop {r7, pc}
08005004 <SDMMC_CmdSendCID>:
* @brief Send the Send CID command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
{
8005004: b580 push {r7, lr}
8005006: b088 sub sp, #32
8005008: af00 add r7, sp, #0
800500a: 6078 str r0, [r7, #4]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD2 ALL_SEND_CID */
sdmmc_cmdinit.Argument = 0U;
800500c: 2300 movs r3, #0
800500e: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
8005010: 2302 movs r3, #2
8005012: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
8005014: 23c0 movs r3, #192 ; 0xc0
8005016: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8005018: 2300 movs r3, #0
800501a: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
800501c: f44f 6380 mov.w r3, #1024 ; 0x400
8005020: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8005022: f107 0308 add.w r3, r7, #8
8005026: 4619 mov r1, r3
8005028: 6878 ldr r0, [r7, #4]
800502a: f7ff fdc5 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp2(SDIOx);
800502e: 6878 ldr r0, [r7, #4]
8005030: f000 f95a bl 80052e8 <SDMMC_GetCmdResp2>
8005034: 61f8 str r0, [r7, #28]
return errorstate;
8005036: 69fb ldr r3, [r7, #28]
}
8005038: 4618 mov r0, r3
800503a: 3720 adds r7, #32
800503c: 46bd mov sp, r7
800503e: bd80 pop {r7, pc}
08005040 <SDMMC_CmdSendCSD>:
* @param SDIOx: Pointer to SDIO register base
* @param Argument: Command Argument
* @retval HAL status
*/
uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
8005040: b580 push {r7, lr}
8005042: b088 sub sp, #32
8005044: af00 add r7, sp, #0
8005046: 6078 str r0, [r7, #4]
8005048: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD9 SEND_CSD */
sdmmc_cmdinit.Argument = Argument;
800504a: 683b ldr r3, [r7, #0]
800504c: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
800504e: 2309 movs r3, #9
8005050: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
8005052: 23c0 movs r3, #192 ; 0xc0
8005054: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8005056: 2300 movs r3, #0
8005058: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
800505a: f44f 6380 mov.w r3, #1024 ; 0x400
800505e: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8005060: f107 0308 add.w r3, r7, #8
8005064: 4619 mov r1, r3
8005066: 6878 ldr r0, [r7, #4]
8005068: f7ff fda6 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp2(SDIOx);
800506c: 6878 ldr r0, [r7, #4]
800506e: f000 f93b bl 80052e8 <SDMMC_GetCmdResp2>
8005072: 61f8 str r0, [r7, #28]
return errorstate;
8005074: 69fb ldr r3, [r7, #28]
}
8005076: 4618 mov r0, r3
8005078: 3720 adds r7, #32
800507a: 46bd mov sp, r7
800507c: bd80 pop {r7, pc}
0800507e <SDMMC_CmdSetRelAdd>:
* @param SDIOx: Pointer to SDIO register base
* @param pRCA: Card RCA
* @retval HAL status
*/
uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
{
800507e: b580 push {r7, lr}
8005080: b088 sub sp, #32
8005082: af00 add r7, sp, #0
8005084: 6078 str r0, [r7, #4]
8005086: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD3 SD_CMD_SET_REL_ADDR */
sdmmc_cmdinit.Argument = 0U;
8005088: 2300 movs r3, #0
800508a: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
800508c: 2303 movs r3, #3
800508e: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8005090: 2340 movs r3, #64 ; 0x40
8005092: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8005094: 2300 movs r3, #0
8005096: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8005098: f44f 6380 mov.w r3, #1024 ; 0x400
800509c: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
800509e: f107 0308 add.w r3, r7, #8
80050a2: 4619 mov r1, r3
80050a4: 6878 ldr r0, [r7, #4]
80050a6: f7ff fd87 bl 8004bb8 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA);
80050aa: 683a ldr r2, [r7, #0]
80050ac: 2103 movs r1, #3
80050ae: 6878 ldr r0, [r7, #4]
80050b0: f000 f99a bl 80053e8 <SDMMC_GetCmdResp6>
80050b4: 61f8 str r0, [r7, #28]
return errorstate;
80050b6: 69fb ldr r3, [r7, #28]
}
80050b8: 4618 mov r0, r3
80050ba: 3720 adds r7, #32
80050bc: 46bd mov sp, r7
80050be: bd80 pop {r7, pc}
080050c0 <SDMMC_GetCmdError>:
* @brief Checks for error conditions for CMD0.
* @param hsd: SD handle
* @retval SD Card error state
*/
static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
{
80050c0: b490 push {r4, r7}
80050c2: b082 sub sp, #8
80050c4: af00 add r7, sp, #0
80050c6: 6078 str r0, [r7, #4]
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
80050c8: 4b0f ldr r3, [pc, #60] ; (8005108 <SDMMC_GetCmdError+0x48>)
80050ca: 681b ldr r3, [r3, #0]
80050cc: 4a0f ldr r2, [pc, #60] ; (800510c <SDMMC_GetCmdError+0x4c>)
80050ce: fba2 2303 umull r2, r3, r2, r3
80050d2: 0a5b lsrs r3, r3, #9
80050d4: f241 3288 movw r2, #5000 ; 0x1388
80050d8: fb02 f403 mul.w r4, r2, r3
do
{
if (count-- == 0U)
80050dc: 4623 mov r3, r4
80050de: 1e5c subs r4, r3, #1
80050e0: 2b00 cmp r3, #0
80050e2: d102 bne.n 80050ea <SDMMC_GetCmdError+0x2a>
{
return SDMMC_ERROR_TIMEOUT;
80050e4: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
80050e8: e009 b.n 80050fe <SDMMC_GetCmdError+0x3e>
}
}while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
80050ea: 687b ldr r3, [r7, #4]
80050ec: 6b5b ldr r3, [r3, #52] ; 0x34
80050ee: f003 0380 and.w r3, r3, #128 ; 0x80
80050f2: 2b00 cmp r3, #0
80050f4: d0f2 beq.n 80050dc <SDMMC_GetCmdError+0x1c>
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
80050f6: 687b ldr r3, [r7, #4]
80050f8: 22c5 movs r2, #197 ; 0xc5
80050fa: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_NONE;
80050fc: 2300 movs r3, #0
}
80050fe: 4618 mov r0, r3
8005100: 3708 adds r7, #8
8005102: 46bd mov sp, r7
8005104: bc90 pop {r4, r7}
8005106: 4770 bx lr
8005108: 20000004 .word 0x20000004
800510c: 10624dd3 .word 0x10624dd3
08005110 <SDMMC_GetCmdResp1>:
* @param hsd: SD handle
* @param SD_CMD: The sent command index
* @retval SD Card error state
*/
static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
{
8005110: b590 push {r4, r7, lr}
8005112: b087 sub sp, #28
8005114: af00 add r7, sp, #0
8005116: 60f8 str r0, [r7, #12]
8005118: 460b mov r3, r1
800511a: 607a str r2, [r7, #4]
800511c: 72fb strb r3, [r7, #11]
uint32_t response_r1;
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The Timeout is expressed in ms */
register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
800511e: 4b6f ldr r3, [pc, #444] ; (80052dc <SDMMC_GetCmdResp1+0x1cc>)
8005120: 681b ldr r3, [r3, #0]
8005122: 4a6f ldr r2, [pc, #444] ; (80052e0 <SDMMC_GetCmdResp1+0x1d0>)
8005124: fba2 2303 umull r2, r3, r2, r3
8005128: 0a5b lsrs r3, r3, #9
800512a: 687a ldr r2, [r7, #4]
800512c: fb02 f403 mul.w r4, r2, r3
do
{
if (count-- == 0U)
8005130: 4623 mov r3, r4
8005132: 1e5c subs r4, r3, #1
8005134: 2b00 cmp r3, #0
8005136: d102 bne.n 800513e <SDMMC_GetCmdResp1+0x2e>
{
return SDMMC_ERROR_TIMEOUT;
8005138: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
800513c: e0c9 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
sta_reg = SDIOx->STA;
800513e: 68fb ldr r3, [r7, #12]
8005140: 6b5b ldr r3, [r3, #52] ; 0x34
8005142: 617b str r3, [r7, #20]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8005144: 697b ldr r3, [r7, #20]
8005146: f003 0345 and.w r3, r3, #69 ; 0x45
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
800514a: 2b00 cmp r3, #0
800514c: d0f0 beq.n 8005130 <SDMMC_GetCmdResp1+0x20>
800514e: 697b ldr r3, [r7, #20]
8005150: f403 6300 and.w r3, r3, #2048 ; 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8005154: 2b00 cmp r3, #0
8005156: d1eb bne.n 8005130 <SDMMC_GetCmdResp1+0x20>
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
8005158: 68fb ldr r3, [r7, #12]
800515a: 6b5b ldr r3, [r3, #52] ; 0x34
800515c: f003 0304 and.w r3, r3, #4
8005160: 2b00 cmp r3, #0
8005162: d004 beq.n 800516e <SDMMC_GetCmdResp1+0x5e>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
8005164: 68fb ldr r3, [r7, #12]
8005166: 2204 movs r2, #4
8005168: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
800516a: 2304 movs r3, #4
800516c: e0b1 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
800516e: 68fb ldr r3, [r7, #12]
8005170: 6b5b ldr r3, [r3, #52] ; 0x34
8005172: f003 0301 and.w r3, r3, #1
8005176: 2b00 cmp r3, #0
8005178: d004 beq.n 8005184 <SDMMC_GetCmdResp1+0x74>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
800517a: 68fb ldr r3, [r7, #12]
800517c: 2201 movs r2, #1
800517e: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_CRC_FAIL;
8005180: 2301 movs r3, #1
8005182: e0a6 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
{
/* Nothing to do */
}
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
8005184: 68fb ldr r3, [r7, #12]
8005186: 22c5 movs r2, #197 ; 0xc5
8005188: 639a str r2, [r3, #56] ; 0x38
/* Check response received is of desired command */
if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
800518a: 68f8 ldr r0, [r7, #12]
800518c: f7ff fd3d bl 8004c0a <SDIO_GetCommandResponse>
8005190: 4603 mov r3, r0
8005192: 461a mov r2, r3
8005194: 7afb ldrb r3, [r7, #11]
8005196: 4293 cmp r3, r2
8005198: d001 beq.n 800519e <SDMMC_GetCmdResp1+0x8e>
{
return SDMMC_ERROR_CMD_CRC_FAIL;
800519a: 2301 movs r3, #1
800519c: e099 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
/* We have received response, retrieve it for analysis */
response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
800519e: 2100 movs r1, #0
80051a0: 68f8 ldr r0, [r7, #12]
80051a2: f7ff fd3e bl 8004c22 <SDIO_GetResponse>
80051a6: 6138 str r0, [r7, #16]
if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
80051a8: 693a ldr r2, [r7, #16]
80051aa: 4b4e ldr r3, [pc, #312] ; (80052e4 <SDMMC_GetCmdResp1+0x1d4>)
80051ac: 4013 ands r3, r2
80051ae: 2b00 cmp r3, #0
80051b0: d101 bne.n 80051b6 <SDMMC_GetCmdResp1+0xa6>
{
return SDMMC_ERROR_NONE;
80051b2: 2300 movs r3, #0
80051b4: e08d b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
80051b6: 693b ldr r3, [r7, #16]
80051b8: 2b00 cmp r3, #0
80051ba: da02 bge.n 80051c2 <SDMMC_GetCmdResp1+0xb2>
{
return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
80051bc: f04f 7300 mov.w r3, #33554432 ; 0x2000000
80051c0: e087 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
80051c2: 693b ldr r3, [r7, #16]
80051c4: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000
80051c8: 2b00 cmp r3, #0
80051ca: d001 beq.n 80051d0 <SDMMC_GetCmdResp1+0xc0>
{
return SDMMC_ERROR_ADDR_MISALIGNED;
80051cc: 2340 movs r3, #64 ; 0x40
80051ce: e080 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
80051d0: 693b ldr r3, [r7, #16]
80051d2: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
80051d6: 2b00 cmp r3, #0
80051d8: d001 beq.n 80051de <SDMMC_GetCmdResp1+0xce>
{
return SDMMC_ERROR_BLOCK_LEN_ERR;
80051da: 2380 movs r3, #128 ; 0x80
80051dc: e079 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
80051de: 693b ldr r3, [r7, #16]
80051e0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80051e4: 2b00 cmp r3, #0
80051e6: d002 beq.n 80051ee <SDMMC_GetCmdResp1+0xde>
{
return SDMMC_ERROR_ERASE_SEQ_ERR;
80051e8: f44f 7380 mov.w r3, #256 ; 0x100
80051ec: e071 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
80051ee: 693b ldr r3, [r7, #16]
80051f0: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
80051f4: 2b00 cmp r3, #0
80051f6: d002 beq.n 80051fe <SDMMC_GetCmdResp1+0xee>
{
return SDMMC_ERROR_BAD_ERASE_PARAM;
80051f8: f44f 7300 mov.w r3, #512 ; 0x200
80051fc: e069 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
80051fe: 693b ldr r3, [r7, #16]
8005200: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
8005204: 2b00 cmp r3, #0
8005206: d002 beq.n 800520e <SDMMC_GetCmdResp1+0xfe>
{
return SDMMC_ERROR_WRITE_PROT_VIOLATION;
8005208: f44f 6380 mov.w r3, #1024 ; 0x400
800520c: e061 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
800520e: 693b ldr r3, [r7, #16]
8005210: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
8005214: 2b00 cmp r3, #0
8005216: d002 beq.n 800521e <SDMMC_GetCmdResp1+0x10e>
{
return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
8005218: f44f 6300 mov.w r3, #2048 ; 0x800
800521c: e059 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
800521e: 693b ldr r3, [r7, #16]
8005220: f403 0300 and.w r3, r3, #8388608 ; 0x800000
8005224: 2b00 cmp r3, #0
8005226: d002 beq.n 800522e <SDMMC_GetCmdResp1+0x11e>
{
return SDMMC_ERROR_COM_CRC_FAILED;
8005228: f44f 5380 mov.w r3, #4096 ; 0x1000
800522c: e051 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
800522e: 693b ldr r3, [r7, #16]
8005230: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8005234: 2b00 cmp r3, #0
8005236: d002 beq.n 800523e <SDMMC_GetCmdResp1+0x12e>
{
return SDMMC_ERROR_ILLEGAL_CMD;
8005238: f44f 5300 mov.w r3, #8192 ; 0x2000
800523c: e049 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
800523e: 693b ldr r3, [r7, #16]
8005240: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8005244: 2b00 cmp r3, #0
8005246: d002 beq.n 800524e <SDMMC_GetCmdResp1+0x13e>
{
return SDMMC_ERROR_CARD_ECC_FAILED;
8005248: f44f 4380 mov.w r3, #16384 ; 0x4000
800524c: e041 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
800524e: 693b ldr r3, [r7, #16]
8005250: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8005254: 2b00 cmp r3, #0
8005256: d002 beq.n 800525e <SDMMC_GetCmdResp1+0x14e>
{
return SDMMC_ERROR_CC_ERR;
8005258: f44f 4300 mov.w r3, #32768 ; 0x8000
800525c: e039 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
800525e: 693b ldr r3, [r7, #16]
8005260: f403 2380 and.w r3, r3, #262144 ; 0x40000
8005264: 2b00 cmp r3, #0
8005266: d002 beq.n 800526e <SDMMC_GetCmdResp1+0x15e>
{
return SDMMC_ERROR_STREAM_READ_UNDERRUN;
8005268: f44f 3300 mov.w r3, #131072 ; 0x20000
800526c: e031 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
800526e: 693b ldr r3, [r7, #16]
8005270: f403 3300 and.w r3, r3, #131072 ; 0x20000
8005274: 2b00 cmp r3, #0
8005276: d002 beq.n 800527e <SDMMC_GetCmdResp1+0x16e>
{
return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
8005278: f44f 2380 mov.w r3, #262144 ; 0x40000
800527c: e029 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
800527e: 693b ldr r3, [r7, #16]
8005280: f403 3380 and.w r3, r3, #65536 ; 0x10000
8005284: 2b00 cmp r3, #0
8005286: d002 beq.n 800528e <SDMMC_GetCmdResp1+0x17e>
{
return SDMMC_ERROR_CID_CSD_OVERWRITE;
8005288: f44f 2300 mov.w r3, #524288 ; 0x80000
800528c: e021 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
800528e: 693b ldr r3, [r7, #16]
8005290: f403 4300 and.w r3, r3, #32768 ; 0x8000
8005294: 2b00 cmp r3, #0
8005296: d002 beq.n 800529e <SDMMC_GetCmdResp1+0x18e>
{
return SDMMC_ERROR_WP_ERASE_SKIP;
8005298: f44f 1380 mov.w r3, #1048576 ; 0x100000
800529c: e019 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
800529e: 693b ldr r3, [r7, #16]
80052a0: f403 4380 and.w r3, r3, #16384 ; 0x4000
80052a4: 2b00 cmp r3, #0
80052a6: d002 beq.n 80052ae <SDMMC_GetCmdResp1+0x19e>
{
return SDMMC_ERROR_CARD_ECC_DISABLED;
80052a8: f44f 1300 mov.w r3, #2097152 ; 0x200000
80052ac: e011 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
80052ae: 693b ldr r3, [r7, #16]
80052b0: f403 5300 and.w r3, r3, #8192 ; 0x2000
80052b4: 2b00 cmp r3, #0
80052b6: d002 beq.n 80052be <SDMMC_GetCmdResp1+0x1ae>
{
return SDMMC_ERROR_ERASE_RESET;
80052b8: f44f 0380 mov.w r3, #4194304 ; 0x400000
80052bc: e009 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
80052be: 693b ldr r3, [r7, #16]
80052c0: f003 0308 and.w r3, r3, #8
80052c4: 2b00 cmp r3, #0
80052c6: d002 beq.n 80052ce <SDMMC_GetCmdResp1+0x1be>
{
return SDMMC_ERROR_AKE_SEQ_ERR;
80052c8: f44f 0300 mov.w r3, #8388608 ; 0x800000
80052cc: e001 b.n 80052d2 <SDMMC_GetCmdResp1+0x1c2>
}
else
{
return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
80052ce: f44f 3380 mov.w r3, #65536 ; 0x10000
}
}
80052d2: 4618 mov r0, r3
80052d4: 371c adds r7, #28
80052d6: 46bd mov sp, r7
80052d8: bd90 pop {r4, r7, pc}
80052da: bf00 nop
80052dc: 20000004 .word 0x20000004
80052e0: 10624dd3 .word 0x10624dd3
80052e4: fdffe008 .word 0xfdffe008
080052e8 <SDMMC_GetCmdResp2>:
* @brief Checks for error conditions for R2 (CID or CSD) response.
* @param hsd: SD handle
* @retval SD Card error state
*/
static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
{
80052e8: b490 push {r4, r7}
80052ea: b084 sub sp, #16
80052ec: af00 add r7, sp, #0
80052ee: 6078 str r0, [r7, #4]
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
80052f0: 4b1e ldr r3, [pc, #120] ; (800536c <SDMMC_GetCmdResp2+0x84>)
80052f2: 681b ldr r3, [r3, #0]
80052f4: 4a1e ldr r2, [pc, #120] ; (8005370 <SDMMC_GetCmdResp2+0x88>)
80052f6: fba2 2303 umull r2, r3, r2, r3
80052fa: 0a5b lsrs r3, r3, #9
80052fc: f241 3288 movw r2, #5000 ; 0x1388
8005300: fb02 f403 mul.w r4, r2, r3
do
{
if (count-- == 0U)
8005304: 4623 mov r3, r4
8005306: 1e5c subs r4, r3, #1
8005308: 2b00 cmp r3, #0
800530a: d102 bne.n 8005312 <SDMMC_GetCmdResp2+0x2a>
{
return SDMMC_ERROR_TIMEOUT;
800530c: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
8005310: e026 b.n 8005360 <SDMMC_GetCmdResp2+0x78>
}
sta_reg = SDIOx->STA;
8005312: 687b ldr r3, [r7, #4]
8005314: 6b5b ldr r3, [r3, #52] ; 0x34
8005316: 60fb str r3, [r7, #12]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8005318: 68fb ldr r3, [r7, #12]
800531a: f003 0345 and.w r3, r3, #69 ; 0x45
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
800531e: 2b00 cmp r3, #0
8005320: d0f0 beq.n 8005304 <SDMMC_GetCmdResp2+0x1c>
8005322: 68fb ldr r3, [r7, #12]
8005324: f403 6300 and.w r3, r3, #2048 ; 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8005328: 2b00 cmp r3, #0
800532a: d1eb bne.n 8005304 <SDMMC_GetCmdResp2+0x1c>
if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
800532c: 687b ldr r3, [r7, #4]
800532e: 6b5b ldr r3, [r3, #52] ; 0x34
8005330: f003 0304 and.w r3, r3, #4
8005334: 2b00 cmp r3, #0
8005336: d004 beq.n 8005342 <SDMMC_GetCmdResp2+0x5a>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
8005338: 687b ldr r3, [r7, #4]
800533a: 2204 movs r2, #4
800533c: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
800533e: 2304 movs r3, #4
8005340: e00e b.n 8005360 <SDMMC_GetCmdResp2+0x78>
}
else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
8005342: 687b ldr r3, [r7, #4]
8005344: 6b5b ldr r3, [r3, #52] ; 0x34
8005346: f003 0301 and.w r3, r3, #1
800534a: 2b00 cmp r3, #0
800534c: d004 beq.n 8005358 <SDMMC_GetCmdResp2+0x70>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
800534e: 687b ldr r3, [r7, #4]
8005350: 2201 movs r2, #1
8005352: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_CRC_FAIL;
8005354: 2301 movs r3, #1
8005356: e003 b.n 8005360 <SDMMC_GetCmdResp2+0x78>
}
else
{
/* No error flag set */
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
8005358: 687b ldr r3, [r7, #4]
800535a: 22c5 movs r2, #197 ; 0xc5
800535c: 639a str r2, [r3, #56] ; 0x38
}
return SDMMC_ERROR_NONE;
800535e: 2300 movs r3, #0
}
8005360: 4618 mov r0, r3
8005362: 3710 adds r7, #16
8005364: 46bd mov sp, r7
8005366: bc90 pop {r4, r7}
8005368: 4770 bx lr
800536a: bf00 nop
800536c: 20000004 .word 0x20000004
8005370: 10624dd3 .word 0x10624dd3
08005374 <SDMMC_GetCmdResp3>:
* @brief Checks for error conditions for R3 (OCR) response.
* @param hsd: SD handle
* @retval SD Card error state
*/
static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
{
8005374: b490 push {r4, r7}
8005376: b084 sub sp, #16
8005378: af00 add r7, sp, #0
800537a: 6078 str r0, [r7, #4]
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
800537c: 4b18 ldr r3, [pc, #96] ; (80053e0 <SDMMC_GetCmdResp3+0x6c>)
800537e: 681b ldr r3, [r3, #0]
8005380: 4a18 ldr r2, [pc, #96] ; (80053e4 <SDMMC_GetCmdResp3+0x70>)
8005382: fba2 2303 umull r2, r3, r2, r3
8005386: 0a5b lsrs r3, r3, #9
8005388: f241 3288 movw r2, #5000 ; 0x1388
800538c: fb02 f403 mul.w r4, r2, r3
do
{
if (count-- == 0U)
8005390: 4623 mov r3, r4
8005392: 1e5c subs r4, r3, #1
8005394: 2b00 cmp r3, #0
8005396: d102 bne.n 800539e <SDMMC_GetCmdResp3+0x2a>
{
return SDMMC_ERROR_TIMEOUT;
8005398: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
800539c: e01b b.n 80053d6 <SDMMC_GetCmdResp3+0x62>
}
sta_reg = SDIOx->STA;
800539e: 687b ldr r3, [r7, #4]
80053a0: 6b5b ldr r3, [r3, #52] ; 0x34
80053a2: 60fb str r3, [r7, #12]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
80053a4: 68fb ldr r3, [r7, #12]
80053a6: f003 0345 and.w r3, r3, #69 ; 0x45
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
80053aa: 2b00 cmp r3, #0
80053ac: d0f0 beq.n 8005390 <SDMMC_GetCmdResp3+0x1c>
80053ae: 68fb ldr r3, [r7, #12]
80053b0: f403 6300 and.w r3, r3, #2048 ; 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
80053b4: 2b00 cmp r3, #0
80053b6: d1eb bne.n 8005390 <SDMMC_GetCmdResp3+0x1c>
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
80053b8: 687b ldr r3, [r7, #4]
80053ba: 6b5b ldr r3, [r3, #52] ; 0x34
80053bc: f003 0304 and.w r3, r3, #4
80053c0: 2b00 cmp r3, #0
80053c2: d004 beq.n 80053ce <SDMMC_GetCmdResp3+0x5a>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
80053c4: 687b ldr r3, [r7, #4]
80053c6: 2204 movs r2, #4
80053c8: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
80053ca: 2304 movs r3, #4
80053cc: e003 b.n 80053d6 <SDMMC_GetCmdResp3+0x62>
}
else
{
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
80053ce: 687b ldr r3, [r7, #4]
80053d0: 22c5 movs r2, #197 ; 0xc5
80053d2: 639a str r2, [r3, #56] ; 0x38
}
return SDMMC_ERROR_NONE;
80053d4: 2300 movs r3, #0
}
80053d6: 4618 mov r0, r3
80053d8: 3710 adds r7, #16
80053da: 46bd mov sp, r7
80053dc: bc90 pop {r4, r7}
80053de: 4770 bx lr
80053e0: 20000004 .word 0x20000004
80053e4: 10624dd3 .word 0x10624dd3
080053e8 <SDMMC_GetCmdResp6>:
* @param pRCA: Pointer to the variable that will contain the SD card relative
* address RCA
* @retval SD Card error state
*/
static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
{
80053e8: b590 push {r4, r7, lr}
80053ea: b087 sub sp, #28
80053ec: af00 add r7, sp, #0
80053ee: 60f8 str r0, [r7, #12]
80053f0: 460b mov r3, r1
80053f2: 607a str r2, [r7, #4]
80053f4: 72fb strb r3, [r7, #11]
uint32_t response_r1;
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
80053f6: 4b34 ldr r3, [pc, #208] ; (80054c8 <SDMMC_GetCmdResp6+0xe0>)
80053f8: 681b ldr r3, [r3, #0]
80053fa: 4a34 ldr r2, [pc, #208] ; (80054cc <SDMMC_GetCmdResp6+0xe4>)
80053fc: fba2 2303 umull r2, r3, r2, r3
8005400: 0a5b lsrs r3, r3, #9
8005402: f241 3288 movw r2, #5000 ; 0x1388
8005406: fb02 f403 mul.w r4, r2, r3
do
{
if (count-- == 0U)
800540a: 4623 mov r3, r4
800540c: 1e5c subs r4, r3, #1
800540e: 2b00 cmp r3, #0
8005410: d102 bne.n 8005418 <SDMMC_GetCmdResp6+0x30>
{
return SDMMC_ERROR_TIMEOUT;
8005412: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
8005416: e052 b.n 80054be <SDMMC_GetCmdResp6+0xd6>
}
sta_reg = SDIOx->STA;
8005418: 68fb ldr r3, [r7, #12]
800541a: 6b5b ldr r3, [r3, #52] ; 0x34
800541c: 617b str r3, [r7, #20]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
800541e: 697b ldr r3, [r7, #20]
8005420: f003 0345 and.w r3, r3, #69 ; 0x45
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
8005424: 2b00 cmp r3, #0
8005426: d0f0 beq.n 800540a <SDMMC_GetCmdResp6+0x22>
8005428: 697b ldr r3, [r7, #20]
800542a: f403 6300 and.w r3, r3, #2048 ; 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
800542e: 2b00 cmp r3, #0
8005430: d1eb bne.n 800540a <SDMMC_GetCmdResp6+0x22>
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
8005432: 68fb ldr r3, [r7, #12]
8005434: 6b5b ldr r3, [r3, #52] ; 0x34
8005436: f003 0304 and.w r3, r3, #4
800543a: 2b00 cmp r3, #0
800543c: d004 beq.n 8005448 <SDMMC_GetCmdResp6+0x60>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
800543e: 68fb ldr r3, [r7, #12]
8005440: 2204 movs r2, #4
8005442: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
8005444: 2304 movs r3, #4
8005446: e03a b.n 80054be <SDMMC_GetCmdResp6+0xd6>
}
else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
8005448: 68fb ldr r3, [r7, #12]
800544a: 6b5b ldr r3, [r3, #52] ; 0x34
800544c: f003 0301 and.w r3, r3, #1
8005450: 2b00 cmp r3, #0
8005452: d004 beq.n 800545e <SDMMC_GetCmdResp6+0x76>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
8005454: 68fb ldr r3, [r7, #12]
8005456: 2201 movs r2, #1
8005458: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_CRC_FAIL;
800545a: 2301 movs r3, #1
800545c: e02f b.n 80054be <SDMMC_GetCmdResp6+0xd6>
{
/* Nothing to do */
}
/* Check response received is of desired command */
if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
800545e: 68f8 ldr r0, [r7, #12]
8005460: f7ff fbd3 bl 8004c0a <SDIO_GetCommandResponse>
8005464: 4603 mov r3, r0
8005466: 461a mov r2, r3
8005468: 7afb ldrb r3, [r7, #11]
800546a: 4293 cmp r3, r2
800546c: d001 beq.n 8005472 <SDMMC_GetCmdResp6+0x8a>
{
return SDMMC_ERROR_CMD_CRC_FAIL;
800546e: 2301 movs r3, #1
8005470: e025 b.n 80054be <SDMMC_GetCmdResp6+0xd6>
}
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
8005472: 68fb ldr r3, [r7, #12]
8005474: 22c5 movs r2, #197 ; 0xc5
8005476: 639a str r2, [r3, #56] ; 0x38
/* We have received response, retrieve it. */
response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
8005478: 2100 movs r1, #0
800547a: 68f8 ldr r0, [r7, #12]
800547c: f7ff fbd1 bl 8004c22 <SDIO_GetResponse>
8005480: 6138 str r0, [r7, #16]
if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
8005482: 693b ldr r3, [r7, #16]
8005484: f403 4360 and.w r3, r3, #57344 ; 0xe000
8005488: 2b00 cmp r3, #0
800548a: d106 bne.n 800549a <SDMMC_GetCmdResp6+0xb2>
{
*pRCA = (uint16_t) (response_r1 >> 16);
800548c: 693b ldr r3, [r7, #16]
800548e: 0c1b lsrs r3, r3, #16
8005490: b29a uxth r2, r3
8005492: 687b ldr r3, [r7, #4]
8005494: 801a strh r2, [r3, #0]
return SDMMC_ERROR_NONE;
8005496: 2300 movs r3, #0
8005498: e011 b.n 80054be <SDMMC_GetCmdResp6+0xd6>
}
else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
800549a: 693b ldr r3, [r7, #16]
800549c: f403 4380 and.w r3, r3, #16384 ; 0x4000
80054a0: 2b00 cmp r3, #0
80054a2: d002 beq.n 80054aa <SDMMC_GetCmdResp6+0xc2>
{
return SDMMC_ERROR_ILLEGAL_CMD;
80054a4: f44f 5300 mov.w r3, #8192 ; 0x2000
80054a8: e009 b.n 80054be <SDMMC_GetCmdResp6+0xd6>
}
else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
80054aa: 693b ldr r3, [r7, #16]
80054ac: f403 4300 and.w r3, r3, #32768 ; 0x8000
80054b0: 2b00 cmp r3, #0
80054b2: d002 beq.n 80054ba <SDMMC_GetCmdResp6+0xd2>
{
return SDMMC_ERROR_COM_CRC_FAILED;
80054b4: f44f 5380 mov.w r3, #4096 ; 0x1000
80054b8: e001 b.n 80054be <SDMMC_GetCmdResp6+0xd6>
}
else
{
return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
80054ba: f44f 3380 mov.w r3, #65536 ; 0x10000
}
}
80054be: 4618 mov r0, r3
80054c0: 371c adds r7, #28
80054c2: 46bd mov sp, r7
80054c4: bd90 pop {r4, r7, pc}
80054c6: bf00 nop
80054c8: 20000004 .word 0x20000004
80054cc: 10624dd3 .word 0x10624dd3
080054d0 <SDMMC_GetCmdResp7>:
* @brief Checks for error conditions for R7 response.
* @param hsd: SD handle
* @retval SD Card error state
*/
static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
{
80054d0: b490 push {r4, r7}
80054d2: b084 sub sp, #16
80054d4: af00 add r7, sp, #0
80054d6: 6078 str r0, [r7, #4]
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
80054d8: 4b21 ldr r3, [pc, #132] ; (8005560 <SDMMC_GetCmdResp7+0x90>)
80054da: 681b ldr r3, [r3, #0]
80054dc: 4a21 ldr r2, [pc, #132] ; (8005564 <SDMMC_GetCmdResp7+0x94>)
80054de: fba2 2303 umull r2, r3, r2, r3
80054e2: 0a5b lsrs r3, r3, #9
80054e4: f241 3288 movw r2, #5000 ; 0x1388
80054e8: fb02 f403 mul.w r4, r2, r3
do
{
if (count-- == 0U)
80054ec: 4623 mov r3, r4
80054ee: 1e5c subs r4, r3, #1
80054f0: 2b00 cmp r3, #0
80054f2: d102 bne.n 80054fa <SDMMC_GetCmdResp7+0x2a>
{
return SDMMC_ERROR_TIMEOUT;
80054f4: f04f 4300 mov.w r3, #2147483648 ; 0x80000000
80054f8: e02c b.n 8005554 <SDMMC_GetCmdResp7+0x84>
}
sta_reg = SDIOx->STA;
80054fa: 687b ldr r3, [r7, #4]
80054fc: 6b5b ldr r3, [r3, #52] ; 0x34
80054fe: 60fb str r3, [r7, #12]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8005500: 68fb ldr r3, [r7, #12]
8005502: f003 0345 and.w r3, r3, #69 ; 0x45
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
8005506: 2b00 cmp r3, #0
8005508: d0f0 beq.n 80054ec <SDMMC_GetCmdResp7+0x1c>
800550a: 68fb ldr r3, [r7, #12]
800550c: f403 6300 and.w r3, r3, #2048 ; 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8005510: 2b00 cmp r3, #0
8005512: d1eb bne.n 80054ec <SDMMC_GetCmdResp7+0x1c>
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
8005514: 687b ldr r3, [r7, #4]
8005516: 6b5b ldr r3, [r3, #52] ; 0x34
8005518: f003 0304 and.w r3, r3, #4
800551c: 2b00 cmp r3, #0
800551e: d004 beq.n 800552a <SDMMC_GetCmdResp7+0x5a>
{
/* Card is SD V2.0 compliant */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
8005520: 687b ldr r3, [r7, #4]
8005522: 2204 movs r2, #4
8005524: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
8005526: 2304 movs r3, #4
8005528: e014 b.n 8005554 <SDMMC_GetCmdResp7+0x84>
}
else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
800552a: 687b ldr r3, [r7, #4]
800552c: 6b5b ldr r3, [r3, #52] ; 0x34
800552e: f003 0301 and.w r3, r3, #1
8005532: 2b00 cmp r3, #0
8005534: d004 beq.n 8005540 <SDMMC_GetCmdResp7+0x70>
{
/* Card is SD V2.0 compliant */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
8005536: 687b ldr r3, [r7, #4]
8005538: 2201 movs r2, #1
800553a: 639a str r2, [r3, #56] ; 0x38
return SDMMC_ERROR_CMD_CRC_FAIL;
800553c: 2301 movs r3, #1
800553e: e009 b.n 8005554 <SDMMC_GetCmdResp7+0x84>
else
{
/* Nothing to do */
}
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
8005540: 687b ldr r3, [r7, #4]
8005542: 6b5b ldr r3, [r3, #52] ; 0x34
8005544: f003 0340 and.w r3, r3, #64 ; 0x40
8005548: 2b00 cmp r3, #0
800554a: d002 beq.n 8005552 <SDMMC_GetCmdResp7+0x82>
{
/* Card is SD V2.0 compliant */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
800554c: 687b ldr r3, [r7, #4]
800554e: 2240 movs r2, #64 ; 0x40
8005550: 639a str r2, [r3, #56] ; 0x38
}
return SDMMC_ERROR_NONE;
8005552: 2300 movs r3, #0
}
8005554: 4618 mov r0, r3
8005556: 3710 adds r7, #16
8005558: 46bd mov sp, r7
800555a: bc90 pop {r4, r7}
800555c: 4770 bx lr
800555e: bf00 nop
8005560: 20000004 .word 0x20000004
8005564: 10624dd3 .word 0x10624dd3
08005568 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8005568: b084 sub sp, #16
800556a: b480 push {r7}
800556c: b083 sub sp, #12
800556e: af00 add r7, sp, #0
8005570: 6078 str r0, [r7, #4]
8005572: f107 0014 add.w r0, r7, #20
8005576: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800557a: 2300 movs r3, #0
}
800557c: 4618 mov r0, r3
800557e: 370c adds r7, #12
8005580: 46bd mov sp, r7
8005582: bc80 pop {r7}
8005584: b004 add sp, #16
8005586: 4770 bx lr
08005588 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8005588: b480 push {r7}
800558a: b085 sub sp, #20
800558c: af00 add r7, sp, #0
800558e: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8005590: 687b ldr r3, [r7, #4]
8005592: 2200 movs r2, #0
8005594: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8005598: f44f 433f mov.w r3, #48896 ; 0xbf00
800559c: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
800559e: 68fb ldr r3, [r7, #12]
80055a0: b29a uxth r2, r3
80055a2: 687b ldr r3, [r7, #4]
80055a4: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
return HAL_OK;
80055a8: 2300 movs r3, #0
}
80055aa: 4618 mov r0, r3
80055ac: 3714 adds r7, #20
80055ae: 46bd mov sp, r7
80055b0: bc80 pop {r7}
80055b2: 4770 bx lr
080055b4 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
80055b4: b480 push {r7}
80055b6: b085 sub sp, #20
80055b8: af00 add r7, sp, #0
80055ba: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
80055bc: f44f 433f mov.w r3, #48896 ; 0xbf00
80055c0: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
80055c2: 687b ldr r3, [r7, #4]
80055c4: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
80055c8: b29a uxth r2, r3
80055ca: 68fb ldr r3, [r7, #12]
80055cc: b29b uxth r3, r3
80055ce: 43db mvns r3, r3
80055d0: b29b uxth r3, r3
80055d2: 4013 ands r3, r2
80055d4: b29a uxth r2, r3
80055d6: 687b ldr r3, [r7, #4]
80055d8: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
return HAL_OK;
80055dc: 2300 movs r3, #0
}
80055de: 4618 mov r0, r3
80055e0: 3714 adds r7, #20
80055e2: 46bd mov sp, r7
80055e4: bc80 pop {r7}
80055e6: 4770 bx lr
080055e8 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
80055e8: b480 push {r7}
80055ea: b083 sub sp, #12
80055ec: af00 add r7, sp, #0
80055ee: 6078 str r0, [r7, #4]
80055f0: 460b mov r3, r1
80055f2: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80055f4: 2300 movs r3, #0
}
80055f6: 4618 mov r0, r3
80055f8: 370c adds r7, #12
80055fa: 46bd mov sp, r7
80055fc: bc80 pop {r7}
80055fe: 4770 bx lr
08005600 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8005600: b084 sub sp, #16
8005602: b480 push {r7}
8005604: b083 sub sp, #12
8005606: af00 add r7, sp, #0
8005608: 6078 str r0, [r7, #4]
800560a: f107 0014 add.w r0, r7, #20
800560e: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8005612: 687b ldr r3, [r7, #4]
8005614: 2201 movs r2, #1
8005616: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
800561a: 687b ldr r3, [r7, #4]
800561c: 2200 movs r2, #0
800561e: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8005622: 687b ldr r3, [r7, #4]
8005624: 2200 movs r2, #0
8005626: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
800562a: 687b ldr r3, [r7, #4]
800562c: 2200 movs r2, #0
800562e: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
return HAL_OK;
8005632: 2300 movs r3, #0
}
8005634: 4618 mov r0, r3
8005636: 370c adds r7, #12
8005638: 46bd mov sp, r7
800563a: bc80 pop {r7}
800563c: b004 add sp, #16
800563e: 4770 bx lr
08005640 <USB_FlushTxFifo>:
* This parameter can be a value from 1 to 15
15 means Flush all Tx FIFOs
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num)
{
8005640: b480 push {r7}
8005642: b083 sub sp, #12
8005644: af00 add r7, sp, #0
8005646: 6078 str r0, [r7, #4]
8005648: 6039 str r1, [r7, #0]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800564a: 2300 movs r3, #0
}
800564c: 4618 mov r0, r3
800564e: 370c adds r7, #12
8005650: 46bd mov sp, r7
8005652: bc80 pop {r7}
8005654: 4770 bx lr
08005656 <USB_FlushRxFifo>:
* @brief USB_FlushRxFifo : Flush Rx FIFO
* @param USBx : Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
{
8005656: b480 push {r7}
8005658: b083 sub sp, #12
800565a: af00 add r7, sp, #0
800565c: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800565e: 2300 movs r3, #0
}
8005660: 4618 mov r0, r3
8005662: 370c adds r7, #12
8005664: 46bd mov sp, r7
8005666: bc80 pop {r7}
8005668: 4770 bx lr
...
0800566c <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800566c: b480 push {r7}
800566e: b09b sub sp, #108 ; 0x6c
8005670: af00 add r7, sp, #0
8005672: 6078 str r0, [r7, #4]
8005674: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8005676: 2300 movs r3, #0
8005678: f887 3067 strb.w r3, [r7, #103] ; 0x67
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
800567c: 687a ldr r2, [r7, #4]
800567e: 683b ldr r3, [r7, #0]
8005680: 781b ldrb r3, [r3, #0]
8005682: 009b lsls r3, r3, #2
8005684: 4413 add r3, r2
8005686: 881b ldrh r3, [r3, #0]
8005688: b29b uxth r3, r3
800568a: f423 43ec bic.w r3, r3, #30208 ; 0x7600
800568e: f023 0370 bic.w r3, r3, #112 ; 0x70
8005692: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
/* initialize Endpoint */
switch (ep->type)
8005696: 683b ldr r3, [r7, #0]
8005698: 78db ldrb r3, [r3, #3]
800569a: 2b03 cmp r3, #3
800569c: d81f bhi.n 80056de <USB_ActivateEndpoint+0x72>
800569e: a201 add r2, pc, #4 ; (adr r2, 80056a4 <USB_ActivateEndpoint+0x38>)
80056a0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80056a4: 080056b5 .word 0x080056b5
80056a8: 080056d1 .word 0x080056d1
80056ac: 080056e7 .word 0x080056e7
80056b0: 080056c3 .word 0x080056c3
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
80056b4: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
80056b8: f443 7300 orr.w r3, r3, #512 ; 0x200
80056bc: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
break;
80056c0: e012 b.n 80056e8 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
80056c2: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
80056c6: f443 63c0 orr.w r3, r3, #1536 ; 0x600
80056ca: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
break;
80056ce: e00b b.n 80056e8 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
80056d0: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
80056d4: f443 6380 orr.w r3, r3, #1024 ; 0x400
80056d8: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
break;
80056dc: e004 b.n 80056e8 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
80056de: 2301 movs r3, #1
80056e0: f887 3067 strb.w r3, [r7, #103] ; 0x67
break;
80056e4: e000 b.n 80056e8 <USB_ActivateEndpoint+0x7c>
break;
80056e6: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
80056e8: 687a ldr r2, [r7, #4]
80056ea: 683b ldr r3, [r7, #0]
80056ec: 781b ldrb r3, [r3, #0]
80056ee: 009b lsls r3, r3, #2
80056f0: 441a add r2, r3
80056f2: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
80056f6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80056fa: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80056fe: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005702: f043 0380 orr.w r3, r3, #128 ; 0x80
8005706: b29b uxth r3, r3
8005708: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
800570a: 687a ldr r2, [r7, #4]
800570c: 683b ldr r3, [r7, #0]
800570e: 781b ldrb r3, [r3, #0]
8005710: 009b lsls r3, r3, #2
8005712: 4413 add r3, r2
8005714: 881b ldrh r3, [r3, #0]
8005716: b29b uxth r3, r3
8005718: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800571c: f023 0370 bic.w r3, r3, #112 ; 0x70
8005720: b29a uxth r2, r3
8005722: 683b ldr r3, [r7, #0]
8005724: 781b ldrb r3, [r3, #0]
8005726: b29b uxth r3, r3
8005728: 4313 orrs r3, r2
800572a: f8a7 305e strh.w r3, [r7, #94] ; 0x5e
800572e: 687a ldr r2, [r7, #4]
8005730: 683b ldr r3, [r7, #0]
8005732: 781b ldrb r3, [r3, #0]
8005734: 009b lsls r3, r3, #2
8005736: 441a add r2, r3
8005738: f8b7 305e ldrh.w r3, [r7, #94] ; 0x5e
800573c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005740: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005744: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005748: f043 0380 orr.w r3, r3, #128 ; 0x80
800574c: b29b uxth r3, r3
800574e: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8005750: 683b ldr r3, [r7, #0]
8005752: 7b1b ldrb r3, [r3, #12]
8005754: 2b00 cmp r3, #0
8005756: f040 8149 bne.w 80059ec <USB_ActivateEndpoint+0x380>
{
if (ep->is_in != 0U)
800575a: 683b ldr r3, [r7, #0]
800575c: 785b ldrb r3, [r3, #1]
800575e: 2b00 cmp r3, #0
8005760: f000 8084 beq.w 800586c <USB_ActivateEndpoint+0x200>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8005764: 687b ldr r3, [r7, #4]
8005766: 617b str r3, [r7, #20]
8005768: 687b ldr r3, [r7, #4]
800576a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800576e: b29b uxth r3, r3
8005770: 461a mov r2, r3
8005772: 697b ldr r3, [r7, #20]
8005774: 4413 add r3, r2
8005776: 617b str r3, [r7, #20]
8005778: 683b ldr r3, [r7, #0]
800577a: 781b ldrb r3, [r3, #0]
800577c: 011a lsls r2, r3, #4
800577e: 697b ldr r3, [r7, #20]
8005780: 4413 add r3, r2
8005782: f503 6380 add.w r3, r3, #1024 ; 0x400
8005786: 613b str r3, [r7, #16]
8005788: 683b ldr r3, [r7, #0]
800578a: 88db ldrh r3, [r3, #6]
800578c: 085b lsrs r3, r3, #1
800578e: b29b uxth r3, r3
8005790: 005b lsls r3, r3, #1
8005792: b29a uxth r2, r3
8005794: 693b ldr r3, [r7, #16]
8005796: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005798: 687a ldr r2, [r7, #4]
800579a: 683b ldr r3, [r7, #0]
800579c: 781b ldrb r3, [r3, #0]
800579e: 009b lsls r3, r3, #2
80057a0: 4413 add r3, r2
80057a2: 881b ldrh r3, [r3, #0]
80057a4: 81fb strh r3, [r7, #14]
80057a6: 89fb ldrh r3, [r7, #14]
80057a8: f003 0340 and.w r3, r3, #64 ; 0x40
80057ac: 2b00 cmp r3, #0
80057ae: d01b beq.n 80057e8 <USB_ActivateEndpoint+0x17c>
80057b0: 687a ldr r2, [r7, #4]
80057b2: 683b ldr r3, [r7, #0]
80057b4: 781b ldrb r3, [r3, #0]
80057b6: 009b lsls r3, r3, #2
80057b8: 4413 add r3, r2
80057ba: 881b ldrh r3, [r3, #0]
80057bc: b29b uxth r3, r3
80057be: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80057c2: f023 0370 bic.w r3, r3, #112 ; 0x70
80057c6: 81bb strh r3, [r7, #12]
80057c8: 687a ldr r2, [r7, #4]
80057ca: 683b ldr r3, [r7, #0]
80057cc: 781b ldrb r3, [r3, #0]
80057ce: 009b lsls r3, r3, #2
80057d0: 441a add r2, r3
80057d2: 89bb ldrh r3, [r7, #12]
80057d4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80057d8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80057dc: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80057e0: f043 03c0 orr.w r3, r3, #192 ; 0xc0
80057e4: b29b uxth r3, r3
80057e6: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
80057e8: 683b ldr r3, [r7, #0]
80057ea: 78db ldrb r3, [r3, #3]
80057ec: 2b01 cmp r3, #1
80057ee: d020 beq.n 8005832 <USB_ActivateEndpoint+0x1c6>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
80057f0: 687a ldr r2, [r7, #4]
80057f2: 683b ldr r3, [r7, #0]
80057f4: 781b ldrb r3, [r3, #0]
80057f6: 009b lsls r3, r3, #2
80057f8: 4413 add r3, r2
80057fa: 881b ldrh r3, [r3, #0]
80057fc: b29b uxth r3, r3
80057fe: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005802: f023 0340 bic.w r3, r3, #64 ; 0x40
8005806: 813b strh r3, [r7, #8]
8005808: 893b ldrh r3, [r7, #8]
800580a: f083 0320 eor.w r3, r3, #32
800580e: 813b strh r3, [r7, #8]
8005810: 687a ldr r2, [r7, #4]
8005812: 683b ldr r3, [r7, #0]
8005814: 781b ldrb r3, [r3, #0]
8005816: 009b lsls r3, r3, #2
8005818: 441a add r2, r3
800581a: 893b ldrh r3, [r7, #8]
800581c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005820: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005824: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005828: f043 0380 orr.w r3, r3, #128 ; 0x80
800582c: b29b uxth r3, r3
800582e: 8013 strh r3, [r2, #0]
8005830: e27f b.n 8005d32 <USB_ActivateEndpoint+0x6c6>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005832: 687a ldr r2, [r7, #4]
8005834: 683b ldr r3, [r7, #0]
8005836: 781b ldrb r3, [r3, #0]
8005838: 009b lsls r3, r3, #2
800583a: 4413 add r3, r2
800583c: 881b ldrh r3, [r3, #0]
800583e: b29b uxth r3, r3
8005840: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005844: f023 0340 bic.w r3, r3, #64 ; 0x40
8005848: 817b strh r3, [r7, #10]
800584a: 687a ldr r2, [r7, #4]
800584c: 683b ldr r3, [r7, #0]
800584e: 781b ldrb r3, [r3, #0]
8005850: 009b lsls r3, r3, #2
8005852: 441a add r2, r3
8005854: 897b ldrh r3, [r7, #10]
8005856: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800585a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800585e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005862: f043 0380 orr.w r3, r3, #128 ; 0x80
8005866: b29b uxth r3, r3
8005868: 8013 strh r3, [r2, #0]
800586a: e262 b.n 8005d32 <USB_ActivateEndpoint+0x6c6>
}
}
else
{
/*Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
800586c: 687b ldr r3, [r7, #4]
800586e: 62fb str r3, [r7, #44] ; 0x2c
8005870: 687b ldr r3, [r7, #4]
8005872: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8005876: b29b uxth r3, r3
8005878: 461a mov r2, r3
800587a: 6afb ldr r3, [r7, #44] ; 0x2c
800587c: 4413 add r3, r2
800587e: 62fb str r3, [r7, #44] ; 0x2c
8005880: 683b ldr r3, [r7, #0]
8005882: 781b ldrb r3, [r3, #0]
8005884: 011a lsls r2, r3, #4
8005886: 6afb ldr r3, [r7, #44] ; 0x2c
8005888: 4413 add r3, r2
800588a: f503 6381 add.w r3, r3, #1032 ; 0x408
800588e: 62bb str r3, [r7, #40] ; 0x28
8005890: 683b ldr r3, [r7, #0]
8005892: 88db ldrh r3, [r3, #6]
8005894: 085b lsrs r3, r3, #1
8005896: b29b uxth r3, r3
8005898: 005b lsls r3, r3, #1
800589a: b29a uxth r2, r3
800589c: 6abb ldr r3, [r7, #40] ; 0x28
800589e: 801a strh r2, [r3, #0]
/*Set the endpoint Receive buffer counter*/
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
80058a0: 687b ldr r3, [r7, #4]
80058a2: 627b str r3, [r7, #36] ; 0x24
80058a4: 687b ldr r3, [r7, #4]
80058a6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80058aa: b29b uxth r3, r3
80058ac: 461a mov r2, r3
80058ae: 6a7b ldr r3, [r7, #36] ; 0x24
80058b0: 4413 add r3, r2
80058b2: 627b str r3, [r7, #36] ; 0x24
80058b4: 683b ldr r3, [r7, #0]
80058b6: 781b ldrb r3, [r3, #0]
80058b8: 011a lsls r2, r3, #4
80058ba: 6a7b ldr r3, [r7, #36] ; 0x24
80058bc: 4413 add r3, r2
80058be: f203 430c addw r3, r3, #1036 ; 0x40c
80058c2: 623b str r3, [r7, #32]
80058c4: 683b ldr r3, [r7, #0]
80058c6: 691b ldr r3, [r3, #16]
80058c8: 2b00 cmp r3, #0
80058ca: d112 bne.n 80058f2 <USB_ActivateEndpoint+0x286>
80058cc: 6a3b ldr r3, [r7, #32]
80058ce: 881b ldrh r3, [r3, #0]
80058d0: b29b uxth r3, r3
80058d2: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80058d6: b29a uxth r2, r3
80058d8: 6a3b ldr r3, [r7, #32]
80058da: 801a strh r2, [r3, #0]
80058dc: 6a3b ldr r3, [r7, #32]
80058de: 881b ldrh r3, [r3, #0]
80058e0: b29b uxth r3, r3
80058e2: ea6f 4343 mvn.w r3, r3, lsl #17
80058e6: ea6f 4353 mvn.w r3, r3, lsr #17
80058ea: b29a uxth r2, r3
80058ec: 6a3b ldr r3, [r7, #32]
80058ee: 801a strh r2, [r3, #0]
80058f0: e02f b.n 8005952 <USB_ActivateEndpoint+0x2e6>
80058f2: 683b ldr r3, [r7, #0]
80058f4: 691b ldr r3, [r3, #16]
80058f6: 2b3e cmp r3, #62 ; 0x3e
80058f8: d813 bhi.n 8005922 <USB_ActivateEndpoint+0x2b6>
80058fa: 683b ldr r3, [r7, #0]
80058fc: 691b ldr r3, [r3, #16]
80058fe: 085b lsrs r3, r3, #1
8005900: 663b str r3, [r7, #96] ; 0x60
8005902: 683b ldr r3, [r7, #0]
8005904: 691b ldr r3, [r3, #16]
8005906: f003 0301 and.w r3, r3, #1
800590a: 2b00 cmp r3, #0
800590c: d002 beq.n 8005914 <USB_ActivateEndpoint+0x2a8>
800590e: 6e3b ldr r3, [r7, #96] ; 0x60
8005910: 3301 adds r3, #1
8005912: 663b str r3, [r7, #96] ; 0x60
8005914: 6e3b ldr r3, [r7, #96] ; 0x60
8005916: b29b uxth r3, r3
8005918: 029b lsls r3, r3, #10
800591a: b29a uxth r2, r3
800591c: 6a3b ldr r3, [r7, #32]
800591e: 801a strh r2, [r3, #0]
8005920: e017 b.n 8005952 <USB_ActivateEndpoint+0x2e6>
8005922: 683b ldr r3, [r7, #0]
8005924: 691b ldr r3, [r3, #16]
8005926: 095b lsrs r3, r3, #5
8005928: 663b str r3, [r7, #96] ; 0x60
800592a: 683b ldr r3, [r7, #0]
800592c: 691b ldr r3, [r3, #16]
800592e: f003 031f and.w r3, r3, #31
8005932: 2b00 cmp r3, #0
8005934: d102 bne.n 800593c <USB_ActivateEndpoint+0x2d0>
8005936: 6e3b ldr r3, [r7, #96] ; 0x60
8005938: 3b01 subs r3, #1
800593a: 663b str r3, [r7, #96] ; 0x60
800593c: 6e3b ldr r3, [r7, #96] ; 0x60
800593e: b29b uxth r3, r3
8005940: 029b lsls r3, r3, #10
8005942: b29b uxth r3, r3
8005944: ea6f 4343 mvn.w r3, r3, lsl #17
8005948: ea6f 4353 mvn.w r3, r3, lsr #17
800594c: b29a uxth r2, r3
800594e: 6a3b ldr r3, [r7, #32]
8005950: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005952: 687a ldr r2, [r7, #4]
8005954: 683b ldr r3, [r7, #0]
8005956: 781b ldrb r3, [r3, #0]
8005958: 009b lsls r3, r3, #2
800595a: 4413 add r3, r2
800595c: 881b ldrh r3, [r3, #0]
800595e: 83fb strh r3, [r7, #30]
8005960: 8bfb ldrh r3, [r7, #30]
8005962: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005966: 2b00 cmp r3, #0
8005968: d01b beq.n 80059a2 <USB_ActivateEndpoint+0x336>
800596a: 687a ldr r2, [r7, #4]
800596c: 683b ldr r3, [r7, #0]
800596e: 781b ldrb r3, [r3, #0]
8005970: 009b lsls r3, r3, #2
8005972: 4413 add r3, r2
8005974: 881b ldrh r3, [r3, #0]
8005976: b29b uxth r3, r3
8005978: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800597c: f023 0370 bic.w r3, r3, #112 ; 0x70
8005980: 83bb strh r3, [r7, #28]
8005982: 687a ldr r2, [r7, #4]
8005984: 683b ldr r3, [r7, #0]
8005986: 781b ldrb r3, [r3, #0]
8005988: 009b lsls r3, r3, #2
800598a: 441a add r2, r3
800598c: 8bbb ldrh r3, [r7, #28]
800598e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005992: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005996: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800599a: f043 0380 orr.w r3, r3, #128 ; 0x80
800599e: b29b uxth r3, r3
80059a0: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint*/
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80059a2: 687a ldr r2, [r7, #4]
80059a4: 683b ldr r3, [r7, #0]
80059a6: 781b ldrb r3, [r3, #0]
80059a8: 009b lsls r3, r3, #2
80059aa: 4413 add r3, r2
80059ac: 881b ldrh r3, [r3, #0]
80059ae: b29b uxth r3, r3
80059b0: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80059b4: f023 0370 bic.w r3, r3, #112 ; 0x70
80059b8: 837b strh r3, [r7, #26]
80059ba: 8b7b ldrh r3, [r7, #26]
80059bc: f483 5380 eor.w r3, r3, #4096 ; 0x1000
80059c0: 837b strh r3, [r7, #26]
80059c2: 8b7b ldrh r3, [r7, #26]
80059c4: f483 5300 eor.w r3, r3, #8192 ; 0x2000
80059c8: 837b strh r3, [r7, #26]
80059ca: 687a ldr r2, [r7, #4]
80059cc: 683b ldr r3, [r7, #0]
80059ce: 781b ldrb r3, [r3, #0]
80059d0: 009b lsls r3, r3, #2
80059d2: 441a add r2, r3
80059d4: 8b7b ldrh r3, [r7, #26]
80059d6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80059da: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80059de: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80059e2: f043 0380 orr.w r3, r3, #128 ; 0x80
80059e6: b29b uxth r3, r3
80059e8: 8013 strh r3, [r2, #0]
80059ea: e1a2 b.n 8005d32 <USB_ActivateEndpoint+0x6c6>
}
/*Double Buffer*/
else
{
/* Set the endpoint as double buffered */
PCD_SET_EP_DBUF(USBx, ep->num);
80059ec: 687a ldr r2, [r7, #4]
80059ee: 683b ldr r3, [r7, #0]
80059f0: 781b ldrb r3, [r3, #0]
80059f2: 009b lsls r3, r3, #2
80059f4: 4413 add r3, r2
80059f6: 881b ldrh r3, [r3, #0]
80059f8: b29b uxth r3, r3
80059fa: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80059fe: f023 0370 bic.w r3, r3, #112 ; 0x70
8005a02: f8a7 305c strh.w r3, [r7, #92] ; 0x5c
8005a06: 687a ldr r2, [r7, #4]
8005a08: 683b ldr r3, [r7, #0]
8005a0a: 781b ldrb r3, [r3, #0]
8005a0c: 009b lsls r3, r3, #2
8005a0e: 441a add r2, r3
8005a10: f8b7 305c ldrh.w r3, [r7, #92] ; 0x5c
8005a14: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005a18: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005a1c: f443 4301 orr.w r3, r3, #33024 ; 0x8100
8005a20: f043 0380 orr.w r3, r3, #128 ; 0x80
8005a24: b29b uxth r3, r3
8005a26: 8013 strh r3, [r2, #0]
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8005a28: 687b ldr r3, [r7, #4]
8005a2a: 65bb str r3, [r7, #88] ; 0x58
8005a2c: 687b ldr r3, [r7, #4]
8005a2e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8005a32: b29b uxth r3, r3
8005a34: 461a mov r2, r3
8005a36: 6dbb ldr r3, [r7, #88] ; 0x58
8005a38: 4413 add r3, r2
8005a3a: 65bb str r3, [r7, #88] ; 0x58
8005a3c: 683b ldr r3, [r7, #0]
8005a3e: 781b ldrb r3, [r3, #0]
8005a40: 011a lsls r2, r3, #4
8005a42: 6dbb ldr r3, [r7, #88] ; 0x58
8005a44: 4413 add r3, r2
8005a46: f503 6380 add.w r3, r3, #1024 ; 0x400
8005a4a: 657b str r3, [r7, #84] ; 0x54
8005a4c: 683b ldr r3, [r7, #0]
8005a4e: 891b ldrh r3, [r3, #8]
8005a50: 085b lsrs r3, r3, #1
8005a52: b29b uxth r3, r3
8005a54: 005b lsls r3, r3, #1
8005a56: b29a uxth r2, r3
8005a58: 6d7b ldr r3, [r7, #84] ; 0x54
8005a5a: 801a strh r2, [r3, #0]
8005a5c: 687b ldr r3, [r7, #4]
8005a5e: 653b str r3, [r7, #80] ; 0x50
8005a60: 687b ldr r3, [r7, #4]
8005a62: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8005a66: b29b uxth r3, r3
8005a68: 461a mov r2, r3
8005a6a: 6d3b ldr r3, [r7, #80] ; 0x50
8005a6c: 4413 add r3, r2
8005a6e: 653b str r3, [r7, #80] ; 0x50
8005a70: 683b ldr r3, [r7, #0]
8005a72: 781b ldrb r3, [r3, #0]
8005a74: 011a lsls r2, r3, #4
8005a76: 6d3b ldr r3, [r7, #80] ; 0x50
8005a78: 4413 add r3, r2
8005a7a: f503 6381 add.w r3, r3, #1032 ; 0x408
8005a7e: 64fb str r3, [r7, #76] ; 0x4c
8005a80: 683b ldr r3, [r7, #0]
8005a82: 895b ldrh r3, [r3, #10]
8005a84: 085b lsrs r3, r3, #1
8005a86: b29b uxth r3, r3
8005a88: 005b lsls r3, r3, #1
8005a8a: b29a uxth r2, r3
8005a8c: 6cfb ldr r3, [r7, #76] ; 0x4c
8005a8e: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8005a90: 683b ldr r3, [r7, #0]
8005a92: 785b ldrb r3, [r3, #1]
8005a94: 2b00 cmp r3, #0
8005a96: f040 8091 bne.w 8005bbc <USB_ActivateEndpoint+0x550>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005a9a: 687a ldr r2, [r7, #4]
8005a9c: 683b ldr r3, [r7, #0]
8005a9e: 781b ldrb r3, [r3, #0]
8005aa0: 009b lsls r3, r3, #2
8005aa2: 4413 add r3, r2
8005aa4: 881b ldrh r3, [r3, #0]
8005aa6: 87bb strh r3, [r7, #60] ; 0x3c
8005aa8: 8fbb ldrh r3, [r7, #60] ; 0x3c
8005aaa: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005aae: 2b00 cmp r3, #0
8005ab0: d01b beq.n 8005aea <USB_ActivateEndpoint+0x47e>
8005ab2: 687a ldr r2, [r7, #4]
8005ab4: 683b ldr r3, [r7, #0]
8005ab6: 781b ldrb r3, [r3, #0]
8005ab8: 009b lsls r3, r3, #2
8005aba: 4413 add r3, r2
8005abc: 881b ldrh r3, [r3, #0]
8005abe: b29b uxth r3, r3
8005ac0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005ac4: f023 0370 bic.w r3, r3, #112 ; 0x70
8005ac8: 877b strh r3, [r7, #58] ; 0x3a
8005aca: 687a ldr r2, [r7, #4]
8005acc: 683b ldr r3, [r7, #0]
8005ace: 781b ldrb r3, [r3, #0]
8005ad0: 009b lsls r3, r3, #2
8005ad2: 441a add r2, r3
8005ad4: 8f7b ldrh r3, [r7, #58] ; 0x3a
8005ad6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005ada: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005ade: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005ae2: f043 0380 orr.w r3, r3, #128 ; 0x80
8005ae6: b29b uxth r3, r3
8005ae8: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005aea: 687a ldr r2, [r7, #4]
8005aec: 683b ldr r3, [r7, #0]
8005aee: 781b ldrb r3, [r3, #0]
8005af0: 009b lsls r3, r3, #2
8005af2: 4413 add r3, r2
8005af4: 881b ldrh r3, [r3, #0]
8005af6: 873b strh r3, [r7, #56] ; 0x38
8005af8: 8f3b ldrh r3, [r7, #56] ; 0x38
8005afa: f003 0340 and.w r3, r3, #64 ; 0x40
8005afe: 2b00 cmp r3, #0
8005b00: d01b beq.n 8005b3a <USB_ActivateEndpoint+0x4ce>
8005b02: 687a ldr r2, [r7, #4]
8005b04: 683b ldr r3, [r7, #0]
8005b06: 781b ldrb r3, [r3, #0]
8005b08: 009b lsls r3, r3, #2
8005b0a: 4413 add r3, r2
8005b0c: 881b ldrh r3, [r3, #0]
8005b0e: b29b uxth r3, r3
8005b10: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005b14: f023 0370 bic.w r3, r3, #112 ; 0x70
8005b18: 86fb strh r3, [r7, #54] ; 0x36
8005b1a: 687a ldr r2, [r7, #4]
8005b1c: 683b ldr r3, [r7, #0]
8005b1e: 781b ldrb r3, [r3, #0]
8005b20: 009b lsls r3, r3, #2
8005b22: 441a add r2, r3
8005b24: 8efb ldrh r3, [r7, #54] ; 0x36
8005b26: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005b2a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005b2e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005b32: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005b36: b29b uxth r3, r3
8005b38: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8005b3a: 687a ldr r2, [r7, #4]
8005b3c: 683b ldr r3, [r7, #0]
8005b3e: 781b ldrb r3, [r3, #0]
8005b40: 009b lsls r3, r3, #2
8005b42: 4413 add r3, r2
8005b44: 881b ldrh r3, [r3, #0]
8005b46: b29b uxth r3, r3
8005b48: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005b4c: f023 0370 bic.w r3, r3, #112 ; 0x70
8005b50: 86bb strh r3, [r7, #52] ; 0x34
8005b52: 8ebb ldrh r3, [r7, #52] ; 0x34
8005b54: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8005b58: 86bb strh r3, [r7, #52] ; 0x34
8005b5a: 8ebb ldrh r3, [r7, #52] ; 0x34
8005b5c: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8005b60: 86bb strh r3, [r7, #52] ; 0x34
8005b62: 687a ldr r2, [r7, #4]
8005b64: 683b ldr r3, [r7, #0]
8005b66: 781b ldrb r3, [r3, #0]
8005b68: 009b lsls r3, r3, #2
8005b6a: 441a add r2, r3
8005b6c: 8ebb ldrh r3, [r7, #52] ; 0x34
8005b6e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005b72: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005b76: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005b7a: f043 0380 orr.w r3, r3, #128 ; 0x80
8005b7e: b29b uxth r3, r3
8005b80: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005b82: 687a ldr r2, [r7, #4]
8005b84: 683b ldr r3, [r7, #0]
8005b86: 781b ldrb r3, [r3, #0]
8005b88: 009b lsls r3, r3, #2
8005b8a: 4413 add r3, r2
8005b8c: 881b ldrh r3, [r3, #0]
8005b8e: b29b uxth r3, r3
8005b90: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005b94: f023 0340 bic.w r3, r3, #64 ; 0x40
8005b98: 867b strh r3, [r7, #50] ; 0x32
8005b9a: 687a ldr r2, [r7, #4]
8005b9c: 683b ldr r3, [r7, #0]
8005b9e: 781b ldrb r3, [r3, #0]
8005ba0: 009b lsls r3, r3, #2
8005ba2: 441a add r2, r3
8005ba4: 8e7b ldrh r3, [r7, #50] ; 0x32
8005ba6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005baa: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005bae: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005bb2: f043 0380 orr.w r3, r3, #128 ; 0x80
8005bb6: b29b uxth r3, r3
8005bb8: 8013 strh r3, [r2, #0]
8005bba: e0ba b.n 8005d32 <USB_ActivateEndpoint+0x6c6>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005bbc: 687a ldr r2, [r7, #4]
8005bbe: 683b ldr r3, [r7, #0]
8005bc0: 781b ldrb r3, [r3, #0]
8005bc2: 009b lsls r3, r3, #2
8005bc4: 4413 add r3, r2
8005bc6: 881b ldrh r3, [r3, #0]
8005bc8: f8a7 304a strh.w r3, [r7, #74] ; 0x4a
8005bcc: f8b7 304a ldrh.w r3, [r7, #74] ; 0x4a
8005bd0: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005bd4: 2b00 cmp r3, #0
8005bd6: d01d beq.n 8005c14 <USB_ActivateEndpoint+0x5a8>
8005bd8: 687a ldr r2, [r7, #4]
8005bda: 683b ldr r3, [r7, #0]
8005bdc: 781b ldrb r3, [r3, #0]
8005bde: 009b lsls r3, r3, #2
8005be0: 4413 add r3, r2
8005be2: 881b ldrh r3, [r3, #0]
8005be4: b29b uxth r3, r3
8005be6: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005bea: f023 0370 bic.w r3, r3, #112 ; 0x70
8005bee: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
8005bf2: 687a ldr r2, [r7, #4]
8005bf4: 683b ldr r3, [r7, #0]
8005bf6: 781b ldrb r3, [r3, #0]
8005bf8: 009b lsls r3, r3, #2
8005bfa: 441a add r2, r3
8005bfc: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8005c00: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005c04: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005c08: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005c0c: f043 0380 orr.w r3, r3, #128 ; 0x80
8005c10: b29b uxth r3, r3
8005c12: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005c14: 687a ldr r2, [r7, #4]
8005c16: 683b ldr r3, [r7, #0]
8005c18: 781b ldrb r3, [r3, #0]
8005c1a: 009b lsls r3, r3, #2
8005c1c: 4413 add r3, r2
8005c1e: 881b ldrh r3, [r3, #0]
8005c20: f8a7 3046 strh.w r3, [r7, #70] ; 0x46
8005c24: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46
8005c28: f003 0340 and.w r3, r3, #64 ; 0x40
8005c2c: 2b00 cmp r3, #0
8005c2e: d01d beq.n 8005c6c <USB_ActivateEndpoint+0x600>
8005c30: 687a ldr r2, [r7, #4]
8005c32: 683b ldr r3, [r7, #0]
8005c34: 781b ldrb r3, [r3, #0]
8005c36: 009b lsls r3, r3, #2
8005c38: 4413 add r3, r2
8005c3a: 881b ldrh r3, [r3, #0]
8005c3c: b29b uxth r3, r3
8005c3e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005c42: f023 0370 bic.w r3, r3, #112 ; 0x70
8005c46: f8a7 3044 strh.w r3, [r7, #68] ; 0x44
8005c4a: 687a ldr r2, [r7, #4]
8005c4c: 683b ldr r3, [r7, #0]
8005c4e: 781b ldrb r3, [r3, #0]
8005c50: 009b lsls r3, r3, #2
8005c52: 441a add r2, r3
8005c54: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
8005c58: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005c5c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005c60: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005c64: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005c68: b29b uxth r3, r3
8005c6a: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8005c6c: 683b ldr r3, [r7, #0]
8005c6e: 78db ldrb r3, [r3, #3]
8005c70: 2b01 cmp r3, #1
8005c72: d024 beq.n 8005cbe <USB_ActivateEndpoint+0x652>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8005c74: 687a ldr r2, [r7, #4]
8005c76: 683b ldr r3, [r7, #0]
8005c78: 781b ldrb r3, [r3, #0]
8005c7a: 009b lsls r3, r3, #2
8005c7c: 4413 add r3, r2
8005c7e: 881b ldrh r3, [r3, #0]
8005c80: b29b uxth r3, r3
8005c82: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005c86: f023 0340 bic.w r3, r3, #64 ; 0x40
8005c8a: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
8005c8e: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8005c92: f083 0320 eor.w r3, r3, #32
8005c96: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
8005c9a: 687a ldr r2, [r7, #4]
8005c9c: 683b ldr r3, [r7, #0]
8005c9e: 781b ldrb r3, [r3, #0]
8005ca0: 009b lsls r3, r3, #2
8005ca2: 441a add r2, r3
8005ca4: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8005ca8: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005cac: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005cb0: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005cb4: f043 0380 orr.w r3, r3, #128 ; 0x80
8005cb8: b29b uxth r3, r3
8005cba: 8013 strh r3, [r2, #0]
8005cbc: e01d b.n 8005cfa <USB_ActivateEndpoint+0x68e>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005cbe: 687a ldr r2, [r7, #4]
8005cc0: 683b ldr r3, [r7, #0]
8005cc2: 781b ldrb r3, [r3, #0]
8005cc4: 009b lsls r3, r3, #2
8005cc6: 4413 add r3, r2
8005cc8: 881b ldrh r3, [r3, #0]
8005cca: b29b uxth r3, r3
8005ccc: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005cd0: f023 0340 bic.w r3, r3, #64 ; 0x40
8005cd4: f8a7 3042 strh.w r3, [r7, #66] ; 0x42
8005cd8: 687a ldr r2, [r7, #4]
8005cda: 683b ldr r3, [r7, #0]
8005cdc: 781b ldrb r3, [r3, #0]
8005cde: 009b lsls r3, r3, #2
8005ce0: 441a add r2, r3
8005ce2: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42
8005ce6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005cea: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005cee: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005cf2: f043 0380 orr.w r3, r3, #128 ; 0x80
8005cf6: b29b uxth r3, r3
8005cf8: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005cfa: 687a ldr r2, [r7, #4]
8005cfc: 683b ldr r3, [r7, #0]
8005cfe: 781b ldrb r3, [r3, #0]
8005d00: 009b lsls r3, r3, #2
8005d02: 4413 add r3, r2
8005d04: 881b ldrh r3, [r3, #0]
8005d06: b29b uxth r3, r3
8005d08: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005d0c: f023 0370 bic.w r3, r3, #112 ; 0x70
8005d10: 87fb strh r3, [r7, #62] ; 0x3e
8005d12: 687a ldr r2, [r7, #4]
8005d14: 683b ldr r3, [r7, #0]
8005d16: 781b ldrb r3, [r3, #0]
8005d18: 009b lsls r3, r3, #2
8005d1a: 441a add r2, r3
8005d1c: 8ffb ldrh r3, [r7, #62] ; 0x3e
8005d1e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005d22: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005d26: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005d2a: f043 0380 orr.w r3, r3, #128 ; 0x80
8005d2e: b29b uxth r3, r3
8005d30: 8013 strh r3, [r2, #0]
}
}
return ret;
8005d32: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
}
8005d36: 4618 mov r0, r3
8005d38: 376c adds r7, #108 ; 0x6c
8005d3a: 46bd mov sp, r7
8005d3c: bc80 pop {r7}
8005d3e: 4770 bx lr
08005d40 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8005d40: b480 push {r7}
8005d42: b08d sub sp, #52 ; 0x34
8005d44: af00 add r7, sp, #0
8005d46: 6078 str r0, [r7, #4]
8005d48: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8005d4a: 683b ldr r3, [r7, #0]
8005d4c: 7b1b ldrb r3, [r3, #12]
8005d4e: 2b00 cmp r3, #0
8005d50: f040 808e bne.w 8005e70 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
8005d54: 683b ldr r3, [r7, #0]
8005d56: 785b ldrb r3, [r3, #1]
8005d58: 2b00 cmp r3, #0
8005d5a: d044 beq.n 8005de6 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005d5c: 687a ldr r2, [r7, #4]
8005d5e: 683b ldr r3, [r7, #0]
8005d60: 781b ldrb r3, [r3, #0]
8005d62: 009b lsls r3, r3, #2
8005d64: 4413 add r3, r2
8005d66: 881b ldrh r3, [r3, #0]
8005d68: 81bb strh r3, [r7, #12]
8005d6a: 89bb ldrh r3, [r7, #12]
8005d6c: f003 0340 and.w r3, r3, #64 ; 0x40
8005d70: 2b00 cmp r3, #0
8005d72: d01b beq.n 8005dac <USB_DeactivateEndpoint+0x6c>
8005d74: 687a ldr r2, [r7, #4]
8005d76: 683b ldr r3, [r7, #0]
8005d78: 781b ldrb r3, [r3, #0]
8005d7a: 009b lsls r3, r3, #2
8005d7c: 4413 add r3, r2
8005d7e: 881b ldrh r3, [r3, #0]
8005d80: b29b uxth r3, r3
8005d82: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005d86: f023 0370 bic.w r3, r3, #112 ; 0x70
8005d8a: 817b strh r3, [r7, #10]
8005d8c: 687a ldr r2, [r7, #4]
8005d8e: 683b ldr r3, [r7, #0]
8005d90: 781b ldrb r3, [r3, #0]
8005d92: 009b lsls r3, r3, #2
8005d94: 441a add r2, r3
8005d96: 897b ldrh r3, [r7, #10]
8005d98: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005d9c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005da0: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005da4: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005da8: b29b uxth r3, r3
8005daa: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005dac: 687a ldr r2, [r7, #4]
8005dae: 683b ldr r3, [r7, #0]
8005db0: 781b ldrb r3, [r3, #0]
8005db2: 009b lsls r3, r3, #2
8005db4: 4413 add r3, r2
8005db6: 881b ldrh r3, [r3, #0]
8005db8: b29b uxth r3, r3
8005dba: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005dbe: f023 0340 bic.w r3, r3, #64 ; 0x40
8005dc2: 813b strh r3, [r7, #8]
8005dc4: 687a ldr r2, [r7, #4]
8005dc6: 683b ldr r3, [r7, #0]
8005dc8: 781b ldrb r3, [r3, #0]
8005dca: 009b lsls r3, r3, #2
8005dcc: 441a add r2, r3
8005dce: 893b ldrh r3, [r7, #8]
8005dd0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005dd4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005dd8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005ddc: f043 0380 orr.w r3, r3, #128 ; 0x80
8005de0: b29b uxth r3, r3
8005de2: 8013 strh r3, [r2, #0]
8005de4: e192 b.n 800610c <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005de6: 687a ldr r2, [r7, #4]
8005de8: 683b ldr r3, [r7, #0]
8005dea: 781b ldrb r3, [r3, #0]
8005dec: 009b lsls r3, r3, #2
8005dee: 4413 add r3, r2
8005df0: 881b ldrh r3, [r3, #0]
8005df2: 827b strh r3, [r7, #18]
8005df4: 8a7b ldrh r3, [r7, #18]
8005df6: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005dfa: 2b00 cmp r3, #0
8005dfc: d01b beq.n 8005e36 <USB_DeactivateEndpoint+0xf6>
8005dfe: 687a ldr r2, [r7, #4]
8005e00: 683b ldr r3, [r7, #0]
8005e02: 781b ldrb r3, [r3, #0]
8005e04: 009b lsls r3, r3, #2
8005e06: 4413 add r3, r2
8005e08: 881b ldrh r3, [r3, #0]
8005e0a: b29b uxth r3, r3
8005e0c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005e10: f023 0370 bic.w r3, r3, #112 ; 0x70
8005e14: 823b strh r3, [r7, #16]
8005e16: 687a ldr r2, [r7, #4]
8005e18: 683b ldr r3, [r7, #0]
8005e1a: 781b ldrb r3, [r3, #0]
8005e1c: 009b lsls r3, r3, #2
8005e1e: 441a add r2, r3
8005e20: 8a3b ldrh r3, [r7, #16]
8005e22: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005e26: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005e2a: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005e2e: f043 0380 orr.w r3, r3, #128 ; 0x80
8005e32: b29b uxth r3, r3
8005e34: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005e36: 687a ldr r2, [r7, #4]
8005e38: 683b ldr r3, [r7, #0]
8005e3a: 781b ldrb r3, [r3, #0]
8005e3c: 009b lsls r3, r3, #2
8005e3e: 4413 add r3, r2
8005e40: 881b ldrh r3, [r3, #0]
8005e42: b29b uxth r3, r3
8005e44: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005e48: f023 0370 bic.w r3, r3, #112 ; 0x70
8005e4c: 81fb strh r3, [r7, #14]
8005e4e: 687a ldr r2, [r7, #4]
8005e50: 683b ldr r3, [r7, #0]
8005e52: 781b ldrb r3, [r3, #0]
8005e54: 009b lsls r3, r3, #2
8005e56: 441a add r2, r3
8005e58: 89fb ldrh r3, [r7, #14]
8005e5a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005e5e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005e62: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005e66: f043 0380 orr.w r3, r3, #128 ; 0x80
8005e6a: b29b uxth r3, r3
8005e6c: 8013 strh r3, [r2, #0]
8005e6e: e14d b.n 800610c <USB_DeactivateEndpoint+0x3cc>
}
}
/*Double Buffer*/
else
{
if (ep->is_in == 0U)
8005e70: 683b ldr r3, [r7, #0]
8005e72: 785b ldrb r3, [r3, #1]
8005e74: 2b00 cmp r3, #0
8005e76: f040 80a5 bne.w 8005fc4 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005e7a: 687a ldr r2, [r7, #4]
8005e7c: 683b ldr r3, [r7, #0]
8005e7e: 781b ldrb r3, [r3, #0]
8005e80: 009b lsls r3, r3, #2
8005e82: 4413 add r3, r2
8005e84: 881b ldrh r3, [r3, #0]
8005e86: 843b strh r3, [r7, #32]
8005e88: 8c3b ldrh r3, [r7, #32]
8005e8a: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005e8e: 2b00 cmp r3, #0
8005e90: d01b beq.n 8005eca <USB_DeactivateEndpoint+0x18a>
8005e92: 687a ldr r2, [r7, #4]
8005e94: 683b ldr r3, [r7, #0]
8005e96: 781b ldrb r3, [r3, #0]
8005e98: 009b lsls r3, r3, #2
8005e9a: 4413 add r3, r2
8005e9c: 881b ldrh r3, [r3, #0]
8005e9e: b29b uxth r3, r3
8005ea0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005ea4: f023 0370 bic.w r3, r3, #112 ; 0x70
8005ea8: 83fb strh r3, [r7, #30]
8005eaa: 687a ldr r2, [r7, #4]
8005eac: 683b ldr r3, [r7, #0]
8005eae: 781b ldrb r3, [r3, #0]
8005eb0: 009b lsls r3, r3, #2
8005eb2: 441a add r2, r3
8005eb4: 8bfb ldrh r3, [r7, #30]
8005eb6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005eba: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005ebe: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005ec2: f043 0380 orr.w r3, r3, #128 ; 0x80
8005ec6: b29b uxth r3, r3
8005ec8: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005eca: 687a ldr r2, [r7, #4]
8005ecc: 683b ldr r3, [r7, #0]
8005ece: 781b ldrb r3, [r3, #0]
8005ed0: 009b lsls r3, r3, #2
8005ed2: 4413 add r3, r2
8005ed4: 881b ldrh r3, [r3, #0]
8005ed6: 83bb strh r3, [r7, #28]
8005ed8: 8bbb ldrh r3, [r7, #28]
8005eda: f003 0340 and.w r3, r3, #64 ; 0x40
8005ede: 2b00 cmp r3, #0
8005ee0: d01b beq.n 8005f1a <USB_DeactivateEndpoint+0x1da>
8005ee2: 687a ldr r2, [r7, #4]
8005ee4: 683b ldr r3, [r7, #0]
8005ee6: 781b ldrb r3, [r3, #0]
8005ee8: 009b lsls r3, r3, #2
8005eea: 4413 add r3, r2
8005eec: 881b ldrh r3, [r3, #0]
8005eee: b29b uxth r3, r3
8005ef0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005ef4: f023 0370 bic.w r3, r3, #112 ; 0x70
8005ef8: 837b strh r3, [r7, #26]
8005efa: 687a ldr r2, [r7, #4]
8005efc: 683b ldr r3, [r7, #0]
8005efe: 781b ldrb r3, [r3, #0]
8005f00: 009b lsls r3, r3, #2
8005f02: 441a add r2, r3
8005f04: 8b7b ldrh r3, [r7, #26]
8005f06: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005f0a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005f0e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005f12: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005f16: b29b uxth r3, r3
8005f18: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
8005f1a: 687a ldr r2, [r7, #4]
8005f1c: 683b ldr r3, [r7, #0]
8005f1e: 781b ldrb r3, [r3, #0]
8005f20: 009b lsls r3, r3, #2
8005f22: 4413 add r3, r2
8005f24: 881b ldrh r3, [r3, #0]
8005f26: b29b uxth r3, r3
8005f28: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005f2c: f023 0370 bic.w r3, r3, #112 ; 0x70
8005f30: 833b strh r3, [r7, #24]
8005f32: 687a ldr r2, [r7, #4]
8005f34: 683b ldr r3, [r7, #0]
8005f36: 781b ldrb r3, [r3, #0]
8005f38: 009b lsls r3, r3, #2
8005f3a: 441a add r2, r3
8005f3c: 8b3b ldrh r3, [r7, #24]
8005f3e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005f42: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005f46: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005f4a: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005f4e: b29b uxth r3, r3
8005f50: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005f52: 687a ldr r2, [r7, #4]
8005f54: 683b ldr r3, [r7, #0]
8005f56: 781b ldrb r3, [r3, #0]
8005f58: 009b lsls r3, r3, #2
8005f5a: 4413 add r3, r2
8005f5c: 881b ldrh r3, [r3, #0]
8005f5e: b29b uxth r3, r3
8005f60: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005f64: f023 0370 bic.w r3, r3, #112 ; 0x70
8005f68: 82fb strh r3, [r7, #22]
8005f6a: 687a ldr r2, [r7, #4]
8005f6c: 683b ldr r3, [r7, #0]
8005f6e: 781b ldrb r3, [r3, #0]
8005f70: 009b lsls r3, r3, #2
8005f72: 441a add r2, r3
8005f74: 8afb ldrh r3, [r7, #22]
8005f76: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005f7a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005f7e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005f82: f043 0380 orr.w r3, r3, #128 ; 0x80
8005f86: b29b uxth r3, r3
8005f88: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005f8a: 687a ldr r2, [r7, #4]
8005f8c: 683b ldr r3, [r7, #0]
8005f8e: 781b ldrb r3, [r3, #0]
8005f90: 009b lsls r3, r3, #2
8005f92: 4413 add r3, r2
8005f94: 881b ldrh r3, [r3, #0]
8005f96: b29b uxth r3, r3
8005f98: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005f9c: f023 0340 bic.w r3, r3, #64 ; 0x40
8005fa0: 82bb strh r3, [r7, #20]
8005fa2: 687a ldr r2, [r7, #4]
8005fa4: 683b ldr r3, [r7, #0]
8005fa6: 781b ldrb r3, [r3, #0]
8005fa8: 009b lsls r3, r3, #2
8005faa: 441a add r2, r3
8005fac: 8abb ldrh r3, [r7, #20]
8005fae: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005fb2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005fb6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005fba: f043 0380 orr.w r3, r3, #128 ; 0x80
8005fbe: b29b uxth r3, r3
8005fc0: 8013 strh r3, [r2, #0]
8005fc2: e0a3 b.n 800610c <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005fc4: 687a ldr r2, [r7, #4]
8005fc6: 683b ldr r3, [r7, #0]
8005fc8: 781b ldrb r3, [r3, #0]
8005fca: 009b lsls r3, r3, #2
8005fcc: 4413 add r3, r2
8005fce: 881b ldrh r3, [r3, #0]
8005fd0: 85fb strh r3, [r7, #46] ; 0x2e
8005fd2: 8dfb ldrh r3, [r7, #46] ; 0x2e
8005fd4: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005fd8: 2b00 cmp r3, #0
8005fda: d01b beq.n 8006014 <USB_DeactivateEndpoint+0x2d4>
8005fdc: 687a ldr r2, [r7, #4]
8005fde: 683b ldr r3, [r7, #0]
8005fe0: 781b ldrb r3, [r3, #0]
8005fe2: 009b lsls r3, r3, #2
8005fe4: 4413 add r3, r2
8005fe6: 881b ldrh r3, [r3, #0]
8005fe8: b29b uxth r3, r3
8005fea: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005fee: f023 0370 bic.w r3, r3, #112 ; 0x70
8005ff2: 85bb strh r3, [r7, #44] ; 0x2c
8005ff4: 687a ldr r2, [r7, #4]
8005ff6: 683b ldr r3, [r7, #0]
8005ff8: 781b ldrb r3, [r3, #0]
8005ffa: 009b lsls r3, r3, #2
8005ffc: 441a add r2, r3
8005ffe: 8dbb ldrh r3, [r7, #44] ; 0x2c
8006000: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006004: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006008: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800600c: f043 0380 orr.w r3, r3, #128 ; 0x80
8006010: b29b uxth r3, r3
8006012: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006014: 687a ldr r2, [r7, #4]
8006016: 683b ldr r3, [r7, #0]
8006018: 781b ldrb r3, [r3, #0]
800601a: 009b lsls r3, r3, #2
800601c: 4413 add r3, r2
800601e: 881b ldrh r3, [r3, #0]
8006020: 857b strh r3, [r7, #42] ; 0x2a
8006022: 8d7b ldrh r3, [r7, #42] ; 0x2a
8006024: f003 0340 and.w r3, r3, #64 ; 0x40
8006028: 2b00 cmp r3, #0
800602a: d01b beq.n 8006064 <USB_DeactivateEndpoint+0x324>
800602c: 687a ldr r2, [r7, #4]
800602e: 683b ldr r3, [r7, #0]
8006030: 781b ldrb r3, [r3, #0]
8006032: 009b lsls r3, r3, #2
8006034: 4413 add r3, r2
8006036: 881b ldrh r3, [r3, #0]
8006038: b29b uxth r3, r3
800603a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800603e: f023 0370 bic.w r3, r3, #112 ; 0x70
8006042: 853b strh r3, [r7, #40] ; 0x28
8006044: 687a ldr r2, [r7, #4]
8006046: 683b ldr r3, [r7, #0]
8006048: 781b ldrb r3, [r3, #0]
800604a: 009b lsls r3, r3, #2
800604c: 441a add r2, r3
800604e: 8d3b ldrh r3, [r7, #40] ; 0x28
8006050: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006054: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006058: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800605c: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8006060: b29b uxth r3, r3
8006062: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
8006064: 687a ldr r2, [r7, #4]
8006066: 683b ldr r3, [r7, #0]
8006068: 781b ldrb r3, [r3, #0]
800606a: 009b lsls r3, r3, #2
800606c: 4413 add r3, r2
800606e: 881b ldrh r3, [r3, #0]
8006070: b29b uxth r3, r3
8006072: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8006076: f023 0370 bic.w r3, r3, #112 ; 0x70
800607a: 84fb strh r3, [r7, #38] ; 0x26
800607c: 687a ldr r2, [r7, #4]
800607e: 683b ldr r3, [r7, #0]
8006080: 781b ldrb r3, [r3, #0]
8006082: 009b lsls r3, r3, #2
8006084: 441a add r2, r3
8006086: 8cfb ldrh r3, [r7, #38] ; 0x26
8006088: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800608c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006090: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8006094: f043 0380 orr.w r3, r3, #128 ; 0x80
8006098: b29b uxth r3, r3
800609a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800609c: 687a ldr r2, [r7, #4]
800609e: 683b ldr r3, [r7, #0]
80060a0: 781b ldrb r3, [r3, #0]
80060a2: 009b lsls r3, r3, #2
80060a4: 4413 add r3, r2
80060a6: 881b ldrh r3, [r3, #0]
80060a8: b29b uxth r3, r3
80060aa: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80060ae: f023 0340 bic.w r3, r3, #64 ; 0x40
80060b2: 84bb strh r3, [r7, #36] ; 0x24
80060b4: 687a ldr r2, [r7, #4]
80060b6: 683b ldr r3, [r7, #0]
80060b8: 781b ldrb r3, [r3, #0]
80060ba: 009b lsls r3, r3, #2
80060bc: 441a add r2, r3
80060be: 8cbb ldrh r3, [r7, #36] ; 0x24
80060c0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80060c4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80060c8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80060cc: f043 0380 orr.w r3, r3, #128 ; 0x80
80060d0: b29b uxth r3, r3
80060d2: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80060d4: 687a ldr r2, [r7, #4]
80060d6: 683b ldr r3, [r7, #0]
80060d8: 781b ldrb r3, [r3, #0]
80060da: 009b lsls r3, r3, #2
80060dc: 4413 add r3, r2
80060de: 881b ldrh r3, [r3, #0]
80060e0: b29b uxth r3, r3
80060e2: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80060e6: f023 0370 bic.w r3, r3, #112 ; 0x70
80060ea: 847b strh r3, [r7, #34] ; 0x22
80060ec: 687a ldr r2, [r7, #4]
80060ee: 683b ldr r3, [r7, #0]
80060f0: 781b ldrb r3, [r3, #0]
80060f2: 009b lsls r3, r3, #2
80060f4: 441a add r2, r3
80060f6: 8c7b ldrh r3, [r7, #34] ; 0x22
80060f8: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80060fc: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006100: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8006104: f043 0380 orr.w r3, r3, #128 ; 0x80
8006108: b29b uxth r3, r3
800610a: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800610c: 2300 movs r3, #0
}
800610e: 4618 mov r0, r3
8006110: 3734 adds r7, #52 ; 0x34
8006112: 46bd mov sp, r7
8006114: bc80 pop {r7}
8006116: 4770 bx lr
08006118 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006118: b580 push {r7, lr}
800611a: b0c4 sub sp, #272 ; 0x110
800611c: af00 add r7, sp, #0
800611e: 1d3b adds r3, r7, #4
8006120: 6018 str r0, [r3, #0]
8006122: 463b mov r3, r7
8006124: 6019 str r1, [r3, #0]
uint32_t len;
uint16_t pmabuffer;
uint16_t wEPVal;
/* IN endpoint */
if (ep->is_in == 1U)
8006126: 463b mov r3, r7
8006128: 681b ldr r3, [r3, #0]
800612a: 785b ldrb r3, [r3, #1]
800612c: 2b01 cmp r3, #1
800612e: f040 8557 bne.w 8006be0 <USB_EPStartXfer+0xac8>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
8006132: 463b mov r3, r7
8006134: 681b ldr r3, [r3, #0]
8006136: 699a ldr r2, [r3, #24]
8006138: 463b mov r3, r7
800613a: 681b ldr r3, [r3, #0]
800613c: 691b ldr r3, [r3, #16]
800613e: 429a cmp r2, r3
8006140: d905 bls.n 800614e <USB_EPStartXfer+0x36>
{
len = ep->maxpacket;
8006142: 463b mov r3, r7
8006144: 681b ldr r3, [r3, #0]
8006146: 691b ldr r3, [r3, #16]
8006148: f8c7 310c str.w r3, [r7, #268] ; 0x10c
800614c: e004 b.n 8006158 <USB_EPStartXfer+0x40>
}
else
{
len = ep->xfer_len;
800614e: 463b mov r3, r7
8006150: 681b ldr r3, [r3, #0]
8006152: 699b ldr r3, [r3, #24]
8006154: f8c7 310c str.w r3, [r7, #268] ; 0x10c
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8006158: 463b mov r3, r7
800615a: 681b ldr r3, [r3, #0]
800615c: 7b1b ldrb r3, [r3, #12]
800615e: 2b00 cmp r3, #0
8006160: d12c bne.n 80061bc <USB_EPStartXfer+0xa4>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8006162: 463b mov r3, r7
8006164: 681b ldr r3, [r3, #0]
8006166: 6959 ldr r1, [r3, #20]
8006168: 463b mov r3, r7
800616a: 681b ldr r3, [r3, #0]
800616c: 88da ldrh r2, [r3, #6]
800616e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006172: b29b uxth r3, r3
8006174: 1d38 adds r0, r7, #4
8006176: 6800 ldr r0, [r0, #0]
8006178: f001 fa2c bl 80075d4 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800617c: 1d3b adds r3, r7, #4
800617e: 681b ldr r3, [r3, #0]
8006180: 617b str r3, [r7, #20]
8006182: 1d3b adds r3, r7, #4
8006184: 681b ldr r3, [r3, #0]
8006186: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800618a: b29b uxth r3, r3
800618c: 461a mov r2, r3
800618e: 697b ldr r3, [r7, #20]
8006190: 4413 add r3, r2
8006192: 617b str r3, [r7, #20]
8006194: 463b mov r3, r7
8006196: 681b ldr r3, [r3, #0]
8006198: 781b ldrb r3, [r3, #0]
800619a: 011a lsls r2, r3, #4
800619c: 697b ldr r3, [r7, #20]
800619e: 4413 add r3, r2
80061a0: f203 4204 addw r2, r3, #1028 ; 0x404
80061a4: f107 0310 add.w r3, r7, #16
80061a8: 601a str r2, [r3, #0]
80061aa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80061ae: b29a uxth r2, r3
80061b0: f107 0310 add.w r3, r7, #16
80061b4: 681b ldr r3, [r3, #0]
80061b6: 801a strh r2, [r3, #0]
80061b8: f000 bcdd b.w 8006b76 <USB_EPStartXfer+0xa5e>
}
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
80061bc: 463b mov r3, r7
80061be: 681b ldr r3, [r3, #0]
80061c0: 78db ldrb r3, [r3, #3]
80061c2: 2b02 cmp r3, #2
80061c4: f040 8347 bne.w 8006856 <USB_EPStartXfer+0x73e>
{
if (ep->xfer_len_db > ep->maxpacket)
80061c8: 463b mov r3, r7
80061ca: 681b ldr r3, [r3, #0]
80061cc: 6a1a ldr r2, [r3, #32]
80061ce: 463b mov r3, r7
80061d0: 681b ldr r3, [r3, #0]
80061d2: 691b ldr r3, [r3, #16]
80061d4: 429a cmp r2, r3
80061d6: f240 82eb bls.w 80067b0 <USB_EPStartXfer+0x698>
{
/* enable double buffer */
PCD_SET_EP_DBUF(USBx, ep->num);
80061da: 1d3b adds r3, r7, #4
80061dc: 681a ldr r2, [r3, #0]
80061de: 463b mov r3, r7
80061e0: 681b ldr r3, [r3, #0]
80061e2: 781b ldrb r3, [r3, #0]
80061e4: 009b lsls r3, r3, #2
80061e6: 4413 add r3, r2
80061e8: 881b ldrh r3, [r3, #0]
80061ea: b29b uxth r3, r3
80061ec: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80061f0: f023 0370 bic.w r3, r3, #112 ; 0x70
80061f4: f8a7 305a strh.w r3, [r7, #90] ; 0x5a
80061f8: 1d3b adds r3, r7, #4
80061fa: 681a ldr r2, [r3, #0]
80061fc: 463b mov r3, r7
80061fe: 681b ldr r3, [r3, #0]
8006200: 781b ldrb r3, [r3, #0]
8006202: 009b lsls r3, r3, #2
8006204: 441a add r2, r3
8006206: f8b7 305a ldrh.w r3, [r7, #90] ; 0x5a
800620a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800620e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006212: f443 4301 orr.w r3, r3, #33024 ; 0x8100
8006216: f043 0380 orr.w r3, r3, #128 ; 0x80
800621a: b29b uxth r3, r3
800621c: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800621e: 463b mov r3, r7
8006220: 681b ldr r3, [r3, #0]
8006222: 6a1a ldr r2, [r3, #32]
8006224: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006228: 1ad2 subs r2, r2, r3
800622a: 463b mov r3, r7
800622c: 681b ldr r3, [r3, #0]
800622e: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8006230: 1d3b adds r3, r7, #4
8006232: 681a ldr r2, [r3, #0]
8006234: 463b mov r3, r7
8006236: 681b ldr r3, [r3, #0]
8006238: 781b ldrb r3, [r3, #0]
800623a: 009b lsls r3, r3, #2
800623c: 4413 add r3, r2
800623e: 881b ldrh r3, [r3, #0]
8006240: b29b uxth r3, r3
8006242: f003 0340 and.w r3, r3, #64 ; 0x40
8006246: 2b00 cmp r3, #0
8006248: f000 8159 beq.w 80064fe <USB_EPStartXfer+0x3e6>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800624c: 1d3b adds r3, r7, #4
800624e: 681b ldr r3, [r3, #0]
8006250: 637b str r3, [r7, #52] ; 0x34
8006252: 463b mov r3, r7
8006254: 681b ldr r3, [r3, #0]
8006256: 785b ldrb r3, [r3, #1]
8006258: 2b00 cmp r3, #0
800625a: d164 bne.n 8006326 <USB_EPStartXfer+0x20e>
800625c: 1d3b adds r3, r7, #4
800625e: 681b ldr r3, [r3, #0]
8006260: 62fb str r3, [r7, #44] ; 0x2c
8006262: 1d3b adds r3, r7, #4
8006264: 681b ldr r3, [r3, #0]
8006266: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800626a: b29b uxth r3, r3
800626c: 461a mov r2, r3
800626e: 6afb ldr r3, [r7, #44] ; 0x2c
8006270: 4413 add r3, r2
8006272: 62fb str r3, [r7, #44] ; 0x2c
8006274: 463b mov r3, r7
8006276: 681b ldr r3, [r3, #0]
8006278: 781b ldrb r3, [r3, #0]
800627a: 011a lsls r2, r3, #4
800627c: 6afb ldr r3, [r7, #44] ; 0x2c
800627e: 4413 add r3, r2
8006280: f203 430c addw r3, r3, #1036 ; 0x40c
8006284: 62bb str r3, [r7, #40] ; 0x28
8006286: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800628a: 2b00 cmp r3, #0
800628c: d112 bne.n 80062b4 <USB_EPStartXfer+0x19c>
800628e: 6abb ldr r3, [r7, #40] ; 0x28
8006290: 881b ldrh r3, [r3, #0]
8006292: b29b uxth r3, r3
8006294: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006298: b29a uxth r2, r3
800629a: 6abb ldr r3, [r7, #40] ; 0x28
800629c: 801a strh r2, [r3, #0]
800629e: 6abb ldr r3, [r7, #40] ; 0x28
80062a0: 881b ldrh r3, [r3, #0]
80062a2: b29b uxth r3, r3
80062a4: ea6f 4343 mvn.w r3, r3, lsl #17
80062a8: ea6f 4353 mvn.w r3, r3, lsr #17
80062ac: b29a uxth r2, r3
80062ae: 6abb ldr r3, [r7, #40] ; 0x28
80062b0: 801a strh r2, [r3, #0]
80062b2: e054 b.n 800635e <USB_EPStartXfer+0x246>
80062b4: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80062b8: 2b3e cmp r3, #62 ; 0x3e
80062ba: d817 bhi.n 80062ec <USB_EPStartXfer+0x1d4>
80062bc: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80062c0: 085b lsrs r3, r3, #1
80062c2: f8c7 3104 str.w r3, [r7, #260] ; 0x104
80062c6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80062ca: f003 0301 and.w r3, r3, #1
80062ce: 2b00 cmp r3, #0
80062d0: d004 beq.n 80062dc <USB_EPStartXfer+0x1c4>
80062d2: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80062d6: 3301 adds r3, #1
80062d8: f8c7 3104 str.w r3, [r7, #260] ; 0x104
80062dc: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80062e0: b29b uxth r3, r3
80062e2: 029b lsls r3, r3, #10
80062e4: b29a uxth r2, r3
80062e6: 6abb ldr r3, [r7, #40] ; 0x28
80062e8: 801a strh r2, [r3, #0]
80062ea: e038 b.n 800635e <USB_EPStartXfer+0x246>
80062ec: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80062f0: 095b lsrs r3, r3, #5
80062f2: f8c7 3104 str.w r3, [r7, #260] ; 0x104
80062f6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80062fa: f003 031f and.w r3, r3, #31
80062fe: 2b00 cmp r3, #0
8006300: d104 bne.n 800630c <USB_EPStartXfer+0x1f4>
8006302: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006306: 3b01 subs r3, #1
8006308: f8c7 3104 str.w r3, [r7, #260] ; 0x104
800630c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006310: b29b uxth r3, r3
8006312: 029b lsls r3, r3, #10
8006314: b29b uxth r3, r3
8006316: ea6f 4343 mvn.w r3, r3, lsl #17
800631a: ea6f 4353 mvn.w r3, r3, lsr #17
800631e: b29a uxth r2, r3
8006320: 6abb ldr r3, [r7, #40] ; 0x28
8006322: 801a strh r2, [r3, #0]
8006324: e01b b.n 800635e <USB_EPStartXfer+0x246>
8006326: 463b mov r3, r7
8006328: 681b ldr r3, [r3, #0]
800632a: 785b ldrb r3, [r3, #1]
800632c: 2b01 cmp r3, #1
800632e: d116 bne.n 800635e <USB_EPStartXfer+0x246>
8006330: 1d3b adds r3, r7, #4
8006332: 681b ldr r3, [r3, #0]
8006334: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006338: b29b uxth r3, r3
800633a: 461a mov r2, r3
800633c: 6b7b ldr r3, [r7, #52] ; 0x34
800633e: 4413 add r3, r2
8006340: 637b str r3, [r7, #52] ; 0x34
8006342: 463b mov r3, r7
8006344: 681b ldr r3, [r3, #0]
8006346: 781b ldrb r3, [r3, #0]
8006348: 011a lsls r2, r3, #4
800634a: 6b7b ldr r3, [r7, #52] ; 0x34
800634c: 4413 add r3, r2
800634e: f203 430c addw r3, r3, #1036 ; 0x40c
8006352: 633b str r3, [r7, #48] ; 0x30
8006354: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006358: b29a uxth r2, r3
800635a: 6b3b ldr r3, [r7, #48] ; 0x30
800635c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800635e: 463b mov r3, r7
8006360: 681b ldr r3, [r3, #0]
8006362: 895b ldrh r3, [r3, #10]
8006364: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006368: 463b mov r3, r7
800636a: 681b ldr r3, [r3, #0]
800636c: 6959 ldr r1, [r3, #20]
800636e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006372: b29b uxth r3, r3
8006374: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
8006378: 1d38 adds r0, r7, #4
800637a: 6800 ldr r0, [r0, #0]
800637c: f001 f92a bl 80075d4 <USB_WritePMA>
ep->xfer_buff += len;
8006380: 463b mov r3, r7
8006382: 681b ldr r3, [r3, #0]
8006384: 695a ldr r2, [r3, #20]
8006386: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800638a: 441a add r2, r3
800638c: 463b mov r3, r7
800638e: 681b ldr r3, [r3, #0]
8006390: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8006392: 463b mov r3, r7
8006394: 681b ldr r3, [r3, #0]
8006396: 6a1a ldr r2, [r3, #32]
8006398: 463b mov r3, r7
800639a: 681b ldr r3, [r3, #0]
800639c: 691b ldr r3, [r3, #16]
800639e: 429a cmp r2, r3
80063a0: d909 bls.n 80063b6 <USB_EPStartXfer+0x29e>
{
ep->xfer_len_db -= len;
80063a2: 463b mov r3, r7
80063a4: 681b ldr r3, [r3, #0]
80063a6: 6a1a ldr r2, [r3, #32]
80063a8: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80063ac: 1ad2 subs r2, r2, r3
80063ae: 463b mov r3, r7
80063b0: 681b ldr r3, [r3, #0]
80063b2: 621a str r2, [r3, #32]
80063b4: e008 b.n 80063c8 <USB_EPStartXfer+0x2b0>
}
else
{
len = ep->xfer_len_db;
80063b6: 463b mov r3, r7
80063b8: 681b ldr r3, [r3, #0]
80063ba: 6a1b ldr r3, [r3, #32]
80063bc: f8c7 310c str.w r3, [r7, #268] ; 0x10c
ep->xfer_len_db = 0U;
80063c0: 463b mov r3, r7
80063c2: 681b ldr r3, [r3, #0]
80063c4: 2200 movs r2, #0
80063c6: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
80063c8: 463b mov r3, r7
80063ca: 681b ldr r3, [r3, #0]
80063cc: 785b ldrb r3, [r3, #1]
80063ce: 2b00 cmp r3, #0
80063d0: d164 bne.n 800649c <USB_EPStartXfer+0x384>
80063d2: 1d3b adds r3, r7, #4
80063d4: 681b ldr r3, [r3, #0]
80063d6: 61fb str r3, [r7, #28]
80063d8: 1d3b adds r3, r7, #4
80063da: 681b ldr r3, [r3, #0]
80063dc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80063e0: b29b uxth r3, r3
80063e2: 461a mov r2, r3
80063e4: 69fb ldr r3, [r7, #28]
80063e6: 4413 add r3, r2
80063e8: 61fb str r3, [r7, #28]
80063ea: 463b mov r3, r7
80063ec: 681b ldr r3, [r3, #0]
80063ee: 781b ldrb r3, [r3, #0]
80063f0: 011a lsls r2, r3, #4
80063f2: 69fb ldr r3, [r7, #28]
80063f4: 4413 add r3, r2
80063f6: f203 4304 addw r3, r3, #1028 ; 0x404
80063fa: 61bb str r3, [r7, #24]
80063fc: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006400: 2b00 cmp r3, #0
8006402: d112 bne.n 800642a <USB_EPStartXfer+0x312>
8006404: 69bb ldr r3, [r7, #24]
8006406: 881b ldrh r3, [r3, #0]
8006408: b29b uxth r3, r3
800640a: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800640e: b29a uxth r2, r3
8006410: 69bb ldr r3, [r7, #24]
8006412: 801a strh r2, [r3, #0]
8006414: 69bb ldr r3, [r7, #24]
8006416: 881b ldrh r3, [r3, #0]
8006418: b29b uxth r3, r3
800641a: ea6f 4343 mvn.w r3, r3, lsl #17
800641e: ea6f 4353 mvn.w r3, r3, lsr #17
8006422: b29a uxth r2, r3
8006424: 69bb ldr r3, [r7, #24]
8006426: 801a strh r2, [r3, #0]
8006428: e057 b.n 80064da <USB_EPStartXfer+0x3c2>
800642a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800642e: 2b3e cmp r3, #62 ; 0x3e
8006430: d817 bhi.n 8006462 <USB_EPStartXfer+0x34a>
8006432: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006436: 085b lsrs r3, r3, #1
8006438: f8c7 3100 str.w r3, [r7, #256] ; 0x100
800643c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006440: f003 0301 and.w r3, r3, #1
8006444: 2b00 cmp r3, #0
8006446: d004 beq.n 8006452 <USB_EPStartXfer+0x33a>
8006448: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
800644c: 3301 adds r3, #1
800644e: f8c7 3100 str.w r3, [r7, #256] ; 0x100
8006452: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
8006456: b29b uxth r3, r3
8006458: 029b lsls r3, r3, #10
800645a: b29a uxth r2, r3
800645c: 69bb ldr r3, [r7, #24]
800645e: 801a strh r2, [r3, #0]
8006460: e03b b.n 80064da <USB_EPStartXfer+0x3c2>
8006462: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006466: 095b lsrs r3, r3, #5
8006468: f8c7 3100 str.w r3, [r7, #256] ; 0x100
800646c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006470: f003 031f and.w r3, r3, #31
8006474: 2b00 cmp r3, #0
8006476: d104 bne.n 8006482 <USB_EPStartXfer+0x36a>
8006478: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
800647c: 3b01 subs r3, #1
800647e: f8c7 3100 str.w r3, [r7, #256] ; 0x100
8006482: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
8006486: b29b uxth r3, r3
8006488: 029b lsls r3, r3, #10
800648a: b29b uxth r3, r3
800648c: ea6f 4343 mvn.w r3, r3, lsl #17
8006490: ea6f 4353 mvn.w r3, r3, lsr #17
8006494: b29a uxth r2, r3
8006496: 69bb ldr r3, [r7, #24]
8006498: 801a strh r2, [r3, #0]
800649a: e01e b.n 80064da <USB_EPStartXfer+0x3c2>
800649c: 463b mov r3, r7
800649e: 681b ldr r3, [r3, #0]
80064a0: 785b ldrb r3, [r3, #1]
80064a2: 2b01 cmp r3, #1
80064a4: d119 bne.n 80064da <USB_EPStartXfer+0x3c2>
80064a6: 1d3b adds r3, r7, #4
80064a8: 681b ldr r3, [r3, #0]
80064aa: 627b str r3, [r7, #36] ; 0x24
80064ac: 1d3b adds r3, r7, #4
80064ae: 681b ldr r3, [r3, #0]
80064b0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80064b4: b29b uxth r3, r3
80064b6: 461a mov r2, r3
80064b8: 6a7b ldr r3, [r7, #36] ; 0x24
80064ba: 4413 add r3, r2
80064bc: 627b str r3, [r7, #36] ; 0x24
80064be: 463b mov r3, r7
80064c0: 681b ldr r3, [r3, #0]
80064c2: 781b ldrb r3, [r3, #0]
80064c4: 011a lsls r2, r3, #4
80064c6: 6a7b ldr r3, [r7, #36] ; 0x24
80064c8: 4413 add r3, r2
80064ca: f203 4304 addw r3, r3, #1028 ; 0x404
80064ce: 623b str r3, [r7, #32]
80064d0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80064d4: b29a uxth r2, r3
80064d6: 6a3b ldr r3, [r7, #32]
80064d8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80064da: 463b mov r3, r7
80064dc: 681b ldr r3, [r3, #0]
80064de: 891b ldrh r3, [r3, #8]
80064e0: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80064e4: 463b mov r3, r7
80064e6: 681b ldr r3, [r3, #0]
80064e8: 6959 ldr r1, [r3, #20]
80064ea: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80064ee: b29b uxth r3, r3
80064f0: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
80064f4: 1d38 adds r0, r7, #4
80064f6: 6800 ldr r0, [r0, #0]
80064f8: f001 f86c bl 80075d4 <USB_WritePMA>
80064fc: e33b b.n 8006b76 <USB_EPStartXfer+0xa5e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
80064fe: 463b mov r3, r7
8006500: 681b ldr r3, [r3, #0]
8006502: 785b ldrb r3, [r3, #1]
8006504: 2b00 cmp r3, #0
8006506: d164 bne.n 80065d2 <USB_EPStartXfer+0x4ba>
8006508: 1d3b adds r3, r7, #4
800650a: 681b ldr r3, [r3, #0]
800650c: 64fb str r3, [r7, #76] ; 0x4c
800650e: 1d3b adds r3, r7, #4
8006510: 681b ldr r3, [r3, #0]
8006512: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006516: b29b uxth r3, r3
8006518: 461a mov r2, r3
800651a: 6cfb ldr r3, [r7, #76] ; 0x4c
800651c: 4413 add r3, r2
800651e: 64fb str r3, [r7, #76] ; 0x4c
8006520: 463b mov r3, r7
8006522: 681b ldr r3, [r3, #0]
8006524: 781b ldrb r3, [r3, #0]
8006526: 011a lsls r2, r3, #4
8006528: 6cfb ldr r3, [r7, #76] ; 0x4c
800652a: 4413 add r3, r2
800652c: f203 4304 addw r3, r3, #1028 ; 0x404
8006530: 64bb str r3, [r7, #72] ; 0x48
8006532: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006536: 2b00 cmp r3, #0
8006538: d112 bne.n 8006560 <USB_EPStartXfer+0x448>
800653a: 6cbb ldr r3, [r7, #72] ; 0x48
800653c: 881b ldrh r3, [r3, #0]
800653e: b29b uxth r3, r3
8006540: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006544: b29a uxth r2, r3
8006546: 6cbb ldr r3, [r7, #72] ; 0x48
8006548: 801a strh r2, [r3, #0]
800654a: 6cbb ldr r3, [r7, #72] ; 0x48
800654c: 881b ldrh r3, [r3, #0]
800654e: b29b uxth r3, r3
8006550: ea6f 4343 mvn.w r3, r3, lsl #17
8006554: ea6f 4353 mvn.w r3, r3, lsr #17
8006558: b29a uxth r2, r3
800655a: 6cbb ldr r3, [r7, #72] ; 0x48
800655c: 801a strh r2, [r3, #0]
800655e: e057 b.n 8006610 <USB_EPStartXfer+0x4f8>
8006560: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006564: 2b3e cmp r3, #62 ; 0x3e
8006566: d817 bhi.n 8006598 <USB_EPStartXfer+0x480>
8006568: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800656c: 085b lsrs r3, r3, #1
800656e: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
8006572: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006576: f003 0301 and.w r3, r3, #1
800657a: 2b00 cmp r3, #0
800657c: d004 beq.n 8006588 <USB_EPStartXfer+0x470>
800657e: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
8006582: 3301 adds r3, #1
8006584: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
8006588: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
800658c: b29b uxth r3, r3
800658e: 029b lsls r3, r3, #10
8006590: b29a uxth r2, r3
8006592: 6cbb ldr r3, [r7, #72] ; 0x48
8006594: 801a strh r2, [r3, #0]
8006596: e03b b.n 8006610 <USB_EPStartXfer+0x4f8>
8006598: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800659c: 095b lsrs r3, r3, #5
800659e: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
80065a2: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80065a6: f003 031f and.w r3, r3, #31
80065aa: 2b00 cmp r3, #0
80065ac: d104 bne.n 80065b8 <USB_EPStartXfer+0x4a0>
80065ae: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
80065b2: 3b01 subs r3, #1
80065b4: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
80065b8: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
80065bc: b29b uxth r3, r3
80065be: 029b lsls r3, r3, #10
80065c0: b29b uxth r3, r3
80065c2: ea6f 4343 mvn.w r3, r3, lsl #17
80065c6: ea6f 4353 mvn.w r3, r3, lsr #17
80065ca: b29a uxth r2, r3
80065cc: 6cbb ldr r3, [r7, #72] ; 0x48
80065ce: 801a strh r2, [r3, #0]
80065d0: e01e b.n 8006610 <USB_EPStartXfer+0x4f8>
80065d2: 463b mov r3, r7
80065d4: 681b ldr r3, [r3, #0]
80065d6: 785b ldrb r3, [r3, #1]
80065d8: 2b01 cmp r3, #1
80065da: d119 bne.n 8006610 <USB_EPStartXfer+0x4f8>
80065dc: 1d3b adds r3, r7, #4
80065de: 681b ldr r3, [r3, #0]
80065e0: 657b str r3, [r7, #84] ; 0x54
80065e2: 1d3b adds r3, r7, #4
80065e4: 681b ldr r3, [r3, #0]
80065e6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80065ea: b29b uxth r3, r3
80065ec: 461a mov r2, r3
80065ee: 6d7b ldr r3, [r7, #84] ; 0x54
80065f0: 4413 add r3, r2
80065f2: 657b str r3, [r7, #84] ; 0x54
80065f4: 463b mov r3, r7
80065f6: 681b ldr r3, [r3, #0]
80065f8: 781b ldrb r3, [r3, #0]
80065fa: 011a lsls r2, r3, #4
80065fc: 6d7b ldr r3, [r7, #84] ; 0x54
80065fe: 4413 add r3, r2
8006600: f203 4304 addw r3, r3, #1028 ; 0x404
8006604: 653b str r3, [r7, #80] ; 0x50
8006606: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800660a: b29a uxth r2, r3
800660c: 6d3b ldr r3, [r7, #80] ; 0x50
800660e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006610: 463b mov r3, r7
8006612: 681b ldr r3, [r3, #0]
8006614: 891b ldrh r3, [r3, #8]
8006616: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800661a: 463b mov r3, r7
800661c: 681b ldr r3, [r3, #0]
800661e: 6959 ldr r1, [r3, #20]
8006620: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006624: b29b uxth r3, r3
8006626: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
800662a: 1d38 adds r0, r7, #4
800662c: 6800 ldr r0, [r0, #0]
800662e: f000 ffd1 bl 80075d4 <USB_WritePMA>
ep->xfer_buff += len;
8006632: 463b mov r3, r7
8006634: 681b ldr r3, [r3, #0]
8006636: 695a ldr r2, [r3, #20]
8006638: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800663c: 441a add r2, r3
800663e: 463b mov r3, r7
8006640: 681b ldr r3, [r3, #0]
8006642: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8006644: 463b mov r3, r7
8006646: 681b ldr r3, [r3, #0]
8006648: 6a1a ldr r2, [r3, #32]
800664a: 463b mov r3, r7
800664c: 681b ldr r3, [r3, #0]
800664e: 691b ldr r3, [r3, #16]
8006650: 429a cmp r2, r3
8006652: d909 bls.n 8006668 <USB_EPStartXfer+0x550>
{
ep->xfer_len_db -= len;
8006654: 463b mov r3, r7
8006656: 681b ldr r3, [r3, #0]
8006658: 6a1a ldr r2, [r3, #32]
800665a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800665e: 1ad2 subs r2, r2, r3
8006660: 463b mov r3, r7
8006662: 681b ldr r3, [r3, #0]
8006664: 621a str r2, [r3, #32]
8006666: e008 b.n 800667a <USB_EPStartXfer+0x562>
}
else
{
len = ep->xfer_len_db;
8006668: 463b mov r3, r7
800666a: 681b ldr r3, [r3, #0]
800666c: 6a1b ldr r3, [r3, #32]
800666e: f8c7 310c str.w r3, [r7, #268] ; 0x10c
ep->xfer_len_db = 0U;
8006672: 463b mov r3, r7
8006674: 681b ldr r3, [r3, #0]
8006676: 2200 movs r2, #0
8006678: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800667a: 1d3b adds r3, r7, #4
800667c: 681b ldr r3, [r3, #0]
800667e: 647b str r3, [r7, #68] ; 0x44
8006680: 463b mov r3, r7
8006682: 681b ldr r3, [r3, #0]
8006684: 785b ldrb r3, [r3, #1]
8006686: 2b00 cmp r3, #0
8006688: d164 bne.n 8006754 <USB_EPStartXfer+0x63c>
800668a: 1d3b adds r3, r7, #4
800668c: 681b ldr r3, [r3, #0]
800668e: 63fb str r3, [r7, #60] ; 0x3c
8006690: 1d3b adds r3, r7, #4
8006692: 681b ldr r3, [r3, #0]
8006694: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006698: b29b uxth r3, r3
800669a: 461a mov r2, r3
800669c: 6bfb ldr r3, [r7, #60] ; 0x3c
800669e: 4413 add r3, r2
80066a0: 63fb str r3, [r7, #60] ; 0x3c
80066a2: 463b mov r3, r7
80066a4: 681b ldr r3, [r3, #0]
80066a6: 781b ldrb r3, [r3, #0]
80066a8: 011a lsls r2, r3, #4
80066aa: 6bfb ldr r3, [r7, #60] ; 0x3c
80066ac: 4413 add r3, r2
80066ae: f203 430c addw r3, r3, #1036 ; 0x40c
80066b2: 63bb str r3, [r7, #56] ; 0x38
80066b4: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80066b8: 2b00 cmp r3, #0
80066ba: d112 bne.n 80066e2 <USB_EPStartXfer+0x5ca>
80066bc: 6bbb ldr r3, [r7, #56] ; 0x38
80066be: 881b ldrh r3, [r3, #0]
80066c0: b29b uxth r3, r3
80066c2: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80066c6: b29a uxth r2, r3
80066c8: 6bbb ldr r3, [r7, #56] ; 0x38
80066ca: 801a strh r2, [r3, #0]
80066cc: 6bbb ldr r3, [r7, #56] ; 0x38
80066ce: 881b ldrh r3, [r3, #0]
80066d0: b29b uxth r3, r3
80066d2: ea6f 4343 mvn.w r3, r3, lsl #17
80066d6: ea6f 4353 mvn.w r3, r3, lsr #17
80066da: b29a uxth r2, r3
80066dc: 6bbb ldr r3, [r7, #56] ; 0x38
80066de: 801a strh r2, [r3, #0]
80066e0: e054 b.n 800678c <USB_EPStartXfer+0x674>
80066e2: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80066e6: 2b3e cmp r3, #62 ; 0x3e
80066e8: d817 bhi.n 800671a <USB_EPStartXfer+0x602>
80066ea: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80066ee: 085b lsrs r3, r3, #1
80066f0: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
80066f4: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80066f8: f003 0301 and.w r3, r3, #1
80066fc: 2b00 cmp r3, #0
80066fe: d004 beq.n 800670a <USB_EPStartXfer+0x5f2>
8006700: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
8006704: 3301 adds r3, #1
8006706: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
800670a: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
800670e: b29b uxth r3, r3
8006710: 029b lsls r3, r3, #10
8006712: b29a uxth r2, r3
8006714: 6bbb ldr r3, [r7, #56] ; 0x38
8006716: 801a strh r2, [r3, #0]
8006718: e038 b.n 800678c <USB_EPStartXfer+0x674>
800671a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800671e: 095b lsrs r3, r3, #5
8006720: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
8006724: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006728: f003 031f and.w r3, r3, #31
800672c: 2b00 cmp r3, #0
800672e: d104 bne.n 800673a <USB_EPStartXfer+0x622>
8006730: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
8006734: 3b01 subs r3, #1
8006736: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
800673a: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
800673e: b29b uxth r3, r3
8006740: 029b lsls r3, r3, #10
8006742: b29b uxth r3, r3
8006744: ea6f 4343 mvn.w r3, r3, lsl #17
8006748: ea6f 4353 mvn.w r3, r3, lsr #17
800674c: b29a uxth r2, r3
800674e: 6bbb ldr r3, [r7, #56] ; 0x38
8006750: 801a strh r2, [r3, #0]
8006752: e01b b.n 800678c <USB_EPStartXfer+0x674>
8006754: 463b mov r3, r7
8006756: 681b ldr r3, [r3, #0]
8006758: 785b ldrb r3, [r3, #1]
800675a: 2b01 cmp r3, #1
800675c: d116 bne.n 800678c <USB_EPStartXfer+0x674>
800675e: 1d3b adds r3, r7, #4
8006760: 681b ldr r3, [r3, #0]
8006762: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006766: b29b uxth r3, r3
8006768: 461a mov r2, r3
800676a: 6c7b ldr r3, [r7, #68] ; 0x44
800676c: 4413 add r3, r2
800676e: 647b str r3, [r7, #68] ; 0x44
8006770: 463b mov r3, r7
8006772: 681b ldr r3, [r3, #0]
8006774: 781b ldrb r3, [r3, #0]
8006776: 011a lsls r2, r3, #4
8006778: 6c7b ldr r3, [r7, #68] ; 0x44
800677a: 4413 add r3, r2
800677c: f203 430c addw r3, r3, #1036 ; 0x40c
8006780: 643b str r3, [r7, #64] ; 0x40
8006782: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006786: b29a uxth r2, r3
8006788: 6c3b ldr r3, [r7, #64] ; 0x40
800678a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800678c: 463b mov r3, r7
800678e: 681b ldr r3, [r3, #0]
8006790: 895b ldrh r3, [r3, #10]
8006792: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006796: 463b mov r3, r7
8006798: 681b ldr r3, [r3, #0]
800679a: 6959 ldr r1, [r3, #20]
800679c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80067a0: b29b uxth r3, r3
80067a2: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
80067a6: 1d38 adds r0, r7, #4
80067a8: 6800 ldr r0, [r0, #0]
80067aa: f000 ff13 bl 80075d4 <USB_WritePMA>
80067ae: e1e2 b.n 8006b76 <USB_EPStartXfer+0xa5e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
80067b0: 463b mov r3, r7
80067b2: 681b ldr r3, [r3, #0]
80067b4: 6a1b ldr r3, [r3, #32]
80067b6: f8c7 310c str.w r3, [r7, #268] ; 0x10c
/* disable double buffer mode */
PCD_CLEAR_EP_DBUF(USBx, ep->num);
80067ba: 1d3b adds r3, r7, #4
80067bc: 681a ldr r2, [r3, #0]
80067be: 463b mov r3, r7
80067c0: 681b ldr r3, [r3, #0]
80067c2: 781b ldrb r3, [r3, #0]
80067c4: 009b lsls r3, r3, #2
80067c6: 4413 add r3, r2
80067c8: 881b ldrh r3, [r3, #0]
80067ca: b29b uxth r3, r3
80067cc: f423 43e2 bic.w r3, r3, #28928 ; 0x7100
80067d0: f023 0370 bic.w r3, r3, #112 ; 0x70
80067d4: f8a7 3066 strh.w r3, [r7, #102] ; 0x66
80067d8: 1d3b adds r3, r7, #4
80067da: 681a ldr r2, [r3, #0]
80067dc: 463b mov r3, r7
80067de: 681b ldr r3, [r3, #0]
80067e0: 781b ldrb r3, [r3, #0]
80067e2: 009b lsls r3, r3, #2
80067e4: 441a add r2, r3
80067e6: f8b7 3066 ldrh.w r3, [r7, #102] ; 0x66
80067ea: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80067ee: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80067f2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80067f6: f043 0380 orr.w r3, r3, #128 ; 0x80
80067fa: b29b uxth r3, r3
80067fc: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
80067fe: 1d3b adds r3, r7, #4
8006800: 681b ldr r3, [r3, #0]
8006802: 663b str r3, [r7, #96] ; 0x60
8006804: 1d3b adds r3, r7, #4
8006806: 681b ldr r3, [r3, #0]
8006808: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800680c: b29b uxth r3, r3
800680e: 461a mov r2, r3
8006810: 6e3b ldr r3, [r7, #96] ; 0x60
8006812: 4413 add r3, r2
8006814: 663b str r3, [r7, #96] ; 0x60
8006816: 463b mov r3, r7
8006818: 681b ldr r3, [r3, #0]
800681a: 781b ldrb r3, [r3, #0]
800681c: 011a lsls r2, r3, #4
800681e: 6e3b ldr r3, [r7, #96] ; 0x60
8006820: 4413 add r3, r2
8006822: f203 4304 addw r3, r3, #1028 ; 0x404
8006826: 65fb str r3, [r7, #92] ; 0x5c
8006828: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800682c: b29a uxth r2, r3
800682e: 6dfb ldr r3, [r7, #92] ; 0x5c
8006830: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006832: 463b mov r3, r7
8006834: 681b ldr r3, [r3, #0]
8006836: 891b ldrh r3, [r3, #8]
8006838: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800683c: 463b mov r3, r7
800683e: 681b ldr r3, [r3, #0]
8006840: 6959 ldr r1, [r3, #20]
8006842: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006846: b29b uxth r3, r3
8006848: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
800684c: 1d38 adds r0, r7, #4
800684e: 6800 ldr r0, [r0, #0]
8006850: f000 fec0 bl 80075d4 <USB_WritePMA>
8006854: e18f b.n 8006b76 <USB_EPStartXfer+0xa5e>
/* manage isochronous double buffer IN mode */
else
{
/* Write the data to the USB endpoint */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8006856: 1d3b adds r3, r7, #4
8006858: 681a ldr r2, [r3, #0]
800685a: 463b mov r3, r7
800685c: 681b ldr r3, [r3, #0]
800685e: 781b ldrb r3, [r3, #0]
8006860: 009b lsls r3, r3, #2
8006862: 4413 add r3, r2
8006864: 881b ldrh r3, [r3, #0]
8006866: b29b uxth r3, r3
8006868: f003 0340 and.w r3, r3, #64 ; 0x40
800686c: 2b00 cmp r3, #0
800686e: f000 808f beq.w 8006990 <USB_EPStartXfer+0x878>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8006872: 1d3b adds r3, r7, #4
8006874: 681b ldr r3, [r3, #0]
8006876: 67bb str r3, [r7, #120] ; 0x78
8006878: 463b mov r3, r7
800687a: 681b ldr r3, [r3, #0]
800687c: 785b ldrb r3, [r3, #1]
800687e: 2b00 cmp r3, #0
8006880: d164 bne.n 800694c <USB_EPStartXfer+0x834>
8006882: 1d3b adds r3, r7, #4
8006884: 681b ldr r3, [r3, #0]
8006886: 673b str r3, [r7, #112] ; 0x70
8006888: 1d3b adds r3, r7, #4
800688a: 681b ldr r3, [r3, #0]
800688c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006890: b29b uxth r3, r3
8006892: 461a mov r2, r3
8006894: 6f3b ldr r3, [r7, #112] ; 0x70
8006896: 4413 add r3, r2
8006898: 673b str r3, [r7, #112] ; 0x70
800689a: 463b mov r3, r7
800689c: 681b ldr r3, [r3, #0]
800689e: 781b ldrb r3, [r3, #0]
80068a0: 011a lsls r2, r3, #4
80068a2: 6f3b ldr r3, [r7, #112] ; 0x70
80068a4: 4413 add r3, r2
80068a6: f203 430c addw r3, r3, #1036 ; 0x40c
80068aa: 66fb str r3, [r7, #108] ; 0x6c
80068ac: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80068b0: 2b00 cmp r3, #0
80068b2: d112 bne.n 80068da <USB_EPStartXfer+0x7c2>
80068b4: 6efb ldr r3, [r7, #108] ; 0x6c
80068b6: 881b ldrh r3, [r3, #0]
80068b8: b29b uxth r3, r3
80068ba: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80068be: b29a uxth r2, r3
80068c0: 6efb ldr r3, [r7, #108] ; 0x6c
80068c2: 801a strh r2, [r3, #0]
80068c4: 6efb ldr r3, [r7, #108] ; 0x6c
80068c6: 881b ldrh r3, [r3, #0]
80068c8: b29b uxth r3, r3
80068ca: ea6f 4343 mvn.w r3, r3, lsl #17
80068ce: ea6f 4353 mvn.w r3, r3, lsr #17
80068d2: b29a uxth r2, r3
80068d4: 6efb ldr r3, [r7, #108] ; 0x6c
80068d6: 801a strh r2, [r3, #0]
80068d8: e054 b.n 8006984 <USB_EPStartXfer+0x86c>
80068da: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80068de: 2b3e cmp r3, #62 ; 0x3e
80068e0: d817 bhi.n 8006912 <USB_EPStartXfer+0x7fa>
80068e2: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80068e6: 085b lsrs r3, r3, #1
80068e8: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
80068ec: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80068f0: f003 0301 and.w r3, r3, #1
80068f4: 2b00 cmp r3, #0
80068f6: d004 beq.n 8006902 <USB_EPStartXfer+0x7ea>
80068f8: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
80068fc: 3301 adds r3, #1
80068fe: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
8006902: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
8006906: b29b uxth r3, r3
8006908: 029b lsls r3, r3, #10
800690a: b29a uxth r2, r3
800690c: 6efb ldr r3, [r7, #108] ; 0x6c
800690e: 801a strh r2, [r3, #0]
8006910: e038 b.n 8006984 <USB_EPStartXfer+0x86c>
8006912: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006916: 095b lsrs r3, r3, #5
8006918: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
800691c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006920: f003 031f and.w r3, r3, #31
8006924: 2b00 cmp r3, #0
8006926: d104 bne.n 8006932 <USB_EPStartXfer+0x81a>
8006928: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
800692c: 3b01 subs r3, #1
800692e: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
8006932: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
8006936: b29b uxth r3, r3
8006938: 029b lsls r3, r3, #10
800693a: b29b uxth r3, r3
800693c: ea6f 4343 mvn.w r3, r3, lsl #17
8006940: ea6f 4353 mvn.w r3, r3, lsr #17
8006944: b29a uxth r2, r3
8006946: 6efb ldr r3, [r7, #108] ; 0x6c
8006948: 801a strh r2, [r3, #0]
800694a: e01b b.n 8006984 <USB_EPStartXfer+0x86c>
800694c: 463b mov r3, r7
800694e: 681b ldr r3, [r3, #0]
8006950: 785b ldrb r3, [r3, #1]
8006952: 2b01 cmp r3, #1
8006954: d116 bne.n 8006984 <USB_EPStartXfer+0x86c>
8006956: 1d3b adds r3, r7, #4
8006958: 681b ldr r3, [r3, #0]
800695a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800695e: b29b uxth r3, r3
8006960: 461a mov r2, r3
8006962: 6fbb ldr r3, [r7, #120] ; 0x78
8006964: 4413 add r3, r2
8006966: 67bb str r3, [r7, #120] ; 0x78
8006968: 463b mov r3, r7
800696a: 681b ldr r3, [r3, #0]
800696c: 781b ldrb r3, [r3, #0]
800696e: 011a lsls r2, r3, #4
8006970: 6fbb ldr r3, [r7, #120] ; 0x78
8006972: 4413 add r3, r2
8006974: f203 430c addw r3, r3, #1036 ; 0x40c
8006978: 677b str r3, [r7, #116] ; 0x74
800697a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800697e: b29a uxth r2, r3
8006980: 6f7b ldr r3, [r7, #116] ; 0x74
8006982: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8006984: 463b mov r3, r7
8006986: 681b ldr r3, [r3, #0]
8006988: 895b ldrh r3, [r3, #10]
800698a: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
800698e: e097 b.n 8006ac0 <USB_EPStartXfer+0x9a8>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8006990: 463b mov r3, r7
8006992: 681b ldr r3, [r3, #0]
8006994: 785b ldrb r3, [r3, #1]
8006996: 2b00 cmp r3, #0
8006998: d168 bne.n 8006a6c <USB_EPStartXfer+0x954>
800699a: 1d3b adds r3, r7, #4
800699c: 681b ldr r3, [r3, #0]
800699e: f8c7 3080 str.w r3, [r7, #128] ; 0x80
80069a2: 1d3b adds r3, r7, #4
80069a4: 681b ldr r3, [r3, #0]
80069a6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80069aa: b29b uxth r3, r3
80069ac: 461a mov r2, r3
80069ae: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
80069b2: 4413 add r3, r2
80069b4: f8c7 3080 str.w r3, [r7, #128] ; 0x80
80069b8: 463b mov r3, r7
80069ba: 681b ldr r3, [r3, #0]
80069bc: 781b ldrb r3, [r3, #0]
80069be: 011a lsls r2, r3, #4
80069c0: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
80069c4: 4413 add r3, r2
80069c6: f203 4304 addw r3, r3, #1028 ; 0x404
80069ca: 67fb str r3, [r7, #124] ; 0x7c
80069cc: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80069d0: 2b00 cmp r3, #0
80069d2: d112 bne.n 80069fa <USB_EPStartXfer+0x8e2>
80069d4: 6ffb ldr r3, [r7, #124] ; 0x7c
80069d6: 881b ldrh r3, [r3, #0]
80069d8: b29b uxth r3, r3
80069da: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80069de: b29a uxth r2, r3
80069e0: 6ffb ldr r3, [r7, #124] ; 0x7c
80069e2: 801a strh r2, [r3, #0]
80069e4: 6ffb ldr r3, [r7, #124] ; 0x7c
80069e6: 881b ldrh r3, [r3, #0]
80069e8: b29b uxth r3, r3
80069ea: ea6f 4343 mvn.w r3, r3, lsl #17
80069ee: ea6f 4353 mvn.w r3, r3, lsr #17
80069f2: b29a uxth r2, r3
80069f4: 6ffb ldr r3, [r7, #124] ; 0x7c
80069f6: 801a strh r2, [r3, #0]
80069f8: e05d b.n 8006ab6 <USB_EPStartXfer+0x99e>
80069fa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80069fe: 2b3e cmp r3, #62 ; 0x3e
8006a00: d817 bhi.n 8006a32 <USB_EPStartXfer+0x91a>
8006a02: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006a06: 085b lsrs r3, r3, #1
8006a08: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006a0c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006a10: f003 0301 and.w r3, r3, #1
8006a14: 2b00 cmp r3, #0
8006a16: d004 beq.n 8006a22 <USB_EPStartXfer+0x90a>
8006a18: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006a1c: 3301 adds r3, #1
8006a1e: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006a22: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006a26: b29b uxth r3, r3
8006a28: 029b lsls r3, r3, #10
8006a2a: b29a uxth r2, r3
8006a2c: 6ffb ldr r3, [r7, #124] ; 0x7c
8006a2e: 801a strh r2, [r3, #0]
8006a30: e041 b.n 8006ab6 <USB_EPStartXfer+0x99e>
8006a32: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006a36: 095b lsrs r3, r3, #5
8006a38: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006a3c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006a40: f003 031f and.w r3, r3, #31
8006a44: 2b00 cmp r3, #0
8006a46: d104 bne.n 8006a52 <USB_EPStartXfer+0x93a>
8006a48: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006a4c: 3b01 subs r3, #1
8006a4e: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006a52: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006a56: b29b uxth r3, r3
8006a58: 029b lsls r3, r3, #10
8006a5a: b29b uxth r3, r3
8006a5c: ea6f 4343 mvn.w r3, r3, lsl #17
8006a60: ea6f 4353 mvn.w r3, r3, lsr #17
8006a64: b29a uxth r2, r3
8006a66: 6ffb ldr r3, [r7, #124] ; 0x7c
8006a68: 801a strh r2, [r3, #0]
8006a6a: e024 b.n 8006ab6 <USB_EPStartXfer+0x99e>
8006a6c: 463b mov r3, r7
8006a6e: 681b ldr r3, [r3, #0]
8006a70: 785b ldrb r3, [r3, #1]
8006a72: 2b01 cmp r3, #1
8006a74: d11f bne.n 8006ab6 <USB_EPStartXfer+0x99e>
8006a76: 1d3b adds r3, r7, #4
8006a78: 681b ldr r3, [r3, #0]
8006a7a: f8c7 3088 str.w r3, [r7, #136] ; 0x88
8006a7e: 1d3b adds r3, r7, #4
8006a80: 681b ldr r3, [r3, #0]
8006a82: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006a86: b29b uxth r3, r3
8006a88: 461a mov r2, r3
8006a8a: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88
8006a8e: 4413 add r3, r2
8006a90: f8c7 3088 str.w r3, [r7, #136] ; 0x88
8006a94: 463b mov r3, r7
8006a96: 681b ldr r3, [r3, #0]
8006a98: 781b ldrb r3, [r3, #0]
8006a9a: 011a lsls r2, r3, #4
8006a9c: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88
8006aa0: 4413 add r3, r2
8006aa2: f203 4304 addw r3, r3, #1028 ; 0x404
8006aa6: f8c7 3084 str.w r3, [r7, #132] ; 0x84
8006aaa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006aae: b29a uxth r2, r3
8006ab0: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8006ab4: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006ab6: 463b mov r3, r7
8006ab8: 681b ldr r3, [r3, #0]
8006aba: 891b ldrh r3, [r3, #8]
8006abc: f8a7 310a strh.w r3, [r7, #266] ; 0x10a
}
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006ac0: 463b mov r3, r7
8006ac2: 681b ldr r3, [r3, #0]
8006ac4: 6959 ldr r1, [r3, #20]
8006ac6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006aca: b29b uxth r3, r3
8006acc: f8b7 210a ldrh.w r2, [r7, #266] ; 0x10a
8006ad0: 1d38 adds r0, r7, #4
8006ad2: 6800 ldr r0, [r0, #0]
8006ad4: f000 fd7e bl 80075d4 <USB_WritePMA>
PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
8006ad8: 463b mov r3, r7
8006ada: 681b ldr r3, [r3, #0]
8006adc: 785b ldrb r3, [r3, #1]
8006ade: 2b00 cmp r3, #0
8006ae0: d122 bne.n 8006b28 <USB_EPStartXfer+0xa10>
8006ae2: 1d3b adds r3, r7, #4
8006ae4: 681a ldr r2, [r3, #0]
8006ae6: 463b mov r3, r7
8006ae8: 681b ldr r3, [r3, #0]
8006aea: 781b ldrb r3, [r3, #0]
8006aec: 009b lsls r3, r3, #2
8006aee: 4413 add r3, r2
8006af0: 881b ldrh r3, [r3, #0]
8006af2: b29b uxth r3, r3
8006af4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8006af8: f023 0370 bic.w r3, r3, #112 ; 0x70
8006afc: f8a7 3068 strh.w r3, [r7, #104] ; 0x68
8006b00: 1d3b adds r3, r7, #4
8006b02: 681a ldr r2, [r3, #0]
8006b04: 463b mov r3, r7
8006b06: 681b ldr r3, [r3, #0]
8006b08: 781b ldrb r3, [r3, #0]
8006b0a: 009b lsls r3, r3, #2
8006b0c: 441a add r2, r3
8006b0e: f8b7 3068 ldrh.w r3, [r7, #104] ; 0x68
8006b12: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006b16: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006b1a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8006b1e: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8006b22: b29b uxth r3, r3
8006b24: 8013 strh r3, [r2, #0]
8006b26: e026 b.n 8006b76 <USB_EPStartXfer+0xa5e>
8006b28: 463b mov r3, r7
8006b2a: 681b ldr r3, [r3, #0]
8006b2c: 785b ldrb r3, [r3, #1]
8006b2e: 2b01 cmp r3, #1
8006b30: d121 bne.n 8006b76 <USB_EPStartXfer+0xa5e>
8006b32: 1d3b adds r3, r7, #4
8006b34: 681a ldr r2, [r3, #0]
8006b36: 463b mov r3, r7
8006b38: 681b ldr r3, [r3, #0]
8006b3a: 781b ldrb r3, [r3, #0]
8006b3c: 009b lsls r3, r3, #2
8006b3e: 4413 add r3, r2
8006b40: 881b ldrh r3, [r3, #0]
8006b42: b29b uxth r3, r3
8006b44: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8006b48: f023 0370 bic.w r3, r3, #112 ; 0x70
8006b4c: f8a7 306a strh.w r3, [r7, #106] ; 0x6a
8006b50: 1d3b adds r3, r7, #4
8006b52: 681a ldr r2, [r3, #0]
8006b54: 463b mov r3, r7
8006b56: 681b ldr r3, [r3, #0]
8006b58: 781b ldrb r3, [r3, #0]
8006b5a: 009b lsls r3, r3, #2
8006b5c: 441a add r2, r3
8006b5e: f8b7 306a ldrh.w r3, [r7, #106] ; 0x6a
8006b62: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006b66: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006b6a: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8006b6e: f043 0380 orr.w r3, r3, #128 ; 0x80
8006b72: b29b uxth r3, r3
8006b74: 8013 strh r3, [r2, #0]
}
}
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
8006b76: 1d3b adds r3, r7, #4
8006b78: 681a ldr r2, [r3, #0]
8006b7a: 463b mov r3, r7
8006b7c: 681b ldr r3, [r3, #0]
8006b7e: 781b ldrb r3, [r3, #0]
8006b80: 009b lsls r3, r3, #2
8006b82: 4413 add r3, r2
8006b84: 881b ldrh r3, [r3, #0]
8006b86: b29b uxth r3, r3
8006b88: f107 020e add.w r2, r7, #14
8006b8c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8006b90: f023 0340 bic.w r3, r3, #64 ; 0x40
8006b94: 8013 strh r3, [r2, #0]
8006b96: f107 030e add.w r3, r7, #14
8006b9a: f107 020e add.w r2, r7, #14
8006b9e: 8812 ldrh r2, [r2, #0]
8006ba0: f082 0210 eor.w r2, r2, #16
8006ba4: 801a strh r2, [r3, #0]
8006ba6: f107 030e add.w r3, r7, #14
8006baa: f107 020e add.w r2, r7, #14
8006bae: 8812 ldrh r2, [r2, #0]
8006bb0: f082 0220 eor.w r2, r2, #32
8006bb4: 801a strh r2, [r3, #0]
8006bb6: 1d3b adds r3, r7, #4
8006bb8: 681a ldr r2, [r3, #0]
8006bba: 463b mov r3, r7
8006bbc: 681b ldr r3, [r3, #0]
8006bbe: 781b ldrb r3, [r3, #0]
8006bc0: 009b lsls r3, r3, #2
8006bc2: 441a add r2, r3
8006bc4: f107 030e add.w r3, r7, #14
8006bc8: 881b ldrh r3, [r3, #0]
8006bca: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006bce: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006bd2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8006bd6: f043 0380 orr.w r3, r3, #128 ; 0x80
8006bda: b29b uxth r3, r3
8006bdc: 8013 strh r3, [r2, #0]
8006bde: e3b5 b.n 800734c <USB_EPStartXfer+0x1234>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
8006be0: 463b mov r3, r7
8006be2: 681b ldr r3, [r3, #0]
8006be4: 7b1b ldrb r3, [r3, #12]
8006be6: 2b00 cmp r3, #0
8006be8: f040 8090 bne.w 8006d0c <USB_EPStartXfer+0xbf4>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8006bec: 463b mov r3, r7
8006bee: 681b ldr r3, [r3, #0]
8006bf0: 699a ldr r2, [r3, #24]
8006bf2: 463b mov r3, r7
8006bf4: 681b ldr r3, [r3, #0]
8006bf6: 691b ldr r3, [r3, #16]
8006bf8: 429a cmp r2, r3
8006bfa: d90e bls.n 8006c1a <USB_EPStartXfer+0xb02>
{
len = ep->maxpacket;
8006bfc: 463b mov r3, r7
8006bfe: 681b ldr r3, [r3, #0]
8006c00: 691b ldr r3, [r3, #16]
8006c02: f8c7 310c str.w r3, [r7, #268] ; 0x10c
ep->xfer_len -= len;
8006c06: 463b mov r3, r7
8006c08: 681b ldr r3, [r3, #0]
8006c0a: 699a ldr r2, [r3, #24]
8006c0c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006c10: 1ad2 subs r2, r2, r3
8006c12: 463b mov r3, r7
8006c14: 681b ldr r3, [r3, #0]
8006c16: 619a str r2, [r3, #24]
8006c18: e008 b.n 8006c2c <USB_EPStartXfer+0xb14>
}
else
{
len = ep->xfer_len;
8006c1a: 463b mov r3, r7
8006c1c: 681b ldr r3, [r3, #0]
8006c1e: 699b ldr r3, [r3, #24]
8006c20: f8c7 310c str.w r3, [r7, #268] ; 0x10c
ep->xfer_len = 0U;
8006c24: 463b mov r3, r7
8006c26: 681b ldr r3, [r3, #0]
8006c28: 2200 movs r2, #0
8006c2a: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
8006c2c: 1d3b adds r3, r7, #4
8006c2e: 681b ldr r3, [r3, #0]
8006c30: f8c7 3094 str.w r3, [r7, #148] ; 0x94
8006c34: 1d3b adds r3, r7, #4
8006c36: 681b ldr r3, [r3, #0]
8006c38: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006c3c: b29b uxth r3, r3
8006c3e: 461a mov r2, r3
8006c40: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94
8006c44: 4413 add r3, r2
8006c46: f8c7 3094 str.w r3, [r7, #148] ; 0x94
8006c4a: 463b mov r3, r7
8006c4c: 681b ldr r3, [r3, #0]
8006c4e: 781b ldrb r3, [r3, #0]
8006c50: 011a lsls r2, r3, #4
8006c52: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94
8006c56: 4413 add r3, r2
8006c58: f203 430c addw r3, r3, #1036 ; 0x40c
8006c5c: f8c7 3090 str.w r3, [r7, #144] ; 0x90
8006c60: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006c64: 2b00 cmp r3, #0
8006c66: d116 bne.n 8006c96 <USB_EPStartXfer+0xb7e>
8006c68: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8006c6c: 881b ldrh r3, [r3, #0]
8006c6e: b29b uxth r3, r3
8006c70: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006c74: b29a uxth r2, r3
8006c76: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8006c7a: 801a strh r2, [r3, #0]
8006c7c: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8006c80: 881b ldrh r3, [r3, #0]
8006c82: b29b uxth r3, r3
8006c84: ea6f 4343 mvn.w r3, r3, lsl #17
8006c88: ea6f 4353 mvn.w r3, r3, lsr #17
8006c8c: b29a uxth r2, r3
8006c8e: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8006c92: 801a strh r2, [r3, #0]
8006c94: e32c b.n 80072f0 <USB_EPStartXfer+0x11d8>
8006c96: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006c9a: 2b3e cmp r3, #62 ; 0x3e
8006c9c: d818 bhi.n 8006cd0 <USB_EPStartXfer+0xbb8>
8006c9e: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006ca2: 085b lsrs r3, r3, #1
8006ca4: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006ca8: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006cac: f003 0301 and.w r3, r3, #1
8006cb0: 2b00 cmp r3, #0
8006cb2: d004 beq.n 8006cbe <USB_EPStartXfer+0xba6>
8006cb4: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006cb8: 3301 adds r3, #1
8006cba: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006cbe: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006cc2: b29b uxth r3, r3
8006cc4: 029b lsls r3, r3, #10
8006cc6: b29a uxth r2, r3
8006cc8: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8006ccc: 801a strh r2, [r3, #0]
8006cce: e30f b.n 80072f0 <USB_EPStartXfer+0x11d8>
8006cd0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006cd4: 095b lsrs r3, r3, #5
8006cd6: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006cda: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8006cde: f003 031f and.w r3, r3, #31
8006ce2: 2b00 cmp r3, #0
8006ce4: d104 bne.n 8006cf0 <USB_EPStartXfer+0xbd8>
8006ce6: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006cea: 3b01 subs r3, #1
8006cec: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006cf0: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006cf4: b29b uxth r3, r3
8006cf6: 029b lsls r3, r3, #10
8006cf8: b29b uxth r3, r3
8006cfa: ea6f 4343 mvn.w r3, r3, lsl #17
8006cfe: ea6f 4353 mvn.w r3, r3, lsr #17
8006d02: b29a uxth r2, r3
8006d04: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8006d08: 801a strh r2, [r3, #0]
8006d0a: e2f1 b.n 80072f0 <USB_EPStartXfer+0x11d8>
}
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
8006d0c: 463b mov r3, r7
8006d0e: 681b ldr r3, [r3, #0]
8006d10: 78db ldrb r3, [r3, #3]
8006d12: 2b02 cmp r3, #2
8006d14: f040 818f bne.w 8007036 <USB_EPStartXfer+0xf1e>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
8006d18: 463b mov r3, r7
8006d1a: 681b ldr r3, [r3, #0]
8006d1c: 785b ldrb r3, [r3, #1]
8006d1e: 2b00 cmp r3, #0
8006d20: d175 bne.n 8006e0e <USB_EPStartXfer+0xcf6>
8006d22: 1d3b adds r3, r7, #4
8006d24: 681b ldr r3, [r3, #0]
8006d26: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0
8006d2a: 1d3b adds r3, r7, #4
8006d2c: 681b ldr r3, [r3, #0]
8006d2e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006d32: b29b uxth r3, r3
8006d34: 461a mov r2, r3
8006d36: f8d7 30b0 ldr.w r3, [r7, #176] ; 0xb0
8006d3a: 4413 add r3, r2
8006d3c: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0
8006d40: 463b mov r3, r7
8006d42: 681b ldr r3, [r3, #0]
8006d44: 781b ldrb r3, [r3, #0]
8006d46: 011a lsls r2, r3, #4
8006d48: f8d7 30b0 ldr.w r3, [r7, #176] ; 0xb0
8006d4c: 4413 add r3, r2
8006d4e: f203 4304 addw r3, r3, #1028 ; 0x404
8006d52: f8c7 30ac str.w r3, [r7, #172] ; 0xac
8006d56: 463b mov r3, r7
8006d58: 681b ldr r3, [r3, #0]
8006d5a: 691b ldr r3, [r3, #16]
8006d5c: 2b00 cmp r3, #0
8006d5e: d116 bne.n 8006d8e <USB_EPStartXfer+0xc76>
8006d60: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8006d64: 881b ldrh r3, [r3, #0]
8006d66: b29b uxth r3, r3
8006d68: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006d6c: b29a uxth r2, r3
8006d6e: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8006d72: 801a strh r2, [r3, #0]
8006d74: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8006d78: 881b ldrh r3, [r3, #0]
8006d7a: b29b uxth r3, r3
8006d7c: ea6f 4343 mvn.w r3, r3, lsl #17
8006d80: ea6f 4353 mvn.w r3, r3, lsr #17
8006d84: b29a uxth r2, r3
8006d86: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8006d8a: 801a strh r2, [r3, #0]
8006d8c: e065 b.n 8006e5a <USB_EPStartXfer+0xd42>
8006d8e: 463b mov r3, r7
8006d90: 681b ldr r3, [r3, #0]
8006d92: 691b ldr r3, [r3, #16]
8006d94: 2b3e cmp r3, #62 ; 0x3e
8006d96: d81a bhi.n 8006dce <USB_EPStartXfer+0xcb6>
8006d98: 463b mov r3, r7
8006d9a: 681b ldr r3, [r3, #0]
8006d9c: 691b ldr r3, [r3, #16]
8006d9e: 085b lsrs r3, r3, #1
8006da0: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
8006da4: 463b mov r3, r7
8006da6: 681b ldr r3, [r3, #0]
8006da8: 691b ldr r3, [r3, #16]
8006daa: f003 0301 and.w r3, r3, #1
8006dae: 2b00 cmp r3, #0
8006db0: d004 beq.n 8006dbc <USB_EPStartXfer+0xca4>
8006db2: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8006db6: 3301 adds r3, #1
8006db8: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
8006dbc: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8006dc0: b29b uxth r3, r3
8006dc2: 029b lsls r3, r3, #10
8006dc4: b29a uxth r2, r3
8006dc6: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8006dca: 801a strh r2, [r3, #0]
8006dcc: e045 b.n 8006e5a <USB_EPStartXfer+0xd42>
8006dce: 463b mov r3, r7
8006dd0: 681b ldr r3, [r3, #0]
8006dd2: 691b ldr r3, [r3, #16]
8006dd4: 095b lsrs r3, r3, #5
8006dd6: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
8006dda: 463b mov r3, r7
8006ddc: 681b ldr r3, [r3, #0]
8006dde: 691b ldr r3, [r3, #16]
8006de0: f003 031f and.w r3, r3, #31
8006de4: 2b00 cmp r3, #0
8006de6: d104 bne.n 8006df2 <USB_EPStartXfer+0xcda>
8006de8: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8006dec: 3b01 subs r3, #1
8006dee: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
8006df2: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8006df6: b29b uxth r3, r3
8006df8: 029b lsls r3, r3, #10
8006dfa: b29b uxth r3, r3
8006dfc: ea6f 4343 mvn.w r3, r3, lsl #17
8006e00: ea6f 4353 mvn.w r3, r3, lsr #17
8006e04: b29a uxth r2, r3
8006e06: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8006e0a: 801a strh r2, [r3, #0]
8006e0c: e025 b.n 8006e5a <USB_EPStartXfer+0xd42>
8006e0e: 463b mov r3, r7
8006e10: 681b ldr r3, [r3, #0]
8006e12: 785b ldrb r3, [r3, #1]
8006e14: 2b01 cmp r3, #1
8006e16: d120 bne.n 8006e5a <USB_EPStartXfer+0xd42>
8006e18: 1d3b adds r3, r7, #4
8006e1a: 681b ldr r3, [r3, #0]
8006e1c: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
8006e20: 1d3b adds r3, r7, #4
8006e22: 681b ldr r3, [r3, #0]
8006e24: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006e28: b29b uxth r3, r3
8006e2a: 461a mov r2, r3
8006e2c: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
8006e30: 4413 add r3, r2
8006e32: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
8006e36: 463b mov r3, r7
8006e38: 681b ldr r3, [r3, #0]
8006e3a: 781b ldrb r3, [r3, #0]
8006e3c: 011a lsls r2, r3, #4
8006e3e: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
8006e42: 4413 add r3, r2
8006e44: f203 4304 addw r3, r3, #1028 ; 0x404
8006e48: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4
8006e4c: 463b mov r3, r7
8006e4e: 681b ldr r3, [r3, #0]
8006e50: 691b ldr r3, [r3, #16]
8006e52: b29a uxth r2, r3
8006e54: f8d7 30b4 ldr.w r3, [r7, #180] ; 0xb4
8006e58: 801a strh r2, [r3, #0]
8006e5a: 1d3b adds r3, r7, #4
8006e5c: 681b ldr r3, [r3, #0]
8006e5e: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
8006e62: 463b mov r3, r7
8006e64: 681b ldr r3, [r3, #0]
8006e66: 785b ldrb r3, [r3, #1]
8006e68: 2b00 cmp r3, #0
8006e6a: d175 bne.n 8006f58 <USB_EPStartXfer+0xe40>
8006e6c: 1d3b adds r3, r7, #4
8006e6e: 681b ldr r3, [r3, #0]
8006e70: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
8006e74: 1d3b adds r3, r7, #4
8006e76: 681b ldr r3, [r3, #0]
8006e78: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006e7c: b29b uxth r3, r3
8006e7e: 461a mov r2, r3
8006e80: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0
8006e84: 4413 add r3, r2
8006e86: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
8006e8a: 463b mov r3, r7
8006e8c: 681b ldr r3, [r3, #0]
8006e8e: 781b ldrb r3, [r3, #0]
8006e90: 011a lsls r2, r3, #4
8006e92: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0
8006e96: 4413 add r3, r2
8006e98: f203 430c addw r3, r3, #1036 ; 0x40c
8006e9c: f8c7 309c str.w r3, [r7, #156] ; 0x9c
8006ea0: 463b mov r3, r7
8006ea2: 681b ldr r3, [r3, #0]
8006ea4: 691b ldr r3, [r3, #16]
8006ea6: 2b00 cmp r3, #0
8006ea8: d116 bne.n 8006ed8 <USB_EPStartXfer+0xdc0>
8006eaa: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8006eae: 881b ldrh r3, [r3, #0]
8006eb0: b29b uxth r3, r3
8006eb2: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006eb6: b29a uxth r2, r3
8006eb8: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8006ebc: 801a strh r2, [r3, #0]
8006ebe: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8006ec2: 881b ldrh r3, [r3, #0]
8006ec4: b29b uxth r3, r3
8006ec6: ea6f 4343 mvn.w r3, r3, lsl #17
8006eca: ea6f 4353 mvn.w r3, r3, lsr #17
8006ece: b29a uxth r2, r3
8006ed0: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8006ed4: 801a strh r2, [r3, #0]
8006ed6: e061 b.n 8006f9c <USB_EPStartXfer+0xe84>
8006ed8: 463b mov r3, r7
8006eda: 681b ldr r3, [r3, #0]
8006edc: 691b ldr r3, [r3, #16]
8006ede: 2b3e cmp r3, #62 ; 0x3e
8006ee0: d81a bhi.n 8006f18 <USB_EPStartXfer+0xe00>
8006ee2: 463b mov r3, r7
8006ee4: 681b ldr r3, [r3, #0]
8006ee6: 691b ldr r3, [r3, #16]
8006ee8: 085b lsrs r3, r3, #1
8006eea: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8006eee: 463b mov r3, r7
8006ef0: 681b ldr r3, [r3, #0]
8006ef2: 691b ldr r3, [r3, #16]
8006ef4: f003 0301 and.w r3, r3, #1
8006ef8: 2b00 cmp r3, #0
8006efa: d004 beq.n 8006f06 <USB_EPStartXfer+0xdee>
8006efc: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
8006f00: 3301 adds r3, #1
8006f02: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8006f06: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
8006f0a: b29b uxth r3, r3
8006f0c: 029b lsls r3, r3, #10
8006f0e: b29a uxth r2, r3
8006f10: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8006f14: 801a strh r2, [r3, #0]
8006f16: e041 b.n 8006f9c <USB_EPStartXfer+0xe84>
8006f18: 463b mov r3, r7
8006f1a: 681b ldr r3, [r3, #0]
8006f1c: 691b ldr r3, [r3, #16]
8006f1e: 095b lsrs r3, r3, #5
8006f20: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8006f24: 463b mov r3, r7
8006f26: 681b ldr r3, [r3, #0]
8006f28: 691b ldr r3, [r3, #16]
8006f2a: f003 031f and.w r3, r3, #31
8006f2e: 2b00 cmp r3, #0
8006f30: d104 bne.n 8006f3c <USB_EPStartXfer+0xe24>
8006f32: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
8006f36: 3b01 subs r3, #1
8006f38: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8006f3c: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
8006f40: b29b uxth r3, r3
8006f42: 029b lsls r3, r3, #10
8006f44: b29b uxth r3, r3
8006f46: ea6f 4343 mvn.w r3, r3, lsl #17
8006f4a: ea6f 4353 mvn.w r3, r3, lsr #17
8006f4e: b29a uxth r2, r3
8006f50: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8006f54: 801a strh r2, [r3, #0]
8006f56: e021 b.n 8006f9c <USB_EPStartXfer+0xe84>
8006f58: 463b mov r3, r7
8006f5a: 681b ldr r3, [r3, #0]
8006f5c: 785b ldrb r3, [r3, #1]
8006f5e: 2b01 cmp r3, #1
8006f60: d11c bne.n 8006f9c <USB_EPStartXfer+0xe84>
8006f62: 1d3b adds r3, r7, #4
8006f64: 681b ldr r3, [r3, #0]
8006f66: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006f6a: b29b uxth r3, r3
8006f6c: 461a mov r2, r3
8006f6e: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
8006f72: 4413 add r3, r2
8006f74: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
8006f78: 463b mov r3, r7
8006f7a: 681b ldr r3, [r3, #0]
8006f7c: 781b ldrb r3, [r3, #0]
8006f7e: 011a lsls r2, r3, #4
8006f80: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
8006f84: 4413 add r3, r2
8006f86: f203 430c addw r3, r3, #1036 ; 0x40c
8006f8a: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
8006f8e: 463b mov r3, r7
8006f90: 681b ldr r3, [r3, #0]
8006f92: 691b ldr r3, [r3, #16]
8006f94: b29a uxth r2, r3
8006f96: f8d7 30a4 ldr.w r3, [r7, #164] ; 0xa4
8006f9a: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
8006f9c: 463b mov r3, r7
8006f9e: 681b ldr r3, [r3, #0]
8006fa0: 69db ldr r3, [r3, #28]
8006fa2: 2b00 cmp r3, #0
8006fa4: f000 81a4 beq.w 80072f0 <USB_EPStartXfer+0x11d8>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
8006fa8: 1d3b adds r3, r7, #4
8006faa: 681a ldr r2, [r3, #0]
8006fac: 463b mov r3, r7
8006fae: 681b ldr r3, [r3, #0]
8006fb0: 781b ldrb r3, [r3, #0]
8006fb2: 009b lsls r3, r3, #2
8006fb4: 4413 add r3, r2
8006fb6: 881b ldrh r3, [r3, #0]
8006fb8: f8a7 309a strh.w r3, [r7, #154] ; 0x9a
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8006fbc: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
8006fc0: f403 4380 and.w r3, r3, #16384 ; 0x4000
8006fc4: 2b00 cmp r3, #0
8006fc6: d005 beq.n 8006fd4 <USB_EPStartXfer+0xebc>
8006fc8: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
8006fcc: f003 0340 and.w r3, r3, #64 ; 0x40
8006fd0: 2b00 cmp r3, #0
8006fd2: d10d bne.n 8006ff0 <USB_EPStartXfer+0xed8>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8006fd4: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
8006fd8: f403 4380 and.w r3, r3, #16384 ; 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8006fdc: 2b00 cmp r3, #0
8006fde: f040 8187 bne.w 80072f0 <USB_EPStartXfer+0x11d8>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8006fe2: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a
8006fe6: f003 0340 and.w r3, r3, #64 ; 0x40
8006fea: 2b00 cmp r3, #0
8006fec: f040 8180 bne.w 80072f0 <USB_EPStartXfer+0x11d8>
{
PCD_FreeUserBuffer(USBx, ep->num, 0U);
8006ff0: 1d3b adds r3, r7, #4
8006ff2: 681a ldr r2, [r3, #0]
8006ff4: 463b mov r3, r7
8006ff6: 681b ldr r3, [r3, #0]
8006ff8: 781b ldrb r3, [r3, #0]
8006ffa: 009b lsls r3, r3, #2
8006ffc: 4413 add r3, r2
8006ffe: 881b ldrh r3, [r3, #0]
8007000: b29b uxth r3, r3
8007002: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8007006: f023 0370 bic.w r3, r3, #112 ; 0x70
800700a: f8a7 3098 strh.w r3, [r7, #152] ; 0x98
800700e: 1d3b adds r3, r7, #4
8007010: 681a ldr r2, [r3, #0]
8007012: 463b mov r3, r7
8007014: 681b ldr r3, [r3, #0]
8007016: 781b ldrb r3, [r3, #0]
8007018: 009b lsls r3, r3, #2
800701a: 441a add r2, r3
800701c: f8b7 3098 ldrh.w r3, [r7, #152] ; 0x98
8007020: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007024: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8007028: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800702c: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8007030: b29b uxth r3, r3
8007032: 8013 strh r3, [r2, #0]
8007034: e15c b.n 80072f0 <USB_EPStartXfer+0x11d8>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
8007036: 463b mov r3, r7
8007038: 681b ldr r3, [r3, #0]
800703a: 78db ldrb r3, [r3, #3]
800703c: 2b01 cmp r3, #1
800703e: f040 8155 bne.w 80072ec <USB_EPStartXfer+0x11d4>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8007042: 463b mov r3, r7
8007044: 681b ldr r3, [r3, #0]
8007046: 699a ldr r2, [r3, #24]
8007048: 463b mov r3, r7
800704a: 681b ldr r3, [r3, #0]
800704c: 691b ldr r3, [r3, #16]
800704e: 429a cmp r2, r3
8007050: d90e bls.n 8007070 <USB_EPStartXfer+0xf58>
{
len = ep->maxpacket;
8007052: 463b mov r3, r7
8007054: 681b ldr r3, [r3, #0]
8007056: 691b ldr r3, [r3, #16]
8007058: f8c7 310c str.w r3, [r7, #268] ; 0x10c
ep->xfer_len -= len;
800705c: 463b mov r3, r7
800705e: 681b ldr r3, [r3, #0]
8007060: 699a ldr r2, [r3, #24]
8007062: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8007066: 1ad2 subs r2, r2, r3
8007068: 463b mov r3, r7
800706a: 681b ldr r3, [r3, #0]
800706c: 619a str r2, [r3, #24]
800706e: e008 b.n 8007082 <USB_EPStartXfer+0xf6a>
}
else
{
len = ep->xfer_len;
8007070: 463b mov r3, r7
8007072: 681b ldr r3, [r3, #0]
8007074: 699b ldr r3, [r3, #24]
8007076: f8c7 310c str.w r3, [r7, #268] ; 0x10c
ep->xfer_len = 0U;
800707a: 463b mov r3, r7
800707c: 681b ldr r3, [r3, #0]
800707e: 2200 movs r2, #0
8007080: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
8007082: 463b mov r3, r7
8007084: 681b ldr r3, [r3, #0]
8007086: 785b ldrb r3, [r3, #1]
8007088: 2b00 cmp r3, #0
800708a: d16f bne.n 800716c <USB_EPStartXfer+0x1054>
800708c: 1d3b adds r3, r7, #4
800708e: 681b ldr r3, [r3, #0]
8007090: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0
8007094: 1d3b adds r3, r7, #4
8007096: 681b ldr r3, [r3, #0]
8007098: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800709c: b29b uxth r3, r3
800709e: 461a mov r2, r3
80070a0: f8d7 30d0 ldr.w r3, [r7, #208] ; 0xd0
80070a4: 4413 add r3, r2
80070a6: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0
80070aa: 463b mov r3, r7
80070ac: 681b ldr r3, [r3, #0]
80070ae: 781b ldrb r3, [r3, #0]
80070b0: 011a lsls r2, r3, #4
80070b2: f8d7 30d0 ldr.w r3, [r7, #208] ; 0xd0
80070b6: 4413 add r3, r2
80070b8: f203 4304 addw r3, r3, #1028 ; 0x404
80070bc: f8c7 30cc str.w r3, [r7, #204] ; 0xcc
80070c0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80070c4: 2b00 cmp r3, #0
80070c6: d116 bne.n 80070f6 <USB_EPStartXfer+0xfde>
80070c8: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
80070cc: 881b ldrh r3, [r3, #0]
80070ce: b29b uxth r3, r3
80070d0: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80070d4: b29a uxth r2, r3
80070d6: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
80070da: 801a strh r2, [r3, #0]
80070dc: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
80070e0: 881b ldrh r3, [r3, #0]
80070e2: b29b uxth r3, r3
80070e4: ea6f 4343 mvn.w r3, r3, lsl #17
80070e8: ea6f 4353 mvn.w r3, r3, lsr #17
80070ec: b29a uxth r2, r3
80070ee: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
80070f2: 801a strh r2, [r3, #0]
80070f4: e05f b.n 80071b6 <USB_EPStartXfer+0x109e>
80070f6: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80070fa: 2b3e cmp r3, #62 ; 0x3e
80070fc: d818 bhi.n 8007130 <USB_EPStartXfer+0x1018>
80070fe: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8007102: 085b lsrs r3, r3, #1
8007104: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
8007108: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800710c: f003 0301 and.w r3, r3, #1
8007110: 2b00 cmp r3, #0
8007112: d004 beq.n 800711e <USB_EPStartXfer+0x1006>
8007114: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
8007118: 3301 adds r3, #1
800711a: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
800711e: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
8007122: b29b uxth r3, r3
8007124: 029b lsls r3, r3, #10
8007126: b29a uxth r2, r3
8007128: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
800712c: 801a strh r2, [r3, #0]
800712e: e042 b.n 80071b6 <USB_EPStartXfer+0x109e>
8007130: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8007134: 095b lsrs r3, r3, #5
8007136: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
800713a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800713e: f003 031f and.w r3, r3, #31
8007142: 2b00 cmp r3, #0
8007144: d104 bne.n 8007150 <USB_EPStartXfer+0x1038>
8007146: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
800714a: 3b01 subs r3, #1
800714c: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
8007150: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
8007154: b29b uxth r3, r3
8007156: 029b lsls r3, r3, #10
8007158: b29b uxth r3, r3
800715a: ea6f 4343 mvn.w r3, r3, lsl #17
800715e: ea6f 4353 mvn.w r3, r3, lsr #17
8007162: b29a uxth r2, r3
8007164: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
8007168: 801a strh r2, [r3, #0]
800716a: e024 b.n 80071b6 <USB_EPStartXfer+0x109e>
800716c: 463b mov r3, r7
800716e: 681b ldr r3, [r3, #0]
8007170: 785b ldrb r3, [r3, #1]
8007172: 2b01 cmp r3, #1
8007174: d11f bne.n 80071b6 <USB_EPStartXfer+0x109e>
8007176: 1d3b adds r3, r7, #4
8007178: 681b ldr r3, [r3, #0]
800717a: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
800717e: 1d3b adds r3, r7, #4
8007180: 681b ldr r3, [r3, #0]
8007182: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8007186: b29b uxth r3, r3
8007188: 461a mov r2, r3
800718a: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
800718e: 4413 add r3, r2
8007190: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
8007194: 463b mov r3, r7
8007196: 681b ldr r3, [r3, #0]
8007198: 781b ldrb r3, [r3, #0]
800719a: 011a lsls r2, r3, #4
800719c: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
80071a0: 4413 add r3, r2
80071a2: f203 4304 addw r3, r3, #1028 ; 0x404
80071a6: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4
80071aa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80071ae: b29a uxth r2, r3
80071b0: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4
80071b4: 801a strh r2, [r3, #0]
80071b6: 1d3b adds r3, r7, #4
80071b8: 681b ldr r3, [r3, #0]
80071ba: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8
80071be: 463b mov r3, r7
80071c0: 681b ldr r3, [r3, #0]
80071c2: 785b ldrb r3, [r3, #1]
80071c4: 2b00 cmp r3, #0
80071c6: d16f bne.n 80072a8 <USB_EPStartXfer+0x1190>
80071c8: 1d3b adds r3, r7, #4
80071ca: 681b ldr r3, [r3, #0]
80071cc: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0
80071d0: 1d3b adds r3, r7, #4
80071d2: 681b ldr r3, [r3, #0]
80071d4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80071d8: b29b uxth r3, r3
80071da: 461a mov r2, r3
80071dc: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0
80071e0: 4413 add r3, r2
80071e2: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0
80071e6: 463b mov r3, r7
80071e8: 681b ldr r3, [r3, #0]
80071ea: 781b ldrb r3, [r3, #0]
80071ec: 011a lsls r2, r3, #4
80071ee: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0
80071f2: 4413 add r3, r2
80071f4: f203 430c addw r3, r3, #1036 ; 0x40c
80071f8: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
80071fc: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8007200: 2b00 cmp r3, #0
8007202: d116 bne.n 8007232 <USB_EPStartXfer+0x111a>
8007204: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
8007208: 881b ldrh r3, [r3, #0]
800720a: b29b uxth r3, r3
800720c: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8007210: b29a uxth r2, r3
8007212: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
8007216: 801a strh r2, [r3, #0]
8007218: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
800721c: 881b ldrh r3, [r3, #0]
800721e: b29b uxth r3, r3
8007220: ea6f 4343 mvn.w r3, r3, lsl #17
8007224: ea6f 4353 mvn.w r3, r3, lsr #17
8007228: b29a uxth r2, r3
800722a: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
800722e: 801a strh r2, [r3, #0]
8007230: e05e b.n 80072f0 <USB_EPStartXfer+0x11d8>
8007232: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8007236: 2b3e cmp r3, #62 ; 0x3e
8007238: d818 bhi.n 800726c <USB_EPStartXfer+0x1154>
800723a: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800723e: 085b lsrs r3, r3, #1
8007240: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
8007244: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8007248: f003 0301 and.w r3, r3, #1
800724c: 2b00 cmp r3, #0
800724e: d004 beq.n 800725a <USB_EPStartXfer+0x1142>
8007250: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
8007254: 3301 adds r3, #1
8007256: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
800725a: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
800725e: b29b uxth r3, r3
8007260: 029b lsls r3, r3, #10
8007262: b29a uxth r2, r3
8007264: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
8007268: 801a strh r2, [r3, #0]
800726a: e041 b.n 80072f0 <USB_EPStartXfer+0x11d8>
800726c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8007270: 095b lsrs r3, r3, #5
8007272: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
8007276: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
800727a: f003 031f and.w r3, r3, #31
800727e: 2b00 cmp r3, #0
8007280: d104 bne.n 800728c <USB_EPStartXfer+0x1174>
8007282: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
8007286: 3b01 subs r3, #1
8007288: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
800728c: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
8007290: b29b uxth r3, r3
8007292: 029b lsls r3, r3, #10
8007294: b29b uxth r3, r3
8007296: ea6f 4343 mvn.w r3, r3, lsl #17
800729a: ea6f 4353 mvn.w r3, r3, lsr #17
800729e: b29a uxth r2, r3
80072a0: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
80072a4: 801a strh r2, [r3, #0]
80072a6: e023 b.n 80072f0 <USB_EPStartXfer+0x11d8>
80072a8: 463b mov r3, r7
80072aa: 681b ldr r3, [r3, #0]
80072ac: 785b ldrb r3, [r3, #1]
80072ae: 2b01 cmp r3, #1
80072b0: d11e bne.n 80072f0 <USB_EPStartXfer+0x11d8>
80072b2: 1d3b adds r3, r7, #4
80072b4: 681b ldr r3, [r3, #0]
80072b6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80072ba: b29b uxth r3, r3
80072bc: 461a mov r2, r3
80072be: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
80072c2: 4413 add r3, r2
80072c4: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8
80072c8: 463b mov r3, r7
80072ca: 681b ldr r3, [r3, #0]
80072cc: 781b ldrb r3, [r3, #0]
80072ce: 011a lsls r2, r3, #4
80072d0: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
80072d4: 4413 add r3, r2
80072d6: f203 430c addw r3, r3, #1036 ; 0x40c
80072da: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
80072de: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
80072e2: b29a uxth r2, r3
80072e4: f8d7 30c4 ldr.w r3, [r7, #196] ; 0xc4
80072e8: 801a strh r2, [r3, #0]
80072ea: e001 b.n 80072f0 <USB_EPStartXfer+0x11d8>
}
else
{
return HAL_ERROR;
80072ec: 2301 movs r3, #1
80072ee: e02e b.n 800734e <USB_EPStartXfer+0x1236>
}
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80072f0: 1d3b adds r3, r7, #4
80072f2: 681a ldr r2, [r3, #0]
80072f4: 463b mov r3, r7
80072f6: 681b ldr r3, [r3, #0]
80072f8: 781b ldrb r3, [r3, #0]
80072fa: 009b lsls r3, r3, #2
80072fc: 4413 add r3, r2
80072fe: 881b ldrh r3, [r3, #0]
8007300: b29b uxth r3, r3
8007302: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8007306: f023 0370 bic.w r3, r3, #112 ; 0x70
800730a: f8a7 308e strh.w r3, [r7, #142] ; 0x8e
800730e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e
8007312: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8007316: f8a7 308e strh.w r3, [r7, #142] ; 0x8e
800731a: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e
800731e: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8007322: f8a7 308e strh.w r3, [r7, #142] ; 0x8e
8007326: 1d3b adds r3, r7, #4
8007328: 681a ldr r2, [r3, #0]
800732a: 463b mov r3, r7
800732c: 681b ldr r3, [r3, #0]
800732e: 781b ldrb r3, [r3, #0]
8007330: 009b lsls r3, r3, #2
8007332: 441a add r2, r3
8007334: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e
8007338: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800733c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8007340: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8007344: f043 0380 orr.w r3, r3, #128 ; 0x80
8007348: b29b uxth r3, r3
800734a: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800734c: 2300 movs r3, #0
}
800734e: 4618 mov r0, r3
8007350: f507 7788 add.w r7, r7, #272 ; 0x110
8007354: 46bd mov sp, r7
8007356: bd80 pop {r7, pc}
08007358 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8007358: b480 push {r7}
800735a: b085 sub sp, #20
800735c: af00 add r7, sp, #0
800735e: 6078 str r0, [r7, #4]
8007360: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
8007362: 683b ldr r3, [r7, #0]
8007364: 785b ldrb r3, [r3, #1]
8007366: 2b00 cmp r3, #0
8007368: d020 beq.n 80073ac <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800736a: 687a ldr r2, [r7, #4]
800736c: 683b ldr r3, [r7, #0]
800736e: 781b ldrb r3, [r3, #0]
8007370: 009b lsls r3, r3, #2
8007372: 4413 add r3, r2
8007374: 881b ldrh r3, [r3, #0]
8007376: b29b uxth r3, r3
8007378: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800737c: f023 0340 bic.w r3, r3, #64 ; 0x40
8007380: 81bb strh r3, [r7, #12]
8007382: 89bb ldrh r3, [r7, #12]
8007384: f083 0310 eor.w r3, r3, #16
8007388: 81bb strh r3, [r7, #12]
800738a: 687a ldr r2, [r7, #4]
800738c: 683b ldr r3, [r7, #0]
800738e: 781b ldrb r3, [r3, #0]
8007390: 009b lsls r3, r3, #2
8007392: 441a add r2, r3
8007394: 89bb ldrh r3, [r7, #12]
8007396: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800739a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800739e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80073a2: f043 0380 orr.w r3, r3, #128 ; 0x80
80073a6: b29b uxth r3, r3
80073a8: 8013 strh r3, [r2, #0]
80073aa: e01f b.n 80073ec <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
80073ac: 687a ldr r2, [r7, #4]
80073ae: 683b ldr r3, [r7, #0]
80073b0: 781b ldrb r3, [r3, #0]
80073b2: 009b lsls r3, r3, #2
80073b4: 4413 add r3, r2
80073b6: 881b ldrh r3, [r3, #0]
80073b8: b29b uxth r3, r3
80073ba: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80073be: f023 0370 bic.w r3, r3, #112 ; 0x70
80073c2: 81fb strh r3, [r7, #14]
80073c4: 89fb ldrh r3, [r7, #14]
80073c6: f483 5380 eor.w r3, r3, #4096 ; 0x1000
80073ca: 81fb strh r3, [r7, #14]
80073cc: 687a ldr r2, [r7, #4]
80073ce: 683b ldr r3, [r7, #0]
80073d0: 781b ldrb r3, [r3, #0]
80073d2: 009b lsls r3, r3, #2
80073d4: 441a add r2, r3
80073d6: 89fb ldrh r3, [r7, #14]
80073d8: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80073dc: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80073e0: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80073e4: f043 0380 orr.w r3, r3, #128 ; 0x80
80073e8: b29b uxth r3, r3
80073ea: 8013 strh r3, [r2, #0]
}
return HAL_OK;
80073ec: 2300 movs r3, #0
}
80073ee: 4618 mov r0, r3
80073f0: 3714 adds r7, #20
80073f2: 46bd mov sp, r7
80073f4: bc80 pop {r7}
80073f6: 4770 bx lr
080073f8 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80073f8: b480 push {r7}
80073fa: b087 sub sp, #28
80073fc: af00 add r7, sp, #0
80073fe: 6078 str r0, [r7, #4]
8007400: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8007402: 683b ldr r3, [r7, #0]
8007404: 7b1b ldrb r3, [r3, #12]
8007406: 2b00 cmp r3, #0
8007408: f040 809d bne.w 8007546 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800740c: 683b ldr r3, [r7, #0]
800740e: 785b ldrb r3, [r3, #1]
8007410: 2b00 cmp r3, #0
8007412: d04c beq.n 80074ae <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8007414: 687a ldr r2, [r7, #4]
8007416: 683b ldr r3, [r7, #0]
8007418: 781b ldrb r3, [r3, #0]
800741a: 009b lsls r3, r3, #2
800741c: 4413 add r3, r2
800741e: 881b ldrh r3, [r3, #0]
8007420: 823b strh r3, [r7, #16]
8007422: 8a3b ldrh r3, [r7, #16]
8007424: f003 0340 and.w r3, r3, #64 ; 0x40
8007428: 2b00 cmp r3, #0
800742a: d01b beq.n 8007464 <USB_EPClearStall+0x6c>
800742c: 687a ldr r2, [r7, #4]
800742e: 683b ldr r3, [r7, #0]
8007430: 781b ldrb r3, [r3, #0]
8007432: 009b lsls r3, r3, #2
8007434: 4413 add r3, r2
8007436: 881b ldrh r3, [r3, #0]
8007438: b29b uxth r3, r3
800743a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800743e: f023 0370 bic.w r3, r3, #112 ; 0x70
8007442: 81fb strh r3, [r7, #14]
8007444: 687a ldr r2, [r7, #4]
8007446: 683b ldr r3, [r7, #0]
8007448: 781b ldrb r3, [r3, #0]
800744a: 009b lsls r3, r3, #2
800744c: 441a add r2, r3
800744e: 89fb ldrh r3, [r7, #14]
8007450: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007454: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8007458: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800745c: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8007460: b29b uxth r3, r3
8007462: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8007464: 683b ldr r3, [r7, #0]
8007466: 78db ldrb r3, [r3, #3]
8007468: 2b01 cmp r3, #1
800746a: d06c beq.n 8007546 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800746c: 687a ldr r2, [r7, #4]
800746e: 683b ldr r3, [r7, #0]
8007470: 781b ldrb r3, [r3, #0]
8007472: 009b lsls r3, r3, #2
8007474: 4413 add r3, r2
8007476: 881b ldrh r3, [r3, #0]
8007478: b29b uxth r3, r3
800747a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800747e: f023 0340 bic.w r3, r3, #64 ; 0x40
8007482: 81bb strh r3, [r7, #12]
8007484: 89bb ldrh r3, [r7, #12]
8007486: f083 0320 eor.w r3, r3, #32
800748a: 81bb strh r3, [r7, #12]
800748c: 687a ldr r2, [r7, #4]
800748e: 683b ldr r3, [r7, #0]
8007490: 781b ldrb r3, [r3, #0]
8007492: 009b lsls r3, r3, #2
8007494: 441a add r2, r3
8007496: 89bb ldrh r3, [r7, #12]
8007498: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800749c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80074a0: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80074a4: f043 0380 orr.w r3, r3, #128 ; 0x80
80074a8: b29b uxth r3, r3
80074aa: 8013 strh r3, [r2, #0]
80074ac: e04b b.n 8007546 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80074ae: 687a ldr r2, [r7, #4]
80074b0: 683b ldr r3, [r7, #0]
80074b2: 781b ldrb r3, [r3, #0]
80074b4: 009b lsls r3, r3, #2
80074b6: 4413 add r3, r2
80074b8: 881b ldrh r3, [r3, #0]
80074ba: 82fb strh r3, [r7, #22]
80074bc: 8afb ldrh r3, [r7, #22]
80074be: f403 4380 and.w r3, r3, #16384 ; 0x4000
80074c2: 2b00 cmp r3, #0
80074c4: d01b beq.n 80074fe <USB_EPClearStall+0x106>
80074c6: 687a ldr r2, [r7, #4]
80074c8: 683b ldr r3, [r7, #0]
80074ca: 781b ldrb r3, [r3, #0]
80074cc: 009b lsls r3, r3, #2
80074ce: 4413 add r3, r2
80074d0: 881b ldrh r3, [r3, #0]
80074d2: b29b uxth r3, r3
80074d4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80074d8: f023 0370 bic.w r3, r3, #112 ; 0x70
80074dc: 82bb strh r3, [r7, #20]
80074de: 687a ldr r2, [r7, #4]
80074e0: 683b ldr r3, [r7, #0]
80074e2: 781b ldrb r3, [r3, #0]
80074e4: 009b lsls r3, r3, #2
80074e6: 441a add r2, r3
80074e8: 8abb ldrh r3, [r7, #20]
80074ea: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80074ee: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80074f2: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80074f6: f043 0380 orr.w r3, r3, #128 ; 0x80
80074fa: b29b uxth r3, r3
80074fc: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80074fe: 687a ldr r2, [r7, #4]
8007500: 683b ldr r3, [r7, #0]
8007502: 781b ldrb r3, [r3, #0]
8007504: 009b lsls r3, r3, #2
8007506: 4413 add r3, r2
8007508: 881b ldrh r3, [r3, #0]
800750a: b29b uxth r3, r3
800750c: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8007510: f023 0370 bic.w r3, r3, #112 ; 0x70
8007514: 827b strh r3, [r7, #18]
8007516: 8a7b ldrh r3, [r7, #18]
8007518: f483 5380 eor.w r3, r3, #4096 ; 0x1000
800751c: 827b strh r3, [r7, #18]
800751e: 8a7b ldrh r3, [r7, #18]
8007520: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8007524: 827b strh r3, [r7, #18]
8007526: 687a ldr r2, [r7, #4]
8007528: 683b ldr r3, [r7, #0]
800752a: 781b ldrb r3, [r3, #0]
800752c: 009b lsls r3, r3, #2
800752e: 441a add r2, r3
8007530: 8a7b ldrh r3, [r7, #18]
8007532: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007536: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800753a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800753e: f043 0380 orr.w r3, r3, #128 ; 0x80
8007542: b29b uxth r3, r3
8007544: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
8007546: 2300 movs r3, #0
}
8007548: 4618 mov r0, r3
800754a: 371c adds r7, #28
800754c: 46bd mov sp, r7
800754e: bc80 pop {r7}
8007550: 4770 bx lr
08007552 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
8007552: b480 push {r7}
8007554: b083 sub sp, #12
8007556: af00 add r7, sp, #0
8007558: 6078 str r0, [r7, #4]
800755a: 460b mov r3, r1
800755c: 70fb strb r3, [r7, #3]
if (address == 0U)
800755e: 78fb ldrb r3, [r7, #3]
8007560: 2b00 cmp r3, #0
8007562: d103 bne.n 800756c <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
8007564: 687b ldr r3, [r7, #4]
8007566: 2280 movs r2, #128 ; 0x80
8007568: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
}
return HAL_OK;
800756c: 2300 movs r3, #0
}
800756e: 4618 mov r0, r3
8007570: 370c adds r7, #12
8007572: 46bd mov sp, r7
8007574: bc80 pop {r7}
8007576: 4770 bx lr
08007578 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
8007578: b480 push {r7}
800757a: b083 sub sp, #12
800757c: af00 add r7, sp, #0
800757e: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8007580: 2300 movs r3, #0
}
8007582: 4618 mov r0, r3
8007584: 370c adds r7, #12
8007586: 46bd mov sp, r7
8007588: bc80 pop {r7}
800758a: 4770 bx lr
0800758c <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800758c: b480 push {r7}
800758e: b083 sub sp, #12
8007590: af00 add r7, sp, #0
8007592: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8007594: 2300 movs r3, #0
}
8007596: 4618 mov r0, r3
8007598: 370c adds r7, #12
800759a: 46bd mov sp, r7
800759c: bc80 pop {r7}
800759e: 4770 bx lr
080075a0 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval HAL status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
{
80075a0: b480 push {r7}
80075a2: b085 sub sp, #20
80075a4: af00 add r7, sp, #0
80075a6: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
80075a8: 687b ldr r3, [r7, #4]
80075aa: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80075ae: b29b uxth r3, r3
80075b0: 60fb str r3, [r7, #12]
return tmpreg;
80075b2: 68fb ldr r3, [r7, #12]
}
80075b4: 4618 mov r0, r3
80075b6: 3714 adds r7, #20
80075b8: 46bd mov sp, r7
80075ba: bc80 pop {r7}
80075bc: 4770 bx lr
080075be <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
80075be: b480 push {r7}
80075c0: b083 sub sp, #12
80075c2: af00 add r7, sp, #0
80075c4: 6078 str r0, [r7, #4]
80075c6: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80075c8: 2300 movs r3, #0
}
80075ca: 4618 mov r0, r3
80075cc: 370c adds r7, #12
80075ce: 46bd mov sp, r7
80075d0: bc80 pop {r7}
80075d2: 4770 bx lr
080075d4 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
80075d4: b480 push {r7}
80075d6: b08d sub sp, #52 ; 0x34
80075d8: af00 add r7, sp, #0
80075da: 60f8 str r0, [r7, #12]
80075dc: 60b9 str r1, [r7, #8]
80075de: 4611 mov r1, r2
80075e0: 461a mov r2, r3
80075e2: 460b mov r3, r1
80075e4: 80fb strh r3, [r7, #6]
80075e6: 4613 mov r3, r2
80075e8: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
80075ea: 88bb ldrh r3, [r7, #4]
80075ec: 3301 adds r3, #1
80075ee: 085b lsrs r3, r3, #1
80075f0: 623b str r3, [r7, #32]
uint32_t BaseAddr = (uint32_t)USBx;
80075f2: 68fb ldr r3, [r7, #12]
80075f4: 61fb str r3, [r7, #28]
uint32_t i, temp1, temp2;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
80075f6: 68bb ldr r3, [r7, #8]
80075f8: 627b str r3, [r7, #36] ; 0x24
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
80075fa: 88fb ldrh r3, [r7, #6]
80075fc: 005a lsls r2, r3, #1
80075fe: 69fb ldr r3, [r7, #28]
8007600: 4413 add r3, r2
8007602: f503 6380 add.w r3, r3, #1024 ; 0x400
8007606: 62bb str r3, [r7, #40] ; 0x28
for (i = n; i != 0U; i--)
8007608: 6a3b ldr r3, [r7, #32]
800760a: 62fb str r3, [r7, #44] ; 0x2c
800760c: e01e b.n 800764c <USB_WritePMA+0x78>
{
temp1 = *pBuf;
800760e: 6a7b ldr r3, [r7, #36] ; 0x24
8007610: 781b ldrb r3, [r3, #0]
8007612: 61bb str r3, [r7, #24]
pBuf++;
8007614: 6a7b ldr r3, [r7, #36] ; 0x24
8007616: 3301 adds r3, #1
8007618: 627b str r3, [r7, #36] ; 0x24
temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8));
800761a: 6a7b ldr r3, [r7, #36] ; 0x24
800761c: 781b ldrb r3, [r3, #0]
800761e: b29b uxth r3, r3
8007620: 021b lsls r3, r3, #8
8007622: b29b uxth r3, r3
8007624: 461a mov r2, r3
8007626: 69bb ldr r3, [r7, #24]
8007628: 4313 orrs r3, r2
800762a: 617b str r3, [r7, #20]
*pdwVal = (uint16_t)temp2;
800762c: 697b ldr r3, [r7, #20]
800762e: b29a uxth r2, r3
8007630: 6abb ldr r3, [r7, #40] ; 0x28
8007632: 801a strh r2, [r3, #0]
pdwVal++;
8007634: 6abb ldr r3, [r7, #40] ; 0x28
8007636: 3302 adds r3, #2
8007638: 62bb str r3, [r7, #40] ; 0x28
#if PMA_ACCESS > 1U
pdwVal++;
800763a: 6abb ldr r3, [r7, #40] ; 0x28
800763c: 3302 adds r3, #2
800763e: 62bb str r3, [r7, #40] ; 0x28
#endif
pBuf++;
8007640: 6a7b ldr r3, [r7, #36] ; 0x24
8007642: 3301 adds r3, #1
8007644: 627b str r3, [r7, #36] ; 0x24
for (i = n; i != 0U; i--)
8007646: 6afb ldr r3, [r7, #44] ; 0x2c
8007648: 3b01 subs r3, #1
800764a: 62fb str r3, [r7, #44] ; 0x2c
800764c: 6afb ldr r3, [r7, #44] ; 0x2c
800764e: 2b00 cmp r3, #0
8007650: d1dd bne.n 800760e <USB_WritePMA+0x3a>
}
}
8007652: bf00 nop
8007654: 3734 adds r7, #52 ; 0x34
8007656: 46bd mov sp, r7
8007658: bc80 pop {r7}
800765a: 4770 bx lr
0800765c <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800765c: b480 push {r7}
800765e: b08b sub sp, #44 ; 0x2c
8007660: af00 add r7, sp, #0
8007662: 60f8 str r0, [r7, #12]
8007664: 60b9 str r1, [r7, #8]
8007666: 4611 mov r1, r2
8007668: 461a mov r2, r3
800766a: 460b mov r3, r1
800766c: 80fb strh r3, [r7, #6]
800766e: 4613 mov r3, r2
8007670: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
8007672: 88bb ldrh r3, [r7, #4]
8007674: 085b lsrs r3, r3, #1
8007676: b29b uxth r3, r3
8007678: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800767a: 68fb ldr r3, [r7, #12]
800767c: 617b str r3, [r7, #20]
uint32_t i, temp;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800767e: 68bb ldr r3, [r7, #8]
8007680: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8007682: 88fb ldrh r3, [r7, #6]
8007684: 005a lsls r2, r3, #1
8007686: 697b ldr r3, [r7, #20]
8007688: 4413 add r3, r2
800768a: f503 6380 add.w r3, r3, #1024 ; 0x400
800768e: 623b str r3, [r7, #32]
for (i = n; i != 0U; i--)
8007690: 69bb ldr r3, [r7, #24]
8007692: 627b str r3, [r7, #36] ; 0x24
8007694: e01b b.n 80076ce <USB_ReadPMA+0x72>
{
temp = *(__IO uint16_t *)pdwVal;
8007696: 6a3b ldr r3, [r7, #32]
8007698: 881b ldrh r3, [r3, #0]
800769a: b29b uxth r3, r3
800769c: 613b str r3, [r7, #16]
pdwVal++;
800769e: 6a3b ldr r3, [r7, #32]
80076a0: 3302 adds r3, #2
80076a2: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
80076a4: 693b ldr r3, [r7, #16]
80076a6: b2da uxtb r2, r3
80076a8: 69fb ldr r3, [r7, #28]
80076aa: 701a strb r2, [r3, #0]
pBuf++;
80076ac: 69fb ldr r3, [r7, #28]
80076ae: 3301 adds r3, #1
80076b0: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((temp >> 8) & 0xFFU);
80076b2: 693b ldr r3, [r7, #16]
80076b4: 0a1b lsrs r3, r3, #8
80076b6: b2da uxtb r2, r3
80076b8: 69fb ldr r3, [r7, #28]
80076ba: 701a strb r2, [r3, #0]
pBuf++;
80076bc: 69fb ldr r3, [r7, #28]
80076be: 3301 adds r3, #1
80076c0: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
80076c2: 6a3b ldr r3, [r7, #32]
80076c4: 3302 adds r3, #2
80076c6: 623b str r3, [r7, #32]
for (i = n; i != 0U; i--)
80076c8: 6a7b ldr r3, [r7, #36] ; 0x24
80076ca: 3b01 subs r3, #1
80076cc: 627b str r3, [r7, #36] ; 0x24
80076ce: 6a7b ldr r3, [r7, #36] ; 0x24
80076d0: 2b00 cmp r3, #0
80076d2: d1e0 bne.n 8007696 <USB_ReadPMA+0x3a>
#endif
}
if ((wNBytes % 2U) != 0U)
80076d4: 88bb ldrh r3, [r7, #4]
80076d6: f003 0301 and.w r3, r3, #1
80076da: b29b uxth r3, r3
80076dc: 2b00 cmp r3, #0
80076de: d007 beq.n 80076f0 <USB_ReadPMA+0x94>
{
temp = *pdwVal;
80076e0: 6a3b ldr r3, [r7, #32]
80076e2: 881b ldrh r3, [r3, #0]
80076e4: b29b uxth r3, r3
80076e6: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
80076e8: 693b ldr r3, [r7, #16]
80076ea: b2da uxtb r2, r3
80076ec: 69fb ldr r3, [r7, #28]
80076ee: 701a strb r2, [r3, #0]
}
}
80076f0: bf00 nop
80076f2: 372c adds r7, #44 ; 0x2c
80076f4: 46bd mov sp, r7
80076f6: bc80 pop {r7}
80076f8: 4770 bx lr
080076fa <USBD_MSC_Init>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status
*/
uint8_t USBD_MSC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80076fa: b580 push {r7, lr}
80076fc: b082 sub sp, #8
80076fe: af00 add r7, sp, #0
8007700: 6078 str r0, [r7, #4]
8007702: 460b mov r3, r1
8007704: 70fb strb r3, [r7, #3]
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007706: 687b ldr r3, [r7, #4]
8007708: 7c1b ldrb r3, [r3, #16]
800770a: 2b00 cmp r3, #0
800770c: d115 bne.n 800773a <USBD_MSC_Init+0x40>
{
/* Open EP OUT */
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_HS_PACKET);
800770e: f44f 7300 mov.w r3, #512 ; 0x200
8007712: 2202 movs r2, #2
8007714: 2101 movs r1, #1
8007716: 6878 ldr r0, [r7, #4]
8007718: f002 fd85 bl 800a226 <USBD_LL_OpenEP>
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 1U;
800771c: 687b ldr r3, [r7, #4]
800771e: 2201 movs r2, #1
8007720: f8c3 216c str.w r2, [r3, #364] ; 0x16c
/* Open EP IN */
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_HS_PACKET);
8007724: f44f 7300 mov.w r3, #512 ; 0x200
8007728: 2202 movs r2, #2
800772a: 2181 movs r1, #129 ; 0x81
800772c: 6878 ldr r0, [r7, #4]
800772e: f002 fd7a bl 800a226 <USBD_LL_OpenEP>
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 1U;
8007732: 687b ldr r3, [r7, #4]
8007734: 2201 movs r2, #1
8007736: 62da str r2, [r3, #44] ; 0x2c
8007738: e012 b.n 8007760 <USBD_MSC_Init+0x66>
}
else
{
/* Open EP OUT */
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_FS_PACKET);
800773a: 2340 movs r3, #64 ; 0x40
800773c: 2202 movs r2, #2
800773e: 2101 movs r1, #1
8007740: 6878 ldr r0, [r7, #4]
8007742: f002 fd70 bl 800a226 <USBD_LL_OpenEP>
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 1U;
8007746: 687b ldr r3, [r7, #4]
8007748: 2201 movs r2, #1
800774a: f8c3 216c str.w r2, [r3, #364] ; 0x16c
/* Open EP IN */
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK, MSC_MAX_FS_PACKET);
800774e: 2340 movs r3, #64 ; 0x40
8007750: 2202 movs r2, #2
8007752: 2181 movs r1, #129 ; 0x81
8007754: 6878 ldr r0, [r7, #4]
8007756: f002 fd66 bl 800a226 <USBD_LL_OpenEP>
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 1U;
800775a: 687b ldr r3, [r7, #4]
800775c: 2201 movs r2, #1
800775e: 62da str r2, [r3, #44] ; 0x2c
}
pdev->pClassData = USBD_malloc(sizeof(USBD_MSC_BOT_HandleTypeDef));
8007760: f44f 701b mov.w r0, #620 ; 0x26c
8007764: f002 fea6 bl 800a4b4 <USBD_static_malloc>
8007768: 4602 mov r2, r0
800776a: 687b ldr r3, [r7, #4]
800776c: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
if (pdev->pClassData == NULL)
8007770: 687b ldr r3, [r7, #4]
8007772: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007776: 2b00 cmp r3, #0
8007778: d101 bne.n 800777e <USBD_MSC_Init+0x84>
{
return USBD_FAIL;
800777a: 2302 movs r3, #2
800777c: e003 b.n 8007786 <USBD_MSC_Init+0x8c>
}
/* Init the BOT layer */
MSC_BOT_Init(pdev);
800777e: 6878 ldr r0, [r7, #4]
8007780: f000 f9da bl 8007b38 <MSC_BOT_Init>
return USBD_OK;
8007784: 2300 movs r3, #0
}
8007786: 4618 mov r0, r3
8007788: 3708 adds r7, #8
800778a: 46bd mov sp, r7
800778c: bd80 pop {r7, pc}
0800778e <USBD_MSC_DeInit>:
* @param cfgidx: configuration index
* @retval status
*/
uint8_t USBD_MSC_DeInit(USBD_HandleTypeDef *pdev,
uint8_t cfgidx)
{
800778e: b580 push {r7, lr}
8007790: b082 sub sp, #8
8007792: af00 add r7, sp, #0
8007794: 6078 str r0, [r7, #4]
8007796: 460b mov r3, r1
8007798: 70fb strb r3, [r7, #3]
/* Close MSC EPs */
USBD_LL_CloseEP(pdev, MSC_EPOUT_ADDR);
800779a: 2101 movs r1, #1
800779c: 6878 ldr r0, [r7, #4]
800779e: f002 fd68 bl 800a272 <USBD_LL_CloseEP>
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 0U;
80077a2: 687b ldr r3, [r7, #4]
80077a4: 2200 movs r2, #0
80077a6: f8c3 216c str.w r2, [r3, #364] ; 0x16c
/* Close EP IN */
USBD_LL_CloseEP(pdev, MSC_EPIN_ADDR);
80077aa: 2181 movs r1, #129 ; 0x81
80077ac: 6878 ldr r0, [r7, #4]
80077ae: f002 fd60 bl 800a272 <USBD_LL_CloseEP>
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 0U;
80077b2: 687b ldr r3, [r7, #4]
80077b4: 2200 movs r2, #0
80077b6: 62da str r2, [r3, #44] ; 0x2c
/* De-Init the BOT layer */
MSC_BOT_DeInit(pdev);
80077b8: 6878 ldr r0, [r7, #4]
80077ba: f000 fa07 bl 8007bcc <MSC_BOT_DeInit>
/* Free MSC Class Resources */
if (pdev->pClassData != NULL)
80077be: 687b ldr r3, [r7, #4]
80077c0: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80077c4: 2b00 cmp r3, #0
80077c6: d009 beq.n 80077dc <USBD_MSC_DeInit+0x4e>
{
USBD_free(pdev->pClassData);
80077c8: 687b ldr r3, [r7, #4]
80077ca: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80077ce: 4618 mov r0, r3
80077d0: f002 fe7c bl 800a4cc <USBD_static_free>
pdev->pClassData = NULL;
80077d4: 687b ldr r3, [r7, #4]
80077d6: 2200 movs r2, #0
80077d8: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
}
return USBD_OK;
80077dc: 2300 movs r3, #0
}
80077de: 4618 mov r0, r3
80077e0: 3708 adds r7, #8
80077e2: 46bd mov sp, r7
80077e4: bd80 pop {r7, pc}
...
080077e8 <USBD_MSC_Setup>:
* @param pdev: device instance
* @param req: USB request
* @retval status
*/
uint8_t USBD_MSC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80077e8: b580 push {r7, lr}
80077ea: b086 sub sp, #24
80077ec: af00 add r7, sp, #0
80077ee: 6078 str r0, [r7, #4]
80077f0: 6039 str r1, [r7, #0]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
80077f2: 687b ldr r3, [r7, #4]
80077f4: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80077f8: 613b str r3, [r7, #16]
uint8_t ret = USBD_OK;
80077fa: 2300 movs r3, #0
80077fc: 75fb strb r3, [r7, #23]
uint16_t status_info = 0U;
80077fe: 2300 movs r3, #0
8007800: 81fb strh r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007802: 683b ldr r3, [r7, #0]
8007804: 781b ldrb r3, [r3, #0]
8007806: f003 0360 and.w r3, r3, #96 ; 0x60
800780a: 2b00 cmp r3, #0
800780c: d04d beq.n 80078aa <USBD_MSC_Setup+0xc2>
800780e: 2b20 cmp r3, #32
8007810: f040 8113 bne.w 8007a3a <USBD_MSC_Setup+0x252>
{
/* Class request */
case USB_REQ_TYPE_CLASS:
switch (req->bRequest)
8007814: 683b ldr r3, [r7, #0]
8007816: 785b ldrb r3, [r3, #1]
8007818: 2bfe cmp r3, #254 ; 0xfe
800781a: d002 beq.n 8007822 <USBD_MSC_Setup+0x3a>
800781c: 2bff cmp r3, #255 ; 0xff
800781e: d024 beq.n 800786a <USBD_MSC_Setup+0x82>
8007820: e03b b.n 800789a <USBD_MSC_Setup+0xb2>
{
case BOT_GET_MAX_LUN:
if ((req->wValue == 0U) && (req->wLength == 1U) &&
8007822: 683b ldr r3, [r7, #0]
8007824: 885b ldrh r3, [r3, #2]
8007826: 2b00 cmp r3, #0
8007828: d118 bne.n 800785c <USBD_MSC_Setup+0x74>
800782a: 683b ldr r3, [r7, #0]
800782c: 88db ldrh r3, [r3, #6]
800782e: 2b01 cmp r3, #1
8007830: d114 bne.n 800785c <USBD_MSC_Setup+0x74>
((req->bmRequest & 0x80U) == 0x80U))
8007832: 683b ldr r3, [r7, #0]
8007834: 781b ldrb r3, [r3, #0]
8007836: b25b sxtb r3, r3
if ((req->wValue == 0U) && (req->wLength == 1U) &&
8007838: 2b00 cmp r3, #0
800783a: da0f bge.n 800785c <USBD_MSC_Setup+0x74>
{
hmsc->max_lun = (uint32_t)((USBD_StorageTypeDef *)pdev->pUserData)->GetMaxLun();
800783c: 687b ldr r3, [r7, #4]
800783e: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8007842: 699b ldr r3, [r3, #24]
8007844: 4798 blx r3
8007846: 4603 mov r3, r0
8007848: 461a mov r2, r3
800784a: 693b ldr r3, [r7, #16]
800784c: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&hmsc->max_lun, 1U);
800784e: 693b ldr r3, [r7, #16]
8007850: 2201 movs r2, #1
8007852: 4619 mov r1, r3
8007854: 6878 ldr r0, [r7, #4]
8007856: f002 f983 bl 8009b60 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800785a: e025 b.n 80078a8 <USBD_MSC_Setup+0xc0>
USBD_CtlError(pdev, req);
800785c: 6839 ldr r1, [r7, #0]
800785e: 6878 ldr r0, [r7, #4]
8007860: f002 f914 bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
8007864: 2302 movs r3, #2
8007866: 75fb strb r3, [r7, #23]
break;
8007868: e01e b.n 80078a8 <USBD_MSC_Setup+0xc0>
case BOT_RESET :
if ((req->wValue == 0U) && (req->wLength == 0U) &&
800786a: 683b ldr r3, [r7, #0]
800786c: 885b ldrh r3, [r3, #2]
800786e: 2b00 cmp r3, #0
8007870: d10c bne.n 800788c <USBD_MSC_Setup+0xa4>
8007872: 683b ldr r3, [r7, #0]
8007874: 88db ldrh r3, [r3, #6]
8007876: 2b00 cmp r3, #0
8007878: d108 bne.n 800788c <USBD_MSC_Setup+0xa4>
((req->bmRequest & 0x80U) != 0x80U))
800787a: 683b ldr r3, [r7, #0]
800787c: 781b ldrb r3, [r3, #0]
800787e: b25b sxtb r3, r3
if ((req->wValue == 0U) && (req->wLength == 0U) &&
8007880: 2b00 cmp r3, #0
8007882: db03 blt.n 800788c <USBD_MSC_Setup+0xa4>
{
MSC_BOT_Reset(pdev);
8007884: 6878 ldr r0, [r7, #4]
8007886: f000 f987 bl 8007b98 <MSC_BOT_Reset>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800788a: e00d b.n 80078a8 <USBD_MSC_Setup+0xc0>
USBD_CtlError(pdev, req);
800788c: 6839 ldr r1, [r7, #0]
800788e: 6878 ldr r0, [r7, #4]
8007890: f002 f8fc bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
8007894: 2302 movs r3, #2
8007896: 75fb strb r3, [r7, #23]
break;
8007898: e006 b.n 80078a8 <USBD_MSC_Setup+0xc0>
default:
USBD_CtlError(pdev, req);
800789a: 6839 ldr r1, [r7, #0]
800789c: 6878 ldr r0, [r7, #4]
800789e: f002 f8f5 bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
80078a2: 2302 movs r3, #2
80078a4: 75fb strb r3, [r7, #23]
break;
80078a6: bf00 nop
}
break;
80078a8: e0ce b.n 8007a48 <USBD_MSC_Setup+0x260>
/* Interface & Endpoint request */
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80078aa: 683b ldr r3, [r7, #0]
80078ac: 785b ldrb r3, [r3, #1]
80078ae: 2b0b cmp r3, #11
80078b0: f200 80bb bhi.w 8007a2a <USBD_MSC_Setup+0x242>
80078b4: a201 add r2, pc, #4 ; (adr r2, 80078bc <USBD_MSC_Setup+0xd4>)
80078b6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80078ba: bf00 nop
80078bc: 080078ed .word 0x080078ed
80078c0: 08007963 .word 0x08007963
80078c4: 08007a2b .word 0x08007a2b
80078c8: 08007a2b .word 0x08007a2b
80078cc: 08007a2b .word 0x08007a2b
80078d0: 08007a2b .word 0x08007a2b
80078d4: 08007a2b .word 0x08007a2b
80078d8: 08007a2b .word 0x08007a2b
80078dc: 08007a2b .word 0x08007a2b
80078e0: 08007a2b .word 0x08007a2b
80078e4: 08007915 .word 0x08007915
80078e8: 0800793d .word 0x0800793d
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80078ec: 687b ldr r3, [r7, #4]
80078ee: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80078f2: 2b03 cmp r3, #3
80078f4: d107 bne.n 8007906 <USBD_MSC_Setup+0x11e>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
80078f6: f107 030e add.w r3, r7, #14
80078fa: 2202 movs r2, #2
80078fc: 4619 mov r1, r3
80078fe: 6878 ldr r0, [r7, #4]
8007900: f002 f92e bl 8009b60 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8007904: e098 b.n 8007a38 <USBD_MSC_Setup+0x250>
USBD_CtlError(pdev, req);
8007906: 6839 ldr r1, [r7, #0]
8007908: 6878 ldr r0, [r7, #4]
800790a: f002 f8bf bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
800790e: 2302 movs r3, #2
8007910: 75fb strb r3, [r7, #23]
break;
8007912: e091 b.n 8007a38 <USBD_MSC_Setup+0x250>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007914: 687b ldr r3, [r7, #4]
8007916: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
800791a: 2b03 cmp r3, #3
800791c: d107 bne.n 800792e <USBD_MSC_Setup+0x146>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&hmsc->interface, 1U);
800791e: 693b ldr r3, [r7, #16]
8007920: 3304 adds r3, #4
8007922: 2201 movs r2, #1
8007924: 4619 mov r1, r3
8007926: 6878 ldr r0, [r7, #4]
8007928: f002 f91a bl 8009b60 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800792c: e084 b.n 8007a38 <USBD_MSC_Setup+0x250>
USBD_CtlError(pdev, req);
800792e: 6839 ldr r1, [r7, #0]
8007930: 6878 ldr r0, [r7, #4]
8007932: f002 f8ab bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
8007936: 2302 movs r3, #2
8007938: 75fb strb r3, [r7, #23]
break;
800793a: e07d b.n 8007a38 <USBD_MSC_Setup+0x250>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800793c: 687b ldr r3, [r7, #4]
800793e: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8007942: 2b03 cmp r3, #3
8007944: d106 bne.n 8007954 <USBD_MSC_Setup+0x16c>
{
hmsc->interface = (uint8_t)(req->wValue);
8007946: 683b ldr r3, [r7, #0]
8007948: 885b ldrh r3, [r3, #2]
800794a: b2db uxtb r3, r3
800794c: 461a mov r2, r3
800794e: 693b ldr r3, [r7, #16]
8007950: 605a str r2, [r3, #4]
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8007952: e071 b.n 8007a38 <USBD_MSC_Setup+0x250>
USBD_CtlError(pdev, req);
8007954: 6839 ldr r1, [r7, #0]
8007956: 6878 ldr r0, [r7, #4]
8007958: f002 f898 bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
800795c: 2302 movs r3, #2
800795e: 75fb strb r3, [r7, #23]
break;
8007960: e06a b.n 8007a38 <USBD_MSC_Setup+0x250>
case USB_REQ_CLEAR_FEATURE:
/* Flush the FIFO and Clear the stall status */
USBD_LL_FlushEP(pdev, (uint8_t)req->wIndex);
8007962: 683b ldr r3, [r7, #0]
8007964: 889b ldrh r3, [r3, #4]
8007966: b2db uxtb r3, r3
8007968: 4619 mov r1, r3
800796a: 6878 ldr r0, [r7, #4]
800796c: f002 fca0 bl 800a2b0 <USBD_LL_FlushEP>
/* Reactivate the EP */
USBD_LL_CloseEP(pdev, (uint8_t)req->wIndex);
8007970: 683b ldr r3, [r7, #0]
8007972: 889b ldrh r3, [r3, #4]
8007974: b2db uxtb r3, r3
8007976: 4619 mov r1, r3
8007978: 6878 ldr r0, [r7, #4]
800797a: f002 fc7a bl 800a272 <USBD_LL_CloseEP>
if ((((uint8_t)req->wIndex) & 0x80U) == 0x80U)
800797e: 683b ldr r3, [r7, #0]
8007980: 889b ldrh r3, [r3, #4]
8007982: b25b sxtb r3, r3
8007984: 2b00 cmp r3, #0
8007986: da23 bge.n 80079d0 <USBD_MSC_Setup+0x1e8>
{
pdev->ep_in[(uint8_t)req->wIndex & 0xFU].is_used = 0U;
8007988: 683b ldr r3, [r7, #0]
800798a: 889b ldrh r3, [r3, #4]
800798c: b2db uxtb r3, r3
800798e: f003 020f and.w r2, r3, #15
8007992: 6879 ldr r1, [r7, #4]
8007994: 4613 mov r3, r2
8007996: 009b lsls r3, r3, #2
8007998: 4413 add r3, r2
800799a: 009b lsls r3, r3, #2
800799c: 440b add r3, r1
800799e: 3318 adds r3, #24
80079a0: 2200 movs r2, #0
80079a2: 601a str r2, [r3, #0]
if (pdev->dev_speed == USBD_SPEED_HIGH)
80079a4: 687b ldr r3, [r7, #4]
80079a6: 7c1b ldrb r3, [r3, #16]
80079a8: 2b00 cmp r3, #0
80079aa: d107 bne.n 80079bc <USBD_MSC_Setup+0x1d4>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK,
80079ac: f44f 7300 mov.w r3, #512 ; 0x200
80079b0: 2202 movs r2, #2
80079b2: 2181 movs r1, #129 ; 0x81
80079b4: 6878 ldr r0, [r7, #4]
80079b6: f002 fc36 bl 800a226 <USBD_LL_OpenEP>
80079ba: e005 b.n 80079c8 <USBD_MSC_Setup+0x1e0>
MSC_MAX_HS_PACKET);
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, MSC_EPIN_ADDR, USBD_EP_TYPE_BULK,
80079bc: 2340 movs r3, #64 ; 0x40
80079be: 2202 movs r2, #2
80079c0: 2181 movs r1, #129 ; 0x81
80079c2: 6878 ldr r0, [r7, #4]
80079c4: f002 fc2f bl 800a226 <USBD_LL_OpenEP>
MSC_MAX_FS_PACKET);
}
pdev->ep_in[MSC_EPIN_ADDR & 0xFU].is_used = 1U;
80079c8: 687b ldr r3, [r7, #4]
80079ca: 2201 movs r2, #1
80079cc: 62da str r2, [r3, #44] ; 0x2c
80079ce: e024 b.n 8007a1a <USBD_MSC_Setup+0x232>
}
else
{
pdev->ep_out[(uint8_t)req->wIndex & 0xFU].is_used = 0U;
80079d0: 683b ldr r3, [r7, #0]
80079d2: 889b ldrh r3, [r3, #4]
80079d4: b2db uxtb r3, r3
80079d6: f003 020f and.w r2, r3, #15
80079da: 6879 ldr r1, [r7, #4]
80079dc: 4613 mov r3, r2
80079de: 009b lsls r3, r3, #2
80079e0: 4413 add r3, r2
80079e2: 009b lsls r3, r3, #2
80079e4: 440b add r3, r1
80079e6: f503 73ac add.w r3, r3, #344 ; 0x158
80079ea: 2200 movs r2, #0
80079ec: 601a str r2, [r3, #0]
if (pdev->dev_speed == USBD_SPEED_HIGH)
80079ee: 687b ldr r3, [r7, #4]
80079f0: 7c1b ldrb r3, [r3, #16]
80079f2: 2b00 cmp r3, #0
80079f4: d107 bne.n 8007a06 <USBD_MSC_Setup+0x21e>
{
/* Open EP OUT */
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK,
80079f6: f44f 7300 mov.w r3, #512 ; 0x200
80079fa: 2202 movs r2, #2
80079fc: 2101 movs r1, #1
80079fe: 6878 ldr r0, [r7, #4]
8007a00: f002 fc11 bl 800a226 <USBD_LL_OpenEP>
8007a04: e005 b.n 8007a12 <USBD_MSC_Setup+0x22a>
MSC_MAX_HS_PACKET);
}
else
{
/* Open EP OUT */
USBD_LL_OpenEP(pdev, MSC_EPOUT_ADDR, USBD_EP_TYPE_BULK,
8007a06: 2340 movs r3, #64 ; 0x40
8007a08: 2202 movs r2, #2
8007a0a: 2101 movs r1, #1
8007a0c: 6878 ldr r0, [r7, #4]
8007a0e: f002 fc0a bl 800a226 <USBD_LL_OpenEP>
MSC_MAX_FS_PACKET);
}
pdev->ep_out[MSC_EPOUT_ADDR & 0xFU].is_used = 1U;
8007a12: 687b ldr r3, [r7, #4]
8007a14: 2201 movs r2, #1
8007a16: f8c3 216c str.w r2, [r3, #364] ; 0x16c
}
/* Handle BOT error */
MSC_BOT_CplClrFeature(pdev, (uint8_t)req->wIndex);
8007a1a: 683b ldr r3, [r7, #0]
8007a1c: 889b ldrh r3, [r3, #4]
8007a1e: b2db uxtb r3, r3
8007a20: 4619 mov r1, r3
8007a22: 6878 ldr r0, [r7, #4]
8007a24: f000 fa50 bl 8007ec8 <MSC_BOT_CplClrFeature>
break;
8007a28: e006 b.n 8007a38 <USBD_MSC_Setup+0x250>
default:
USBD_CtlError(pdev, req);
8007a2a: 6839 ldr r1, [r7, #0]
8007a2c: 6878 ldr r0, [r7, #4]
8007a2e: f002 f82d bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
8007a32: 2302 movs r3, #2
8007a34: 75fb strb r3, [r7, #23]
break;
8007a36: bf00 nop
}
break;
8007a38: e006 b.n 8007a48 <USBD_MSC_Setup+0x260>
default:
USBD_CtlError(pdev, req);
8007a3a: 6839 ldr r1, [r7, #0]
8007a3c: 6878 ldr r0, [r7, #4]
8007a3e: f002 f825 bl 8009a8c <USBD_CtlError>
ret = USBD_FAIL;
8007a42: 2302 movs r3, #2
8007a44: 75fb strb r3, [r7, #23]
break;
8007a46: bf00 nop
}
return ret;
8007a48: 7dfb ldrb r3, [r7, #23]
}
8007a4a: 4618 mov r0, r3
8007a4c: 3718 adds r7, #24
8007a4e: 46bd mov sp, r7
8007a50: bd80 pop {r7, pc}
8007a52: bf00 nop
08007a54 <USBD_MSC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
uint8_t USBD_MSC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8007a54: b580 push {r7, lr}
8007a56: b082 sub sp, #8
8007a58: af00 add r7, sp, #0
8007a5a: 6078 str r0, [r7, #4]
8007a5c: 460b mov r3, r1
8007a5e: 70fb strb r3, [r7, #3]
MSC_BOT_DataIn(pdev, epnum);
8007a60: 78fb ldrb r3, [r7, #3]
8007a62: 4619 mov r1, r3
8007a64: 6878 ldr r0, [r7, #4]
8007a66: f000 f8c1 bl 8007bec <MSC_BOT_DataIn>
return USBD_OK;
8007a6a: 2300 movs r3, #0
}
8007a6c: 4618 mov r0, r3
8007a6e: 3708 adds r7, #8
8007a70: 46bd mov sp, r7
8007a72: bd80 pop {r7, pc}
08007a74 <USBD_MSC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
uint8_t USBD_MSC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8007a74: b580 push {r7, lr}
8007a76: b082 sub sp, #8
8007a78: af00 add r7, sp, #0
8007a7a: 6078 str r0, [r7, #4]
8007a7c: 460b mov r3, r1
8007a7e: 70fb strb r3, [r7, #3]
MSC_BOT_DataOut(pdev, epnum);
8007a80: 78fb ldrb r3, [r7, #3]
8007a82: 4619 mov r1, r3
8007a84: 6878 ldr r0, [r7, #4]
8007a86: f000 f8e2 bl 8007c4e <MSC_BOT_DataOut>
return USBD_OK;
8007a8a: 2300 movs r3, #0
}
8007a8c: 4618 mov r0, r3
8007a8e: 3708 adds r7, #8
8007a90: 46bd mov sp, r7
8007a92: bd80 pop {r7, pc}
08007a94 <USBD_MSC_GetHSCfgDesc>:
* return configuration descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetHSCfgDesc(uint16_t *length)
{
8007a94: b480 push {r7}
8007a96: b083 sub sp, #12
8007a98: af00 add r7, sp, #0
8007a9a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_MSC_CfgHSDesc);
8007a9c: 687b ldr r3, [r7, #4]
8007a9e: 2220 movs r2, #32
8007aa0: 801a strh r2, [r3, #0]
return USBD_MSC_CfgHSDesc;
8007aa2: 4b03 ldr r3, [pc, #12] ; (8007ab0 <USBD_MSC_GetHSCfgDesc+0x1c>)
}
8007aa4: 4618 mov r0, r3
8007aa6: 370c adds r7, #12
8007aa8: 46bd mov sp, r7
8007aaa: bc80 pop {r7}
8007aac: 4770 bx lr
8007aae: bf00 nop
8007ab0: 20000048 .word 0x20000048
08007ab4 <USBD_MSC_GetFSCfgDesc>:
* return configuration descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetFSCfgDesc(uint16_t *length)
{
8007ab4: b480 push {r7}
8007ab6: b083 sub sp, #12
8007ab8: af00 add r7, sp, #0
8007aba: 6078 str r0, [r7, #4]
*length = sizeof(USBD_MSC_CfgFSDesc);
8007abc: 687b ldr r3, [r7, #4]
8007abe: 2220 movs r2, #32
8007ac0: 801a strh r2, [r3, #0]
return USBD_MSC_CfgFSDesc;
8007ac2: 4b03 ldr r3, [pc, #12] ; (8007ad0 <USBD_MSC_GetFSCfgDesc+0x1c>)
}
8007ac4: 4618 mov r0, r3
8007ac6: 370c adds r7, #12
8007ac8: 46bd mov sp, r7
8007aca: bc80 pop {r7}
8007acc: 4770 bx lr
8007ace: bf00 nop
8007ad0: 20000068 .word 0x20000068
08007ad4 <USBD_MSC_GetOtherSpeedCfgDesc>:
* return other speed configuration descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetOtherSpeedCfgDesc(uint16_t *length)
{
8007ad4: b480 push {r7}
8007ad6: b083 sub sp, #12
8007ad8: af00 add r7, sp, #0
8007ada: 6078 str r0, [r7, #4]
*length = sizeof(USBD_MSC_OtherSpeedCfgDesc);
8007adc: 687b ldr r3, [r7, #4]
8007ade: 2220 movs r2, #32
8007ae0: 801a strh r2, [r3, #0]
return USBD_MSC_OtherSpeedCfgDesc;
8007ae2: 4b03 ldr r3, [pc, #12] ; (8007af0 <USBD_MSC_GetOtherSpeedCfgDesc+0x1c>)
}
8007ae4: 4618 mov r0, r3
8007ae6: 370c adds r7, #12
8007ae8: 46bd mov sp, r7
8007aea: bc80 pop {r7}
8007aec: 4770 bx lr
8007aee: bf00 nop
8007af0: 20000088 .word 0x20000088
08007af4 <USBD_MSC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetDeviceQualifierDescriptor(uint16_t *length)
{
8007af4: b480 push {r7}
8007af6: b083 sub sp, #12
8007af8: af00 add r7, sp, #0
8007afa: 6078 str r0, [r7, #4]
*length = sizeof(USBD_MSC_DeviceQualifierDesc);
8007afc: 687b ldr r3, [r7, #4]
8007afe: 220a movs r2, #10
8007b00: 801a strh r2, [r3, #0]
return USBD_MSC_DeviceQualifierDesc;
8007b02: 4b03 ldr r3, [pc, #12] ; (8007b10 <USBD_MSC_GetDeviceQualifierDescriptor+0x1c>)
}
8007b04: 4618 mov r0, r3
8007b06: 370c adds r7, #12
8007b08: 46bd mov sp, r7
8007b0a: bc80 pop {r7}
8007b0c: 4770 bx lr
8007b0e: bf00 nop
8007b10: 200000a8 .word 0x200000a8
08007b14 <USBD_MSC_RegisterStorage>:
* @param fops: storage callback
* @retval status
*/
uint8_t USBD_MSC_RegisterStorage(USBD_HandleTypeDef *pdev,
USBD_StorageTypeDef *fops)
{
8007b14: b480 push {r7}
8007b16: b083 sub sp, #12
8007b18: af00 add r7, sp, #0
8007b1a: 6078 str r0, [r7, #4]
8007b1c: 6039 str r1, [r7, #0]
if (fops != NULL)
8007b1e: 683b ldr r3, [r7, #0]
8007b20: 2b00 cmp r3, #0
8007b22: d003 beq.n 8007b2c <USBD_MSC_RegisterStorage+0x18>
{
pdev->pUserData = fops;
8007b24: 687b ldr r3, [r7, #4]
8007b26: 683a ldr r2, [r7, #0]
8007b28: f8c3 22bc str.w r2, [r3, #700] ; 0x2bc
}
return USBD_OK;
8007b2c: 2300 movs r3, #0
}
8007b2e: 4618 mov r0, r3
8007b30: 370c adds r7, #12
8007b32: 46bd mov sp, r7
8007b34: bc80 pop {r7}
8007b36: 4770 bx lr
08007b38 <MSC_BOT_Init>:
* Initialize the BOT Process
* @param pdev: device instance
* @retval None
*/
void MSC_BOT_Init(USBD_HandleTypeDef *pdev)
{
8007b38: b580 push {r7, lr}
8007b3a: b084 sub sp, #16
8007b3c: af00 add r7, sp, #0
8007b3e: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007b40: 687b ldr r3, [r7, #4]
8007b42: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007b46: 60fb str r3, [r7, #12]
hmsc->bot_state = USBD_BOT_IDLE;
8007b48: 68fb ldr r3, [r7, #12]
8007b4a: 2200 movs r2, #0
8007b4c: 721a strb r2, [r3, #8]
hmsc->bot_status = USBD_BOT_STATUS_NORMAL;
8007b4e: 68fb ldr r3, [r7, #12]
8007b50: 2200 movs r2, #0
8007b52: 725a strb r2, [r3, #9]
hmsc->scsi_sense_tail = 0U;
8007b54: 68fb ldr r3, [r7, #12]
8007b56: 2200 movs r2, #0
8007b58: f883 225d strb.w r2, [r3, #605] ; 0x25d
hmsc->scsi_sense_head = 0U;
8007b5c: 68fb ldr r3, [r7, #12]
8007b5e: 2200 movs r2, #0
8007b60: f883 225c strb.w r2, [r3, #604] ; 0x25c
((USBD_StorageTypeDef *)pdev->pUserData)->Init(0U);
8007b64: 687b ldr r3, [r7, #4]
8007b66: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8007b6a: 681b ldr r3, [r3, #0]
8007b6c: 2000 movs r0, #0
8007b6e: 4798 blx r3
USBD_LL_FlushEP(pdev, MSC_EPOUT_ADDR);
8007b70: 2101 movs r1, #1
8007b72: 6878 ldr r0, [r7, #4]
8007b74: f002 fb9c bl 800a2b0 <USBD_LL_FlushEP>
USBD_LL_FlushEP(pdev, MSC_EPIN_ADDR);
8007b78: 2181 movs r1, #129 ; 0x81
8007b7a: 6878 ldr r0, [r7, #4]
8007b7c: f002 fb98 bl 800a2b0 <USBD_LL_FlushEP>
/* Prapare EP to Receive First BOT Cmd */
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
8007b80: 68fb ldr r3, [r7, #12]
8007b82: f503 7203 add.w r2, r3, #524 ; 0x20c
8007b86: 231f movs r3, #31
8007b88: 2101 movs r1, #1
8007b8a: 6878 ldr r0, [r7, #4]
8007b8c: f002 fc5b bl 800a446 <USBD_LL_PrepareReceive>
USBD_BOT_CBW_LENGTH);
}
8007b90: bf00 nop
8007b92: 3710 adds r7, #16
8007b94: 46bd mov sp, r7
8007b96: bd80 pop {r7, pc}
08007b98 <MSC_BOT_Reset>:
* Reset the BOT Machine
* @param pdev: device instance
* @retval None
*/
void MSC_BOT_Reset(USBD_HandleTypeDef *pdev)
{
8007b98: b580 push {r7, lr}
8007b9a: b084 sub sp, #16
8007b9c: af00 add r7, sp, #0
8007b9e: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007ba0: 687b ldr r3, [r7, #4]
8007ba2: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007ba6: 60fb str r3, [r7, #12]
hmsc->bot_state = USBD_BOT_IDLE;
8007ba8: 68fb ldr r3, [r7, #12]
8007baa: 2200 movs r2, #0
8007bac: 721a strb r2, [r3, #8]
hmsc->bot_status = USBD_BOT_STATUS_RECOVERY;
8007bae: 68fb ldr r3, [r7, #12]
8007bb0: 2201 movs r2, #1
8007bb2: 725a strb r2, [r3, #9]
/* Prapare EP to Receive First BOT Cmd */
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
8007bb4: 68fb ldr r3, [r7, #12]
8007bb6: f503 7203 add.w r2, r3, #524 ; 0x20c
8007bba: 231f movs r3, #31
8007bbc: 2101 movs r1, #1
8007bbe: 6878 ldr r0, [r7, #4]
8007bc0: f002 fc41 bl 800a446 <USBD_LL_PrepareReceive>
USBD_BOT_CBW_LENGTH);
}
8007bc4: bf00 nop
8007bc6: 3710 adds r7, #16
8007bc8: 46bd mov sp, r7
8007bca: bd80 pop {r7, pc}
08007bcc <MSC_BOT_DeInit>:
* Deinitialize the BOT Machine
* @param pdev: device instance
* @retval None
*/
void MSC_BOT_DeInit(USBD_HandleTypeDef *pdev)
{
8007bcc: b480 push {r7}
8007bce: b085 sub sp, #20
8007bd0: af00 add r7, sp, #0
8007bd2: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007bd4: 687b ldr r3, [r7, #4]
8007bd6: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007bda: 60fb str r3, [r7, #12]
hmsc->bot_state = USBD_BOT_IDLE;
8007bdc: 68fb ldr r3, [r7, #12]
8007bde: 2200 movs r2, #0
8007be0: 721a strb r2, [r3, #8]
}
8007be2: bf00 nop
8007be4: 3714 adds r7, #20
8007be6: 46bd mov sp, r7
8007be8: bc80 pop {r7}
8007bea: 4770 bx lr
08007bec <MSC_BOT_DataIn>:
* @param epnum: endpoint index
* @retval None
*/
void MSC_BOT_DataIn(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
8007bec: b580 push {r7, lr}
8007bee: b084 sub sp, #16
8007bf0: af00 add r7, sp, #0
8007bf2: 6078 str r0, [r7, #4]
8007bf4: 460b mov r3, r1
8007bf6: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007bf8: 687b ldr r3, [r7, #4]
8007bfa: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007bfe: 60fb str r3, [r7, #12]
switch (hmsc->bot_state)
8007c00: 68fb ldr r3, [r7, #12]
8007c02: 7a1b ldrb r3, [r3, #8]
8007c04: 2b02 cmp r3, #2
8007c06: d004 beq.n 8007c12 <MSC_BOT_DataIn+0x26>
8007c08: 2b02 cmp r3, #2
8007c0a: db19 blt.n 8007c40 <MSC_BOT_DataIn+0x54>
8007c0c: 2b04 cmp r3, #4
8007c0e: dc17 bgt.n 8007c40 <MSC_BOT_DataIn+0x54>
8007c10: e011 b.n 8007c36 <MSC_BOT_DataIn+0x4a>
{
case USBD_BOT_DATA_IN:
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
8007c12: 68fb ldr r3, [r7, #12]
8007c14: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
8007c18: 68fb ldr r3, [r7, #12]
8007c1a: f203 231b addw r3, r3, #539 ; 0x21b
8007c1e: 461a mov r2, r3
8007c20: 6878 ldr r0, [r7, #4]
8007c22: f000 f979 bl 8007f18 <SCSI_ProcessCmd>
8007c26: 4603 mov r3, r0
8007c28: 2b00 cmp r3, #0
8007c2a: da0b bge.n 8007c44 <MSC_BOT_DataIn+0x58>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
8007c2c: 2101 movs r1, #1
8007c2e: 6878 ldr r0, [r7, #4]
8007c30: f000 f8f0 bl 8007e14 <MSC_BOT_SendCSW>
}
break;
8007c34: e006 b.n 8007c44 <MSC_BOT_DataIn+0x58>
case USBD_BOT_SEND_DATA:
case USBD_BOT_LAST_DATA_IN:
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
8007c36: 2100 movs r1, #0
8007c38: 6878 ldr r0, [r7, #4]
8007c3a: f000 f8eb bl 8007e14 <MSC_BOT_SendCSW>
break;
8007c3e: e002 b.n 8007c46 <MSC_BOT_DataIn+0x5a>
default:
break;
8007c40: bf00 nop
8007c42: e000 b.n 8007c46 <MSC_BOT_DataIn+0x5a>
break;
8007c44: bf00 nop
}
}
8007c46: bf00 nop
8007c48: 3710 adds r7, #16
8007c4a: 46bd mov sp, r7
8007c4c: bd80 pop {r7, pc}
08007c4e <MSC_BOT_DataOut>:
* @param epnum: endpoint index
* @retval None
*/
void MSC_BOT_DataOut(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
8007c4e: b580 push {r7, lr}
8007c50: b084 sub sp, #16
8007c52: af00 add r7, sp, #0
8007c54: 6078 str r0, [r7, #4]
8007c56: 460b mov r3, r1
8007c58: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007c5a: 687b ldr r3, [r7, #4]
8007c5c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007c60: 60fb str r3, [r7, #12]
switch (hmsc->bot_state)
8007c62: 68fb ldr r3, [r7, #12]
8007c64: 7a1b ldrb r3, [r3, #8]
8007c66: 2b00 cmp r3, #0
8007c68: d002 beq.n 8007c70 <MSC_BOT_DataOut+0x22>
8007c6a: 2b01 cmp r3, #1
8007c6c: d004 beq.n 8007c78 <MSC_BOT_DataOut+0x2a>
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
}
break;
default:
break;
8007c6e: e015 b.n 8007c9c <MSC_BOT_DataOut+0x4e>
MSC_BOT_CBW_Decode(pdev);
8007c70: 6878 ldr r0, [r7, #4]
8007c72: f000 f817 bl 8007ca4 <MSC_BOT_CBW_Decode>
break;
8007c76: e011 b.n 8007c9c <MSC_BOT_DataOut+0x4e>
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
8007c78: 68fb ldr r3, [r7, #12]
8007c7a: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
8007c7e: 68fb ldr r3, [r7, #12]
8007c80: f203 231b addw r3, r3, #539 ; 0x21b
8007c84: 461a mov r2, r3
8007c86: 6878 ldr r0, [r7, #4]
8007c88: f000 f946 bl 8007f18 <SCSI_ProcessCmd>
8007c8c: 4603 mov r3, r0
8007c8e: 2b00 cmp r3, #0
8007c90: da03 bge.n 8007c9a <MSC_BOT_DataOut+0x4c>
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
8007c92: 2101 movs r1, #1
8007c94: 6878 ldr r0, [r7, #4]
8007c96: f000 f8bd bl 8007e14 <MSC_BOT_SendCSW>
break;
8007c9a: bf00 nop
}
}
8007c9c: bf00 nop
8007c9e: 3710 adds r7, #16
8007ca0: 46bd mov sp, r7
8007ca2: bd80 pop {r7, pc}
08007ca4 <MSC_BOT_CBW_Decode>:
* Decode the CBW command and set the BOT state machine accordingly
* @param pdev: device instance
* @retval None
*/
static void MSC_BOT_CBW_Decode(USBD_HandleTypeDef *pdev)
{
8007ca4: b580 push {r7, lr}
8007ca6: b084 sub sp, #16
8007ca8: af00 add r7, sp, #0
8007caa: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007cac: 687b ldr r3, [r7, #4]
8007cae: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007cb2: 60fb str r3, [r7, #12]
hmsc->csw.dTag = hmsc->cbw.dTag;
8007cb4: 68fb ldr r3, [r7, #12]
8007cb6: f8d3 2210 ldr.w r2, [r3, #528] ; 0x210
8007cba: 68fb ldr r3, [r7, #12]
8007cbc: f8c3 2230 str.w r2, [r3, #560] ; 0x230
hmsc->csw.dDataResidue = hmsc->cbw.dDataLength;
8007cc0: 68fb ldr r3, [r7, #12]
8007cc2: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
8007cc6: 68fb ldr r3, [r7, #12]
8007cc8: f8c3 2234 str.w r2, [r3, #564] ; 0x234
if ((USBD_LL_GetRxDataSize(pdev, MSC_EPOUT_ADDR) != USBD_BOT_CBW_LENGTH) ||
8007ccc: 2101 movs r1, #1
8007cce: 6878 ldr r0, [r7, #4]
8007cd0: f002 fbdc bl 800a48c <USBD_LL_GetRxDataSize>
8007cd4: 4603 mov r3, r0
8007cd6: 2b1f cmp r3, #31
8007cd8: d114 bne.n 8007d04 <MSC_BOT_CBW_Decode+0x60>
(hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE) ||
8007cda: 68fb ldr r3, [r7, #12]
8007cdc: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
if ((USBD_LL_GetRxDataSize(pdev, MSC_EPOUT_ADDR) != USBD_BOT_CBW_LENGTH) ||
8007ce0: 4a32 ldr r2, [pc, #200] ; (8007dac <MSC_BOT_CBW_Decode+0x108>)
8007ce2: 4293 cmp r3, r2
8007ce4: d10e bne.n 8007d04 <MSC_BOT_CBW_Decode+0x60>
(hmsc->cbw.bLUN > 1U) ||
8007ce6: 68fb ldr r3, [r7, #12]
8007ce8: f893 3219 ldrb.w r3, [r3, #537] ; 0x219
(hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE) ||
8007cec: 2b01 cmp r3, #1
8007cee: d809 bhi.n 8007d04 <MSC_BOT_CBW_Decode+0x60>
(hmsc->cbw.bCBLength < 1U) || (hmsc->cbw.bCBLength > 16U))
8007cf0: 68fb ldr r3, [r7, #12]
8007cf2: f893 321a ldrb.w r3, [r3, #538] ; 0x21a
(hmsc->cbw.bLUN > 1U) ||
8007cf6: 2b00 cmp r3, #0
8007cf8: d004 beq.n 8007d04 <MSC_BOT_CBW_Decode+0x60>
(hmsc->cbw.bCBLength < 1U) || (hmsc->cbw.bCBLength > 16U))
8007cfa: 68fb ldr r3, [r7, #12]
8007cfc: f893 321a ldrb.w r3, [r3, #538] ; 0x21a
8007d00: 2b10 cmp r3, #16
8007d02: d90e bls.n 8007d22 <MSC_BOT_CBW_Decode+0x7e>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8007d04: 68fb ldr r3, [r7, #12]
8007d06: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
8007d0a: 2320 movs r3, #32
8007d0c: 2205 movs r2, #5
8007d0e: 6878 ldr r0, [r7, #4]
8007d10: f000 fc48 bl 80085a4 <SCSI_SenseCode>
hmsc->bot_status = USBD_BOT_STATUS_ERROR;
8007d14: 68fb ldr r3, [r7, #12]
8007d16: 2202 movs r2, #2
8007d18: 725a strb r2, [r3, #9]
MSC_BOT_Abort(pdev);
8007d1a: 6878 ldr r0, [r7, #4]
8007d1c: f000 f8a6 bl 8007e6c <MSC_BOT_Abort>
8007d20: e041 b.n 8007da6 <MSC_BOT_CBW_Decode+0x102>
}
else
{
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
8007d22: 68fb ldr r3, [r7, #12]
8007d24: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
8007d28: 68fb ldr r3, [r7, #12]
8007d2a: f203 231b addw r3, r3, #539 ; 0x21b
8007d2e: 461a mov r2, r3
8007d30: 6878 ldr r0, [r7, #4]
8007d32: f000 f8f1 bl 8007f18 <SCSI_ProcessCmd>
8007d36: 4603 mov r3, r0
8007d38: 2b00 cmp r3, #0
8007d3a: da0c bge.n 8007d56 <MSC_BOT_CBW_Decode+0xb2>
{
if (hmsc->bot_state == USBD_BOT_NO_DATA)
8007d3c: 68fb ldr r3, [r7, #12]
8007d3e: 7a1b ldrb r3, [r3, #8]
8007d40: 2b05 cmp r3, #5
8007d42: d104 bne.n 8007d4e <MSC_BOT_CBW_Decode+0xaa>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
8007d44: 2101 movs r1, #1
8007d46: 6878 ldr r0, [r7, #4]
8007d48: f000 f864 bl 8007e14 <MSC_BOT_SendCSW>
8007d4c: e02b b.n 8007da6 <MSC_BOT_CBW_Decode+0x102>
}
else
{
MSC_BOT_Abort(pdev);
8007d4e: 6878 ldr r0, [r7, #4]
8007d50: f000 f88c bl 8007e6c <MSC_BOT_Abort>
8007d54: e027 b.n 8007da6 <MSC_BOT_CBW_Decode+0x102>
}
}
/*Burst xfer handled internally*/
else if ((hmsc->bot_state != USBD_BOT_DATA_IN) &&
8007d56: 68fb ldr r3, [r7, #12]
8007d58: 7a1b ldrb r3, [r3, #8]
8007d5a: 2b02 cmp r3, #2
8007d5c: d022 beq.n 8007da4 <MSC_BOT_CBW_Decode+0x100>
(hmsc->bot_state != USBD_BOT_DATA_OUT) &&
8007d5e: 68fb ldr r3, [r7, #12]
8007d60: 7a1b ldrb r3, [r3, #8]
else if ((hmsc->bot_state != USBD_BOT_DATA_IN) &&
8007d62: 2b01 cmp r3, #1
8007d64: d01e beq.n 8007da4 <MSC_BOT_CBW_Decode+0x100>
(hmsc->bot_state != USBD_BOT_LAST_DATA_IN))
8007d66: 68fb ldr r3, [r7, #12]
8007d68: 7a1b ldrb r3, [r3, #8]
(hmsc->bot_state != USBD_BOT_DATA_OUT) &&
8007d6a: 2b03 cmp r3, #3
8007d6c: d01a beq.n 8007da4 <MSC_BOT_CBW_Decode+0x100>
{
if (hmsc->bot_data_length > 0U)
8007d6e: 68fb ldr r3, [r7, #12]
8007d70: 895b ldrh r3, [r3, #10]
8007d72: 2b00 cmp r3, #0
8007d74: d009 beq.n 8007d8a <MSC_BOT_CBW_Decode+0xe6>
{
MSC_BOT_SendData(pdev, hmsc->bot_data, hmsc->bot_data_length);
8007d76: 68fb ldr r3, [r7, #12]
8007d78: f103 010c add.w r1, r3, #12
8007d7c: 68fb ldr r3, [r7, #12]
8007d7e: 895b ldrh r3, [r3, #10]
8007d80: 461a mov r2, r3
8007d82: 6878 ldr r0, [r7, #4]
8007d84: f000 f814 bl 8007db0 <MSC_BOT_SendData>
if (hmsc->bot_data_length > 0U)
8007d88: e00d b.n 8007da6 <MSC_BOT_CBW_Decode+0x102>
}
else if (hmsc->bot_data_length == 0U)
8007d8a: 68fb ldr r3, [r7, #12]
8007d8c: 895b ldrh r3, [r3, #10]
8007d8e: 2b00 cmp r3, #0
8007d90: d104 bne.n 8007d9c <MSC_BOT_CBW_Decode+0xf8>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
8007d92: 2100 movs r1, #0
8007d94: 6878 ldr r0, [r7, #4]
8007d96: f000 f83d bl 8007e14 <MSC_BOT_SendCSW>
if (hmsc->bot_data_length > 0U)
8007d9a: e004 b.n 8007da6 <MSC_BOT_CBW_Decode+0x102>
}
else
{
MSC_BOT_Abort(pdev);
8007d9c: 6878 ldr r0, [r7, #4]
8007d9e: f000 f865 bl 8007e6c <MSC_BOT_Abort>
if (hmsc->bot_data_length > 0U)
8007da2: e000 b.n 8007da6 <MSC_BOT_CBW_Decode+0x102>
}
}
else
{
return;
8007da4: bf00 nop
}
}
}
8007da6: 3710 adds r7, #16
8007da8: 46bd mov sp, r7
8007daa: bd80 pop {r7, pc}
8007dac: 43425355 .word 0x43425355
08007db0 <MSC_BOT_SendData>:
* @param len: Data Length
* @retval None
*/
static void MSC_BOT_SendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf,
uint16_t len)
{
8007db0: b580 push {r7, lr}
8007db2: b086 sub sp, #24
8007db4: af00 add r7, sp, #0
8007db6: 60f8 str r0, [r7, #12]
8007db8: 60b9 str r1, [r7, #8]
8007dba: 4613 mov r3, r2
8007dbc: 80fb strh r3, [r7, #6]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007dbe: 68fb ldr r3, [r7, #12]
8007dc0: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007dc4: 617b str r3, [r7, #20]
uint16_t length = (uint16_t)MIN(hmsc->cbw.dDataLength, len);
8007dc6: 697b ldr r3, [r7, #20]
8007dc8: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
8007dcc: 88fb ldrh r3, [r7, #6]
8007dce: 429a cmp r2, r3
8007dd0: d204 bcs.n 8007ddc <MSC_BOT_SendData+0x2c>
8007dd2: 697b ldr r3, [r7, #20]
8007dd4: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
8007dd8: b29b uxth r3, r3
8007dda: e000 b.n 8007dde <MSC_BOT_SendData+0x2e>
8007ddc: 88fb ldrh r3, [r7, #6]
8007dde: 827b strh r3, [r7, #18]
hmsc->csw.dDataResidue -= len;
8007de0: 697b ldr r3, [r7, #20]
8007de2: f8d3 2234 ldr.w r2, [r3, #564] ; 0x234
8007de6: 88fb ldrh r3, [r7, #6]
8007de8: 1ad2 subs r2, r2, r3
8007dea: 697b ldr r3, [r7, #20]
8007dec: f8c3 2234 str.w r2, [r3, #564] ; 0x234
hmsc->csw.bStatus = USBD_CSW_CMD_PASSED;
8007df0: 697b ldr r3, [r7, #20]
8007df2: 2200 movs r2, #0
8007df4: f883 2238 strb.w r2, [r3, #568] ; 0x238
hmsc->bot_state = USBD_BOT_SEND_DATA;
8007df8: 697b ldr r3, [r7, #20]
8007dfa: 2204 movs r2, #4
8007dfc: 721a strb r2, [r3, #8]
USBD_LL_Transmit(pdev, MSC_EPIN_ADDR, pbuf, length);
8007dfe: 8a7b ldrh r3, [r7, #18]
8007e00: 68ba ldr r2, [r7, #8]
8007e02: 2181 movs r1, #129 ; 0x81
8007e04: 68f8 ldr r0, [r7, #12]
8007e06: f002 fafb bl 800a400 <USBD_LL_Transmit>
}
8007e0a: bf00 nop
8007e0c: 3718 adds r7, #24
8007e0e: 46bd mov sp, r7
8007e10: bd80 pop {r7, pc}
...
08007e14 <MSC_BOT_SendCSW>:
* @param status : CSW status
* @retval None
*/
void MSC_BOT_SendCSW(USBD_HandleTypeDef *pdev,
uint8_t CSW_Status)
{
8007e14: b580 push {r7, lr}
8007e16: b084 sub sp, #16
8007e18: af00 add r7, sp, #0
8007e1a: 6078 str r0, [r7, #4]
8007e1c: 460b mov r3, r1
8007e1e: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007e20: 687b ldr r3, [r7, #4]
8007e22: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007e26: 60fb str r3, [r7, #12]
hmsc->csw.dSignature = USBD_BOT_CSW_SIGNATURE;
8007e28: 68fb ldr r3, [r7, #12]
8007e2a: 4a0f ldr r2, [pc, #60] ; (8007e68 <MSC_BOT_SendCSW+0x54>)
8007e2c: f8c3 222c str.w r2, [r3, #556] ; 0x22c
hmsc->csw.bStatus = CSW_Status;
8007e30: 68fb ldr r3, [r7, #12]
8007e32: 78fa ldrb r2, [r7, #3]
8007e34: f883 2238 strb.w r2, [r3, #568] ; 0x238
hmsc->bot_state = USBD_BOT_IDLE;
8007e38: 68fb ldr r3, [r7, #12]
8007e3a: 2200 movs r2, #0
8007e3c: 721a strb r2, [r3, #8]
USBD_LL_Transmit(pdev, MSC_EPIN_ADDR, (uint8_t *)(void *)&hmsc->csw,
8007e3e: 68fb ldr r3, [r7, #12]
8007e40: f503 720b add.w r2, r3, #556 ; 0x22c
8007e44: 230d movs r3, #13
8007e46: 2181 movs r1, #129 ; 0x81
8007e48: 6878 ldr r0, [r7, #4]
8007e4a: f002 fad9 bl 800a400 <USBD_LL_Transmit>
USBD_BOT_CSW_LENGTH);
/* Prepare EP to Receive next Cmd */
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
8007e4e: 68fb ldr r3, [r7, #12]
8007e50: f503 7203 add.w r2, r3, #524 ; 0x20c
8007e54: 231f movs r3, #31
8007e56: 2101 movs r1, #1
8007e58: 6878 ldr r0, [r7, #4]
8007e5a: f002 faf4 bl 800a446 <USBD_LL_PrepareReceive>
USBD_BOT_CBW_LENGTH);
}
8007e5e: bf00 nop
8007e60: 3710 adds r7, #16
8007e62: 46bd mov sp, r7
8007e64: bd80 pop {r7, pc}
8007e66: bf00 nop
8007e68: 53425355 .word 0x53425355
08007e6c <MSC_BOT_Abort>:
* @param pdev: device instance
* @retval status
*/
static void MSC_BOT_Abort(USBD_HandleTypeDef *pdev)
{
8007e6c: b580 push {r7, lr}
8007e6e: b084 sub sp, #16
8007e70: af00 add r7, sp, #0
8007e72: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007e74: 687b ldr r3, [r7, #4]
8007e76: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007e7a: 60fb str r3, [r7, #12]
if ((hmsc->cbw.bmFlags == 0U) &&
8007e7c: 68fb ldr r3, [r7, #12]
8007e7e: f893 3218 ldrb.w r3, [r3, #536] ; 0x218
8007e82: 2b00 cmp r3, #0
8007e84: d10c bne.n 8007ea0 <MSC_BOT_Abort+0x34>
(hmsc->cbw.dDataLength != 0U) &&
8007e86: 68fb ldr r3, [r7, #12]
8007e88: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
if ((hmsc->cbw.bmFlags == 0U) &&
8007e8c: 2b00 cmp r3, #0
8007e8e: d007 beq.n 8007ea0 <MSC_BOT_Abort+0x34>
(hmsc->bot_status == USBD_BOT_STATUS_NORMAL))
8007e90: 68fb ldr r3, [r7, #12]
8007e92: 7a5b ldrb r3, [r3, #9]
(hmsc->cbw.dDataLength != 0U) &&
8007e94: 2b00 cmp r3, #0
8007e96: d103 bne.n 8007ea0 <MSC_BOT_Abort+0x34>
{
USBD_LL_StallEP(pdev, MSC_EPOUT_ADDR);
8007e98: 2101 movs r1, #1
8007e9a: 6878 ldr r0, [r7, #4]
8007e9c: f002 fa27 bl 800a2ee <USBD_LL_StallEP>
}
USBD_LL_StallEP(pdev, MSC_EPIN_ADDR);
8007ea0: 2181 movs r1, #129 ; 0x81
8007ea2: 6878 ldr r0, [r7, #4]
8007ea4: f002 fa23 bl 800a2ee <USBD_LL_StallEP>
if (hmsc->bot_status == USBD_BOT_STATUS_ERROR)
8007ea8: 68fb ldr r3, [r7, #12]
8007eaa: 7a5b ldrb r3, [r3, #9]
8007eac: 2b02 cmp r3, #2
8007eae: d107 bne.n 8007ec0 <MSC_BOT_Abort+0x54>
{
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, (uint8_t *)(void *)&hmsc->cbw,
8007eb0: 68fb ldr r3, [r7, #12]
8007eb2: f503 7203 add.w r2, r3, #524 ; 0x20c
8007eb6: 231f movs r3, #31
8007eb8: 2101 movs r1, #1
8007eba: 6878 ldr r0, [r7, #4]
8007ebc: f002 fac3 bl 800a446 <USBD_LL_PrepareReceive>
USBD_BOT_CBW_LENGTH);
}
}
8007ec0: bf00 nop
8007ec2: 3710 adds r7, #16
8007ec4: 46bd mov sp, r7
8007ec6: bd80 pop {r7, pc}
08007ec8 <MSC_BOT_CplClrFeature>:
* @param epnum: endpoint index
* @retval None
*/
void MSC_BOT_CplClrFeature(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8007ec8: b580 push {r7, lr}
8007eca: b084 sub sp, #16
8007ecc: af00 add r7, sp, #0
8007ece: 6078 str r0, [r7, #4]
8007ed0: 460b mov r3, r1
8007ed2: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8007ed4: 687b ldr r3, [r7, #4]
8007ed6: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007eda: 60fb str r3, [r7, #12]
if (hmsc->bot_status == USBD_BOT_STATUS_ERROR) /* Bad CBW Signature */
8007edc: 68fb ldr r3, [r7, #12]
8007ede: 7a5b ldrb r3, [r3, #9]
8007ee0: 2b02 cmp r3, #2
8007ee2: d107 bne.n 8007ef4 <MSC_BOT_CplClrFeature+0x2c>
{
USBD_LL_StallEP(pdev, MSC_EPIN_ADDR);
8007ee4: 2181 movs r1, #129 ; 0x81
8007ee6: 6878 ldr r0, [r7, #4]
8007ee8: f002 fa01 bl 800a2ee <USBD_LL_StallEP>
hmsc->bot_status = USBD_BOT_STATUS_NORMAL;
8007eec: 68fb ldr r3, [r7, #12]
8007eee: 2200 movs r2, #0
8007ef0: 725a strb r2, [r3, #9]
8007ef2: e00d b.n 8007f10 <MSC_BOT_CplClrFeature+0x48>
}
else if (((epnum & 0x80U) == 0x80U) && (hmsc->bot_status != USBD_BOT_STATUS_RECOVERY))
8007ef4: f997 3003 ldrsb.w r3, [r7, #3]
8007ef8: 2b00 cmp r3, #0
8007efa: da08 bge.n 8007f0e <MSC_BOT_CplClrFeature+0x46>
8007efc: 68fb ldr r3, [r7, #12]
8007efe: 7a5b ldrb r3, [r3, #9]
8007f00: 2b01 cmp r3, #1
8007f02: d004 beq.n 8007f0e <MSC_BOT_CplClrFeature+0x46>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
8007f04: 2101 movs r1, #1
8007f06: 6878 ldr r0, [r7, #4]
8007f08: f7ff ff84 bl 8007e14 <MSC_BOT_SendCSW>
8007f0c: e000 b.n 8007f10 <MSC_BOT_CplClrFeature+0x48>
}
else
{
return;
8007f0e: bf00 nop
}
}
8007f10: 3710 adds r7, #16
8007f12: 46bd mov sp, r7
8007f14: bd80 pop {r7, pc}
...
08007f18 <SCSI_ProcessCmd>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
int8_t SCSI_ProcessCmd(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *cmd)
{
8007f18: b580 push {r7, lr}
8007f1a: b084 sub sp, #16
8007f1c: af00 add r7, sp, #0
8007f1e: 60f8 str r0, [r7, #12]
8007f20: 460b mov r3, r1
8007f22: 607a str r2, [r7, #4]
8007f24: 72fb strb r3, [r7, #11]
switch (cmd[0])
8007f26: 687b ldr r3, [r7, #4]
8007f28: 781b ldrb r3, [r3, #0]
8007f2a: 2b5a cmp r3, #90 ; 0x5a
8007f2c: f200 810e bhi.w 800814c <SCSI_ProcessCmd+0x234>
8007f30: a201 add r2, pc, #4 ; (adr r2, 8007f38 <SCSI_ProcessCmd+0x20>)
8007f32: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007f36: bf00 nop
8007f38: 080080a5 .word 0x080080a5
8007f3c: 0800814d .word 0x0800814d
8007f40: 0800814d .word 0x0800814d
8007f44: 080080b3 .word 0x080080b3
8007f48: 0800814d .word 0x0800814d
8007f4c: 0800814d .word 0x0800814d
8007f50: 0800814d .word 0x0800814d
8007f54: 0800814d .word 0x0800814d
8007f58: 0800814d .word 0x0800814d
8007f5c: 0800814d .word 0x0800814d
8007f60: 0800814d .word 0x0800814d
8007f64: 0800814d .word 0x0800814d
8007f68: 0800814d .word 0x0800814d
8007f6c: 0800814d .word 0x0800814d
8007f70: 0800814d .word 0x0800814d
8007f74: 0800814d .word 0x0800814d
8007f78: 0800814d .word 0x0800814d
8007f7c: 0800814d .word 0x0800814d
8007f80: 080080c1 .word 0x080080c1
8007f84: 0800814d .word 0x0800814d
8007f88: 0800814d .word 0x0800814d
8007f8c: 0800814d .word 0x0800814d
8007f90: 0800814d .word 0x0800814d
8007f94: 0800814d .word 0x0800814d
8007f98: 0800814d .word 0x0800814d
8007f9c: 0800814d .word 0x0800814d
8007fa0: 080080eb .word 0x080080eb
8007fa4: 080080cf .word 0x080080cf
8007fa8: 0800814d .word 0x0800814d
8007fac: 0800814d .word 0x0800814d
8007fb0: 080080dd .word 0x080080dd
8007fb4: 0800814d .word 0x0800814d
8007fb8: 0800814d .word 0x0800814d
8007fbc: 0800814d .word 0x0800814d
8007fc0: 0800814d .word 0x0800814d
8007fc4: 08008107 .word 0x08008107
8007fc8: 0800814d .word 0x0800814d
8007fcc: 08008115 .word 0x08008115
8007fd0: 0800814d .word 0x0800814d
8007fd4: 0800814d .word 0x0800814d
8007fd8: 08008123 .word 0x08008123
8007fdc: 0800814d .word 0x0800814d
8007fe0: 08008131 .word 0x08008131
8007fe4: 0800814d .word 0x0800814d
8007fe8: 0800814d .word 0x0800814d
8007fec: 0800814d .word 0x0800814d
8007ff0: 0800814d .word 0x0800814d
8007ff4: 0800813f .word 0x0800813f
8007ff8: 0800814d .word 0x0800814d
8007ffc: 0800814d .word 0x0800814d
8008000: 0800814d .word 0x0800814d
8008004: 0800814d .word 0x0800814d
8008008: 0800814d .word 0x0800814d
800800c: 0800814d .word 0x0800814d
8008010: 0800814d .word 0x0800814d
8008014: 0800814d .word 0x0800814d
8008018: 0800814d .word 0x0800814d
800801c: 0800814d .word 0x0800814d
8008020: 0800814d .word 0x0800814d
8008024: 0800814d .word 0x0800814d
8008028: 0800814d .word 0x0800814d
800802c: 0800814d .word 0x0800814d
8008030: 0800814d .word 0x0800814d
8008034: 0800814d .word 0x0800814d
8008038: 0800814d .word 0x0800814d
800803c: 0800814d .word 0x0800814d
8008040: 0800814d .word 0x0800814d
8008044: 0800814d .word 0x0800814d
8008048: 0800814d .word 0x0800814d
800804c: 0800814d .word 0x0800814d
8008050: 0800814d .word 0x0800814d
8008054: 0800814d .word 0x0800814d
8008058: 0800814d .word 0x0800814d
800805c: 0800814d .word 0x0800814d
8008060: 0800814d .word 0x0800814d
8008064: 0800814d .word 0x0800814d
8008068: 0800814d .word 0x0800814d
800806c: 0800814d .word 0x0800814d
8008070: 0800814d .word 0x0800814d
8008074: 0800814d .word 0x0800814d
8008078: 0800814d .word 0x0800814d
800807c: 0800814d .word 0x0800814d
8008080: 0800814d .word 0x0800814d
8008084: 0800814d .word 0x0800814d
8008088: 0800814d .word 0x0800814d
800808c: 0800814d .word 0x0800814d
8008090: 0800814d .word 0x0800814d
8008094: 0800814d .word 0x0800814d
8008098: 0800814d .word 0x0800814d
800809c: 0800814d .word 0x0800814d
80080a0: 080080f9 .word 0x080080f9
{
case SCSI_TEST_UNIT_READY:
SCSI_TestUnitReady(pdev, lun, cmd);
80080a4: 7afb ldrb r3, [r7, #11]
80080a6: 687a ldr r2, [r7, #4]
80080a8: 4619 mov r1, r3
80080aa: 68f8 ldr r0, [r7, #12]
80080ac: f000 f85c bl 8008168 <SCSI_TestUnitReady>
break;
80080b0: e055 b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_REQUEST_SENSE:
SCSI_RequestSense(pdev, lun, cmd);
80080b2: 7afb ldrb r3, [r7, #11]
80080b4: 687a ldr r2, [r7, #4]
80080b6: 4619 mov r1, r3
80080b8: 68f8 ldr r0, [r7, #12]
80080ba: f000 fa09 bl 80084d0 <SCSI_RequestSense>
break;
80080be: e04e b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_INQUIRY:
SCSI_Inquiry(pdev, lun, cmd);
80080c0: 7afb ldrb r3, [r7, #11]
80080c2: 687a ldr r2, [r7, #4]
80080c4: 4619 mov r1, r3
80080c6: 68f8 ldr r0, [r7, #12]
80080c8: f000 f888 bl 80081dc <SCSI_Inquiry>
break;
80080cc: e047 b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_START_STOP_UNIT:
SCSI_StartStopUnit(pdev, lun, cmd);
80080ce: 7afb ldrb r3, [r7, #11]
80080d0: 687a ldr r2, [r7, #4]
80080d2: 4619 mov r1, r3
80080d4: 68f8 ldr r0, [r7, #12]
80080d6: f000 fa9e bl 8008616 <SCSI_StartStopUnit>
break;
80080da: e040 b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_ALLOW_MEDIUM_REMOVAL:
SCSI_StartStopUnit(pdev, lun, cmd);
80080dc: 7afb ldrb r3, [r7, #11]
80080de: 687a ldr r2, [r7, #4]
80080e0: 4619 mov r1, r3
80080e2: 68f8 ldr r0, [r7, #12]
80080e4: f000 fa97 bl 8008616 <SCSI_StartStopUnit>
break;
80080e8: e039 b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_MODE_SENSE6:
SCSI_ModeSense6(pdev, lun, cmd);
80080ea: 7afb ldrb r3, [r7, #11]
80080ec: 687a ldr r2, [r7, #4]
80080ee: 4619 mov r1, r3
80080f0: 68f8 ldr r0, [r7, #12]
80080f2: f000 f99d bl 8008430 <SCSI_ModeSense6>
break;
80080f6: e032 b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_MODE_SENSE10:
SCSI_ModeSense10(pdev, lun, cmd);
80080f8: 7afb ldrb r3, [r7, #11]
80080fa: 687a ldr r2, [r7, #4]
80080fc: 4619 mov r1, r3
80080fe: 68f8 ldr r0, [r7, #12]
8008100: f000 f9be bl 8008480 <SCSI_ModeSense10>
break;
8008104: e02b b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_READ_FORMAT_CAPACITIES:
SCSI_ReadFormatCapacity(pdev, lun, cmd);
8008106: 7afb ldrb r3, [r7, #11]
8008108: 687a ldr r2, [r7, #4]
800810a: 4619 mov r1, r3
800810c: 68f8 ldr r0, [r7, #12]
800810e: f000 f92a bl 8008366 <SCSI_ReadFormatCapacity>
break;
8008112: e024 b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_READ_CAPACITY10:
SCSI_ReadCapacity10(pdev, lun, cmd);
8008114: 7afb ldrb r3, [r7, #11]
8008116: 687a ldr r2, [r7, #4]
8008118: 4619 mov r1, r3
800811a: 68f8 ldr r0, [r7, #12]
800811c: f000 f8bc bl 8008298 <SCSI_ReadCapacity10>
break;
8008120: e01d b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_READ10:
SCSI_Read10(pdev, lun, cmd);
8008122: 7afb ldrb r3, [r7, #11]
8008124: 687a ldr r2, [r7, #4]
8008126: 4619 mov r1, r3
8008128: 68f8 ldr r0, [r7, #12]
800812a: f000 fa88 bl 800863e <SCSI_Read10>
break;
800812e: e016 b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_WRITE10:
SCSI_Write10(pdev, lun, cmd);
8008130: 7afb ldrb r3, [r7, #11]
8008132: 687a ldr r2, [r7, #4]
8008134: 4619 mov r1, r3
8008136: 68f8 ldr r0, [r7, #12]
8008138: f000 fb0d bl 8008756 <SCSI_Write10>
break;
800813c: e00f b.n 800815e <SCSI_ProcessCmd+0x246>
case SCSI_VERIFY10:
SCSI_Verify10(pdev, lun, cmd);
800813e: 7afb ldrb r3, [r7, #11]
8008140: 687a ldr r2, [r7, #4]
8008142: 4619 mov r1, r3
8008144: 68f8 ldr r0, [r7, #12]
8008146: f000 fbb6 bl 80088b6 <SCSI_Verify10>
break;
800814a: e008 b.n 800815e <SCSI_ProcessCmd+0x246>
default:
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, INVALID_CDB);
800814c: 7af9 ldrb r1, [r7, #11]
800814e: 2320 movs r3, #32
8008150: 2205 movs r2, #5
8008152: 68f8 ldr r0, [r7, #12]
8008154: f000 fa26 bl 80085a4 <SCSI_SenseCode>
return -1;
8008158: f04f 33ff mov.w r3, #4294967295
800815c: e000 b.n 8008160 <SCSI_ProcessCmd+0x248>
}
return 0;
800815e: 2300 movs r3, #0
}
8008160: 4618 mov r0, r3
8008162: 3710 adds r7, #16
8008164: 46bd mov sp, r7
8008166: bd80 pop {r7, pc}
08008168 <SCSI_TestUnitReady>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_TestUnitReady(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8008168: b580 push {r7, lr}
800816a: b086 sub sp, #24
800816c: af00 add r7, sp, #0
800816e: 60f8 str r0, [r7, #12]
8008170: 460b mov r3, r1
8008172: 607a str r2, [r7, #4]
8008174: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8008176: 68fb ldr r3, [r7, #12]
8008178: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
800817c: 617b str r3, [r7, #20]
/* case 9 : Hi > D0 */
if (hmsc->cbw.dDataLength != 0U)
800817e: 697b ldr r3, [r7, #20]
8008180: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
8008184: 2b00 cmp r3, #0
8008186: d00a beq.n 800819e <SCSI_TestUnitReady+0x36>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8008188: 697b ldr r3, [r7, #20]
800818a: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
800818e: 2320 movs r3, #32
8008190: 2205 movs r2, #5
8008192: 68f8 ldr r0, [r7, #12]
8008194: f000 fa06 bl 80085a4 <SCSI_SenseCode>
return -1;
8008198: f04f 33ff mov.w r3, #4294967295
800819c: e019 b.n 80081d2 <SCSI_TestUnitReady+0x6a>
}
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsReady(lun) != 0)
800819e: 68fb ldr r3, [r7, #12]
80081a0: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
80081a4: 689b ldr r3, [r3, #8]
80081a6: 7afa ldrb r2, [r7, #11]
80081a8: 4610 mov r0, r2
80081aa: 4798 blx r3
80081ac: 4603 mov r3, r0
80081ae: 2b00 cmp r3, #0
80081b0: d00b beq.n 80081ca <SCSI_TestUnitReady+0x62>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
80081b2: 7af9 ldrb r1, [r7, #11]
80081b4: 233a movs r3, #58 ; 0x3a
80081b6: 2202 movs r2, #2
80081b8: 68f8 ldr r0, [r7, #12]
80081ba: f000 f9f3 bl 80085a4 <SCSI_SenseCode>
hmsc->bot_state = USBD_BOT_NO_DATA;
80081be: 697b ldr r3, [r7, #20]
80081c0: 2205 movs r2, #5
80081c2: 721a strb r2, [r3, #8]
return -1;
80081c4: f04f 33ff mov.w r3, #4294967295
80081c8: e003 b.n 80081d2 <SCSI_TestUnitReady+0x6a>
}
hmsc->bot_data_length = 0U;
80081ca: 697b ldr r3, [r7, #20]
80081cc: 2200 movs r2, #0
80081ce: 815a strh r2, [r3, #10]
return 0;
80081d0: 2300 movs r3, #0
}
80081d2: 4618 mov r0, r3
80081d4: 3718 adds r7, #24
80081d6: 46bd mov sp, r7
80081d8: bd80 pop {r7, pc}
...
080081dc <SCSI_Inquiry>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Inquiry(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
80081dc: b480 push {r7}
80081de: b089 sub sp, #36 ; 0x24
80081e0: af00 add r7, sp, #0
80081e2: 60f8 str r0, [r7, #12]
80081e4: 460b mov r3, r1
80081e6: 607a str r2, [r7, #4]
80081e8: 72fb strb r3, [r7, #11]
uint8_t *pPage;
uint16_t len;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
80081ea: 68fb ldr r3, [r7, #12]
80081ec: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80081f0: 61bb str r3, [r7, #24]
if (params[1] & 0x01U)/*Evpd is set*/
80081f2: 687b ldr r3, [r7, #4]
80081f4: 3301 adds r3, #1
80081f6: 781b ldrb r3, [r3, #0]
80081f8: f003 0301 and.w r3, r3, #1
80081fc: 2b00 cmp r3, #0
80081fe: d014 beq.n 800822a <SCSI_Inquiry+0x4e>
{
len = LENGTH_INQUIRY_PAGE00;
8008200: 2307 movs r3, #7
8008202: 83fb strh r3, [r7, #30]
hmsc->bot_data_length = len;
8008204: 69bb ldr r3, [r7, #24]
8008206: 8bfa ldrh r2, [r7, #30]
8008208: 815a strh r2, [r3, #10]
while (len)
800820a: e00a b.n 8008222 <SCSI_Inquiry+0x46>
{
len--;
800820c: 8bfb ldrh r3, [r7, #30]
800820e: 3b01 subs r3, #1
8008210: 83fb strh r3, [r7, #30]
hmsc->bot_data[len] = MSC_Page00_Inquiry_Data[len];
8008212: 8bfa ldrh r2, [r7, #30]
8008214: 8bfb ldrh r3, [r7, #30]
8008216: 491f ldr r1, [pc, #124] ; (8008294 <SCSI_Inquiry+0xb8>)
8008218: 5c89 ldrb r1, [r1, r2]
800821a: 69ba ldr r2, [r7, #24]
800821c: 4413 add r3, r2
800821e: 460a mov r2, r1
8008220: 731a strb r2, [r3, #12]
while (len)
8008222: 8bfb ldrh r3, [r7, #30]
8008224: 2b00 cmp r3, #0
8008226: d1f1 bne.n 800820c <SCSI_Inquiry+0x30>
8008228: e02e b.n 8008288 <SCSI_Inquiry+0xac>
}
}
else
{
pPage = (uint8_t *)(void *) & ((USBD_StorageTypeDef *)pdev->pUserData)->pInquiry[lun * STANDARD_INQUIRY_DATA_LEN];
800822a: 68fb ldr r3, [r7, #12]
800822c: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8008230: 69d9 ldr r1, [r3, #28]
8008232: 7afa ldrb r2, [r7, #11]
8008234: 4613 mov r3, r2
8008236: 00db lsls r3, r3, #3
8008238: 4413 add r3, r2
800823a: 009b lsls r3, r3, #2
800823c: 440b add r3, r1
800823e: 617b str r3, [r7, #20]
len = (uint16_t)pPage[4] + 5U;
8008240: 697b ldr r3, [r7, #20]
8008242: 3304 adds r3, #4
8008244: 781b ldrb r3, [r3, #0]
8008246: b29b uxth r3, r3
8008248: 3305 adds r3, #5
800824a: 83fb strh r3, [r7, #30]
if (params[4] <= len)
800824c: 687b ldr r3, [r7, #4]
800824e: 3304 adds r3, #4
8008250: 781b ldrb r3, [r3, #0]
8008252: b29b uxth r3, r3
8008254: 8bfa ldrh r2, [r7, #30]
8008256: 429a cmp r2, r3
8008258: d303 bcc.n 8008262 <SCSI_Inquiry+0x86>
{
len = params[4];
800825a: 687b ldr r3, [r7, #4]
800825c: 3304 adds r3, #4
800825e: 781b ldrb r3, [r3, #0]
8008260: 83fb strh r3, [r7, #30]
}
hmsc->bot_data_length = len;
8008262: 69bb ldr r3, [r7, #24]
8008264: 8bfa ldrh r2, [r7, #30]
8008266: 815a strh r2, [r3, #10]
while (len)
8008268: e00b b.n 8008282 <SCSI_Inquiry+0xa6>
{
len--;
800826a: 8bfb ldrh r3, [r7, #30]
800826c: 3b01 subs r3, #1
800826e: 83fb strh r3, [r7, #30]
hmsc->bot_data[len] = pPage[len];
8008270: 8bfb ldrh r3, [r7, #30]
8008272: 697a ldr r2, [r7, #20]
8008274: 441a add r2, r3
8008276: 8bfb ldrh r3, [r7, #30]
8008278: 7811 ldrb r1, [r2, #0]
800827a: 69ba ldr r2, [r7, #24]
800827c: 4413 add r3, r2
800827e: 460a mov r2, r1
8008280: 731a strb r2, [r3, #12]
while (len)
8008282: 8bfb ldrh r3, [r7, #30]
8008284: 2b00 cmp r3, #0
8008286: d1f0 bne.n 800826a <SCSI_Inquiry+0x8e>
}
}
return 0;
8008288: 2300 movs r3, #0
}
800828a: 4618 mov r0, r3
800828c: 3724 adds r7, #36 ; 0x24
800828e: 46bd mov sp, r7
8008290: bc80 pop {r7}
8008292: 4770 bx lr
8008294: 0800a62c .word 0x0800a62c
08008298 <SCSI_ReadCapacity10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ReadCapacity10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8008298: b580 push {r7, lr}
800829a: b086 sub sp, #24
800829c: af00 add r7, sp, #0
800829e: 60f8 str r0, [r7, #12]
80082a0: 460b mov r3, r1
80082a2: 607a str r2, [r7, #4]
80082a4: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
80082a6: 68fb ldr r3, [r7, #12]
80082a8: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80082ac: 617b str r3, [r7, #20]
if (((USBD_StorageTypeDef *)pdev->pUserData)->GetCapacity(lun, &hmsc->scsi_blk_nbr, &hmsc->scsi_blk_size) != 0)
80082ae: 68fb ldr r3, [r7, #12]
80082b0: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
80082b4: 685b ldr r3, [r3, #4]
80082b6: 697a ldr r2, [r7, #20]
80082b8: f502 7118 add.w r1, r2, #608 ; 0x260
80082bc: 697a ldr r2, [r7, #20]
80082be: f202 225e addw r2, r2, #606 ; 0x25e
80082c2: 7af8 ldrb r0, [r7, #11]
80082c4: 4798 blx r3
80082c6: 4603 mov r3, r0
80082c8: 2b00 cmp r3, #0
80082ca: d008 beq.n 80082de <SCSI_ReadCapacity10+0x46>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
80082cc: 7af9 ldrb r1, [r7, #11]
80082ce: 233a movs r3, #58 ; 0x3a
80082d0: 2202 movs r2, #2
80082d2: 68f8 ldr r0, [r7, #12]
80082d4: f000 f966 bl 80085a4 <SCSI_SenseCode>
return -1;
80082d8: f04f 33ff mov.w r3, #4294967295
80082dc: e03f b.n 800835e <SCSI_ReadCapacity10+0xc6>
}
else
{
hmsc->bot_data[0] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 24);
80082de: 697b ldr r3, [r7, #20]
80082e0: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
80082e4: 3b01 subs r3, #1
80082e6: 0e1b lsrs r3, r3, #24
80082e8: b2da uxtb r2, r3
80082ea: 697b ldr r3, [r7, #20]
80082ec: 731a strb r2, [r3, #12]
hmsc->bot_data[1] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 16);
80082ee: 697b ldr r3, [r7, #20]
80082f0: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
80082f4: 3b01 subs r3, #1
80082f6: 0c1b lsrs r3, r3, #16
80082f8: b2da uxtb r2, r3
80082fa: 697b ldr r3, [r7, #20]
80082fc: 735a strb r2, [r3, #13]
hmsc->bot_data[2] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 8);
80082fe: 697b ldr r3, [r7, #20]
8008300: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
8008304: 3b01 subs r3, #1
8008306: 0a1b lsrs r3, r3, #8
8008308: b2da uxtb r2, r3
800830a: 697b ldr r3, [r7, #20]
800830c: 739a strb r2, [r3, #14]
hmsc->bot_data[3] = (uint8_t)(hmsc->scsi_blk_nbr - 1U);
800830e: 697b ldr r3, [r7, #20]
8008310: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
8008314: b2db uxtb r3, r3
8008316: 3b01 subs r3, #1
8008318: b2da uxtb r2, r3
800831a: 697b ldr r3, [r7, #20]
800831c: 73da strb r2, [r3, #15]
hmsc->bot_data[4] = (uint8_t)(hmsc->scsi_blk_size >> 24);
800831e: 697b ldr r3, [r7, #20]
8008320: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008324: 161b asrs r3, r3, #24
8008326: b2da uxtb r2, r3
8008328: 697b ldr r3, [r7, #20]
800832a: 741a strb r2, [r3, #16]
hmsc->bot_data[5] = (uint8_t)(hmsc->scsi_blk_size >> 16);
800832c: 697b ldr r3, [r7, #20]
800832e: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008332: 141b asrs r3, r3, #16
8008334: b2da uxtb r2, r3
8008336: 697b ldr r3, [r7, #20]
8008338: 745a strb r2, [r3, #17]
hmsc->bot_data[6] = (uint8_t)(hmsc->scsi_blk_size >> 8);
800833a: 697b ldr r3, [r7, #20]
800833c: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008340: 0a1b lsrs r3, r3, #8
8008342: b29b uxth r3, r3
8008344: b2da uxtb r2, r3
8008346: 697b ldr r3, [r7, #20]
8008348: 749a strb r2, [r3, #18]
hmsc->bot_data[7] = (uint8_t)(hmsc->scsi_blk_size);
800834a: 697b ldr r3, [r7, #20]
800834c: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008350: b2da uxtb r2, r3
8008352: 697b ldr r3, [r7, #20]
8008354: 74da strb r2, [r3, #19]
hmsc->bot_data_length = 8U;
8008356: 697b ldr r3, [r7, #20]
8008358: 2208 movs r2, #8
800835a: 815a strh r2, [r3, #10]
return 0;
800835c: 2300 movs r3, #0
}
}
800835e: 4618 mov r0, r3
8008360: 3718 adds r7, #24
8008362: 46bd mov sp, r7
8008364: bd80 pop {r7, pc}
08008366 <SCSI_ReadFormatCapacity>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ReadFormatCapacity(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8008366: b580 push {r7, lr}
8008368: b088 sub sp, #32
800836a: af00 add r7, sp, #0
800836c: 60f8 str r0, [r7, #12]
800836e: 460b mov r3, r1
8008370: 607a str r2, [r7, #4]
8008372: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8008374: 68fb ldr r3, [r7, #12]
8008376: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
800837a: 61bb str r3, [r7, #24]
uint16_t blk_size;
uint32_t blk_nbr;
uint16_t i;
for (i = 0U; i < 12U ; i++)
800837c: 2300 movs r3, #0
800837e: 83fb strh r3, [r7, #30]
8008380: e007 b.n 8008392 <SCSI_ReadFormatCapacity+0x2c>
{
hmsc->bot_data[i] = 0U;
8008382: 8bfb ldrh r3, [r7, #30]
8008384: 69ba ldr r2, [r7, #24]
8008386: 4413 add r3, r2
8008388: 2200 movs r2, #0
800838a: 731a strb r2, [r3, #12]
for (i = 0U; i < 12U ; i++)
800838c: 8bfb ldrh r3, [r7, #30]
800838e: 3301 adds r3, #1
8008390: 83fb strh r3, [r7, #30]
8008392: 8bfb ldrh r3, [r7, #30]
8008394: 2b0b cmp r3, #11
8008396: d9f4 bls.n 8008382 <SCSI_ReadFormatCapacity+0x1c>
}
if (((USBD_StorageTypeDef *)pdev->pUserData)->GetCapacity(lun, &blk_nbr, &blk_size) != 0U)
8008398: 68fb ldr r3, [r7, #12]
800839a: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
800839e: 685b ldr r3, [r3, #4]
80083a0: f107 0216 add.w r2, r7, #22
80083a4: f107 0110 add.w r1, r7, #16
80083a8: 7af8 ldrb r0, [r7, #11]
80083aa: 4798 blx r3
80083ac: 4603 mov r3, r0
80083ae: 2b00 cmp r3, #0
80083b0: d008 beq.n 80083c4 <SCSI_ReadFormatCapacity+0x5e>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
80083b2: 7af9 ldrb r1, [r7, #11]
80083b4: 233a movs r3, #58 ; 0x3a
80083b6: 2202 movs r2, #2
80083b8: 68f8 ldr r0, [r7, #12]
80083ba: f000 f8f3 bl 80085a4 <SCSI_SenseCode>
return -1;
80083be: f04f 33ff mov.w r3, #4294967295
80083c2: e030 b.n 8008426 <SCSI_ReadFormatCapacity+0xc0>
}
else
{
hmsc->bot_data[3] = 0x08U;
80083c4: 69bb ldr r3, [r7, #24]
80083c6: 2208 movs r2, #8
80083c8: 73da strb r2, [r3, #15]
hmsc->bot_data[4] = (uint8_t)((blk_nbr - 1U) >> 24);
80083ca: 693b ldr r3, [r7, #16]
80083cc: 3b01 subs r3, #1
80083ce: 0e1b lsrs r3, r3, #24
80083d0: b2da uxtb r2, r3
80083d2: 69bb ldr r3, [r7, #24]
80083d4: 741a strb r2, [r3, #16]
hmsc->bot_data[5] = (uint8_t)((blk_nbr - 1U) >> 16);
80083d6: 693b ldr r3, [r7, #16]
80083d8: 3b01 subs r3, #1
80083da: 0c1b lsrs r3, r3, #16
80083dc: b2da uxtb r2, r3
80083de: 69bb ldr r3, [r7, #24]
80083e0: 745a strb r2, [r3, #17]
hmsc->bot_data[6] = (uint8_t)((blk_nbr - 1U) >> 8);
80083e2: 693b ldr r3, [r7, #16]
80083e4: 3b01 subs r3, #1
80083e6: 0a1b lsrs r3, r3, #8
80083e8: b2da uxtb r2, r3
80083ea: 69bb ldr r3, [r7, #24]
80083ec: 749a strb r2, [r3, #18]
hmsc->bot_data[7] = (uint8_t)(blk_nbr - 1U);
80083ee: 693b ldr r3, [r7, #16]
80083f0: b2db uxtb r3, r3
80083f2: 3b01 subs r3, #1
80083f4: b2da uxtb r2, r3
80083f6: 69bb ldr r3, [r7, #24]
80083f8: 74da strb r2, [r3, #19]
hmsc->bot_data[8] = 0x02U;
80083fa: 69bb ldr r3, [r7, #24]
80083fc: 2202 movs r2, #2
80083fe: 751a strb r2, [r3, #20]
hmsc->bot_data[9] = (uint8_t)(blk_size >> 16);
8008400: 8afb ldrh r3, [r7, #22]
8008402: 141b asrs r3, r3, #16
8008404: b2da uxtb r2, r3
8008406: 69bb ldr r3, [r7, #24]
8008408: 755a strb r2, [r3, #21]
hmsc->bot_data[10] = (uint8_t)(blk_size >> 8);
800840a: 8afb ldrh r3, [r7, #22]
800840c: 0a1b lsrs r3, r3, #8
800840e: b29b uxth r3, r3
8008410: b2da uxtb r2, r3
8008412: 69bb ldr r3, [r7, #24]
8008414: 759a strb r2, [r3, #22]
hmsc->bot_data[11] = (uint8_t)(blk_size);
8008416: 8afb ldrh r3, [r7, #22]
8008418: b2da uxtb r2, r3
800841a: 69bb ldr r3, [r7, #24]
800841c: 75da strb r2, [r3, #23]
hmsc->bot_data_length = 12U;
800841e: 69bb ldr r3, [r7, #24]
8008420: 220c movs r2, #12
8008422: 815a strh r2, [r3, #10]
return 0;
8008424: 2300 movs r3, #0
}
}
8008426: 4618 mov r0, r3
8008428: 3720 adds r7, #32
800842a: 46bd mov sp, r7
800842c: bd80 pop {r7, pc}
...
08008430 <SCSI_ModeSense6>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ModeSense6(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8008430: b480 push {r7}
8008432: b087 sub sp, #28
8008434: af00 add r7, sp, #0
8008436: 60f8 str r0, [r7, #12]
8008438: 460b mov r3, r1
800843a: 607a str r2, [r7, #4]
800843c: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
800843e: 68fb ldr r3, [r7, #12]
8008440: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008444: 613b str r3, [r7, #16]
uint16_t len = 8U;
8008446: 2308 movs r3, #8
8008448: 82fb strh r3, [r7, #22]
hmsc->bot_data_length = len;
800844a: 693b ldr r3, [r7, #16]
800844c: 8afa ldrh r2, [r7, #22]
800844e: 815a strh r2, [r3, #10]
while (len)
8008450: e00a b.n 8008468 <SCSI_ModeSense6+0x38>
{
len--;
8008452: 8afb ldrh r3, [r7, #22]
8008454: 3b01 subs r3, #1
8008456: 82fb strh r3, [r7, #22]
hmsc->bot_data[len] = MSC_Mode_Sense6_data[len];
8008458: 8afa ldrh r2, [r7, #22]
800845a: 8afb ldrh r3, [r7, #22]
800845c: 4907 ldr r1, [pc, #28] ; (800847c <SCSI_ModeSense6+0x4c>)
800845e: 5c89 ldrb r1, [r1, r2]
8008460: 693a ldr r2, [r7, #16]
8008462: 4413 add r3, r2
8008464: 460a mov r2, r1
8008466: 731a strb r2, [r3, #12]
while (len)
8008468: 8afb ldrh r3, [r7, #22]
800846a: 2b00 cmp r3, #0
800846c: d1f1 bne.n 8008452 <SCSI_ModeSense6+0x22>
}
return 0;
800846e: 2300 movs r3, #0
}
8008470: 4618 mov r0, r3
8008472: 371c adds r7, #28
8008474: 46bd mov sp, r7
8008476: bc80 pop {r7}
8008478: 4770 bx lr
800847a: bf00 nop
800847c: 0800a634 .word 0x0800a634
08008480 <SCSI_ModeSense10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ModeSense10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8008480: b480 push {r7}
8008482: b087 sub sp, #28
8008484: af00 add r7, sp, #0
8008486: 60f8 str r0, [r7, #12]
8008488: 460b mov r3, r1
800848a: 607a str r2, [r7, #4]
800848c: 72fb strb r3, [r7, #11]
uint16_t len = 8U;
800848e: 2308 movs r3, #8
8008490: 82fb strh r3, [r7, #22]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
8008492: 68fb ldr r3, [r7, #12]
8008494: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008498: 613b str r3, [r7, #16]
hmsc->bot_data_length = len;
800849a: 693b ldr r3, [r7, #16]
800849c: 8afa ldrh r2, [r7, #22]
800849e: 815a strh r2, [r3, #10]
while (len)
80084a0: e00a b.n 80084b8 <SCSI_ModeSense10+0x38>
{
len--;
80084a2: 8afb ldrh r3, [r7, #22]
80084a4: 3b01 subs r3, #1
80084a6: 82fb strh r3, [r7, #22]
hmsc->bot_data[len] = MSC_Mode_Sense10_data[len];
80084a8: 8afa ldrh r2, [r7, #22]
80084aa: 8afb ldrh r3, [r7, #22]
80084ac: 4907 ldr r1, [pc, #28] ; (80084cc <SCSI_ModeSense10+0x4c>)
80084ae: 5c89 ldrb r1, [r1, r2]
80084b0: 693a ldr r2, [r7, #16]
80084b2: 4413 add r3, r2
80084b4: 460a mov r2, r1
80084b6: 731a strb r2, [r3, #12]
while (len)
80084b8: 8afb ldrh r3, [r7, #22]
80084ba: 2b00 cmp r3, #0
80084bc: d1f1 bne.n 80084a2 <SCSI_ModeSense10+0x22>
}
return 0;
80084be: 2300 movs r3, #0
}
80084c0: 4618 mov r0, r3
80084c2: 371c adds r7, #28
80084c4: 46bd mov sp, r7
80084c6: bc80 pop {r7}
80084c8: 4770 bx lr
80084ca: bf00 nop
80084cc: 0800a63c .word 0x0800a63c
080084d0 <SCSI_RequestSense>:
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_RequestSense(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
80084d0: b480 push {r7}
80084d2: b087 sub sp, #28
80084d4: af00 add r7, sp, #0
80084d6: 60f8 str r0, [r7, #12]
80084d8: 460b mov r3, r1
80084da: 607a str r2, [r7, #4]
80084dc: 72fb strb r3, [r7, #11]
uint8_t i;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
80084de: 68fb ldr r3, [r7, #12]
80084e0: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80084e4: 613b str r3, [r7, #16]
for (i = 0U ; i < REQUEST_SENSE_DATA_LEN; i++)
80084e6: 2300 movs r3, #0
80084e8: 75fb strb r3, [r7, #23]
80084ea: e007 b.n 80084fc <SCSI_RequestSense+0x2c>
{
hmsc->bot_data[i] = 0U;
80084ec: 7dfb ldrb r3, [r7, #23]
80084ee: 693a ldr r2, [r7, #16]
80084f0: 4413 add r3, r2
80084f2: 2200 movs r2, #0
80084f4: 731a strb r2, [r3, #12]
for (i = 0U ; i < REQUEST_SENSE_DATA_LEN; i++)
80084f6: 7dfb ldrb r3, [r7, #23]
80084f8: 3301 adds r3, #1
80084fa: 75fb strb r3, [r7, #23]
80084fc: 7dfb ldrb r3, [r7, #23]
80084fe: 2b11 cmp r3, #17
8008500: d9f4 bls.n 80084ec <SCSI_RequestSense+0x1c>
}
hmsc->bot_data[0] = 0x70U;
8008502: 693b ldr r3, [r7, #16]
8008504: 2270 movs r2, #112 ; 0x70
8008506: 731a strb r2, [r3, #12]
hmsc->bot_data[7] = REQUEST_SENSE_DATA_LEN - 6U;
8008508: 693b ldr r3, [r7, #16]
800850a: 220c movs r2, #12
800850c: 74da strb r2, [r3, #19]
if ((hmsc->scsi_sense_head != hmsc->scsi_sense_tail))
800850e: 693b ldr r3, [r7, #16]
8008510: f893 225c ldrb.w r2, [r3, #604] ; 0x25c
8008514: 693b ldr r3, [r7, #16]
8008516: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
800851a: 429a cmp r2, r3
800851c: d02e beq.n 800857c <SCSI_RequestSense+0xac>
{
hmsc->bot_data[2] = hmsc->scsi_sense[hmsc->scsi_sense_head].Skey;
800851e: 693b ldr r3, [r7, #16]
8008520: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
8008524: 693a ldr r2, [r7, #16]
8008526: 3347 adds r3, #71 ; 0x47
8008528: 00db lsls r3, r3, #3
800852a: 4413 add r3, r2
800852c: 791a ldrb r2, [r3, #4]
800852e: 693b ldr r3, [r7, #16]
8008530: 739a strb r2, [r3, #14]
hmsc->bot_data[12] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASCQ;
8008532: 693b ldr r3, [r7, #16]
8008534: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
8008538: 693a ldr r2, [r7, #16]
800853a: 3347 adds r3, #71 ; 0x47
800853c: 00db lsls r3, r3, #3
800853e: 4413 add r3, r2
8008540: 7a5a ldrb r2, [r3, #9]
8008542: 693b ldr r3, [r7, #16]
8008544: 761a strb r2, [r3, #24]
hmsc->bot_data[13] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASC;
8008546: 693b ldr r3, [r7, #16]
8008548: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
800854c: 693a ldr r2, [r7, #16]
800854e: 3347 adds r3, #71 ; 0x47
8008550: 00db lsls r3, r3, #3
8008552: 4413 add r3, r2
8008554: 7a1a ldrb r2, [r3, #8]
8008556: 693b ldr r3, [r7, #16]
8008558: 765a strb r2, [r3, #25]
hmsc->scsi_sense_head++;
800855a: 693b ldr r3, [r7, #16]
800855c: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
8008560: 3301 adds r3, #1
8008562: b2da uxtb r2, r3
8008564: 693b ldr r3, [r7, #16]
8008566: f883 225c strb.w r2, [r3, #604] ; 0x25c
if (hmsc->scsi_sense_head == SENSE_LIST_DEEPTH)
800856a: 693b ldr r3, [r7, #16]
800856c: f893 325c ldrb.w r3, [r3, #604] ; 0x25c
8008570: 2b04 cmp r3, #4
8008572: d103 bne.n 800857c <SCSI_RequestSense+0xac>
{
hmsc->scsi_sense_head = 0U;
8008574: 693b ldr r3, [r7, #16]
8008576: 2200 movs r2, #0
8008578: f883 225c strb.w r2, [r3, #604] ; 0x25c
}
}
hmsc->bot_data_length = REQUEST_SENSE_DATA_LEN;
800857c: 693b ldr r3, [r7, #16]
800857e: 2212 movs r2, #18
8008580: 815a strh r2, [r3, #10]
if (params[4] <= REQUEST_SENSE_DATA_LEN)
8008582: 687b ldr r3, [r7, #4]
8008584: 3304 adds r3, #4
8008586: 781b ldrb r3, [r3, #0]
8008588: 2b12 cmp r3, #18
800858a: d805 bhi.n 8008598 <SCSI_RequestSense+0xc8>
{
hmsc->bot_data_length = params[4];
800858c: 687b ldr r3, [r7, #4]
800858e: 3304 adds r3, #4
8008590: 781b ldrb r3, [r3, #0]
8008592: b29a uxth r2, r3
8008594: 693b ldr r3, [r7, #16]
8008596: 815a strh r2, [r3, #10]
}
return 0;
8008598: 2300 movs r3, #0
}
800859a: 4618 mov r0, r3
800859c: 371c adds r7, #28
800859e: 46bd mov sp, r7
80085a0: bc80 pop {r7}
80085a2: 4770 bx lr
080085a4 <SCSI_SenseCode>:
* @param ASC: Additional Sense Key
* @retval none
*/
void SCSI_SenseCode(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t sKey, uint8_t ASC)
{
80085a4: b480 push {r7}
80085a6: b085 sub sp, #20
80085a8: af00 add r7, sp, #0
80085aa: 6078 str r0, [r7, #4]
80085ac: 4608 mov r0, r1
80085ae: 4611 mov r1, r2
80085b0: 461a mov r2, r3
80085b2: 4603 mov r3, r0
80085b4: 70fb strb r3, [r7, #3]
80085b6: 460b mov r3, r1
80085b8: 70bb strb r3, [r7, #2]
80085ba: 4613 mov r3, r2
80085bc: 707b strb r3, [r7, #1]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
80085be: 687b ldr r3, [r7, #4]
80085c0: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80085c4: 60fb str r3, [r7, #12]
hmsc->scsi_sense[hmsc->scsi_sense_tail].Skey = sKey;
80085c6: 68fb ldr r3, [r7, #12]
80085c8: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
80085cc: 68fa ldr r2, [r7, #12]
80085ce: 3347 adds r3, #71 ; 0x47
80085d0: 00db lsls r3, r3, #3
80085d2: 4413 add r3, r2
80085d4: 78ba ldrb r2, [r7, #2]
80085d6: 711a strb r2, [r3, #4]
hmsc->scsi_sense[hmsc->scsi_sense_tail].w.ASC = ASC << 8;
80085d8: 68fb ldr r3, [r7, #12]
80085da: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
80085de: 68fa ldr r2, [r7, #12]
80085e0: 3347 adds r3, #71 ; 0x47
80085e2: 00db lsls r3, r3, #3
80085e4: 4413 add r3, r2
80085e6: 2200 movs r2, #0
80085e8: 721a strb r2, [r3, #8]
hmsc->scsi_sense_tail++;
80085ea: 68fb ldr r3, [r7, #12]
80085ec: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
80085f0: 3301 adds r3, #1
80085f2: b2da uxtb r2, r3
80085f4: 68fb ldr r3, [r7, #12]
80085f6: f883 225d strb.w r2, [r3, #605] ; 0x25d
if (hmsc->scsi_sense_tail == SENSE_LIST_DEEPTH)
80085fa: 68fb ldr r3, [r7, #12]
80085fc: f893 325d ldrb.w r3, [r3, #605] ; 0x25d
8008600: 2b04 cmp r3, #4
8008602: d103 bne.n 800860c <SCSI_SenseCode+0x68>
{
hmsc->scsi_sense_tail = 0U;
8008604: 68fb ldr r3, [r7, #12]
8008606: 2200 movs r2, #0
8008608: f883 225d strb.w r2, [r3, #605] ; 0x25d
}
}
800860c: bf00 nop
800860e: 3714 adds r7, #20
8008610: 46bd mov sp, r7
8008612: bc80 pop {r7}
8008614: 4770 bx lr
08008616 <SCSI_StartStopUnit>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_StartStopUnit(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8008616: b480 push {r7}
8008618: b087 sub sp, #28
800861a: af00 add r7, sp, #0
800861c: 60f8 str r0, [r7, #12]
800861e: 460b mov r3, r1
8008620: 607a str r2, [r7, #4]
8008622: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
8008624: 68fb ldr r3, [r7, #12]
8008626: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
800862a: 617b str r3, [r7, #20]
hmsc->bot_data_length = 0U;
800862c: 697b ldr r3, [r7, #20]
800862e: 2200 movs r2, #0
8008630: 815a strh r2, [r3, #10]
return 0;
8008632: 2300 movs r3, #0
}
8008634: 4618 mov r0, r3
8008636: 371c adds r7, #28
8008638: 46bd mov sp, r7
800863a: bc80 pop {r7}
800863c: 4770 bx lr
0800863e <SCSI_Read10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Read10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800863e: b580 push {r7, lr}
8008640: b086 sub sp, #24
8008642: af00 add r7, sp, #0
8008644: 60f8 str r0, [r7, #12]
8008646: 460b mov r3, r1
8008648: 607a str r2, [r7, #4]
800864a: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
800864c: 68fb ldr r3, [r7, #12]
800864e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008652: 617b str r3, [r7, #20]
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
8008654: 697b ldr r3, [r7, #20]
8008656: 7a1b ldrb r3, [r3, #8]
8008658: 2b00 cmp r3, #0
800865a: d16e bne.n 800873a <SCSI_Read10+0xfc>
{
/* case 10 : Ho <> Di */
if ((hmsc->cbw.bmFlags & 0x80U) != 0x80U)
800865c: 697b ldr r3, [r7, #20]
800865e: f893 3218 ldrb.w r3, [r3, #536] ; 0x218
8008662: b25b sxtb r3, r3
8008664: 2b00 cmp r3, #0
8008666: db0a blt.n 800867e <SCSI_Read10+0x40>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8008668: 697b ldr r3, [r7, #20]
800866a: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
800866e: 2320 movs r3, #32
8008670: 2205 movs r2, #5
8008672: 68f8 ldr r0, [r7, #12]
8008674: f7ff ff96 bl 80085a4 <SCSI_SenseCode>
return -1;
8008678: f04f 33ff mov.w r3, #4294967295
800867c: e067 b.n 800874e <SCSI_Read10+0x110>
}
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsReady(lun) != 0)
800867e: 68fb ldr r3, [r7, #12]
8008680: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8008684: 689b ldr r3, [r3, #8]
8008686: 7afa ldrb r2, [r7, #11]
8008688: 4610 mov r0, r2
800868a: 4798 blx r3
800868c: 4603 mov r3, r0
800868e: 2b00 cmp r3, #0
8008690: d008 beq.n 80086a4 <SCSI_Read10+0x66>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
8008692: 7af9 ldrb r1, [r7, #11]
8008694: 233a movs r3, #58 ; 0x3a
8008696: 2202 movs r2, #2
8008698: 68f8 ldr r0, [r7, #12]
800869a: f7ff ff83 bl 80085a4 <SCSI_SenseCode>
return -1;
800869e: f04f 33ff mov.w r3, #4294967295
80086a2: e054 b.n 800874e <SCSI_Read10+0x110>
}
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
80086a4: 687b ldr r3, [r7, #4]
80086a6: 3302 adds r3, #2
80086a8: 781b ldrb r3, [r3, #0]
80086aa: 061a lsls r2, r3, #24
((uint32_t)params[3] << 16) |
80086ac: 687b ldr r3, [r7, #4]
80086ae: 3303 adds r3, #3
80086b0: 781b ldrb r3, [r3, #0]
80086b2: 041b lsls r3, r3, #16
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
80086b4: 431a orrs r2, r3
((uint32_t)params[4] << 8) |
80086b6: 687b ldr r3, [r7, #4]
80086b8: 3304 adds r3, #4
80086ba: 781b ldrb r3, [r3, #0]
80086bc: 021b lsls r3, r3, #8
((uint32_t)params[3] << 16) |
80086be: 4313 orrs r3, r2
(uint32_t)params[5];
80086c0: 687a ldr r2, [r7, #4]
80086c2: 3205 adds r2, #5
80086c4: 7812 ldrb r2, [r2, #0]
((uint32_t)params[4] << 8) |
80086c6: 431a orrs r2, r3
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
80086c8: 697b ldr r3, [r7, #20]
80086ca: f8c3 2264 str.w r2, [r3, #612] ; 0x264
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) | (uint32_t)params[8];
80086ce: 687b ldr r3, [r7, #4]
80086d0: 3307 adds r3, #7
80086d2: 781b ldrb r3, [r3, #0]
80086d4: 021b lsls r3, r3, #8
80086d6: 687a ldr r2, [r7, #4]
80086d8: 3208 adds r2, #8
80086da: 7812 ldrb r2, [r2, #0]
80086dc: 431a orrs r2, r3
80086de: 697b ldr r3, [r7, #20]
80086e0: f8c3 2268 str.w r2, [r3, #616] ; 0x268
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
80086e4: 697b ldr r3, [r7, #20]
80086e6: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
80086ea: 697b ldr r3, [r7, #20]
80086ec: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
80086f0: 7af9 ldrb r1, [r7, #11]
80086f2: 68f8 ldr r0, [r7, #12]
80086f4: f000 f912 bl 800891c <SCSI_CheckAddressRange>
80086f8: 4603 mov r3, r0
80086fa: 2b00 cmp r3, #0
80086fc: da02 bge.n 8008704 <SCSI_Read10+0xc6>
hmsc->scsi_blk_len) < 0)
{
return -1; /* error */
80086fe: f04f 33ff mov.w r3, #4294967295
8008702: e024 b.n 800874e <SCSI_Read10+0x110>
}
hmsc->bot_state = USBD_BOT_DATA_IN;
8008704: 697b ldr r3, [r7, #20]
8008706: 2202 movs r2, #2
8008708: 721a strb r2, [r3, #8]
/* cases 4,5 : Hi <> Dn */
if (hmsc->cbw.dDataLength != (hmsc->scsi_blk_len * hmsc->scsi_blk_size))
800870a: 697b ldr r3, [r7, #20]
800870c: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
8008710: 697b ldr r3, [r7, #20]
8008712: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
8008716: 6979 ldr r1, [r7, #20]
8008718: f8b1 125e ldrh.w r1, [r1, #606] ; 0x25e
800871c: fb01 f303 mul.w r3, r1, r3
8008720: 429a cmp r2, r3
8008722: d00a beq.n 800873a <SCSI_Read10+0xfc>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8008724: 697b ldr r3, [r7, #20]
8008726: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
800872a: 2320 movs r3, #32
800872c: 2205 movs r2, #5
800872e: 68f8 ldr r0, [r7, #12]
8008730: f7ff ff38 bl 80085a4 <SCSI_SenseCode>
return -1;
8008734: f04f 33ff mov.w r3, #4294967295
8008738: e009 b.n 800874e <SCSI_Read10+0x110>
}
}
hmsc->bot_data_length = MSC_MEDIA_PACKET;
800873a: 697b ldr r3, [r7, #20]
800873c: f44f 7200 mov.w r2, #512 ; 0x200
8008740: 815a strh r2, [r3, #10]
return SCSI_ProcessRead(pdev, lun);
8008742: 7afb ldrb r3, [r7, #11]
8008744: 4619 mov r1, r3
8008746: 68f8 ldr r0, [r7, #12]
8008748: f000 f90a bl 8008960 <SCSI_ProcessRead>
800874c: 4603 mov r3, r0
}
800874e: 4618 mov r0, r3
8008750: 3718 adds r7, #24
8008752: 46bd mov sp, r7
8008754: bd80 pop {r7, pc}
08008756 <SCSI_Write10>:
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Write10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8008756: b580 push {r7, lr}
8008758: b086 sub sp, #24
800875a: af00 add r7, sp, #0
800875c: 60f8 str r0, [r7, #12]
800875e: 460b mov r3, r1
8008760: 607a str r2, [r7, #4]
8008762: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
8008764: 68fb ldr r3, [r7, #12]
8008766: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
800876a: 617b str r3, [r7, #20]
uint32_t len;
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
800876c: 697b ldr r3, [r7, #20]
800876e: 7a1b ldrb r3, [r3, #8]
8008770: 2b00 cmp r3, #0
8008772: f040 8096 bne.w 80088a2 <SCSI_Write10+0x14c>
{
/* case 8 : Hi <> Do */
if ((hmsc->cbw.bmFlags & 0x80U) == 0x80U)
8008776: 697b ldr r3, [r7, #20]
8008778: f893 3218 ldrb.w r3, [r3, #536] ; 0x218
800877c: b25b sxtb r3, r3
800877e: 2b00 cmp r3, #0
8008780: da0a bge.n 8008798 <SCSI_Write10+0x42>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8008782: 697b ldr r3, [r7, #20]
8008784: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
8008788: 2320 movs r3, #32
800878a: 2205 movs r2, #5
800878c: 68f8 ldr r0, [r7, #12]
800878e: f7ff ff09 bl 80085a4 <SCSI_SenseCode>
return -1;
8008792: f04f 33ff mov.w r3, #4294967295
8008796: e08a b.n 80088ae <SCSI_Write10+0x158>
}
/* Check whether Media is ready */
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsReady(lun) != 0)
8008798: 68fb ldr r3, [r7, #12]
800879a: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
800879e: 689b ldr r3, [r3, #8]
80087a0: 7afa ldrb r2, [r7, #11]
80087a2: 4610 mov r0, r2
80087a4: 4798 blx r3
80087a6: 4603 mov r3, r0
80087a8: 2b00 cmp r3, #0
80087aa: d008 beq.n 80087be <SCSI_Write10+0x68>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
80087ac: 7af9 ldrb r1, [r7, #11]
80087ae: 233a movs r3, #58 ; 0x3a
80087b0: 2202 movs r2, #2
80087b2: 68f8 ldr r0, [r7, #12]
80087b4: f7ff fef6 bl 80085a4 <SCSI_SenseCode>
return -1;
80087b8: f04f 33ff mov.w r3, #4294967295
80087bc: e077 b.n 80088ae <SCSI_Write10+0x158>
}
/* Check If media is write-protected */
if (((USBD_StorageTypeDef *)pdev->pUserData)->IsWriteProtected(lun) != 0)
80087be: 68fb ldr r3, [r7, #12]
80087c0: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
80087c4: 68db ldr r3, [r3, #12]
80087c6: 7afa ldrb r2, [r7, #11]
80087c8: 4610 mov r0, r2
80087ca: 4798 blx r3
80087cc: 4603 mov r3, r0
80087ce: 2b00 cmp r3, #0
80087d0: d008 beq.n 80087e4 <SCSI_Write10+0x8e>
{
SCSI_SenseCode(pdev, lun, NOT_READY, WRITE_PROTECTED);
80087d2: 7af9 ldrb r1, [r7, #11]
80087d4: 2327 movs r3, #39 ; 0x27
80087d6: 2202 movs r2, #2
80087d8: 68f8 ldr r0, [r7, #12]
80087da: f7ff fee3 bl 80085a4 <SCSI_SenseCode>
return -1;
80087de: f04f 33ff mov.w r3, #4294967295
80087e2: e064 b.n 80088ae <SCSI_Write10+0x158>
}
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
80087e4: 687b ldr r3, [r7, #4]
80087e6: 3302 adds r3, #2
80087e8: 781b ldrb r3, [r3, #0]
80087ea: 061a lsls r2, r3, #24
((uint32_t)params[3] << 16) |
80087ec: 687b ldr r3, [r7, #4]
80087ee: 3303 adds r3, #3
80087f0: 781b ldrb r3, [r3, #0]
80087f2: 041b lsls r3, r3, #16
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
80087f4: 431a orrs r2, r3
((uint32_t)params[4] << 8) |
80087f6: 687b ldr r3, [r7, #4]
80087f8: 3304 adds r3, #4
80087fa: 781b ldrb r3, [r3, #0]
80087fc: 021b lsls r3, r3, #8
((uint32_t)params[3] << 16) |
80087fe: 4313 orrs r3, r2
(uint32_t)params[5];
8008800: 687a ldr r2, [r7, #4]
8008802: 3205 adds r2, #5
8008804: 7812 ldrb r2, [r2, #0]
((uint32_t)params[4] << 8) |
8008806: 431a orrs r2, r3
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
8008808: 697b ldr r3, [r7, #20]
800880a: f8c3 2264 str.w r2, [r3, #612] ; 0x264
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) |
800880e: 687b ldr r3, [r7, #4]
8008810: 3307 adds r3, #7
8008812: 781b ldrb r3, [r3, #0]
8008814: 021b lsls r3, r3, #8
(uint32_t)params[8];
8008816: 687a ldr r2, [r7, #4]
8008818: 3208 adds r2, #8
800881a: 7812 ldrb r2, [r2, #0]
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) |
800881c: 431a orrs r2, r3
800881e: 697b ldr r3, [r7, #20]
8008820: f8c3 2268 str.w r2, [r3, #616] ; 0x268
/* check if LBA address is in the right range */
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
8008824: 697b ldr r3, [r7, #20]
8008826: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
800882a: 697b ldr r3, [r7, #20]
800882c: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
8008830: 7af9 ldrb r1, [r7, #11]
8008832: 68f8 ldr r0, [r7, #12]
8008834: f000 f872 bl 800891c <SCSI_CheckAddressRange>
8008838: 4603 mov r3, r0
800883a: 2b00 cmp r3, #0
800883c: da02 bge.n 8008844 <SCSI_Write10+0xee>
hmsc->scsi_blk_len) < 0)
{
return -1; /* error */
800883e: f04f 33ff mov.w r3, #4294967295
8008842: e034 b.n 80088ae <SCSI_Write10+0x158>
}
len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
8008844: 697b ldr r3, [r7, #20]
8008846: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
800884a: 697a ldr r2, [r7, #20]
800884c: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
8008850: fb02 f303 mul.w r3, r2, r3
8008854: 613b str r3, [r7, #16]
/* cases 3,11,13 : Hn,Ho <> D0 */
if (hmsc->cbw.dDataLength != len)
8008856: 697b ldr r3, [r7, #20]
8008858: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
800885c: 693a ldr r2, [r7, #16]
800885e: 429a cmp r2, r3
8008860: d00a beq.n 8008878 <SCSI_Write10+0x122>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8008862: 697b ldr r3, [r7, #20]
8008864: f893 1219 ldrb.w r1, [r3, #537] ; 0x219
8008868: 2320 movs r3, #32
800886a: 2205 movs r2, #5
800886c: 68f8 ldr r0, [r7, #12]
800886e: f7ff fe99 bl 80085a4 <SCSI_SenseCode>
return -1;
8008872: f04f 33ff mov.w r3, #4294967295
8008876: e01a b.n 80088ae <SCSI_Write10+0x158>
}
len = MIN(len, MSC_MEDIA_PACKET);
8008878: 693b ldr r3, [r7, #16]
800887a: f5b3 7f00 cmp.w r3, #512 ; 0x200
800887e: bf28 it cs
8008880: f44f 7300 movcs.w r3, #512 ; 0x200
8008884: 613b str r3, [r7, #16]
/* Prepare EP to receive first data packet */
hmsc->bot_state = USBD_BOT_DATA_OUT;
8008886: 697b ldr r3, [r7, #20]
8008888: 2201 movs r2, #1
800888a: 721a strb r2, [r3, #8]
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, hmsc->bot_data, len);
800888c: 697b ldr r3, [r7, #20]
800888e: f103 020c add.w r2, r3, #12
8008892: 693b ldr r3, [r7, #16]
8008894: b29b uxth r3, r3
8008896: 2101 movs r1, #1
8008898: 68f8 ldr r0, [r7, #12]
800889a: f001 fdd4 bl 800a446 <USBD_LL_PrepareReceive>
}
else /* Write Process ongoing */
{
return SCSI_ProcessWrite(pdev, lun);
}
return 0;
800889e: 2300 movs r3, #0
80088a0: e005 b.n 80088ae <SCSI_Write10+0x158>
return SCSI_ProcessWrite(pdev, lun);
80088a2: 7afb ldrb r3, [r7, #11]
80088a4: 4619 mov r1, r3
80088a6: 68f8 ldr r0, [r7, #12]
80088a8: f000 f8ce bl 8008a48 <SCSI_ProcessWrite>
80088ac: 4603 mov r3, r0
}
80088ae: 4618 mov r0, r3
80088b0: 3718 adds r7, #24
80088b2: 46bd mov sp, r7
80088b4: bd80 pop {r7, pc}
080088b6 <SCSI_Verify10>:
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Verify10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
80088b6: b580 push {r7, lr}
80088b8: b086 sub sp, #24
80088ba: af00 add r7, sp, #0
80088bc: 60f8 str r0, [r7, #12]
80088be: 460b mov r3, r1
80088c0: 607a str r2, [r7, #4]
80088c2: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
80088c4: 68fb ldr r3, [r7, #12]
80088c6: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80088ca: 617b str r3, [r7, #20]
if ((params[1] & 0x02U) == 0x02U)
80088cc: 687b ldr r3, [r7, #4]
80088ce: 3301 adds r3, #1
80088d0: 781b ldrb r3, [r3, #0]
80088d2: f003 0302 and.w r3, r3, #2
80088d6: 2b00 cmp r3, #0
80088d8: d008 beq.n 80088ec <SCSI_Verify10+0x36>
{
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND);
80088da: 7af9 ldrb r1, [r7, #11]
80088dc: 2324 movs r3, #36 ; 0x24
80088de: 2205 movs r2, #5
80088e0: 68f8 ldr r0, [r7, #12]
80088e2: f7ff fe5f bl 80085a4 <SCSI_SenseCode>
return -1; /* Error, Verify Mode Not supported*/
80088e6: f04f 33ff mov.w r3, #4294967295
80088ea: e013 b.n 8008914 <SCSI_Verify10+0x5e>
}
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
80088ec: 697b ldr r3, [r7, #20]
80088ee: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
80088f2: 697b ldr r3, [r7, #20]
80088f4: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
80088f8: 7af9 ldrb r1, [r7, #11]
80088fa: 68f8 ldr r0, [r7, #12]
80088fc: f000 f80e bl 800891c <SCSI_CheckAddressRange>
8008900: 4603 mov r3, r0
8008902: 2b00 cmp r3, #0
8008904: da02 bge.n 800890c <SCSI_Verify10+0x56>
hmsc->scsi_blk_len) < 0)
{
return -1; /* error */
8008906: f04f 33ff mov.w r3, #4294967295
800890a: e003 b.n 8008914 <SCSI_Verify10+0x5e>
}
hmsc->bot_data_length = 0U;
800890c: 697b ldr r3, [r7, #20]
800890e: 2200 movs r2, #0
8008910: 815a strh r2, [r3, #10]
return 0;
8008912: 2300 movs r3, #0
}
8008914: 4618 mov r0, r3
8008916: 3718 adds r7, #24
8008918: 46bd mov sp, r7
800891a: bd80 pop {r7, pc}
0800891c <SCSI_CheckAddressRange>:
* @param blk_nbr: number of block to be processed
* @retval status
*/
static int8_t SCSI_CheckAddressRange(USBD_HandleTypeDef *pdev, uint8_t lun,
uint32_t blk_offset, uint32_t blk_nbr)
{
800891c: b580 push {r7, lr}
800891e: b086 sub sp, #24
8008920: af00 add r7, sp, #0
8008922: 60f8 str r0, [r7, #12]
8008924: 607a str r2, [r7, #4]
8008926: 603b str r3, [r7, #0]
8008928: 460b mov r3, r1
800892a: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
800892c: 68fb ldr r3, [r7, #12]
800892e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008932: 617b str r3, [r7, #20]
if ((blk_offset + blk_nbr) > hmsc->scsi_blk_nbr)
8008934: 687a ldr r2, [r7, #4]
8008936: 683b ldr r3, [r7, #0]
8008938: 441a add r2, r3
800893a: 697b ldr r3, [r7, #20]
800893c: f8d3 3260 ldr.w r3, [r3, #608] ; 0x260
8008940: 429a cmp r2, r3
8008942: d908 bls.n 8008956 <SCSI_CheckAddressRange+0x3a>
{
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE);
8008944: 7af9 ldrb r1, [r7, #11]
8008946: 2321 movs r3, #33 ; 0x21
8008948: 2205 movs r2, #5
800894a: 68f8 ldr r0, [r7, #12]
800894c: f7ff fe2a bl 80085a4 <SCSI_SenseCode>
return -1;
8008950: f04f 33ff mov.w r3, #4294967295
8008954: e000 b.n 8008958 <SCSI_CheckAddressRange+0x3c>
}
return 0;
8008956: 2300 movs r3, #0
}
8008958: 4618 mov r0, r3
800895a: 3718 adds r7, #24
800895c: 46bd mov sp, r7
800895e: bd80 pop {r7, pc}
08008960 <SCSI_ProcessRead>:
* Handle Read Process
* @param lun: Logical unit number
* @retval status
*/
static int8_t SCSI_ProcessRead(USBD_HandleTypeDef *pdev, uint8_t lun)
{
8008960: b590 push {r4, r7, lr}
8008962: b085 sub sp, #20
8008964: af00 add r7, sp, #0
8008966: 6078 str r0, [r7, #4]
8008968: 460b mov r3, r1
800896a: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassData;
800896c: 687b ldr r3, [r7, #4]
800896e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008972: 60fb str r3, [r7, #12]
uint32_t len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
8008974: 68fb ldr r3, [r7, #12]
8008976: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
800897a: 68fa ldr r2, [r7, #12]
800897c: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
8008980: fb02 f303 mul.w r3, r2, r3
8008984: 60bb str r3, [r7, #8]
len = MIN(len, MSC_MEDIA_PACKET);
8008986: 68bb ldr r3, [r7, #8]
8008988: f5b3 7f00 cmp.w r3, #512 ; 0x200
800898c: bf28 it cs
800898e: f44f 7300 movcs.w r3, #512 ; 0x200
8008992: 60bb str r3, [r7, #8]
if (((USBD_StorageTypeDef *)pdev->pUserData)->Read(lun,
8008994: 687b ldr r3, [r7, #4]
8008996: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
800899a: 691c ldr r4, [r3, #16]
hmsc->bot_data,
800899c: 68fb ldr r3, [r7, #12]
800899e: f103 010c add.w r1, r3, #12
if (((USBD_StorageTypeDef *)pdev->pUserData)->Read(lun,
80089a2: 68fb ldr r3, [r7, #12]
80089a4: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
hmsc->scsi_blk_addr,
(len / hmsc->scsi_blk_size)) < 0)
80089a8: 68fb ldr r3, [r7, #12]
80089aa: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
80089ae: 4618 mov r0, r3
80089b0: 68bb ldr r3, [r7, #8]
80089b2: fbb3 f3f0 udiv r3, r3, r0
if (((USBD_StorageTypeDef *)pdev->pUserData)->Read(lun,
80089b6: b29b uxth r3, r3
80089b8: 78f8 ldrb r0, [r7, #3]
80089ba: 47a0 blx r4
80089bc: 4603 mov r3, r0
80089be: 2b00 cmp r3, #0
80089c0: da08 bge.n 80089d4 <SCSI_ProcessRead+0x74>
{
SCSI_SenseCode(pdev, lun, HARDWARE_ERROR, UNRECOVERED_READ_ERROR);
80089c2: 78f9 ldrb r1, [r7, #3]
80089c4: 2311 movs r3, #17
80089c6: 2204 movs r2, #4
80089c8: 6878 ldr r0, [r7, #4]
80089ca: f7ff fdeb bl 80085a4 <SCSI_SenseCode>
return -1;
80089ce: f04f 33ff mov.w r3, #4294967295
80089d2: e035 b.n 8008a40 <SCSI_ProcessRead+0xe0>
}
USBD_LL_Transmit(pdev, MSC_EPIN_ADDR, hmsc->bot_data, len);
80089d4: 68fb ldr r3, [r7, #12]
80089d6: f103 020c add.w r2, r3, #12
80089da: 68bb ldr r3, [r7, #8]
80089dc: b29b uxth r3, r3
80089de: 2181 movs r1, #129 ; 0x81
80089e0: 6878 ldr r0, [r7, #4]
80089e2: f001 fd0d bl 800a400 <USBD_LL_Transmit>
hmsc->scsi_blk_addr += (len / hmsc->scsi_blk_size);
80089e6: 68fb ldr r3, [r7, #12]
80089e8: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
80089ec: 68fb ldr r3, [r7, #12]
80089ee: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
80089f2: 4619 mov r1, r3
80089f4: 68bb ldr r3, [r7, #8]
80089f6: fbb3 f3f1 udiv r3, r3, r1
80089fa: 441a add r2, r3
80089fc: 68fb ldr r3, [r7, #12]
80089fe: f8c3 2264 str.w r2, [r3, #612] ; 0x264
hmsc->scsi_blk_len -= (len / hmsc->scsi_blk_size);
8008a02: 68fb ldr r3, [r7, #12]
8008a04: f8d3 2268 ldr.w r2, [r3, #616] ; 0x268
8008a08: 68fb ldr r3, [r7, #12]
8008a0a: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008a0e: 4619 mov r1, r3
8008a10: 68bb ldr r3, [r7, #8]
8008a12: fbb3 f3f1 udiv r3, r3, r1
8008a16: 1ad2 subs r2, r2, r3
8008a18: 68fb ldr r3, [r7, #12]
8008a1a: f8c3 2268 str.w r2, [r3, #616] ; 0x268
/* case 6 : Hi = Di */
hmsc->csw.dDataResidue -= len;
8008a1e: 68fb ldr r3, [r7, #12]
8008a20: f8d3 2234 ldr.w r2, [r3, #564] ; 0x234
8008a24: 68bb ldr r3, [r7, #8]
8008a26: 1ad2 subs r2, r2, r3
8008a28: 68fb ldr r3, [r7, #12]
8008a2a: f8c3 2234 str.w r2, [r3, #564] ; 0x234
if (hmsc->scsi_blk_len == 0U)
8008a2e: 68fb ldr r3, [r7, #12]
8008a30: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
8008a34: 2b00 cmp r3, #0
8008a36: d102 bne.n 8008a3e <SCSI_ProcessRead+0xde>
{
hmsc->bot_state = USBD_BOT_LAST_DATA_IN;
8008a38: 68fb ldr r3, [r7, #12]
8008a3a: 2203 movs r2, #3
8008a3c: 721a strb r2, [r3, #8]
}
return 0;
8008a3e: 2300 movs r3, #0
}
8008a40: 4618 mov r0, r3
8008a42: 3714 adds r7, #20
8008a44: 46bd mov sp, r7
8008a46: bd90 pop {r4, r7, pc}
08008a48 <SCSI_ProcessWrite>:
* @param lun: Logical unit number
* @retval status
*/
static int8_t SCSI_ProcessWrite(USBD_HandleTypeDef *pdev, uint8_t lun)
{
8008a48: b590 push {r4, r7, lr}
8008a4a: b085 sub sp, #20
8008a4c: af00 add r7, sp, #0
8008a4e: 6078 str r0, [r7, #4]
8008a50: 460b mov r3, r1
8008a52: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *) pdev->pClassData;
8008a54: 687b ldr r3, [r7, #4]
8008a56: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008a5a: 60fb str r3, [r7, #12]
uint32_t len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
8008a5c: 68fb ldr r3, [r7, #12]
8008a5e: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
8008a62: 68fa ldr r2, [r7, #12]
8008a64: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
8008a68: fb02 f303 mul.w r3, r2, r3
8008a6c: 60bb str r3, [r7, #8]
len = MIN(len, MSC_MEDIA_PACKET);
8008a6e: 68bb ldr r3, [r7, #8]
8008a70: f5b3 7f00 cmp.w r3, #512 ; 0x200
8008a74: bf28 it cs
8008a76: f44f 7300 movcs.w r3, #512 ; 0x200
8008a7a: 60bb str r3, [r7, #8]
if (((USBD_StorageTypeDef *)pdev->pUserData)->Write(lun, hmsc->bot_data,
8008a7c: 687b ldr r3, [r7, #4]
8008a7e: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8008a82: 695c ldr r4, [r3, #20]
8008a84: 68fb ldr r3, [r7, #12]
8008a86: f103 010c add.w r1, r3, #12
8008a8a: 68fb ldr r3, [r7, #12]
8008a8c: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
hmsc->scsi_blk_addr,
(len / hmsc->scsi_blk_size)) < 0)
8008a90: 68fb ldr r3, [r7, #12]
8008a92: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008a96: 4618 mov r0, r3
8008a98: 68bb ldr r3, [r7, #8]
8008a9a: fbb3 f3f0 udiv r3, r3, r0
if (((USBD_StorageTypeDef *)pdev->pUserData)->Write(lun, hmsc->bot_data,
8008a9e: b29b uxth r3, r3
8008aa0: 78f8 ldrb r0, [r7, #3]
8008aa2: 47a0 blx r4
8008aa4: 4603 mov r3, r0
8008aa6: 2b00 cmp r3, #0
8008aa8: da08 bge.n 8008abc <SCSI_ProcessWrite+0x74>
{
SCSI_SenseCode(pdev, lun, HARDWARE_ERROR, WRITE_FAULT);
8008aaa: 78f9 ldrb r1, [r7, #3]
8008aac: 2303 movs r3, #3
8008aae: 2204 movs r2, #4
8008ab0: 6878 ldr r0, [r7, #4]
8008ab2: f7ff fd77 bl 80085a4 <SCSI_SenseCode>
return -1;
8008ab6: f04f 33ff mov.w r3, #4294967295
8008aba: e045 b.n 8008b48 <SCSI_ProcessWrite+0x100>
}
hmsc->scsi_blk_addr += (len / hmsc->scsi_blk_size);
8008abc: 68fb ldr r3, [r7, #12]
8008abe: f8d3 2264 ldr.w r2, [r3, #612] ; 0x264
8008ac2: 68fb ldr r3, [r7, #12]
8008ac4: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008ac8: 4619 mov r1, r3
8008aca: 68bb ldr r3, [r7, #8]
8008acc: fbb3 f3f1 udiv r3, r3, r1
8008ad0: 441a add r2, r3
8008ad2: 68fb ldr r3, [r7, #12]
8008ad4: f8c3 2264 str.w r2, [r3, #612] ; 0x264
hmsc->scsi_blk_len -= (len / hmsc->scsi_blk_size);
8008ad8: 68fb ldr r3, [r7, #12]
8008ada: f8d3 2268 ldr.w r2, [r3, #616] ; 0x268
8008ade: 68fb ldr r3, [r7, #12]
8008ae0: f8b3 325e ldrh.w r3, [r3, #606] ; 0x25e
8008ae4: 4619 mov r1, r3
8008ae6: 68bb ldr r3, [r7, #8]
8008ae8: fbb3 f3f1 udiv r3, r3, r1
8008aec: 1ad2 subs r2, r2, r3
8008aee: 68fb ldr r3, [r7, #12]
8008af0: f8c3 2268 str.w r2, [r3, #616] ; 0x268
/* case 12 : Ho = Do */
hmsc->csw.dDataResidue -= len;
8008af4: 68fb ldr r3, [r7, #12]
8008af6: f8d3 2234 ldr.w r2, [r3, #564] ; 0x234
8008afa: 68bb ldr r3, [r7, #8]
8008afc: 1ad2 subs r2, r2, r3
8008afe: 68fb ldr r3, [r7, #12]
8008b00: f8c3 2234 str.w r2, [r3, #564] ; 0x234
if (hmsc->scsi_blk_len == 0U)
8008b04: 68fb ldr r3, [r7, #12]
8008b06: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
8008b0a: 2b00 cmp r3, #0
8008b0c: d104 bne.n 8008b18 <SCSI_ProcessWrite+0xd0>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
8008b0e: 2100 movs r1, #0
8008b10: 6878 ldr r0, [r7, #4]
8008b12: f7ff f97f bl 8007e14 <MSC_BOT_SendCSW>
8008b16: e016 b.n 8008b46 <SCSI_ProcessWrite+0xfe>
}
else
{
len = MIN((hmsc->scsi_blk_len * hmsc->scsi_blk_size), MSC_MEDIA_PACKET);
8008b18: 68fb ldr r3, [r7, #12]
8008b1a: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
8008b1e: 68fa ldr r2, [r7, #12]
8008b20: f8b2 225e ldrh.w r2, [r2, #606] ; 0x25e
8008b24: fb02 f303 mul.w r3, r2, r3
8008b28: f5b3 7f00 cmp.w r3, #512 ; 0x200
8008b2c: bf28 it cs
8008b2e: f44f 7300 movcs.w r3, #512 ; 0x200
8008b32: 60bb str r3, [r7, #8]
/* Prepare EP to Receive next packet */
USBD_LL_PrepareReceive(pdev, MSC_EPOUT_ADDR, hmsc->bot_data, len);
8008b34: 68fb ldr r3, [r7, #12]
8008b36: f103 020c add.w r2, r3, #12
8008b3a: 68bb ldr r3, [r7, #8]
8008b3c: b29b uxth r3, r3
8008b3e: 2101 movs r1, #1
8008b40: 6878 ldr r0, [r7, #4]
8008b42: f001 fc80 bl 800a446 <USBD_LL_PrepareReceive>
}
return 0;
8008b46: 2300 movs r3, #0
}
8008b48: 4618 mov r0, r3
8008b4a: 3714 adds r7, #20
8008b4c: 46bd mov sp, r7
8008b4e: bd90 pop {r4, r7, pc}
08008b50 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
8008b50: b580 push {r7, lr}
8008b52: b084 sub sp, #16
8008b54: af00 add r7, sp, #0
8008b56: 60f8 str r0, [r7, #12]
8008b58: 60b9 str r1, [r7, #8]
8008b5a: 4613 mov r3, r2
8008b5c: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
8008b5e: 68fb ldr r3, [r7, #12]
8008b60: 2b00 cmp r3, #0
8008b62: d101 bne.n 8008b68 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
8008b64: 2302 movs r3, #2
8008b66: e01a b.n 8008b9e <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
8008b68: 68fb ldr r3, [r7, #12]
8008b6a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008b6e: 2b00 cmp r3, #0
8008b70: d003 beq.n 8008b7a <USBD_Init+0x2a>
{
pdev->pClass = NULL;
8008b72: 68fb ldr r3, [r7, #12]
8008b74: 2200 movs r2, #0
8008b76: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
8008b7a: 68bb ldr r3, [r7, #8]
8008b7c: 2b00 cmp r3, #0
8008b7e: d003 beq.n 8008b88 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
8008b80: 68fb ldr r3, [r7, #12]
8008b82: 68ba ldr r2, [r7, #8]
8008b84: f8c3 22b0 str.w r2, [r3, #688] ; 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
8008b88: 68fb ldr r3, [r7, #12]
8008b8a: 2201 movs r2, #1
8008b8c: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->id = id;
8008b90: 68fb ldr r3, [r7, #12]
8008b92: 79fa ldrb r2, [r7, #7]
8008b94: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
8008b96: 68f8 ldr r0, [r7, #12]
8008b98: f001 fada bl 800a150 <USBD_LL_Init>
return USBD_OK;
8008b9c: 2300 movs r3, #0
}
8008b9e: 4618 mov r0, r3
8008ba0: 3710 adds r7, #16
8008ba2: 46bd mov sp, r7
8008ba4: bd80 pop {r7, pc}
08008ba6 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
8008ba6: b480 push {r7}
8008ba8: b085 sub sp, #20
8008baa: af00 add r7, sp, #0
8008bac: 6078 str r0, [r7, #4]
8008bae: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
8008bb0: 2300 movs r3, #0
8008bb2: 73fb strb r3, [r7, #15]
if (pclass != NULL)
8008bb4: 683b ldr r3, [r7, #0]
8008bb6: 2b00 cmp r3, #0
8008bb8: d006 beq.n 8008bc8 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
8008bba: 687b ldr r3, [r7, #4]
8008bbc: 683a ldr r2, [r7, #0]
8008bbe: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
status = USBD_OK;
8008bc2: 2300 movs r3, #0
8008bc4: 73fb strb r3, [r7, #15]
8008bc6: e001 b.n 8008bcc <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
8008bc8: 2302 movs r3, #2
8008bca: 73fb strb r3, [r7, #15]
}
return status;
8008bcc: 7bfb ldrb r3, [r7, #15]
}
8008bce: 4618 mov r0, r3
8008bd0: 3714 adds r7, #20
8008bd2: 46bd mov sp, r7
8008bd4: bc80 pop {r7}
8008bd6: 4770 bx lr
08008bd8 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
8008bd8: b580 push {r7, lr}
8008bda: b082 sub sp, #8
8008bdc: af00 add r7, sp, #0
8008bde: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
8008be0: 6878 ldr r0, [r7, #4]
8008be2: f001 fb05 bl 800a1f0 <USBD_LL_Start>
return USBD_OK;
8008be6: 2300 movs r3, #0
}
8008be8: 4618 mov r0, r3
8008bea: 3708 adds r7, #8
8008bec: 46bd mov sp, r7
8008bee: bd80 pop {r7, pc}
08008bf0 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
8008bf0: b480 push {r7}
8008bf2: b083 sub sp, #12
8008bf4: af00 add r7, sp, #0
8008bf6: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
8008bf8: 2300 movs r3, #0
}
8008bfa: 4618 mov r0, r3
8008bfc: 370c adds r7, #12
8008bfe: 46bd mov sp, r7
8008c00: bc80 pop {r7}
8008c02: 4770 bx lr
08008c04 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008c04: b580 push {r7, lr}
8008c06: b084 sub sp, #16
8008c08: af00 add r7, sp, #0
8008c0a: 6078 str r0, [r7, #4]
8008c0c: 460b mov r3, r1
8008c0e: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
8008c10: 2302 movs r3, #2
8008c12: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
8008c14: 687b ldr r3, [r7, #4]
8008c16: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008c1a: 2b00 cmp r3, #0
8008c1c: d00c beq.n 8008c38 <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
8008c1e: 687b ldr r3, [r7, #4]
8008c20: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008c24: 681b ldr r3, [r3, #0]
8008c26: 78fa ldrb r2, [r7, #3]
8008c28: 4611 mov r1, r2
8008c2a: 6878 ldr r0, [r7, #4]
8008c2c: 4798 blx r3
8008c2e: 4603 mov r3, r0
8008c30: 2b00 cmp r3, #0
8008c32: d101 bne.n 8008c38 <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
8008c34: 2300 movs r3, #0
8008c36: 73fb strb r3, [r7, #15]
}
}
return ret;
8008c38: 7bfb ldrb r3, [r7, #15]
}
8008c3a: 4618 mov r0, r3
8008c3c: 3710 adds r7, #16
8008c3e: 46bd mov sp, r7
8008c40: bd80 pop {r7, pc}
08008c42 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008c42: b580 push {r7, lr}
8008c44: b082 sub sp, #8
8008c46: af00 add r7, sp, #0
8008c48: 6078 str r0, [r7, #4]
8008c4a: 460b mov r3, r1
8008c4c: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
8008c4e: 687b ldr r3, [r7, #4]
8008c50: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008c54: 685b ldr r3, [r3, #4]
8008c56: 78fa ldrb r2, [r7, #3]
8008c58: 4611 mov r1, r2
8008c5a: 6878 ldr r0, [r7, #4]
8008c5c: 4798 blx r3
return USBD_OK;
8008c5e: 2300 movs r3, #0
}
8008c60: 4618 mov r0, r3
8008c62: 3708 adds r7, #8
8008c64: 46bd mov sp, r7
8008c66: bd80 pop {r7, pc}
08008c68 <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
8008c68: b580 push {r7, lr}
8008c6a: b082 sub sp, #8
8008c6c: af00 add r7, sp, #0
8008c6e: 6078 str r0, [r7, #4]
8008c70: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
8008c72: 687b ldr r3, [r7, #4]
8008c74: f503 732a add.w r3, r3, #680 ; 0x2a8
8008c78: 6839 ldr r1, [r7, #0]
8008c7a: 4618 mov r0, r3
8008c7c: f000 feca bl 8009a14 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
8008c80: 687b ldr r3, [r7, #4]
8008c82: 2201 movs r2, #1
8008c84: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep0_data_len = pdev->request.wLength;
8008c88: 687b ldr r3, [r7, #4]
8008c8a: f8b3 32ae ldrh.w r3, [r3, #686] ; 0x2ae
8008c8e: 461a mov r2, r3
8008c90: 687b ldr r3, [r7, #4]
8008c92: f8c3 2298 str.w r2, [r3, #664] ; 0x298
switch (pdev->request.bmRequest & 0x1FU)
8008c96: 687b ldr r3, [r7, #4]
8008c98: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8008c9c: f003 031f and.w r3, r3, #31
8008ca0: 2b01 cmp r3, #1
8008ca2: d00c beq.n 8008cbe <USBD_LL_SetupStage+0x56>
8008ca4: 2b01 cmp r3, #1
8008ca6: d302 bcc.n 8008cae <USBD_LL_SetupStage+0x46>
8008ca8: 2b02 cmp r3, #2
8008caa: d010 beq.n 8008cce <USBD_LL_SetupStage+0x66>
8008cac: e017 b.n 8008cde <USBD_LL_SetupStage+0x76>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
8008cae: 687b ldr r3, [r7, #4]
8008cb0: f503 732a add.w r3, r3, #680 ; 0x2a8
8008cb4: 4619 mov r1, r3
8008cb6: 6878 ldr r0, [r7, #4]
8008cb8: f000 f9ca bl 8009050 <USBD_StdDevReq>
break;
8008cbc: e01a b.n 8008cf4 <USBD_LL_SetupStage+0x8c>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
8008cbe: 687b ldr r3, [r7, #4]
8008cc0: f503 732a add.w r3, r3, #680 ; 0x2a8
8008cc4: 4619 mov r1, r3
8008cc6: 6878 ldr r0, [r7, #4]
8008cc8: f000 fa2c bl 8009124 <USBD_StdItfReq>
break;
8008ccc: e012 b.n 8008cf4 <USBD_LL_SetupStage+0x8c>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
8008cce: 687b ldr r3, [r7, #4]
8008cd0: f503 732a add.w r3, r3, #680 ; 0x2a8
8008cd4: 4619 mov r1, r3
8008cd6: 6878 ldr r0, [r7, #4]
8008cd8: f000 fa6a bl 80091b0 <USBD_StdEPReq>
break;
8008cdc: e00a b.n 8008cf4 <USBD_LL_SetupStage+0x8c>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
8008cde: 687b ldr r3, [r7, #4]
8008ce0: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8008ce4: f023 037f bic.w r3, r3, #127 ; 0x7f
8008ce8: b2db uxtb r3, r3
8008cea: 4619 mov r1, r3
8008cec: 6878 ldr r0, [r7, #4]
8008cee: f001 fafe bl 800a2ee <USBD_LL_StallEP>
break;
8008cf2: bf00 nop
}
return USBD_OK;
8008cf4: 2300 movs r3, #0
}
8008cf6: 4618 mov r0, r3
8008cf8: 3708 adds r7, #8
8008cfa: 46bd mov sp, r7
8008cfc: bd80 pop {r7, pc}
08008cfe <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008cfe: b580 push {r7, lr}
8008d00: b086 sub sp, #24
8008d02: af00 add r7, sp, #0
8008d04: 60f8 str r0, [r7, #12]
8008d06: 460b mov r3, r1
8008d08: 607a str r2, [r7, #4]
8008d0a: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008d0c: 7afb ldrb r3, [r7, #11]
8008d0e: 2b00 cmp r3, #0
8008d10: d14b bne.n 8008daa <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
8008d12: 68fb ldr r3, [r7, #12]
8008d14: f503 73aa add.w r3, r3, #340 ; 0x154
8008d18: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
8008d1a: 68fb ldr r3, [r7, #12]
8008d1c: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
8008d20: 2b03 cmp r3, #3
8008d22: d134 bne.n 8008d8e <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
8008d24: 697b ldr r3, [r7, #20]
8008d26: 68da ldr r2, [r3, #12]
8008d28: 697b ldr r3, [r7, #20]
8008d2a: 691b ldr r3, [r3, #16]
8008d2c: 429a cmp r2, r3
8008d2e: d919 bls.n 8008d64 <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
8008d30: 697b ldr r3, [r7, #20]
8008d32: 68da ldr r2, [r3, #12]
8008d34: 697b ldr r3, [r7, #20]
8008d36: 691b ldr r3, [r3, #16]
8008d38: 1ad2 subs r2, r2, r3
8008d3a: 697b ldr r3, [r7, #20]
8008d3c: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008d3e: 697b ldr r3, [r7, #20]
8008d40: 68da ldr r2, [r3, #12]
8008d42: 697b ldr r3, [r7, #20]
8008d44: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8008d46: 429a cmp r2, r3
8008d48: d203 bcs.n 8008d52 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008d4a: 697b ldr r3, [r7, #20]
8008d4c: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
8008d4e: b29b uxth r3, r3
8008d50: e002 b.n 8008d58 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008d52: 697b ldr r3, [r7, #20]
8008d54: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8008d56: b29b uxth r3, r3
8008d58: 461a mov r2, r3
8008d5a: 6879 ldr r1, [r7, #4]
8008d5c: 68f8 ldr r0, [r7, #12]
8008d5e: f000 ff2d bl 8009bbc <USBD_CtlContinueRx>
8008d62: e038 b.n 8008dd6 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
8008d64: 68fb ldr r3, [r7, #12]
8008d66: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008d6a: 691b ldr r3, [r3, #16]
8008d6c: 2b00 cmp r3, #0
8008d6e: d00a beq.n 8008d86 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008d70: 68fb ldr r3, [r7, #12]
8008d72: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
8008d76: 2b03 cmp r3, #3
8008d78: d105 bne.n 8008d86 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
8008d7a: 68fb ldr r3, [r7, #12]
8008d7c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008d80: 691b ldr r3, [r3, #16]
8008d82: 68f8 ldr r0, [r7, #12]
8008d84: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
8008d86: 68f8 ldr r0, [r7, #12]
8008d88: f000 ff2a bl 8009be0 <USBD_CtlSendStatus>
8008d8c: e023 b.n 8008dd6 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
8008d8e: 68fb ldr r3, [r7, #12]
8008d90: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
8008d94: 2b05 cmp r3, #5
8008d96: d11e bne.n 8008dd6 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
8008d98: 68fb ldr r3, [r7, #12]
8008d9a: 2200 movs r2, #0
8008d9c: f8c3 2294 str.w r2, [r3, #660] ; 0x294
USBD_LL_StallEP(pdev, 0U);
8008da0: 2100 movs r1, #0
8008da2: 68f8 ldr r0, [r7, #12]
8008da4: f001 faa3 bl 800a2ee <USBD_LL_StallEP>
8008da8: e015 b.n 8008dd6 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
8008daa: 68fb ldr r3, [r7, #12]
8008dac: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008db0: 699b ldr r3, [r3, #24]
8008db2: 2b00 cmp r3, #0
8008db4: d00d beq.n 8008dd2 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008db6: 68fb ldr r3, [r7, #12]
8008db8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
8008dbc: 2b03 cmp r3, #3
8008dbe: d108 bne.n 8008dd2 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
8008dc0: 68fb ldr r3, [r7, #12]
8008dc2: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008dc6: 699b ldr r3, [r3, #24]
8008dc8: 7afa ldrb r2, [r7, #11]
8008dca: 4611 mov r1, r2
8008dcc: 68f8 ldr r0, [r7, #12]
8008dce: 4798 blx r3
8008dd0: e001 b.n 8008dd6 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8008dd2: 2302 movs r3, #2
8008dd4: e000 b.n 8008dd8 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
8008dd6: 2300 movs r3, #0
}
8008dd8: 4618 mov r0, r3
8008dda: 3718 adds r7, #24
8008ddc: 46bd mov sp, r7
8008dde: bd80 pop {r7, pc}
08008de0 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008de0: b580 push {r7, lr}
8008de2: b086 sub sp, #24
8008de4: af00 add r7, sp, #0
8008de6: 60f8 str r0, [r7, #12]
8008de8: 460b mov r3, r1
8008dea: 607a str r2, [r7, #4]
8008dec: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008dee: 7afb ldrb r3, [r7, #11]
8008df0: 2b00 cmp r3, #0
8008df2: d17f bne.n 8008ef4 <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
8008df4: 68fb ldr r3, [r7, #12]
8008df6: 3314 adds r3, #20
8008df8: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
8008dfa: 68fb ldr r3, [r7, #12]
8008dfc: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
8008e00: 2b02 cmp r3, #2
8008e02: d15c bne.n 8008ebe <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
8008e04: 697b ldr r3, [r7, #20]
8008e06: 68da ldr r2, [r3, #12]
8008e08: 697b ldr r3, [r7, #20]
8008e0a: 691b ldr r3, [r3, #16]
8008e0c: 429a cmp r2, r3
8008e0e: d915 bls.n 8008e3c <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
8008e10: 697b ldr r3, [r7, #20]
8008e12: 68da ldr r2, [r3, #12]
8008e14: 697b ldr r3, [r7, #20]
8008e16: 691b ldr r3, [r3, #16]
8008e18: 1ad2 subs r2, r2, r3
8008e1a: 697b ldr r3, [r7, #20]
8008e1c: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
8008e1e: 697b ldr r3, [r7, #20]
8008e20: 68db ldr r3, [r3, #12]
8008e22: b29b uxth r3, r3
8008e24: 461a mov r2, r3
8008e26: 6879 ldr r1, [r7, #4]
8008e28: 68f8 ldr r0, [r7, #12]
8008e2a: f000 feb5 bl 8009b98 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008e2e: 2300 movs r3, #0
8008e30: 2200 movs r2, #0
8008e32: 2100 movs r1, #0
8008e34: 68f8 ldr r0, [r7, #12]
8008e36: f001 fb06 bl 800a446 <USBD_LL_PrepareReceive>
8008e3a: e04e b.n 8008eda <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
8008e3c: 697b ldr r3, [r7, #20]
8008e3e: 689b ldr r3, [r3, #8]
8008e40: 697a ldr r2, [r7, #20]
8008e42: 6912 ldr r2, [r2, #16]
8008e44: fbb3 f1f2 udiv r1, r3, r2
8008e48: fb02 f201 mul.w r2, r2, r1
8008e4c: 1a9b subs r3, r3, r2
8008e4e: 2b00 cmp r3, #0
8008e50: d11c bne.n 8008e8c <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
8008e52: 697b ldr r3, [r7, #20]
8008e54: 689a ldr r2, [r3, #8]
8008e56: 697b ldr r3, [r7, #20]
8008e58: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
8008e5a: 429a cmp r2, r3
8008e5c: d316 bcc.n 8008e8c <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
8008e5e: 697b ldr r3, [r7, #20]
8008e60: 689a ldr r2, [r3, #8]
8008e62: 68fb ldr r3, [r7, #12]
8008e64: f8d3 3298 ldr.w r3, [r3, #664] ; 0x298
(pep->total_length >= pep->maxpacket) &&
8008e68: 429a cmp r2, r3
8008e6a: d20f bcs.n 8008e8c <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
8008e6c: 2200 movs r2, #0
8008e6e: 2100 movs r1, #0
8008e70: 68f8 ldr r0, [r7, #12]
8008e72: f000 fe91 bl 8009b98 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
8008e76: 68fb ldr r3, [r7, #12]
8008e78: 2200 movs r2, #0
8008e7a: f8c3 2298 str.w r2, [r3, #664] ; 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008e7e: 2300 movs r3, #0
8008e80: 2200 movs r2, #0
8008e82: 2100 movs r1, #0
8008e84: 68f8 ldr r0, [r7, #12]
8008e86: f001 fade bl 800a446 <USBD_LL_PrepareReceive>
8008e8a: e026 b.n 8008eda <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
8008e8c: 68fb ldr r3, [r7, #12]
8008e8e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008e92: 68db ldr r3, [r3, #12]
8008e94: 2b00 cmp r3, #0
8008e96: d00a beq.n 8008eae <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008e98: 68fb ldr r3, [r7, #12]
8008e9a: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
8008e9e: 2b03 cmp r3, #3
8008ea0: d105 bne.n 8008eae <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
8008ea2: 68fb ldr r3, [r7, #12]
8008ea4: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008ea8: 68db ldr r3, [r3, #12]
8008eaa: 68f8 ldr r0, [r7, #12]
8008eac: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
8008eae: 2180 movs r1, #128 ; 0x80
8008eb0: 68f8 ldr r0, [r7, #12]
8008eb2: f001 fa1c bl 800a2ee <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
8008eb6: 68f8 ldr r0, [r7, #12]
8008eb8: f000 fea5 bl 8009c06 <USBD_CtlReceiveStatus>
8008ebc: e00d b.n 8008eda <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8008ebe: 68fb ldr r3, [r7, #12]
8008ec0: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
8008ec4: 2b04 cmp r3, #4
8008ec6: d004 beq.n 8008ed2 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
8008ec8: 68fb ldr r3, [r7, #12]
8008eca: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8008ece: 2b00 cmp r3, #0
8008ed0: d103 bne.n 8008eda <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
8008ed2: 2180 movs r1, #128 ; 0x80
8008ed4: 68f8 ldr r0, [r7, #12]
8008ed6: f001 fa0a bl 800a2ee <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
8008eda: 68fb ldr r3, [r7, #12]
8008edc: f893 32a0 ldrb.w r3, [r3, #672] ; 0x2a0
8008ee0: 2b01 cmp r3, #1
8008ee2: d11d bne.n 8008f20 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
8008ee4: 68f8 ldr r0, [r7, #12]
8008ee6: f7ff fe83 bl 8008bf0 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
8008eea: 68fb ldr r3, [r7, #12]
8008eec: 2200 movs r2, #0
8008eee: f883 22a0 strb.w r2, [r3, #672] ; 0x2a0
8008ef2: e015 b.n 8008f20 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
8008ef4: 68fb ldr r3, [r7, #12]
8008ef6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008efa: 695b ldr r3, [r3, #20]
8008efc: 2b00 cmp r3, #0
8008efe: d00d beq.n 8008f1c <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008f00: 68fb ldr r3, [r7, #12]
8008f02: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
8008f06: 2b03 cmp r3, #3
8008f08: d108 bne.n 8008f1c <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
8008f0a: 68fb ldr r3, [r7, #12]
8008f0c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008f10: 695b ldr r3, [r3, #20]
8008f12: 7afa ldrb r2, [r7, #11]
8008f14: 4611 mov r1, r2
8008f16: 68f8 ldr r0, [r7, #12]
8008f18: 4798 blx r3
8008f1a: e001 b.n 8008f20 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8008f1c: 2302 movs r3, #2
8008f1e: e000 b.n 8008f22 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
8008f20: 2300 movs r3, #0
}
8008f22: 4618 mov r0, r3
8008f24: 3718 adds r7, #24
8008f26: 46bd mov sp, r7
8008f28: bd80 pop {r7, pc}
08008f2a <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
8008f2a: b580 push {r7, lr}
8008f2c: b082 sub sp, #8
8008f2e: af00 add r7, sp, #0
8008f30: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8008f32: 2340 movs r3, #64 ; 0x40
8008f34: 2200 movs r2, #0
8008f36: 2100 movs r1, #0
8008f38: 6878 ldr r0, [r7, #4]
8008f3a: f001 f974 bl 800a226 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
8008f3e: 687b ldr r3, [r7, #4]
8008f40: 2201 movs r2, #1
8008f42: f8c3 2158 str.w r2, [r3, #344] ; 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
8008f46: 687b ldr r3, [r7, #4]
8008f48: 2240 movs r2, #64 ; 0x40
8008f4a: f8c3 2164 str.w r2, [r3, #356] ; 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8008f4e: 2340 movs r3, #64 ; 0x40
8008f50: 2200 movs r2, #0
8008f52: 2180 movs r1, #128 ; 0x80
8008f54: 6878 ldr r0, [r7, #4]
8008f56: f001 f966 bl 800a226 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
8008f5a: 687b ldr r3, [r7, #4]
8008f5c: 2201 movs r2, #1
8008f5e: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
8008f60: 687b ldr r3, [r7, #4]
8008f62: 2240 movs r2, #64 ; 0x40
8008f64: 625a str r2, [r3, #36] ; 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
8008f66: 687b ldr r3, [r7, #4]
8008f68: 2201 movs r2, #1
8008f6a: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
8008f6e: 687b ldr r3, [r7, #4]
8008f70: 2200 movs r2, #0
8008f72: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->dev_config = 0U;
8008f76: 687b ldr r3, [r7, #4]
8008f78: 2200 movs r2, #0
8008f7a: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
8008f7c: 687b ldr r3, [r7, #4]
8008f7e: 2200 movs r2, #0
8008f80: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
if (pdev->pClassData)
8008f84: 687b ldr r3, [r7, #4]
8008f86: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008f8a: 2b00 cmp r3, #0
8008f8c: d009 beq.n 8008fa2 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
8008f8e: 687b ldr r3, [r7, #4]
8008f90: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008f94: 685b ldr r3, [r3, #4]
8008f96: 687a ldr r2, [r7, #4]
8008f98: 6852 ldr r2, [r2, #4]
8008f9a: b2d2 uxtb r2, r2
8008f9c: 4611 mov r1, r2
8008f9e: 6878 ldr r0, [r7, #4]
8008fa0: 4798 blx r3
}
return USBD_OK;
8008fa2: 2300 movs r3, #0
}
8008fa4: 4618 mov r0, r3
8008fa6: 3708 adds r7, #8
8008fa8: 46bd mov sp, r7
8008faa: bd80 pop {r7, pc}
08008fac <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
8008fac: b480 push {r7}
8008fae: b083 sub sp, #12
8008fb0: af00 add r7, sp, #0
8008fb2: 6078 str r0, [r7, #4]
8008fb4: 460b mov r3, r1
8008fb6: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
8008fb8: 687b ldr r3, [r7, #4]
8008fba: 78fa ldrb r2, [r7, #3]
8008fbc: 741a strb r2, [r3, #16]
return USBD_OK;
8008fbe: 2300 movs r3, #0
}
8008fc0: 4618 mov r0, r3
8008fc2: 370c adds r7, #12
8008fc4: 46bd mov sp, r7
8008fc6: bc80 pop {r7}
8008fc8: 4770 bx lr
08008fca <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8008fca: b480 push {r7}
8008fcc: b083 sub sp, #12
8008fce: af00 add r7, sp, #0
8008fd0: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
8008fd2: 687b ldr r3, [r7, #4]
8008fd4: f893 229c ldrb.w r2, [r3, #668] ; 0x29c
8008fd8: 687b ldr r3, [r7, #4]
8008fda: f883 229d strb.w r2, [r3, #669] ; 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
8008fde: 687b ldr r3, [r7, #4]
8008fe0: 2204 movs r2, #4
8008fe2: f883 229c strb.w r2, [r3, #668] ; 0x29c
return USBD_OK;
8008fe6: 2300 movs r3, #0
}
8008fe8: 4618 mov r0, r3
8008fea: 370c adds r7, #12
8008fec: 46bd mov sp, r7
8008fee: bc80 pop {r7}
8008ff0: 4770 bx lr
08008ff2 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
8008ff2: b480 push {r7}
8008ff4: b083 sub sp, #12
8008ff6: af00 add r7, sp, #0
8008ff8: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8008ffa: 687b ldr r3, [r7, #4]
8008ffc: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009000: 2b04 cmp r3, #4
8009002: d105 bne.n 8009010 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
8009004: 687b ldr r3, [r7, #4]
8009006: f893 229d ldrb.w r2, [r3, #669] ; 0x29d
800900a: 687b ldr r3, [r7, #4]
800900c: f883 229c strb.w r2, [r3, #668] ; 0x29c
}
return USBD_OK;
8009010: 2300 movs r3, #0
}
8009012: 4618 mov r0, r3
8009014: 370c adds r7, #12
8009016: 46bd mov sp, r7
8009018: bc80 pop {r7}
800901a: 4770 bx lr
0800901c <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800901c: b580 push {r7, lr}
800901e: b082 sub sp, #8
8009020: af00 add r7, sp, #0
8009022: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8009024: 687b ldr r3, [r7, #4]
8009026: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
800902a: 2b03 cmp r3, #3
800902c: d10b bne.n 8009046 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800902e: 687b ldr r3, [r7, #4]
8009030: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8009034: 69db ldr r3, [r3, #28]
8009036: 2b00 cmp r3, #0
8009038: d005 beq.n 8009046 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800903a: 687b ldr r3, [r7, #4]
800903c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8009040: 69db ldr r3, [r3, #28]
8009042: 6878 ldr r0, [r7, #4]
8009044: 4798 blx r3
}
}
return USBD_OK;
8009046: 2300 movs r3, #0
}
8009048: 4618 mov r0, r3
800904a: 3708 adds r7, #8
800904c: 46bd mov sp, r7
800904e: bd80 pop {r7, pc}
08009050 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009050: b580 push {r7, lr}
8009052: b084 sub sp, #16
8009054: af00 add r7, sp, #0
8009056: 6078 str r0, [r7, #4]
8009058: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800905a: 2300 movs r3, #0
800905c: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800905e: 683b ldr r3, [r7, #0]
8009060: 781b ldrb r3, [r3, #0]
8009062: f003 0360 and.w r3, r3, #96 ; 0x60
8009066: 2b20 cmp r3, #32
8009068: d004 beq.n 8009074 <USBD_StdDevReq+0x24>
800906a: 2b40 cmp r3, #64 ; 0x40
800906c: d002 beq.n 8009074 <USBD_StdDevReq+0x24>
800906e: 2b00 cmp r3, #0
8009070: d008 beq.n 8009084 <USBD_StdDevReq+0x34>
8009072: e04c b.n 800910e <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8009074: 687b ldr r3, [r7, #4]
8009076: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800907a: 689b ldr r3, [r3, #8]
800907c: 6839 ldr r1, [r7, #0]
800907e: 6878 ldr r0, [r7, #4]
8009080: 4798 blx r3
break;
8009082: e049 b.n 8009118 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8009084: 683b ldr r3, [r7, #0]
8009086: 785b ldrb r3, [r3, #1]
8009088: 2b09 cmp r3, #9
800908a: d83a bhi.n 8009102 <USBD_StdDevReq+0xb2>
800908c: a201 add r2, pc, #4 ; (adr r2, 8009094 <USBD_StdDevReq+0x44>)
800908e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009092: bf00 nop
8009094: 080090e5 .word 0x080090e5
8009098: 080090f9 .word 0x080090f9
800909c: 08009103 .word 0x08009103
80090a0: 080090ef .word 0x080090ef
80090a4: 08009103 .word 0x08009103
80090a8: 080090c7 .word 0x080090c7
80090ac: 080090bd .word 0x080090bd
80090b0: 08009103 .word 0x08009103
80090b4: 080090db .word 0x080090db
80090b8: 080090d1 .word 0x080090d1
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
80090bc: 6839 ldr r1, [r7, #0]
80090be: 6878 ldr r0, [r7, #4]
80090c0: f000 f9d4 bl 800946c <USBD_GetDescriptor>
break;
80090c4: e022 b.n 800910c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
80090c6: 6839 ldr r1, [r7, #0]
80090c8: 6878 ldr r0, [r7, #4]
80090ca: f000 fb37 bl 800973c <USBD_SetAddress>
break;
80090ce: e01d b.n 800910c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
80090d0: 6839 ldr r1, [r7, #0]
80090d2: 6878 ldr r0, [r7, #4]
80090d4: f000 fb74 bl 80097c0 <USBD_SetConfig>
break;
80090d8: e018 b.n 800910c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
80090da: 6839 ldr r1, [r7, #0]
80090dc: 6878 ldr r0, [r7, #4]
80090de: f000 fbfd bl 80098dc <USBD_GetConfig>
break;
80090e2: e013 b.n 800910c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
80090e4: 6839 ldr r1, [r7, #0]
80090e6: 6878 ldr r0, [r7, #4]
80090e8: f000 fc2c bl 8009944 <USBD_GetStatus>
break;
80090ec: e00e b.n 800910c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
80090ee: 6839 ldr r1, [r7, #0]
80090f0: 6878 ldr r0, [r7, #4]
80090f2: f000 fc5a bl 80099aa <USBD_SetFeature>
break;
80090f6: e009 b.n 800910c <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
80090f8: 6839 ldr r1, [r7, #0]
80090fa: 6878 ldr r0, [r7, #4]
80090fc: f000 fc69 bl 80099d2 <USBD_ClrFeature>
break;
8009100: e004 b.n 800910c <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
8009102: 6839 ldr r1, [r7, #0]
8009104: 6878 ldr r0, [r7, #4]
8009106: f000 fcc1 bl 8009a8c <USBD_CtlError>
break;
800910a: bf00 nop
}
break;
800910c: e004 b.n 8009118 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800910e: 6839 ldr r1, [r7, #0]
8009110: 6878 ldr r0, [r7, #4]
8009112: f000 fcbb bl 8009a8c <USBD_CtlError>
break;
8009116: bf00 nop
}
return ret;
8009118: 7bfb ldrb r3, [r7, #15]
}
800911a: 4618 mov r0, r3
800911c: 3710 adds r7, #16
800911e: 46bd mov sp, r7
8009120: bd80 pop {r7, pc}
8009122: bf00 nop
08009124 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009124: b580 push {r7, lr}
8009126: b084 sub sp, #16
8009128: af00 add r7, sp, #0
800912a: 6078 str r0, [r7, #4]
800912c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800912e: 2300 movs r3, #0
8009130: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8009132: 683b ldr r3, [r7, #0]
8009134: 781b ldrb r3, [r3, #0]
8009136: f003 0360 and.w r3, r3, #96 ; 0x60
800913a: 2b20 cmp r3, #32
800913c: d003 beq.n 8009146 <USBD_StdItfReq+0x22>
800913e: 2b40 cmp r3, #64 ; 0x40
8009140: d001 beq.n 8009146 <USBD_StdItfReq+0x22>
8009142: 2b00 cmp r3, #0
8009144: d12a bne.n 800919c <USBD_StdItfReq+0x78>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
8009146: 687b ldr r3, [r7, #4]
8009148: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
800914c: 3b01 subs r3, #1
800914e: 2b02 cmp r3, #2
8009150: d81d bhi.n 800918e <USBD_StdItfReq+0x6a>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
8009152: 683b ldr r3, [r7, #0]
8009154: 889b ldrh r3, [r3, #4]
8009156: b2db uxtb r3, r3
8009158: 2b01 cmp r3, #1
800915a: d813 bhi.n 8009184 <USBD_StdItfReq+0x60>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800915c: 687b ldr r3, [r7, #4]
800915e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8009162: 689b ldr r3, [r3, #8]
8009164: 6839 ldr r1, [r7, #0]
8009166: 6878 ldr r0, [r7, #4]
8009168: 4798 blx r3
800916a: 4603 mov r3, r0
800916c: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800916e: 683b ldr r3, [r7, #0]
8009170: 88db ldrh r3, [r3, #6]
8009172: 2b00 cmp r3, #0
8009174: d110 bne.n 8009198 <USBD_StdItfReq+0x74>
8009176: 7bfb ldrb r3, [r7, #15]
8009178: 2b00 cmp r3, #0
800917a: d10d bne.n 8009198 <USBD_StdItfReq+0x74>
{
USBD_CtlSendStatus(pdev);
800917c: 6878 ldr r0, [r7, #4]
800917e: f000 fd2f bl 8009be0 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8009182: e009 b.n 8009198 <USBD_StdItfReq+0x74>
USBD_CtlError(pdev, req);
8009184: 6839 ldr r1, [r7, #0]
8009186: 6878 ldr r0, [r7, #4]
8009188: f000 fc80 bl 8009a8c <USBD_CtlError>
break;
800918c: e004 b.n 8009198 <USBD_StdItfReq+0x74>
default:
USBD_CtlError(pdev, req);
800918e: 6839 ldr r1, [r7, #0]
8009190: 6878 ldr r0, [r7, #4]
8009192: f000 fc7b bl 8009a8c <USBD_CtlError>
break;
8009196: e000 b.n 800919a <USBD_StdItfReq+0x76>
break;
8009198: bf00 nop
}
break;
800919a: e004 b.n 80091a6 <USBD_StdItfReq+0x82>
default:
USBD_CtlError(pdev, req);
800919c: 6839 ldr r1, [r7, #0]
800919e: 6878 ldr r0, [r7, #4]
80091a0: f000 fc74 bl 8009a8c <USBD_CtlError>
break;
80091a4: bf00 nop
}
return USBD_OK;
80091a6: 2300 movs r3, #0
}
80091a8: 4618 mov r0, r3
80091aa: 3710 adds r7, #16
80091ac: 46bd mov sp, r7
80091ae: bd80 pop {r7, pc}
080091b0 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80091b0: b580 push {r7, lr}
80091b2: b084 sub sp, #16
80091b4: af00 add r7, sp, #0
80091b6: 6078 str r0, [r7, #4]
80091b8: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
80091ba: 2300 movs r3, #0
80091bc: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
80091be: 683b ldr r3, [r7, #0]
80091c0: 889b ldrh r3, [r3, #4]
80091c2: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
80091c4: 683b ldr r3, [r7, #0]
80091c6: 781b ldrb r3, [r3, #0]
80091c8: f003 0360 and.w r3, r3, #96 ; 0x60
80091cc: 2b20 cmp r3, #32
80091ce: d004 beq.n 80091da <USBD_StdEPReq+0x2a>
80091d0: 2b40 cmp r3, #64 ; 0x40
80091d2: d002 beq.n 80091da <USBD_StdEPReq+0x2a>
80091d4: 2b00 cmp r3, #0
80091d6: d008 beq.n 80091ea <USBD_StdEPReq+0x3a>
80091d8: e13d b.n 8009456 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
80091da: 687b ldr r3, [r7, #4]
80091dc: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80091e0: 689b ldr r3, [r3, #8]
80091e2: 6839 ldr r1, [r7, #0]
80091e4: 6878 ldr r0, [r7, #4]
80091e6: 4798 blx r3
break;
80091e8: e13a b.n 8009460 <USBD_StdEPReq+0x2b0>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
80091ea: 683b ldr r3, [r7, #0]
80091ec: 781b ldrb r3, [r3, #0]
80091ee: f003 0360 and.w r3, r3, #96 ; 0x60
80091f2: 2b20 cmp r3, #32
80091f4: d10a bne.n 800920c <USBD_StdEPReq+0x5c>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
80091f6: 687b ldr r3, [r7, #4]
80091f8: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80091fc: 689b ldr r3, [r3, #8]
80091fe: 6839 ldr r1, [r7, #0]
8009200: 6878 ldr r0, [r7, #4]
8009202: 4798 blx r3
8009204: 4603 mov r3, r0
8009206: 73fb strb r3, [r7, #15]
return ret;
8009208: 7bfb ldrb r3, [r7, #15]
800920a: e12a b.n 8009462 <USBD_StdEPReq+0x2b2>
}
switch (req->bRequest)
800920c: 683b ldr r3, [r7, #0]
800920e: 785b ldrb r3, [r3, #1]
8009210: 2b01 cmp r3, #1
8009212: d03e beq.n 8009292 <USBD_StdEPReq+0xe2>
8009214: 2b03 cmp r3, #3
8009216: d002 beq.n 800921e <USBD_StdEPReq+0x6e>
8009218: 2b00 cmp r3, #0
800921a: d070 beq.n 80092fe <USBD_StdEPReq+0x14e>
800921c: e115 b.n 800944a <USBD_StdEPReq+0x29a>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800921e: 687b ldr r3, [r7, #4]
8009220: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009224: 2b02 cmp r3, #2
8009226: d002 beq.n 800922e <USBD_StdEPReq+0x7e>
8009228: 2b03 cmp r3, #3
800922a: d015 beq.n 8009258 <USBD_StdEPReq+0xa8>
800922c: e02b b.n 8009286 <USBD_StdEPReq+0xd6>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800922e: 7bbb ldrb r3, [r7, #14]
8009230: 2b00 cmp r3, #0
8009232: d00c beq.n 800924e <USBD_StdEPReq+0x9e>
8009234: 7bbb ldrb r3, [r7, #14]
8009236: 2b80 cmp r3, #128 ; 0x80
8009238: d009 beq.n 800924e <USBD_StdEPReq+0x9e>
{
USBD_LL_StallEP(pdev, ep_addr);
800923a: 7bbb ldrb r3, [r7, #14]
800923c: 4619 mov r1, r3
800923e: 6878 ldr r0, [r7, #4]
8009240: f001 f855 bl 800a2ee <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8009244: 2180 movs r1, #128 ; 0x80
8009246: 6878 ldr r0, [r7, #4]
8009248: f001 f851 bl 800a2ee <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800924c: e020 b.n 8009290 <USBD_StdEPReq+0xe0>
USBD_CtlError(pdev, req);
800924e: 6839 ldr r1, [r7, #0]
8009250: 6878 ldr r0, [r7, #4]
8009252: f000 fc1b bl 8009a8c <USBD_CtlError>
break;
8009256: e01b b.n 8009290 <USBD_StdEPReq+0xe0>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8009258: 683b ldr r3, [r7, #0]
800925a: 885b ldrh r3, [r3, #2]
800925c: 2b00 cmp r3, #0
800925e: d10e bne.n 800927e <USBD_StdEPReq+0xce>
{
if ((ep_addr != 0x00U) &&
8009260: 7bbb ldrb r3, [r7, #14]
8009262: 2b00 cmp r3, #0
8009264: d00b beq.n 800927e <USBD_StdEPReq+0xce>
8009266: 7bbb ldrb r3, [r7, #14]
8009268: 2b80 cmp r3, #128 ; 0x80
800926a: d008 beq.n 800927e <USBD_StdEPReq+0xce>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800926c: 683b ldr r3, [r7, #0]
800926e: 88db ldrh r3, [r3, #6]
8009270: 2b00 cmp r3, #0
8009272: d104 bne.n 800927e <USBD_StdEPReq+0xce>
{
USBD_LL_StallEP(pdev, ep_addr);
8009274: 7bbb ldrb r3, [r7, #14]
8009276: 4619 mov r1, r3
8009278: 6878 ldr r0, [r7, #4]
800927a: f001 f838 bl 800a2ee <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800927e: 6878 ldr r0, [r7, #4]
8009280: f000 fcae bl 8009be0 <USBD_CtlSendStatus>
break;
8009284: e004 b.n 8009290 <USBD_StdEPReq+0xe0>
default:
USBD_CtlError(pdev, req);
8009286: 6839 ldr r1, [r7, #0]
8009288: 6878 ldr r0, [r7, #4]
800928a: f000 fbff bl 8009a8c <USBD_CtlError>
break;
800928e: bf00 nop
}
break;
8009290: e0e0 b.n 8009454 <USBD_StdEPReq+0x2a4>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
8009292: 687b ldr r3, [r7, #4]
8009294: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009298: 2b02 cmp r3, #2
800929a: d002 beq.n 80092a2 <USBD_StdEPReq+0xf2>
800929c: 2b03 cmp r3, #3
800929e: d015 beq.n 80092cc <USBD_StdEPReq+0x11c>
80092a0: e026 b.n 80092f0 <USBD_StdEPReq+0x140>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
80092a2: 7bbb ldrb r3, [r7, #14]
80092a4: 2b00 cmp r3, #0
80092a6: d00c beq.n 80092c2 <USBD_StdEPReq+0x112>
80092a8: 7bbb ldrb r3, [r7, #14]
80092aa: 2b80 cmp r3, #128 ; 0x80
80092ac: d009 beq.n 80092c2 <USBD_StdEPReq+0x112>
{
USBD_LL_StallEP(pdev, ep_addr);
80092ae: 7bbb ldrb r3, [r7, #14]
80092b0: 4619 mov r1, r3
80092b2: 6878 ldr r0, [r7, #4]
80092b4: f001 f81b bl 800a2ee <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
80092b8: 2180 movs r1, #128 ; 0x80
80092ba: 6878 ldr r0, [r7, #4]
80092bc: f001 f817 bl 800a2ee <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80092c0: e01c b.n 80092fc <USBD_StdEPReq+0x14c>
USBD_CtlError(pdev, req);
80092c2: 6839 ldr r1, [r7, #0]
80092c4: 6878 ldr r0, [r7, #4]
80092c6: f000 fbe1 bl 8009a8c <USBD_CtlError>
break;
80092ca: e017 b.n 80092fc <USBD_StdEPReq+0x14c>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
80092cc: 683b ldr r3, [r7, #0]
80092ce: 885b ldrh r3, [r3, #2]
80092d0: 2b00 cmp r3, #0
80092d2: d112 bne.n 80092fa <USBD_StdEPReq+0x14a>
{
if ((ep_addr & 0x7FU) != 0x00U)
80092d4: 7bbb ldrb r3, [r7, #14]
80092d6: f003 037f and.w r3, r3, #127 ; 0x7f
80092da: 2b00 cmp r3, #0
80092dc: d004 beq.n 80092e8 <USBD_StdEPReq+0x138>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
80092de: 7bbb ldrb r3, [r7, #14]
80092e0: 4619 mov r1, r3
80092e2: 6878 ldr r0, [r7, #4]
80092e4: f001 f822 bl 800a32c <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
80092e8: 6878 ldr r0, [r7, #4]
80092ea: f000 fc79 bl 8009be0 <USBD_CtlSendStatus>
}
break;
80092ee: e004 b.n 80092fa <USBD_StdEPReq+0x14a>
default:
USBD_CtlError(pdev, req);
80092f0: 6839 ldr r1, [r7, #0]
80092f2: 6878 ldr r0, [r7, #4]
80092f4: f000 fbca bl 8009a8c <USBD_CtlError>
break;
80092f8: e000 b.n 80092fc <USBD_StdEPReq+0x14c>
break;
80092fa: bf00 nop
}
break;
80092fc: e0aa b.n 8009454 <USBD_StdEPReq+0x2a4>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
80092fe: 687b ldr r3, [r7, #4]
8009300: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009304: 2b02 cmp r3, #2
8009306: d002 beq.n 800930e <USBD_StdEPReq+0x15e>
8009308: 2b03 cmp r3, #3
800930a: d032 beq.n 8009372 <USBD_StdEPReq+0x1c2>
800930c: e097 b.n 800943e <USBD_StdEPReq+0x28e>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800930e: 7bbb ldrb r3, [r7, #14]
8009310: 2b00 cmp r3, #0
8009312: d007 beq.n 8009324 <USBD_StdEPReq+0x174>
8009314: 7bbb ldrb r3, [r7, #14]
8009316: 2b80 cmp r3, #128 ; 0x80
8009318: d004 beq.n 8009324 <USBD_StdEPReq+0x174>
{
USBD_CtlError(pdev, req);
800931a: 6839 ldr r1, [r7, #0]
800931c: 6878 ldr r0, [r7, #4]
800931e: f000 fbb5 bl 8009a8c <USBD_CtlError>
break;
8009322: e091 b.n 8009448 <USBD_StdEPReq+0x298>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8009324: f997 300e ldrsb.w r3, [r7, #14]
8009328: 2b00 cmp r3, #0
800932a: da0b bge.n 8009344 <USBD_StdEPReq+0x194>
800932c: 7bbb ldrb r3, [r7, #14]
800932e: f003 027f and.w r2, r3, #127 ; 0x7f
8009332: 4613 mov r3, r2
8009334: 009b lsls r3, r3, #2
8009336: 4413 add r3, r2
8009338: 009b lsls r3, r3, #2
800933a: 3310 adds r3, #16
800933c: 687a ldr r2, [r7, #4]
800933e: 4413 add r3, r2
8009340: 3304 adds r3, #4
8009342: e00b b.n 800935c <USBD_StdEPReq+0x1ac>
&pdev->ep_out[ep_addr & 0x7FU];
8009344: 7bbb ldrb r3, [r7, #14]
8009346: f003 027f and.w r2, r3, #127 ; 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800934a: 4613 mov r3, r2
800934c: 009b lsls r3, r3, #2
800934e: 4413 add r3, r2
8009350: 009b lsls r3, r3, #2
8009352: f503 73a8 add.w r3, r3, #336 ; 0x150
8009356: 687a ldr r2, [r7, #4]
8009358: 4413 add r3, r2
800935a: 3304 adds r3, #4
800935c: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800935e: 68bb ldr r3, [r7, #8]
8009360: 2200 movs r2, #0
8009362: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8009364: 68bb ldr r3, [r7, #8]
8009366: 2202 movs r2, #2
8009368: 4619 mov r1, r3
800936a: 6878 ldr r0, [r7, #4]
800936c: f000 fbf8 bl 8009b60 <USBD_CtlSendData>
break;
8009370: e06a b.n 8009448 <USBD_StdEPReq+0x298>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
8009372: f997 300e ldrsb.w r3, [r7, #14]
8009376: 2b00 cmp r3, #0
8009378: da11 bge.n 800939e <USBD_StdEPReq+0x1ee>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800937a: 7bbb ldrb r3, [r7, #14]
800937c: f003 020f and.w r2, r3, #15
8009380: 6879 ldr r1, [r7, #4]
8009382: 4613 mov r3, r2
8009384: 009b lsls r3, r3, #2
8009386: 4413 add r3, r2
8009388: 009b lsls r3, r3, #2
800938a: 440b add r3, r1
800938c: 3318 adds r3, #24
800938e: 681b ldr r3, [r3, #0]
8009390: 2b00 cmp r3, #0
8009392: d117 bne.n 80093c4 <USBD_StdEPReq+0x214>
{
USBD_CtlError(pdev, req);
8009394: 6839 ldr r1, [r7, #0]
8009396: 6878 ldr r0, [r7, #4]
8009398: f000 fb78 bl 8009a8c <USBD_CtlError>
break;
800939c: e054 b.n 8009448 <USBD_StdEPReq+0x298>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800939e: 7bbb ldrb r3, [r7, #14]
80093a0: f003 020f and.w r2, r3, #15
80093a4: 6879 ldr r1, [r7, #4]
80093a6: 4613 mov r3, r2
80093a8: 009b lsls r3, r3, #2
80093aa: 4413 add r3, r2
80093ac: 009b lsls r3, r3, #2
80093ae: 440b add r3, r1
80093b0: f503 73ac add.w r3, r3, #344 ; 0x158
80093b4: 681b ldr r3, [r3, #0]
80093b6: 2b00 cmp r3, #0
80093b8: d104 bne.n 80093c4 <USBD_StdEPReq+0x214>
{
USBD_CtlError(pdev, req);
80093ba: 6839 ldr r1, [r7, #0]
80093bc: 6878 ldr r0, [r7, #4]
80093be: f000 fb65 bl 8009a8c <USBD_CtlError>
break;
80093c2: e041 b.n 8009448 <USBD_StdEPReq+0x298>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
80093c4: f997 300e ldrsb.w r3, [r7, #14]
80093c8: 2b00 cmp r3, #0
80093ca: da0b bge.n 80093e4 <USBD_StdEPReq+0x234>
80093cc: 7bbb ldrb r3, [r7, #14]
80093ce: f003 027f and.w r2, r3, #127 ; 0x7f
80093d2: 4613 mov r3, r2
80093d4: 009b lsls r3, r3, #2
80093d6: 4413 add r3, r2
80093d8: 009b lsls r3, r3, #2
80093da: 3310 adds r3, #16
80093dc: 687a ldr r2, [r7, #4]
80093de: 4413 add r3, r2
80093e0: 3304 adds r3, #4
80093e2: e00b b.n 80093fc <USBD_StdEPReq+0x24c>
&pdev->ep_out[ep_addr & 0x7FU];
80093e4: 7bbb ldrb r3, [r7, #14]
80093e6: f003 027f and.w r2, r3, #127 ; 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
80093ea: 4613 mov r3, r2
80093ec: 009b lsls r3, r3, #2
80093ee: 4413 add r3, r2
80093f0: 009b lsls r3, r3, #2
80093f2: f503 73a8 add.w r3, r3, #336 ; 0x150
80093f6: 687a ldr r2, [r7, #4]
80093f8: 4413 add r3, r2
80093fa: 3304 adds r3, #4
80093fc: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
80093fe: 7bbb ldrb r3, [r7, #14]
8009400: 2b00 cmp r3, #0
8009402: d002 beq.n 800940a <USBD_StdEPReq+0x25a>
8009404: 7bbb ldrb r3, [r7, #14]
8009406: 2b80 cmp r3, #128 ; 0x80
8009408: d103 bne.n 8009412 <USBD_StdEPReq+0x262>
{
pep->status = 0x0000U;
800940a: 68bb ldr r3, [r7, #8]
800940c: 2200 movs r2, #0
800940e: 601a str r2, [r3, #0]
8009410: e00e b.n 8009430 <USBD_StdEPReq+0x280>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
8009412: 7bbb ldrb r3, [r7, #14]
8009414: 4619 mov r1, r3
8009416: 6878 ldr r0, [r7, #4]
8009418: f000 ffa7 bl 800a36a <USBD_LL_IsStallEP>
800941c: 4603 mov r3, r0
800941e: 2b00 cmp r3, #0
8009420: d003 beq.n 800942a <USBD_StdEPReq+0x27a>
{
pep->status = 0x0001U;
8009422: 68bb ldr r3, [r7, #8]
8009424: 2201 movs r2, #1
8009426: 601a str r2, [r3, #0]
8009428: e002 b.n 8009430 <USBD_StdEPReq+0x280>
}
else
{
pep->status = 0x0000U;
800942a: 68bb ldr r3, [r7, #8]
800942c: 2200 movs r2, #0
800942e: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8009430: 68bb ldr r3, [r7, #8]
8009432: 2202 movs r2, #2
8009434: 4619 mov r1, r3
8009436: 6878 ldr r0, [r7, #4]
8009438: f000 fb92 bl 8009b60 <USBD_CtlSendData>
break;
800943c: e004 b.n 8009448 <USBD_StdEPReq+0x298>
default:
USBD_CtlError(pdev, req);
800943e: 6839 ldr r1, [r7, #0]
8009440: 6878 ldr r0, [r7, #4]
8009442: f000 fb23 bl 8009a8c <USBD_CtlError>
break;
8009446: bf00 nop
}
break;
8009448: e004 b.n 8009454 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800944a: 6839 ldr r1, [r7, #0]
800944c: 6878 ldr r0, [r7, #4]
800944e: f000 fb1d bl 8009a8c <USBD_CtlError>
break;
8009452: bf00 nop
}
break;
8009454: e004 b.n 8009460 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
8009456: 6839 ldr r1, [r7, #0]
8009458: 6878 ldr r0, [r7, #4]
800945a: f000 fb17 bl 8009a8c <USBD_CtlError>
break;
800945e: bf00 nop
}
return ret;
8009460: 7bfb ldrb r3, [r7, #15]
}
8009462: 4618 mov r0, r3
8009464: 3710 adds r7, #16
8009466: 46bd mov sp, r7
8009468: bd80 pop {r7, pc}
...
0800946c <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800946c: b580 push {r7, lr}
800946e: b084 sub sp, #16
8009470: af00 add r7, sp, #0
8009472: 6078 str r0, [r7, #4]
8009474: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8009476: 2300 movs r3, #0
8009478: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800947a: 2300 movs r3, #0
800947c: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800947e: 2300 movs r3, #0
8009480: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
8009482: 683b ldr r3, [r7, #0]
8009484: 885b ldrh r3, [r3, #2]
8009486: 0a1b lsrs r3, r3, #8
8009488: b29b uxth r3, r3
800948a: 3b01 subs r3, #1
800948c: 2b06 cmp r3, #6
800948e: f200 8128 bhi.w 80096e2 <USBD_GetDescriptor+0x276>
8009492: a201 add r2, pc, #4 ; (adr r2, 8009498 <USBD_GetDescriptor+0x2c>)
8009494: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009498: 080094b5 .word 0x080094b5
800949c: 080094cd .word 0x080094cd
80094a0: 0800950d .word 0x0800950d
80094a4: 080096e3 .word 0x080096e3
80094a8: 080096e3 .word 0x080096e3
80094ac: 08009683 .word 0x08009683
80094b0: 080096af .word 0x080096af
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
80094b4: 687b ldr r3, [r7, #4]
80094b6: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80094ba: 681b ldr r3, [r3, #0]
80094bc: 687a ldr r2, [r7, #4]
80094be: 7c12 ldrb r2, [r2, #16]
80094c0: f107 0108 add.w r1, r7, #8
80094c4: 4610 mov r0, r2
80094c6: 4798 blx r3
80094c8: 60f8 str r0, [r7, #12]
break;
80094ca: e112 b.n 80096f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80094cc: 687b ldr r3, [r7, #4]
80094ce: 7c1b ldrb r3, [r3, #16]
80094d0: 2b00 cmp r3, #0
80094d2: d10d bne.n 80094f0 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
80094d4: 687b ldr r3, [r7, #4]
80094d6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80094da: 6a9b ldr r3, [r3, #40] ; 0x28
80094dc: f107 0208 add.w r2, r7, #8
80094e0: 4610 mov r0, r2
80094e2: 4798 blx r3
80094e4: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
80094e6: 68fb ldr r3, [r7, #12]
80094e8: 3301 adds r3, #1
80094ea: 2202 movs r2, #2
80094ec: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
80094ee: e100 b.n 80096f2 <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
80094f0: 687b ldr r3, [r7, #4]
80094f2: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80094f6: 6adb ldr r3, [r3, #44] ; 0x2c
80094f8: f107 0208 add.w r2, r7, #8
80094fc: 4610 mov r0, r2
80094fe: 4798 blx r3
8009500: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8009502: 68fb ldr r3, [r7, #12]
8009504: 3301 adds r3, #1
8009506: 2202 movs r2, #2
8009508: 701a strb r2, [r3, #0]
break;
800950a: e0f2 b.n 80096f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800950c: 683b ldr r3, [r7, #0]
800950e: 885b ldrh r3, [r3, #2]
8009510: b2db uxtb r3, r3
8009512: 2b05 cmp r3, #5
8009514: f200 80ac bhi.w 8009670 <USBD_GetDescriptor+0x204>
8009518: a201 add r2, pc, #4 ; (adr r2, 8009520 <USBD_GetDescriptor+0xb4>)
800951a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800951e: bf00 nop
8009520: 08009539 .word 0x08009539
8009524: 0800956d .word 0x0800956d
8009528: 080095a1 .word 0x080095a1
800952c: 080095d5 .word 0x080095d5
8009530: 08009609 .word 0x08009609
8009534: 0800963d .word 0x0800963d
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8009538: 687b ldr r3, [r7, #4]
800953a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800953e: 685b ldr r3, [r3, #4]
8009540: 2b00 cmp r3, #0
8009542: d00b beq.n 800955c <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
8009544: 687b ldr r3, [r7, #4]
8009546: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800954a: 685b ldr r3, [r3, #4]
800954c: 687a ldr r2, [r7, #4]
800954e: 7c12 ldrb r2, [r2, #16]
8009550: f107 0108 add.w r1, r7, #8
8009554: 4610 mov r0, r2
8009556: 4798 blx r3
8009558: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800955a: e091 b.n 8009680 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800955c: 6839 ldr r1, [r7, #0]
800955e: 6878 ldr r0, [r7, #4]
8009560: f000 fa94 bl 8009a8c <USBD_CtlError>
err++;
8009564: 7afb ldrb r3, [r7, #11]
8009566: 3301 adds r3, #1
8009568: 72fb strb r3, [r7, #11]
break;
800956a: e089 b.n 8009680 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800956c: 687b ldr r3, [r7, #4]
800956e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8009572: 689b ldr r3, [r3, #8]
8009574: 2b00 cmp r3, #0
8009576: d00b beq.n 8009590 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
8009578: 687b ldr r3, [r7, #4]
800957a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800957e: 689b ldr r3, [r3, #8]
8009580: 687a ldr r2, [r7, #4]
8009582: 7c12 ldrb r2, [r2, #16]
8009584: f107 0108 add.w r1, r7, #8
8009588: 4610 mov r0, r2
800958a: 4798 blx r3
800958c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800958e: e077 b.n 8009680 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009590: 6839 ldr r1, [r7, #0]
8009592: 6878 ldr r0, [r7, #4]
8009594: f000 fa7a bl 8009a8c <USBD_CtlError>
err++;
8009598: 7afb ldrb r3, [r7, #11]
800959a: 3301 adds r3, #1
800959c: 72fb strb r3, [r7, #11]
break;
800959e: e06f b.n 8009680 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
80095a0: 687b ldr r3, [r7, #4]
80095a2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80095a6: 68db ldr r3, [r3, #12]
80095a8: 2b00 cmp r3, #0
80095aa: d00b beq.n 80095c4 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
80095ac: 687b ldr r3, [r7, #4]
80095ae: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80095b2: 68db ldr r3, [r3, #12]
80095b4: 687a ldr r2, [r7, #4]
80095b6: 7c12 ldrb r2, [r2, #16]
80095b8: f107 0108 add.w r1, r7, #8
80095bc: 4610 mov r0, r2
80095be: 4798 blx r3
80095c0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80095c2: e05d b.n 8009680 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80095c4: 6839 ldr r1, [r7, #0]
80095c6: 6878 ldr r0, [r7, #4]
80095c8: f000 fa60 bl 8009a8c <USBD_CtlError>
err++;
80095cc: 7afb ldrb r3, [r7, #11]
80095ce: 3301 adds r3, #1
80095d0: 72fb strb r3, [r7, #11]
break;
80095d2: e055 b.n 8009680 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
80095d4: 687b ldr r3, [r7, #4]
80095d6: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80095da: 691b ldr r3, [r3, #16]
80095dc: 2b00 cmp r3, #0
80095de: d00b beq.n 80095f8 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
80095e0: 687b ldr r3, [r7, #4]
80095e2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80095e6: 691b ldr r3, [r3, #16]
80095e8: 687a ldr r2, [r7, #4]
80095ea: 7c12 ldrb r2, [r2, #16]
80095ec: f107 0108 add.w r1, r7, #8
80095f0: 4610 mov r0, r2
80095f2: 4798 blx r3
80095f4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80095f6: e043 b.n 8009680 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80095f8: 6839 ldr r1, [r7, #0]
80095fa: 6878 ldr r0, [r7, #4]
80095fc: f000 fa46 bl 8009a8c <USBD_CtlError>
err++;
8009600: 7afb ldrb r3, [r7, #11]
8009602: 3301 adds r3, #1
8009604: 72fb strb r3, [r7, #11]
break;
8009606: e03b b.n 8009680 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
8009608: 687b ldr r3, [r7, #4]
800960a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800960e: 695b ldr r3, [r3, #20]
8009610: 2b00 cmp r3, #0
8009612: d00b beq.n 800962c <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
8009614: 687b ldr r3, [r7, #4]
8009616: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800961a: 695b ldr r3, [r3, #20]
800961c: 687a ldr r2, [r7, #4]
800961e: 7c12 ldrb r2, [r2, #16]
8009620: f107 0108 add.w r1, r7, #8
8009624: 4610 mov r0, r2
8009626: 4798 blx r3
8009628: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800962a: e029 b.n 8009680 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800962c: 6839 ldr r1, [r7, #0]
800962e: 6878 ldr r0, [r7, #4]
8009630: f000 fa2c bl 8009a8c <USBD_CtlError>
err++;
8009634: 7afb ldrb r3, [r7, #11]
8009636: 3301 adds r3, #1
8009638: 72fb strb r3, [r7, #11]
break;
800963a: e021 b.n 8009680 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800963c: 687b ldr r3, [r7, #4]
800963e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8009642: 699b ldr r3, [r3, #24]
8009644: 2b00 cmp r3, #0
8009646: d00b beq.n 8009660 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
8009648: 687b ldr r3, [r7, #4]
800964a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800964e: 699b ldr r3, [r3, #24]
8009650: 687a ldr r2, [r7, #4]
8009652: 7c12 ldrb r2, [r2, #16]
8009654: f107 0108 add.w r1, r7, #8
8009658: 4610 mov r0, r2
800965a: 4798 blx r3
800965c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800965e: e00f b.n 8009680 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009660: 6839 ldr r1, [r7, #0]
8009662: 6878 ldr r0, [r7, #4]
8009664: f000 fa12 bl 8009a8c <USBD_CtlError>
err++;
8009668: 7afb ldrb r3, [r7, #11]
800966a: 3301 adds r3, #1
800966c: 72fb strb r3, [r7, #11]
break;
800966e: e007 b.n 8009680 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
8009670: 6839 ldr r1, [r7, #0]
8009672: 6878 ldr r0, [r7, #4]
8009674: f000 fa0a bl 8009a8c <USBD_CtlError>
err++;
8009678: 7afb ldrb r3, [r7, #11]
800967a: 3301 adds r3, #1
800967c: 72fb strb r3, [r7, #11]
#endif
}
break;
800967e: e038 b.n 80096f2 <USBD_GetDescriptor+0x286>
8009680: e037 b.n 80096f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8009682: 687b ldr r3, [r7, #4]
8009684: 7c1b ldrb r3, [r3, #16]
8009686: 2b00 cmp r3, #0
8009688: d109 bne.n 800969e <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800968a: 687b ldr r3, [r7, #4]
800968c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8009690: 6b5b ldr r3, [r3, #52] ; 0x34
8009692: f107 0208 add.w r2, r7, #8
8009696: 4610 mov r0, r2
8009698: 4798 blx r3
800969a: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800969c: e029 b.n 80096f2 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800969e: 6839 ldr r1, [r7, #0]
80096a0: 6878 ldr r0, [r7, #4]
80096a2: f000 f9f3 bl 8009a8c <USBD_CtlError>
err++;
80096a6: 7afb ldrb r3, [r7, #11]
80096a8: 3301 adds r3, #1
80096aa: 72fb strb r3, [r7, #11]
break;
80096ac: e021 b.n 80096f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80096ae: 687b ldr r3, [r7, #4]
80096b0: 7c1b ldrb r3, [r3, #16]
80096b2: 2b00 cmp r3, #0
80096b4: d10d bne.n 80096d2 <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
80096b6: 687b ldr r3, [r7, #4]
80096b8: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80096bc: 6b1b ldr r3, [r3, #48] ; 0x30
80096be: f107 0208 add.w r2, r7, #8
80096c2: 4610 mov r0, r2
80096c4: 4798 blx r3
80096c6: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
80096c8: 68fb ldr r3, [r7, #12]
80096ca: 3301 adds r3, #1
80096cc: 2207 movs r2, #7
80096ce: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80096d0: e00f b.n 80096f2 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
80096d2: 6839 ldr r1, [r7, #0]
80096d4: 6878 ldr r0, [r7, #4]
80096d6: f000 f9d9 bl 8009a8c <USBD_CtlError>
err++;
80096da: 7afb ldrb r3, [r7, #11]
80096dc: 3301 adds r3, #1
80096de: 72fb strb r3, [r7, #11]
break;
80096e0: e007 b.n 80096f2 <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
80096e2: 6839 ldr r1, [r7, #0]
80096e4: 6878 ldr r0, [r7, #4]
80096e6: f000 f9d1 bl 8009a8c <USBD_CtlError>
err++;
80096ea: 7afb ldrb r3, [r7, #11]
80096ec: 3301 adds r3, #1
80096ee: 72fb strb r3, [r7, #11]
break;
80096f0: bf00 nop
}
if (err != 0U)
80096f2: 7afb ldrb r3, [r7, #11]
80096f4: 2b00 cmp r3, #0
80096f6: d11c bne.n 8009732 <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
80096f8: 893b ldrh r3, [r7, #8]
80096fa: 2b00 cmp r3, #0
80096fc: d011 beq.n 8009722 <USBD_GetDescriptor+0x2b6>
80096fe: 683b ldr r3, [r7, #0]
8009700: 88db ldrh r3, [r3, #6]
8009702: 2b00 cmp r3, #0
8009704: d00d beq.n 8009722 <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
8009706: 683b ldr r3, [r7, #0]
8009708: 88da ldrh r2, [r3, #6]
800970a: 893b ldrh r3, [r7, #8]
800970c: 4293 cmp r3, r2
800970e: bf28 it cs
8009710: 4613 movcs r3, r2
8009712: b29b uxth r3, r3
8009714: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
8009716: 893b ldrh r3, [r7, #8]
8009718: 461a mov r2, r3
800971a: 68f9 ldr r1, [r7, #12]
800971c: 6878 ldr r0, [r7, #4]
800971e: f000 fa1f bl 8009b60 <USBD_CtlSendData>
}
if (req->wLength == 0U)
8009722: 683b ldr r3, [r7, #0]
8009724: 88db ldrh r3, [r3, #6]
8009726: 2b00 cmp r3, #0
8009728: d104 bne.n 8009734 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800972a: 6878 ldr r0, [r7, #4]
800972c: f000 fa58 bl 8009be0 <USBD_CtlSendStatus>
8009730: e000 b.n 8009734 <USBD_GetDescriptor+0x2c8>
return;
8009732: bf00 nop
}
}
}
8009734: 3710 adds r7, #16
8009736: 46bd mov sp, r7
8009738: bd80 pop {r7, pc}
800973a: bf00 nop
0800973c <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800973c: b580 push {r7, lr}
800973e: b084 sub sp, #16
8009740: af00 add r7, sp, #0
8009742: 6078 str r0, [r7, #4]
8009744: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
8009746: 683b ldr r3, [r7, #0]
8009748: 889b ldrh r3, [r3, #4]
800974a: 2b00 cmp r3, #0
800974c: d130 bne.n 80097b0 <USBD_SetAddress+0x74>
800974e: 683b ldr r3, [r7, #0]
8009750: 88db ldrh r3, [r3, #6]
8009752: 2b00 cmp r3, #0
8009754: d12c bne.n 80097b0 <USBD_SetAddress+0x74>
8009756: 683b ldr r3, [r7, #0]
8009758: 885b ldrh r3, [r3, #2]
800975a: 2b7f cmp r3, #127 ; 0x7f
800975c: d828 bhi.n 80097b0 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800975e: 683b ldr r3, [r7, #0]
8009760: 885b ldrh r3, [r3, #2]
8009762: b2db uxtb r3, r3
8009764: f003 037f and.w r3, r3, #127 ; 0x7f
8009768: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800976a: 687b ldr r3, [r7, #4]
800976c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009770: 2b03 cmp r3, #3
8009772: d104 bne.n 800977e <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
8009774: 6839 ldr r1, [r7, #0]
8009776: 6878 ldr r0, [r7, #4]
8009778: f000 f988 bl 8009a8c <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800977c: e01c b.n 80097b8 <USBD_SetAddress+0x7c>
}
else
{
pdev->dev_address = dev_addr;
800977e: 687b ldr r3, [r7, #4]
8009780: 7bfa ldrb r2, [r7, #15]
8009782: f883 229e strb.w r2, [r3, #670] ; 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
8009786: 7bfb ldrb r3, [r7, #15]
8009788: 4619 mov r1, r3
800978a: 6878 ldr r0, [r7, #4]
800978c: f000 fe19 bl 800a3c2 <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
8009790: 6878 ldr r0, [r7, #4]
8009792: f000 fa25 bl 8009be0 <USBD_CtlSendStatus>
if (dev_addr != 0U)
8009796: 7bfb ldrb r3, [r7, #15]
8009798: 2b00 cmp r3, #0
800979a: d004 beq.n 80097a6 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800979c: 687b ldr r3, [r7, #4]
800979e: 2202 movs r2, #2
80097a0: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80097a4: e008 b.n 80097b8 <USBD_SetAddress+0x7c>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
80097a6: 687b ldr r3, [r7, #4]
80097a8: 2201 movs r2, #1
80097aa: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80097ae: e003 b.n 80097b8 <USBD_SetAddress+0x7c>
}
}
}
else
{
USBD_CtlError(pdev, req);
80097b0: 6839 ldr r1, [r7, #0]
80097b2: 6878 ldr r0, [r7, #4]
80097b4: f000 f96a bl 8009a8c <USBD_CtlError>
}
}
80097b8: bf00 nop
80097ba: 3710 adds r7, #16
80097bc: 46bd mov sp, r7
80097be: bd80 pop {r7, pc}
080097c0 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80097c0: b580 push {r7, lr}
80097c2: b082 sub sp, #8
80097c4: af00 add r7, sp, #0
80097c6: 6078 str r0, [r7, #4]
80097c8: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
80097ca: 683b ldr r3, [r7, #0]
80097cc: 885b ldrh r3, [r3, #2]
80097ce: b2da uxtb r2, r3
80097d0: 4b41 ldr r3, [pc, #260] ; (80098d8 <USBD_SetConfig+0x118>)
80097d2: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
80097d4: 4b40 ldr r3, [pc, #256] ; (80098d8 <USBD_SetConfig+0x118>)
80097d6: 781b ldrb r3, [r3, #0]
80097d8: 2b01 cmp r3, #1
80097da: d904 bls.n 80097e6 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
80097dc: 6839 ldr r1, [r7, #0]
80097de: 6878 ldr r0, [r7, #4]
80097e0: f000 f954 bl 8009a8c <USBD_CtlError>
80097e4: e075 b.n 80098d2 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
80097e6: 687b ldr r3, [r7, #4]
80097e8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80097ec: 2b02 cmp r3, #2
80097ee: d002 beq.n 80097f6 <USBD_SetConfig+0x36>
80097f0: 2b03 cmp r3, #3
80097f2: d023 beq.n 800983c <USBD_SetConfig+0x7c>
80097f4: e062 b.n 80098bc <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
80097f6: 4b38 ldr r3, [pc, #224] ; (80098d8 <USBD_SetConfig+0x118>)
80097f8: 781b ldrb r3, [r3, #0]
80097fa: 2b00 cmp r3, #0
80097fc: d01a beq.n 8009834 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
80097fe: 4b36 ldr r3, [pc, #216] ; (80098d8 <USBD_SetConfig+0x118>)
8009800: 781b ldrb r3, [r3, #0]
8009802: 461a mov r2, r3
8009804: 687b ldr r3, [r7, #4]
8009806: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
8009808: 687b ldr r3, [r7, #4]
800980a: 2203 movs r2, #3
800980c: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8009810: 4b31 ldr r3, [pc, #196] ; (80098d8 <USBD_SetConfig+0x118>)
8009812: 781b ldrb r3, [r3, #0]
8009814: 4619 mov r1, r3
8009816: 6878 ldr r0, [r7, #4]
8009818: f7ff f9f4 bl 8008c04 <USBD_SetClassConfig>
800981c: 4603 mov r3, r0
800981e: 2b02 cmp r3, #2
8009820: d104 bne.n 800982c <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
8009822: 6839 ldr r1, [r7, #0]
8009824: 6878 ldr r0, [r7, #4]
8009826: f000 f931 bl 8009a8c <USBD_CtlError>
return;
800982a: e052 b.n 80098d2 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800982c: 6878 ldr r0, [r7, #4]
800982e: f000 f9d7 bl 8009be0 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8009832: e04e b.n 80098d2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8009834: 6878 ldr r0, [r7, #4]
8009836: f000 f9d3 bl 8009be0 <USBD_CtlSendStatus>
break;
800983a: e04a b.n 80098d2 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800983c: 4b26 ldr r3, [pc, #152] ; (80098d8 <USBD_SetConfig+0x118>)
800983e: 781b ldrb r3, [r3, #0]
8009840: 2b00 cmp r3, #0
8009842: d112 bne.n 800986a <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8009844: 687b ldr r3, [r7, #4]
8009846: 2202 movs r2, #2
8009848: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->dev_config = cfgidx;
800984c: 4b22 ldr r3, [pc, #136] ; (80098d8 <USBD_SetConfig+0x118>)
800984e: 781b ldrb r3, [r3, #0]
8009850: 461a mov r2, r3
8009852: 687b ldr r3, [r7, #4]
8009854: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
8009856: 4b20 ldr r3, [pc, #128] ; (80098d8 <USBD_SetConfig+0x118>)
8009858: 781b ldrb r3, [r3, #0]
800985a: 4619 mov r1, r3
800985c: 6878 ldr r0, [r7, #4]
800985e: f7ff f9f0 bl 8008c42 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
8009862: 6878 ldr r0, [r7, #4]
8009864: f000 f9bc bl 8009be0 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8009868: e033 b.n 80098d2 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800986a: 4b1b ldr r3, [pc, #108] ; (80098d8 <USBD_SetConfig+0x118>)
800986c: 781b ldrb r3, [r3, #0]
800986e: 461a mov r2, r3
8009870: 687b ldr r3, [r7, #4]
8009872: 685b ldr r3, [r3, #4]
8009874: 429a cmp r2, r3
8009876: d01d beq.n 80098b4 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
8009878: 687b ldr r3, [r7, #4]
800987a: 685b ldr r3, [r3, #4]
800987c: b2db uxtb r3, r3
800987e: 4619 mov r1, r3
8009880: 6878 ldr r0, [r7, #4]
8009882: f7ff f9de bl 8008c42 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
8009886: 4b14 ldr r3, [pc, #80] ; (80098d8 <USBD_SetConfig+0x118>)
8009888: 781b ldrb r3, [r3, #0]
800988a: 461a mov r2, r3
800988c: 687b ldr r3, [r7, #4]
800988e: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8009890: 4b11 ldr r3, [pc, #68] ; (80098d8 <USBD_SetConfig+0x118>)
8009892: 781b ldrb r3, [r3, #0]
8009894: 4619 mov r1, r3
8009896: 6878 ldr r0, [r7, #4]
8009898: f7ff f9b4 bl 8008c04 <USBD_SetClassConfig>
800989c: 4603 mov r3, r0
800989e: 2b02 cmp r3, #2
80098a0: d104 bne.n 80098ac <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
80098a2: 6839 ldr r1, [r7, #0]
80098a4: 6878 ldr r0, [r7, #4]
80098a6: f000 f8f1 bl 8009a8c <USBD_CtlError>
return;
80098aa: e012 b.n 80098d2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80098ac: 6878 ldr r0, [r7, #4]
80098ae: f000 f997 bl 8009be0 <USBD_CtlSendStatus>
break;
80098b2: e00e b.n 80098d2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80098b4: 6878 ldr r0, [r7, #4]
80098b6: f000 f993 bl 8009be0 <USBD_CtlSendStatus>
break;
80098ba: e00a b.n 80098d2 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
80098bc: 6839 ldr r1, [r7, #0]
80098be: 6878 ldr r0, [r7, #4]
80098c0: f000 f8e4 bl 8009a8c <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
80098c4: 4b04 ldr r3, [pc, #16] ; (80098d8 <USBD_SetConfig+0x118>)
80098c6: 781b ldrb r3, [r3, #0]
80098c8: 4619 mov r1, r3
80098ca: 6878 ldr r0, [r7, #4]
80098cc: f7ff f9b9 bl 8008c42 <USBD_ClrClassConfig>
break;
80098d0: bf00 nop
}
}
}
80098d2: 3708 adds r7, #8
80098d4: 46bd mov sp, r7
80098d6: bd80 pop {r7, pc}
80098d8: 20000140 .word 0x20000140
080098dc <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80098dc: b580 push {r7, lr}
80098de: b082 sub sp, #8
80098e0: af00 add r7, sp, #0
80098e2: 6078 str r0, [r7, #4]
80098e4: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
80098e6: 683b ldr r3, [r7, #0]
80098e8: 88db ldrh r3, [r3, #6]
80098ea: 2b01 cmp r3, #1
80098ec: d004 beq.n 80098f8 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
80098ee: 6839 ldr r1, [r7, #0]
80098f0: 6878 ldr r0, [r7, #4]
80098f2: f000 f8cb bl 8009a8c <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
80098f6: e021 b.n 800993c <USBD_GetConfig+0x60>
switch (pdev->dev_state)
80098f8: 687b ldr r3, [r7, #4]
80098fa: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80098fe: 2b01 cmp r3, #1
8009900: db17 blt.n 8009932 <USBD_GetConfig+0x56>
8009902: 2b02 cmp r3, #2
8009904: dd02 ble.n 800990c <USBD_GetConfig+0x30>
8009906: 2b03 cmp r3, #3
8009908: d00b beq.n 8009922 <USBD_GetConfig+0x46>
800990a: e012 b.n 8009932 <USBD_GetConfig+0x56>
pdev->dev_default_config = 0U;
800990c: 687b ldr r3, [r7, #4]
800990e: 2200 movs r2, #0
8009910: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
8009912: 687b ldr r3, [r7, #4]
8009914: 3308 adds r3, #8
8009916: 2201 movs r2, #1
8009918: 4619 mov r1, r3
800991a: 6878 ldr r0, [r7, #4]
800991c: f000 f920 bl 8009b60 <USBD_CtlSendData>
break;
8009920: e00c b.n 800993c <USBD_GetConfig+0x60>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
8009922: 687b ldr r3, [r7, #4]
8009924: 3304 adds r3, #4
8009926: 2201 movs r2, #1
8009928: 4619 mov r1, r3
800992a: 6878 ldr r0, [r7, #4]
800992c: f000 f918 bl 8009b60 <USBD_CtlSendData>
break;
8009930: e004 b.n 800993c <USBD_GetConfig+0x60>
USBD_CtlError(pdev, req);
8009932: 6839 ldr r1, [r7, #0]
8009934: 6878 ldr r0, [r7, #4]
8009936: f000 f8a9 bl 8009a8c <USBD_CtlError>
break;
800993a: bf00 nop
}
800993c: bf00 nop
800993e: 3708 adds r7, #8
8009940: 46bd mov sp, r7
8009942: bd80 pop {r7, pc}
08009944 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8009944: b580 push {r7, lr}
8009946: b082 sub sp, #8
8009948: af00 add r7, sp, #0
800994a: 6078 str r0, [r7, #4]
800994c: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800994e: 687b ldr r3, [r7, #4]
8009950: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009954: 3b01 subs r3, #1
8009956: 2b02 cmp r3, #2
8009958: d81e bhi.n 8009998 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800995a: 683b ldr r3, [r7, #0]
800995c: 88db ldrh r3, [r3, #6]
800995e: 2b02 cmp r3, #2
8009960: d004 beq.n 800996c <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
8009962: 6839 ldr r1, [r7, #0]
8009964: 6878 ldr r0, [r7, #4]
8009966: f000 f891 bl 8009a8c <USBD_CtlError>
break;
800996a: e01a b.n 80099a2 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800996c: 687b ldr r3, [r7, #4]
800996e: 2201 movs r2, #1
8009970: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
8009972: 687b ldr r3, [r7, #4]
8009974: f8d3 32a4 ldr.w r3, [r3, #676] ; 0x2a4
8009978: 2b00 cmp r3, #0
800997a: d005 beq.n 8009988 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800997c: 687b ldr r3, [r7, #4]
800997e: 68db ldr r3, [r3, #12]
8009980: f043 0202 orr.w r2, r3, #2
8009984: 687b ldr r3, [r7, #4]
8009986: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
8009988: 687b ldr r3, [r7, #4]
800998a: 330c adds r3, #12
800998c: 2202 movs r2, #2
800998e: 4619 mov r1, r3
8009990: 6878 ldr r0, [r7, #4]
8009992: f000 f8e5 bl 8009b60 <USBD_CtlSendData>
break;
8009996: e004 b.n 80099a2 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
8009998: 6839 ldr r1, [r7, #0]
800999a: 6878 ldr r0, [r7, #4]
800999c: f000 f876 bl 8009a8c <USBD_CtlError>
break;
80099a0: bf00 nop
}
}
80099a2: bf00 nop
80099a4: 3708 adds r7, #8
80099a6: 46bd mov sp, r7
80099a8: bd80 pop {r7, pc}
080099aa <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80099aa: b580 push {r7, lr}
80099ac: b082 sub sp, #8
80099ae: af00 add r7, sp, #0
80099b0: 6078 str r0, [r7, #4]
80099b2: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80099b4: 683b ldr r3, [r7, #0]
80099b6: 885b ldrh r3, [r3, #2]
80099b8: 2b01 cmp r3, #1
80099ba: d106 bne.n 80099ca <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
80099bc: 687b ldr r3, [r7, #4]
80099be: 2201 movs r2, #1
80099c0: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
USBD_CtlSendStatus(pdev);
80099c4: 6878 ldr r0, [r7, #4]
80099c6: f000 f90b bl 8009be0 <USBD_CtlSendStatus>
}
}
80099ca: bf00 nop
80099cc: 3708 adds r7, #8
80099ce: 46bd mov sp, r7
80099d0: bd80 pop {r7, pc}
080099d2 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80099d2: b580 push {r7, lr}
80099d4: b082 sub sp, #8
80099d6: af00 add r7, sp, #0
80099d8: 6078 str r0, [r7, #4]
80099da: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
80099dc: 687b ldr r3, [r7, #4]
80099de: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80099e2: 3b01 subs r3, #1
80099e4: 2b02 cmp r3, #2
80099e6: d80b bhi.n 8009a00 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80099e8: 683b ldr r3, [r7, #0]
80099ea: 885b ldrh r3, [r3, #2]
80099ec: 2b01 cmp r3, #1
80099ee: d10c bne.n 8009a0a <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
80099f0: 687b ldr r3, [r7, #4]
80099f2: 2200 movs r2, #0
80099f4: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
USBD_CtlSendStatus(pdev);
80099f8: 6878 ldr r0, [r7, #4]
80099fa: f000 f8f1 bl 8009be0 <USBD_CtlSendStatus>
}
break;
80099fe: e004 b.n 8009a0a <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
8009a00: 6839 ldr r1, [r7, #0]
8009a02: 6878 ldr r0, [r7, #4]
8009a04: f000 f842 bl 8009a8c <USBD_CtlError>
break;
8009a08: e000 b.n 8009a0c <USBD_ClrFeature+0x3a>
break;
8009a0a: bf00 nop
}
}
8009a0c: bf00 nop
8009a0e: 3708 adds r7, #8
8009a10: 46bd mov sp, r7
8009a12: bd80 pop {r7, pc}
08009a14 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
8009a14: b480 push {r7}
8009a16: b083 sub sp, #12
8009a18: af00 add r7, sp, #0
8009a1a: 6078 str r0, [r7, #4]
8009a1c: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8009a1e: 683b ldr r3, [r7, #0]
8009a20: 781a ldrb r2, [r3, #0]
8009a22: 687b ldr r3, [r7, #4]
8009a24: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
8009a26: 683b ldr r3, [r7, #0]
8009a28: 785a ldrb r2, [r3, #1]
8009a2a: 687b ldr r3, [r7, #4]
8009a2c: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8009a2e: 683b ldr r3, [r7, #0]
8009a30: 3302 adds r3, #2
8009a32: 781b ldrb r3, [r3, #0]
8009a34: b29a uxth r2, r3
8009a36: 683b ldr r3, [r7, #0]
8009a38: 3303 adds r3, #3
8009a3a: 781b ldrb r3, [r3, #0]
8009a3c: b29b uxth r3, r3
8009a3e: 021b lsls r3, r3, #8
8009a40: b29b uxth r3, r3
8009a42: 4413 add r3, r2
8009a44: b29a uxth r2, r3
8009a46: 687b ldr r3, [r7, #4]
8009a48: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
8009a4a: 683b ldr r3, [r7, #0]
8009a4c: 3304 adds r3, #4
8009a4e: 781b ldrb r3, [r3, #0]
8009a50: b29a uxth r2, r3
8009a52: 683b ldr r3, [r7, #0]
8009a54: 3305 adds r3, #5
8009a56: 781b ldrb r3, [r3, #0]
8009a58: b29b uxth r3, r3
8009a5a: 021b lsls r3, r3, #8
8009a5c: b29b uxth r3, r3
8009a5e: 4413 add r3, r2
8009a60: b29a uxth r2, r3
8009a62: 687b ldr r3, [r7, #4]
8009a64: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
8009a66: 683b ldr r3, [r7, #0]
8009a68: 3306 adds r3, #6
8009a6a: 781b ldrb r3, [r3, #0]
8009a6c: b29a uxth r2, r3
8009a6e: 683b ldr r3, [r7, #0]
8009a70: 3307 adds r3, #7
8009a72: 781b ldrb r3, [r3, #0]
8009a74: b29b uxth r3, r3
8009a76: 021b lsls r3, r3, #8
8009a78: b29b uxth r3, r3
8009a7a: 4413 add r3, r2
8009a7c: b29a uxth r2, r3
8009a7e: 687b ldr r3, [r7, #4]
8009a80: 80da strh r2, [r3, #6]
}
8009a82: bf00 nop
8009a84: 370c adds r7, #12
8009a86: 46bd mov sp, r7
8009a88: bc80 pop {r7}
8009a8a: 4770 bx lr
08009a8c <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009a8c: b580 push {r7, lr}
8009a8e: b082 sub sp, #8
8009a90: af00 add r7, sp, #0
8009a92: 6078 str r0, [r7, #4]
8009a94: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
8009a96: 2180 movs r1, #128 ; 0x80
8009a98: 6878 ldr r0, [r7, #4]
8009a9a: f000 fc28 bl 800a2ee <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
8009a9e: 2100 movs r1, #0
8009aa0: 6878 ldr r0, [r7, #4]
8009aa2: f000 fc24 bl 800a2ee <USBD_LL_StallEP>
}
8009aa6: bf00 nop
8009aa8: 3708 adds r7, #8
8009aaa: 46bd mov sp, r7
8009aac: bd80 pop {r7, pc}
08009aae <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
8009aae: b580 push {r7, lr}
8009ab0: b086 sub sp, #24
8009ab2: af00 add r7, sp, #0
8009ab4: 60f8 str r0, [r7, #12]
8009ab6: 60b9 str r1, [r7, #8]
8009ab8: 607a str r2, [r7, #4]
uint8_t idx = 0U;
8009aba: 2300 movs r3, #0
8009abc: 75fb strb r3, [r7, #23]
if (desc != NULL)
8009abe: 68fb ldr r3, [r7, #12]
8009ac0: 2b00 cmp r3, #0
8009ac2: d032 beq.n 8009b2a <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
8009ac4: 68f8 ldr r0, [r7, #12]
8009ac6: f000 f834 bl 8009b32 <USBD_GetLen>
8009aca: 4603 mov r3, r0
8009acc: 3301 adds r3, #1
8009ace: b29b uxth r3, r3
8009ad0: 005b lsls r3, r3, #1
8009ad2: b29a uxth r2, r3
8009ad4: 687b ldr r3, [r7, #4]
8009ad6: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
8009ad8: 7dfb ldrb r3, [r7, #23]
8009ada: 1c5a adds r2, r3, #1
8009adc: 75fa strb r2, [r7, #23]
8009ade: 461a mov r2, r3
8009ae0: 68bb ldr r3, [r7, #8]
8009ae2: 4413 add r3, r2
8009ae4: 687a ldr r2, [r7, #4]
8009ae6: 7812 ldrb r2, [r2, #0]
8009ae8: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
8009aea: 7dfb ldrb r3, [r7, #23]
8009aec: 1c5a adds r2, r3, #1
8009aee: 75fa strb r2, [r7, #23]
8009af0: 461a mov r2, r3
8009af2: 68bb ldr r3, [r7, #8]
8009af4: 4413 add r3, r2
8009af6: 2203 movs r2, #3
8009af8: 701a strb r2, [r3, #0]
while (*desc != '\0')
8009afa: e012 b.n 8009b22 <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
8009afc: 68fb ldr r3, [r7, #12]
8009afe: 1c5a adds r2, r3, #1
8009b00: 60fa str r2, [r7, #12]
8009b02: 7dfa ldrb r2, [r7, #23]
8009b04: 1c51 adds r1, r2, #1
8009b06: 75f9 strb r1, [r7, #23]
8009b08: 4611 mov r1, r2
8009b0a: 68ba ldr r2, [r7, #8]
8009b0c: 440a add r2, r1
8009b0e: 781b ldrb r3, [r3, #0]
8009b10: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
8009b12: 7dfb ldrb r3, [r7, #23]
8009b14: 1c5a adds r2, r3, #1
8009b16: 75fa strb r2, [r7, #23]
8009b18: 461a mov r2, r3
8009b1a: 68bb ldr r3, [r7, #8]
8009b1c: 4413 add r3, r2
8009b1e: 2200 movs r2, #0
8009b20: 701a strb r2, [r3, #0]
while (*desc != '\0')
8009b22: 68fb ldr r3, [r7, #12]
8009b24: 781b ldrb r3, [r3, #0]
8009b26: 2b00 cmp r3, #0
8009b28: d1e8 bne.n 8009afc <USBD_GetString+0x4e>
}
}
}
8009b2a: bf00 nop
8009b2c: 3718 adds r7, #24
8009b2e: 46bd mov sp, r7
8009b30: bd80 pop {r7, pc}
08009b32 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8009b32: b480 push {r7}
8009b34: b085 sub sp, #20
8009b36: af00 add r7, sp, #0
8009b38: 6078 str r0, [r7, #4]
uint8_t len = 0U;
8009b3a: 2300 movs r3, #0
8009b3c: 73fb strb r3, [r7, #15]
while (*buf != '\0')
8009b3e: e005 b.n 8009b4c <USBD_GetLen+0x1a>
{
len++;
8009b40: 7bfb ldrb r3, [r7, #15]
8009b42: 3301 adds r3, #1
8009b44: 73fb strb r3, [r7, #15]
buf++;
8009b46: 687b ldr r3, [r7, #4]
8009b48: 3301 adds r3, #1
8009b4a: 607b str r3, [r7, #4]
while (*buf != '\0')
8009b4c: 687b ldr r3, [r7, #4]
8009b4e: 781b ldrb r3, [r3, #0]
8009b50: 2b00 cmp r3, #0
8009b52: d1f5 bne.n 8009b40 <USBD_GetLen+0xe>
}
return len;
8009b54: 7bfb ldrb r3, [r7, #15]
}
8009b56: 4618 mov r0, r3
8009b58: 3714 adds r7, #20
8009b5a: 46bd mov sp, r7
8009b5c: bc80 pop {r7}
8009b5e: 4770 bx lr
08009b60 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009b60: b580 push {r7, lr}
8009b62: b084 sub sp, #16
8009b64: af00 add r7, sp, #0
8009b66: 60f8 str r0, [r7, #12]
8009b68: 60b9 str r1, [r7, #8]
8009b6a: 4613 mov r3, r2
8009b6c: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
8009b6e: 68fb ldr r3, [r7, #12]
8009b70: 2202 movs r2, #2
8009b72: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep_in[0].total_length = len;
8009b76: 88fa ldrh r2, [r7, #6]
8009b78: 68fb ldr r3, [r7, #12]
8009b7a: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
8009b7c: 88fa ldrh r2, [r7, #6]
8009b7e: 68fb ldr r3, [r7, #12]
8009b80: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8009b82: 88fb ldrh r3, [r7, #6]
8009b84: 68ba ldr r2, [r7, #8]
8009b86: 2100 movs r1, #0
8009b88: 68f8 ldr r0, [r7, #12]
8009b8a: f000 fc39 bl 800a400 <USBD_LL_Transmit>
return USBD_OK;
8009b8e: 2300 movs r3, #0
}
8009b90: 4618 mov r0, r3
8009b92: 3710 adds r7, #16
8009b94: 46bd mov sp, r7
8009b96: bd80 pop {r7, pc}
08009b98 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009b98: b580 push {r7, lr}
8009b9a: b084 sub sp, #16
8009b9c: af00 add r7, sp, #0
8009b9e: 60f8 str r0, [r7, #12]
8009ba0: 60b9 str r1, [r7, #8]
8009ba2: 4613 mov r3, r2
8009ba4: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8009ba6: 88fb ldrh r3, [r7, #6]
8009ba8: 68ba ldr r2, [r7, #8]
8009baa: 2100 movs r1, #0
8009bac: 68f8 ldr r0, [r7, #12]
8009bae: f000 fc27 bl 800a400 <USBD_LL_Transmit>
return USBD_OK;
8009bb2: 2300 movs r3, #0
}
8009bb4: 4618 mov r0, r3
8009bb6: 3710 adds r7, #16
8009bb8: 46bd mov sp, r7
8009bba: bd80 pop {r7, pc}
08009bbc <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009bbc: b580 push {r7, lr}
8009bbe: b084 sub sp, #16
8009bc0: af00 add r7, sp, #0
8009bc2: 60f8 str r0, [r7, #12]
8009bc4: 60b9 str r1, [r7, #8]
8009bc6: 4613 mov r3, r2
8009bc8: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8009bca: 88fb ldrh r3, [r7, #6]
8009bcc: 68ba ldr r2, [r7, #8]
8009bce: 2100 movs r1, #0
8009bd0: 68f8 ldr r0, [r7, #12]
8009bd2: f000 fc38 bl 800a446 <USBD_LL_PrepareReceive>
return USBD_OK;
8009bd6: 2300 movs r3, #0
}
8009bd8: 4618 mov r0, r3
8009bda: 3710 adds r7, #16
8009bdc: 46bd mov sp, r7
8009bde: bd80 pop {r7, pc}
08009be0 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
8009be0: b580 push {r7, lr}
8009be2: b082 sub sp, #8
8009be4: af00 add r7, sp, #0
8009be6: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
8009be8: 687b ldr r3, [r7, #4]
8009bea: 2204 movs r2, #4
8009bec: f8c3 2294 str.w r2, [r3, #660] ; 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
8009bf0: 2300 movs r3, #0
8009bf2: 2200 movs r2, #0
8009bf4: 2100 movs r1, #0
8009bf6: 6878 ldr r0, [r7, #4]
8009bf8: f000 fc02 bl 800a400 <USBD_LL_Transmit>
return USBD_OK;
8009bfc: 2300 movs r3, #0
}
8009bfe: 4618 mov r0, r3
8009c00: 3708 adds r7, #8
8009c02: 46bd mov sp, r7
8009c04: bd80 pop {r7, pc}
08009c06 <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
8009c06: b580 push {r7, lr}
8009c08: b082 sub sp, #8
8009c0a: af00 add r7, sp, #0
8009c0c: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
8009c0e: 687b ldr r3, [r7, #4]
8009c10: 2205 movs r2, #5
8009c12: f8c3 2294 str.w r2, [r3, #660] ; 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8009c16: 2300 movs r3, #0
8009c18: 2200 movs r2, #0
8009c1a: 2100 movs r1, #0
8009c1c: 6878 ldr r0, [r7, #4]
8009c1e: f000 fc12 bl 800a446 <USBD_LL_PrepareReceive>
return USBD_OK;
8009c22: 2300 movs r3, #0
}
8009c24: 4618 mov r0, r3
8009c26: 3708 adds r7, #8
8009c28: 46bd mov sp, r7
8009c2a: bd80 pop {r7, pc}
08009c2c <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
8009c2c: b580 push {r7, lr}
8009c2e: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
8009c30: 2200 movs r2, #0
8009c32: 4912 ldr r1, [pc, #72] ; (8009c7c <MX_USB_DEVICE_Init+0x50>)
8009c34: 4812 ldr r0, [pc, #72] ; (8009c80 <MX_USB_DEVICE_Init+0x54>)
8009c36: f7fe ff8b bl 8008b50 <USBD_Init>
8009c3a: 4603 mov r3, r0
8009c3c: 2b00 cmp r3, #0
8009c3e: d001 beq.n 8009c44 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
8009c40: f7f6 fcf0 bl 8000624 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_MSC) != USBD_OK)
8009c44: 490f ldr r1, [pc, #60] ; (8009c84 <MX_USB_DEVICE_Init+0x58>)
8009c46: 480e ldr r0, [pc, #56] ; (8009c80 <MX_USB_DEVICE_Init+0x54>)
8009c48: f7fe ffad bl 8008ba6 <USBD_RegisterClass>
8009c4c: 4603 mov r3, r0
8009c4e: 2b00 cmp r3, #0
8009c50: d001 beq.n 8009c56 <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
8009c52: f7f6 fce7 bl 8000624 <Error_Handler>
}
if (USBD_MSC_RegisterStorage(&hUsbDeviceFS, &USBD_Storage_Interface_fops_FS) != USBD_OK)
8009c56: 490c ldr r1, [pc, #48] ; (8009c88 <MX_USB_DEVICE_Init+0x5c>)
8009c58: 4809 ldr r0, [pc, #36] ; (8009c80 <MX_USB_DEVICE_Init+0x54>)
8009c5a: f7fd ff5b bl 8007b14 <USBD_MSC_RegisterStorage>
8009c5e: 4603 mov r3, r0
8009c60: 2b00 cmp r3, #0
8009c62: d001 beq.n 8009c68 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
8009c64: f7f6 fcde bl 8000624 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
8009c68: 4805 ldr r0, [pc, #20] ; (8009c80 <MX_USB_DEVICE_Init+0x54>)
8009c6a: f7fe ffb5 bl 8008bd8 <USBD_Start>
8009c6e: 4603 mov r3, r0
8009c70: 2b00 cmp r3, #0
8009c72: d001 beq.n 8009c78 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
8009c74: f7f6 fcd6 bl 8000624 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
8009c78: bf00 nop
8009c7a: bd80 pop {r7, pc}
8009c7c: 200000b4 .word 0x200000b4
8009c80: 20000490 .word 0x20000490
8009c84: 20000010 .word 0x20000010
8009c88: 20000104 .word 0x20000104
08009c8c <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009c8c: b480 push {r7}
8009c8e: b083 sub sp, #12
8009c90: af00 add r7, sp, #0
8009c92: 4603 mov r3, r0
8009c94: 6039 str r1, [r7, #0]
8009c96: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
8009c98: 683b ldr r3, [r7, #0]
8009c9a: 2212 movs r2, #18
8009c9c: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
8009c9e: 4b03 ldr r3, [pc, #12] ; (8009cac <USBD_FS_DeviceDescriptor+0x20>)
}
8009ca0: 4618 mov r0, r3
8009ca2: 370c adds r7, #12
8009ca4: 46bd mov sp, r7
8009ca6: bc80 pop {r7}
8009ca8: 4770 bx lr
8009caa: bf00 nop
8009cac: 200000d0 .word 0x200000d0
08009cb0 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009cb0: b480 push {r7}
8009cb2: b083 sub sp, #12
8009cb4: af00 add r7, sp, #0
8009cb6: 4603 mov r3, r0
8009cb8: 6039 str r1, [r7, #0]
8009cba: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
8009cbc: 683b ldr r3, [r7, #0]
8009cbe: 2204 movs r2, #4
8009cc0: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
8009cc2: 4b03 ldr r3, [pc, #12] ; (8009cd0 <USBD_FS_LangIDStrDescriptor+0x20>)
}
8009cc4: 4618 mov r0, r3
8009cc6: 370c adds r7, #12
8009cc8: 46bd mov sp, r7
8009cca: bc80 pop {r7}
8009ccc: 4770 bx lr
8009cce: bf00 nop
8009cd0: 200000e4 .word 0x200000e4
08009cd4 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009cd4: b580 push {r7, lr}
8009cd6: b082 sub sp, #8
8009cd8: af00 add r7, sp, #0
8009cda: 4603 mov r3, r0
8009cdc: 6039 str r1, [r7, #0]
8009cde: 71fb strb r3, [r7, #7]
if(speed == 0)
8009ce0: 79fb ldrb r3, [r7, #7]
8009ce2: 2b00 cmp r3, #0
8009ce4: d105 bne.n 8009cf2 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8009ce6: 683a ldr r2, [r7, #0]
8009ce8: 4907 ldr r1, [pc, #28] ; (8009d08 <USBD_FS_ProductStrDescriptor+0x34>)
8009cea: 4808 ldr r0, [pc, #32] ; (8009d0c <USBD_FS_ProductStrDescriptor+0x38>)
8009cec: f7ff fedf bl 8009aae <USBD_GetString>
8009cf0: e004 b.n 8009cfc <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8009cf2: 683a ldr r2, [r7, #0]
8009cf4: 4904 ldr r1, [pc, #16] ; (8009d08 <USBD_FS_ProductStrDescriptor+0x34>)
8009cf6: 4805 ldr r0, [pc, #20] ; (8009d0c <USBD_FS_ProductStrDescriptor+0x38>)
8009cf8: f7ff fed9 bl 8009aae <USBD_GetString>
}
return USBD_StrDesc;
8009cfc: 4b02 ldr r3, [pc, #8] ; (8009d08 <USBD_FS_ProductStrDescriptor+0x34>)
}
8009cfe: 4618 mov r0, r3
8009d00: 3708 adds r7, #8
8009d02: 46bd mov sp, r7
8009d04: bd80 pop {r7, pc}
8009d06: bf00 nop
8009d08: 20000754 .word 0x20000754
8009d0c: 0800a5d0 .word 0x0800a5d0
08009d10 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009d10: b580 push {r7, lr}
8009d12: b082 sub sp, #8
8009d14: af00 add r7, sp, #0
8009d16: 4603 mov r3, r0
8009d18: 6039 str r1, [r7, #0]
8009d1a: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
8009d1c: 683a ldr r2, [r7, #0]
8009d1e: 4904 ldr r1, [pc, #16] ; (8009d30 <USBD_FS_ManufacturerStrDescriptor+0x20>)
8009d20: 4804 ldr r0, [pc, #16] ; (8009d34 <USBD_FS_ManufacturerStrDescriptor+0x24>)
8009d22: f7ff fec4 bl 8009aae <USBD_GetString>
return USBD_StrDesc;
8009d26: 4b02 ldr r3, [pc, #8] ; (8009d30 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
8009d28: 4618 mov r0, r3
8009d2a: 3708 adds r7, #8
8009d2c: 46bd mov sp, r7
8009d2e: bd80 pop {r7, pc}
8009d30: 20000754 .word 0x20000754
8009d34: 0800a5e4 .word 0x0800a5e4
08009d38 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009d38: b580 push {r7, lr}
8009d3a: b082 sub sp, #8
8009d3c: af00 add r7, sp, #0
8009d3e: 4603 mov r3, r0
8009d40: 6039 str r1, [r7, #0]
8009d42: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
8009d44: 683b ldr r3, [r7, #0]
8009d46: 221a movs r2, #26
8009d48: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
8009d4a: f000 f843 bl 8009dd4 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
8009d4e: 4b02 ldr r3, [pc, #8] ; (8009d58 <USBD_FS_SerialStrDescriptor+0x20>)
}
8009d50: 4618 mov r0, r3
8009d52: 3708 adds r7, #8
8009d54: 46bd mov sp, r7
8009d56: bd80 pop {r7, pc}
8009d58: 200000e8 .word 0x200000e8
08009d5c <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009d5c: b580 push {r7, lr}
8009d5e: b082 sub sp, #8
8009d60: af00 add r7, sp, #0
8009d62: 4603 mov r3, r0
8009d64: 6039 str r1, [r7, #0]
8009d66: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
8009d68: 79fb ldrb r3, [r7, #7]
8009d6a: 2b00 cmp r3, #0
8009d6c: d105 bne.n 8009d7a <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8009d6e: 683a ldr r2, [r7, #0]
8009d70: 4907 ldr r1, [pc, #28] ; (8009d90 <USBD_FS_ConfigStrDescriptor+0x34>)
8009d72: 4808 ldr r0, [pc, #32] ; (8009d94 <USBD_FS_ConfigStrDescriptor+0x38>)
8009d74: f7ff fe9b bl 8009aae <USBD_GetString>
8009d78: e004 b.n 8009d84 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8009d7a: 683a ldr r2, [r7, #0]
8009d7c: 4904 ldr r1, [pc, #16] ; (8009d90 <USBD_FS_ConfigStrDescriptor+0x34>)
8009d7e: 4805 ldr r0, [pc, #20] ; (8009d94 <USBD_FS_ConfigStrDescriptor+0x38>)
8009d80: f7ff fe95 bl 8009aae <USBD_GetString>
}
return USBD_StrDesc;
8009d84: 4b02 ldr r3, [pc, #8] ; (8009d90 <USBD_FS_ConfigStrDescriptor+0x34>)
}
8009d86: 4618 mov r0, r3
8009d88: 3708 adds r7, #8
8009d8a: 46bd mov sp, r7
8009d8c: bd80 pop {r7, pc}
8009d8e: bf00 nop
8009d90: 20000754 .word 0x20000754
8009d94: 0800a5f8 .word 0x0800a5f8
08009d98 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009d98: b580 push {r7, lr}
8009d9a: b082 sub sp, #8
8009d9c: af00 add r7, sp, #0
8009d9e: 4603 mov r3, r0
8009da0: 6039 str r1, [r7, #0]
8009da2: 71fb strb r3, [r7, #7]
if(speed == 0)
8009da4: 79fb ldrb r3, [r7, #7]
8009da6: 2b00 cmp r3, #0
8009da8: d105 bne.n 8009db6 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
8009daa: 683a ldr r2, [r7, #0]
8009dac: 4907 ldr r1, [pc, #28] ; (8009dcc <USBD_FS_InterfaceStrDescriptor+0x34>)
8009dae: 4808 ldr r0, [pc, #32] ; (8009dd0 <USBD_FS_InterfaceStrDescriptor+0x38>)
8009db0: f7ff fe7d bl 8009aae <USBD_GetString>
8009db4: e004 b.n 8009dc0 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
8009db6: 683a ldr r2, [r7, #0]
8009db8: 4904 ldr r1, [pc, #16] ; (8009dcc <USBD_FS_InterfaceStrDescriptor+0x34>)
8009dba: 4805 ldr r0, [pc, #20] ; (8009dd0 <USBD_FS_InterfaceStrDescriptor+0x38>)
8009dbc: f7ff fe77 bl 8009aae <USBD_GetString>
}
return USBD_StrDesc;
8009dc0: 4b02 ldr r3, [pc, #8] ; (8009dcc <USBD_FS_InterfaceStrDescriptor+0x34>)
}
8009dc2: 4618 mov r0, r3
8009dc4: 3708 adds r7, #8
8009dc6: 46bd mov sp, r7
8009dc8: bd80 pop {r7, pc}
8009dca: bf00 nop
8009dcc: 20000754 .word 0x20000754
8009dd0: 0800a604 .word 0x0800a604
08009dd4 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
8009dd4: b580 push {r7, lr}
8009dd6: b084 sub sp, #16
8009dd8: af00 add r7, sp, #0
uint32_t deviceserial0, deviceserial1, deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
8009dda: 4b0f ldr r3, [pc, #60] ; (8009e18 <Get_SerialNum+0x44>)
8009ddc: 681b ldr r3, [r3, #0]
8009dde: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
8009de0: 4b0e ldr r3, [pc, #56] ; (8009e1c <Get_SerialNum+0x48>)
8009de2: 681b ldr r3, [r3, #0]
8009de4: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
8009de6: 4b0e ldr r3, [pc, #56] ; (8009e20 <Get_SerialNum+0x4c>)
8009de8: 681b ldr r3, [r3, #0]
8009dea: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
8009dec: 68fa ldr r2, [r7, #12]
8009dee: 687b ldr r3, [r7, #4]
8009df0: 4413 add r3, r2
8009df2: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
8009df4: 68fb ldr r3, [r7, #12]
8009df6: 2b00 cmp r3, #0
8009df8: d009 beq.n 8009e0e <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
8009dfa: 2208 movs r2, #8
8009dfc: 4909 ldr r1, [pc, #36] ; (8009e24 <Get_SerialNum+0x50>)
8009dfe: 68f8 ldr r0, [r7, #12]
8009e00: f000 f814 bl 8009e2c <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
8009e04: 2204 movs r2, #4
8009e06: 4908 ldr r1, [pc, #32] ; (8009e28 <Get_SerialNum+0x54>)
8009e08: 68b8 ldr r0, [r7, #8]
8009e0a: f000 f80f bl 8009e2c <IntToUnicode>
}
}
8009e0e: bf00 nop
8009e10: 3710 adds r7, #16
8009e12: 46bd mov sp, r7
8009e14: bd80 pop {r7, pc}
8009e16: bf00 nop
8009e18: 1ffff7e8 .word 0x1ffff7e8
8009e1c: 1ffff7ec .word 0x1ffff7ec
8009e20: 1ffff7f0 .word 0x1ffff7f0
8009e24: 200000ea .word 0x200000ea
8009e28: 200000fa .word 0x200000fa
08009e2c <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
8009e2c: b480 push {r7}
8009e2e: b087 sub sp, #28
8009e30: af00 add r7, sp, #0
8009e32: 60f8 str r0, [r7, #12]
8009e34: 60b9 str r1, [r7, #8]
8009e36: 4613 mov r3, r2
8009e38: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
8009e3a: 2300 movs r3, #0
8009e3c: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
8009e3e: 2300 movs r3, #0
8009e40: 75fb strb r3, [r7, #23]
8009e42: e027 b.n 8009e94 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
8009e44: 68fb ldr r3, [r7, #12]
8009e46: 0f1b lsrs r3, r3, #28
8009e48: 2b09 cmp r3, #9
8009e4a: d80b bhi.n 8009e64 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
8009e4c: 68fb ldr r3, [r7, #12]
8009e4e: 0f1b lsrs r3, r3, #28
8009e50: b2da uxtb r2, r3
8009e52: 7dfb ldrb r3, [r7, #23]
8009e54: 005b lsls r3, r3, #1
8009e56: 4619 mov r1, r3
8009e58: 68bb ldr r3, [r7, #8]
8009e5a: 440b add r3, r1
8009e5c: 3230 adds r2, #48 ; 0x30
8009e5e: b2d2 uxtb r2, r2
8009e60: 701a strb r2, [r3, #0]
8009e62: e00a b.n 8009e7a <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
8009e64: 68fb ldr r3, [r7, #12]
8009e66: 0f1b lsrs r3, r3, #28
8009e68: b2da uxtb r2, r3
8009e6a: 7dfb ldrb r3, [r7, #23]
8009e6c: 005b lsls r3, r3, #1
8009e6e: 4619 mov r1, r3
8009e70: 68bb ldr r3, [r7, #8]
8009e72: 440b add r3, r1
8009e74: 3237 adds r2, #55 ; 0x37
8009e76: b2d2 uxtb r2, r2
8009e78: 701a strb r2, [r3, #0]
}
value = value << 4;
8009e7a: 68fb ldr r3, [r7, #12]
8009e7c: 011b lsls r3, r3, #4
8009e7e: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
8009e80: 7dfb ldrb r3, [r7, #23]
8009e82: 005b lsls r3, r3, #1
8009e84: 3301 adds r3, #1
8009e86: 68ba ldr r2, [r7, #8]
8009e88: 4413 add r3, r2
8009e8a: 2200 movs r2, #0
8009e8c: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
8009e8e: 7dfb ldrb r3, [r7, #23]
8009e90: 3301 adds r3, #1
8009e92: 75fb strb r3, [r7, #23]
8009e94: 7dfa ldrb r2, [r7, #23]
8009e96: 79fb ldrb r3, [r7, #7]
8009e98: 429a cmp r2, r3
8009e9a: d3d3 bcc.n 8009e44 <IntToUnicode+0x18>
}
}
8009e9c: bf00 nop
8009e9e: 371c adds r7, #28
8009ea0: 46bd mov sp, r7
8009ea2: bc80 pop {r7}
8009ea4: 4770 bx lr
08009ea6 <STORAGE_Init_FS>:
* @brief Initializes over USB FS IP
* @param lun:
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_Init_FS(uint8_t lun)
{
8009ea6: b480 push {r7}
8009ea8: b083 sub sp, #12
8009eaa: af00 add r7, sp, #0
8009eac: 4603 mov r3, r0
8009eae: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN 2 */
return (USBD_OK);
8009eb0: 2300 movs r3, #0
/* USER CODE END 2 */
}
8009eb2: 4618 mov r0, r3
8009eb4: 370c adds r7, #12
8009eb6: 46bd mov sp, r7
8009eb8: bc80 pop {r7}
8009eba: 4770 bx lr
08009ebc <STORAGE_GetCapacity_FS>:
* @param block_num: .
* @param block_size: .
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_GetCapacity_FS(uint8_t lun, uint32_t *block_num, uint16_t *block_size)
{
8009ebc: b580 push {r7, lr}
8009ebe: b084 sub sp, #16
8009ec0: af00 add r7, sp, #0
8009ec2: 4603 mov r3, r0
8009ec4: 60b9 str r1, [r7, #8]
8009ec6: 607a str r2, [r7, #4]
8009ec8: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 3 */
HAL_SD_GetCardInfo(&hsd, &SDCardInfo);
8009eca: 4909 ldr r1, [pc, #36] ; (8009ef0 <STORAGE_GetCapacity_FS+0x34>)
8009ecc: 4809 ldr r0, [pc, #36] ; (8009ef4 <STORAGE_GetCapacity_FS+0x38>)
8009ece: f7fa fa93 bl 80043f8 <HAL_SD_GetCardInfo>
*block_num = SDCardInfo.BlockNbr;
8009ed2: 4b07 ldr r3, [pc, #28] ; (8009ef0 <STORAGE_GetCapacity_FS+0x34>)
8009ed4: 691a ldr r2, [r3, #16]
8009ed6: 68bb ldr r3, [r7, #8]
8009ed8: 601a str r2, [r3, #0]
*block_size = SDCardInfo.BlockSize;
8009eda: 4b05 ldr r3, [pc, #20] ; (8009ef0 <STORAGE_GetCapacity_FS+0x34>)
8009edc: 695b ldr r3, [r3, #20]
8009ede: b29a uxth r2, r3
8009ee0: 687b ldr r3, [r7, #4]
8009ee2: 801a strh r2, [r3, #0]
return (USBD_OK);
8009ee4: 2300 movs r3, #0
/* USER CODE END 3 */
}
8009ee6: 4618 mov r0, r3
8009ee8: 3710 adds r7, #16
8009eea: 46bd mov sp, r7
8009eec: bd80 pop {r7, pc}
8009eee: bf00 nop
8009ef0: 20000954 .word 0x20000954
8009ef4: 20000408 .word 0x20000408
08009ef8 <STORAGE_IsReady_FS>:
* @brief .
* @param lun: .
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_IsReady_FS(uint8_t lun)
{
8009ef8: b480 push {r7}
8009efa: b083 sub sp, #12
8009efc: af00 add r7, sp, #0
8009efe: 4603 mov r3, r0
8009f00: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN 4 */
return (hsd.State == HAL_SD_STATE_READY) ? (USBD_OK) : (USBD_FAIL);
8009f02: 4b07 ldr r3, [pc, #28] ; (8009f20 <STORAGE_IsReady_FS+0x28>)
8009f04: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
8009f08: b2db uxtb r3, r3
8009f0a: 2b01 cmp r3, #1
8009f0c: d101 bne.n 8009f12 <STORAGE_IsReady_FS+0x1a>
8009f0e: 2300 movs r3, #0
8009f10: e000 b.n 8009f14 <STORAGE_IsReady_FS+0x1c>
8009f12: 2302 movs r3, #2
/* USER CODE END 4 */
}
8009f14: 4618 mov r0, r3
8009f16: 370c adds r7, #12
8009f18: 46bd mov sp, r7
8009f1a: bc80 pop {r7}
8009f1c: 4770 bx lr
8009f1e: bf00 nop
8009f20: 20000408 .word 0x20000408
08009f24 <STORAGE_IsWriteProtected_FS>:
* @brief .
* @param lun: .
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_IsWriteProtected_FS(uint8_t lun)
{
8009f24: b480 push {r7}
8009f26: b083 sub sp, #12
8009f28: af00 add r7, sp, #0
8009f2a: 4603 mov r3, r0
8009f2c: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN 5 */
return (USBD_OK);
8009f2e: 2300 movs r3, #0
/* USER CODE END 5 */
}
8009f30: 4618 mov r0, r3
8009f32: 370c adds r7, #12
8009f34: 46bd mov sp, r7
8009f36: bc80 pop {r7}
8009f38: 4770 bx lr
...
08009f3c <STORAGE_Read_FS>:
* @brief .
* @param lun: .
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_Read_FS(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len)
{
8009f3c: b580 push {r7, lr}
8009f3e: b086 sub sp, #24
8009f40: af02 add r7, sp, #8
8009f42: 60b9 str r1, [r7, #8]
8009f44: 607a str r2, [r7, #4]
8009f46: 461a mov r2, r3
8009f48: 4603 mov r3, r0
8009f4a: 73fb strb r3, [r7, #15]
8009f4c: 4613 mov r3, r2
8009f4e: 81bb strh r3, [r7, #12]
/* USER CODE BEGIN 6 */
return (HAL_SD_ReadBlocks(&hsd, buf, blk_addr, blk_len, 10) == HAL_OK) ?
8009f50: 89ba ldrh r2, [r7, #12]
8009f52: 230a movs r3, #10
8009f54: 9300 str r3, [sp, #0]
8009f56: 4613 mov r3, r2
8009f58: 687a ldr r2, [r7, #4]
8009f5a: 68b9 ldr r1, [r7, #8]
8009f5c: 4806 ldr r0, [pc, #24] ; (8009f78 <STORAGE_Read_FS+0x3c>)
8009f5e: f7f9 fd0b bl 8003978 <HAL_SD_ReadBlocks>
8009f62: 4603 mov r3, r0
(USBD_OK) : (USBD_FAIL);
8009f64: 2b00 cmp r3, #0
8009f66: d101 bne.n 8009f6c <STORAGE_Read_FS+0x30>
8009f68: 2300 movs r3, #0
8009f6a: e000 b.n 8009f6e <STORAGE_Read_FS+0x32>
8009f6c: 2302 movs r3, #2
/* USER CODE END 6 */
}
8009f6e: 4618 mov r0, r3
8009f70: 3710 adds r7, #16
8009f72: 46bd mov sp, r7
8009f74: bd80 pop {r7, pc}
8009f76: bf00 nop
8009f78: 20000408 .word 0x20000408
08009f7c <STORAGE_Write_FS>:
* @brief .
* @param lun: .
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_Write_FS(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len)
{
8009f7c: b580 push {r7, lr}
8009f7e: b086 sub sp, #24
8009f80: af02 add r7, sp, #8
8009f82: 60b9 str r1, [r7, #8]
8009f84: 607a str r2, [r7, #4]
8009f86: 461a mov r2, r3
8009f88: 4603 mov r3, r0
8009f8a: 73fb strb r3, [r7, #15]
8009f8c: 4613 mov r3, r2
8009f8e: 81bb strh r3, [r7, #12]
/* USER CODE BEGIN 7 */
return (HAL_SD_WriteBlocks(&hsd, buf, blk_addr, blk_len, 10) == HAL_OK) ?
8009f90: 89ba ldrh r2, [r7, #12]
8009f92: 230a movs r3, #10
8009f94: 9300 str r3, [sp, #0]
8009f96: 4613 mov r3, r2
8009f98: 687a ldr r2, [r7, #4]
8009f9a: 68b9 ldr r1, [r7, #8]
8009f9c: 4806 ldr r0, [pc, #24] ; (8009fb8 <STORAGE_Write_FS+0x3c>)
8009f9e: f7f9 fee5 bl 8003d6c <HAL_SD_WriteBlocks>
8009fa2: 4603 mov r3, r0
(USBD_OK) : (USBD_FAIL);
8009fa4: 2b00 cmp r3, #0
8009fa6: d101 bne.n 8009fac <STORAGE_Write_FS+0x30>
8009fa8: 2300 movs r3, #0
8009faa: e000 b.n 8009fae <STORAGE_Write_FS+0x32>
8009fac: 2302 movs r3, #2
/* USER CODE END 7 */
}
8009fae: 4618 mov r0, r3
8009fb0: 3710 adds r7, #16
8009fb2: 46bd mov sp, r7
8009fb4: bd80 pop {r7, pc}
8009fb6: bf00 nop
8009fb8: 20000408 .word 0x20000408
08009fbc <STORAGE_GetMaxLun_FS>:
* @brief .
* @param None
* @retval .
*/
int8_t STORAGE_GetMaxLun_FS(void)
{
8009fbc: b480 push {r7}
8009fbe: af00 add r7, sp, #0
/* USER CODE BEGIN 8 */
return (STORAGE_LUN_NBR - 1);
8009fc0: 2300 movs r3, #0
/* USER CODE END 8 */
}
8009fc2: 4618 mov r0, r3
8009fc4: 46bd mov sp, r7
8009fc6: bc80 pop {r7}
8009fc8: 4770 bx lr
...
08009fcc <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
8009fcc: b580 push {r7, lr}
8009fce: b084 sub sp, #16
8009fd0: af00 add r7, sp, #0
8009fd2: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
8009fd4: 687b ldr r3, [r7, #4]
8009fd6: 681b ldr r3, [r3, #0]
8009fd8: 4a0d ldr r2, [pc, #52] ; (800a010 <HAL_PCD_MspInit+0x44>)
8009fda: 4293 cmp r3, r2
8009fdc: d113 bne.n 800a006 <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
8009fde: 4b0d ldr r3, [pc, #52] ; (800a014 <HAL_PCD_MspInit+0x48>)
8009fe0: 69db ldr r3, [r3, #28]
8009fe2: 4a0c ldr r2, [pc, #48] ; (800a014 <HAL_PCD_MspInit+0x48>)
8009fe4: f443 0300 orr.w r3, r3, #8388608 ; 0x800000
8009fe8: 61d3 str r3, [r2, #28]
8009fea: 4b0a ldr r3, [pc, #40] ; (800a014 <HAL_PCD_MspInit+0x48>)
8009fec: 69db ldr r3, [r3, #28]
8009fee: f403 0300 and.w r3, r3, #8388608 ; 0x800000
8009ff2: 60fb str r3, [r7, #12]
8009ff4: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
8009ff6: 2200 movs r2, #0
8009ff8: 2100 movs r1, #0
8009ffa: 2014 movs r0, #20
8009ffc: f7f6 fdbd bl 8000b7a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800a000: 2014 movs r0, #20
800a002: f7f6 fdd6 bl 8000bb2 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800a006: bf00 nop
800a008: 3710 adds r7, #16
800a00a: 46bd mov sp, r7
800a00c: bd80 pop {r7, pc}
800a00e: bf00 nop
800a010: 40005c00 .word 0x40005c00
800a014: 40021000 .word 0x40021000
0800a018 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a018: b580 push {r7, lr}
800a01a: b082 sub sp, #8
800a01c: af00 add r7, sp, #0
800a01e: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800a020: 687b ldr r3, [r7, #4]
800a022: f8d3 22e8 ldr.w r2, [r3, #744] ; 0x2e8
800a026: 687b ldr r3, [r7, #4]
800a028: f503 732c add.w r3, r3, #688 ; 0x2b0
800a02c: 4619 mov r1, r3
800a02e: 4610 mov r0, r2
800a030: f7fe fe1a bl 8008c68 <USBD_LL_SetupStage>
}
800a034: bf00 nop
800a036: 3708 adds r7, #8
800a038: 46bd mov sp, r7
800a03a: bd80 pop {r7, pc}
0800a03c <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a03c: b580 push {r7, lr}
800a03e: b082 sub sp, #8
800a040: af00 add r7, sp, #0
800a042: 6078 str r0, [r7, #4]
800a044: 460b mov r3, r1
800a046: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800a048: 687b ldr r3, [r7, #4]
800a04a: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
800a04e: 78fa ldrb r2, [r7, #3]
800a050: 6879 ldr r1, [r7, #4]
800a052: 4613 mov r3, r2
800a054: 009b lsls r3, r3, #2
800a056: 4413 add r3, r2
800a058: 00db lsls r3, r3, #3
800a05a: 440b add r3, r1
800a05c: f503 73be add.w r3, r3, #380 ; 0x17c
800a060: 681a ldr r2, [r3, #0]
800a062: 78fb ldrb r3, [r7, #3]
800a064: 4619 mov r1, r3
800a066: f7fe fe4a bl 8008cfe <USBD_LL_DataOutStage>
}
800a06a: bf00 nop
800a06c: 3708 adds r7, #8
800a06e: 46bd mov sp, r7
800a070: bd80 pop {r7, pc}
0800a072 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a072: b580 push {r7, lr}
800a074: b082 sub sp, #8
800a076: af00 add r7, sp, #0
800a078: 6078 str r0, [r7, #4]
800a07a: 460b mov r3, r1
800a07c: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800a07e: 687b ldr r3, [r7, #4]
800a080: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
800a084: 78fa ldrb r2, [r7, #3]
800a086: 6879 ldr r1, [r7, #4]
800a088: 4613 mov r3, r2
800a08a: 009b lsls r3, r3, #2
800a08c: 4413 add r3, r2
800a08e: 00db lsls r3, r3, #3
800a090: 440b add r3, r1
800a092: 333c adds r3, #60 ; 0x3c
800a094: 681a ldr r2, [r3, #0]
800a096: 78fb ldrb r3, [r7, #3]
800a098: 4619 mov r1, r3
800a09a: f7fe fea1 bl 8008de0 <USBD_LL_DataInStage>
}
800a09e: bf00 nop
800a0a0: 3708 adds r7, #8
800a0a2: 46bd mov sp, r7
800a0a4: bd80 pop {r7, pc}
0800a0a6 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a0a6: b580 push {r7, lr}
800a0a8: b082 sub sp, #8
800a0aa: af00 add r7, sp, #0
800a0ac: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800a0ae: 687b ldr r3, [r7, #4]
800a0b0: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
800a0b4: 4618 mov r0, r3
800a0b6: f7fe ffb1 bl 800901c <USBD_LL_SOF>
}
800a0ba: bf00 nop
800a0bc: 3708 adds r7, #8
800a0be: 46bd mov sp, r7
800a0c0: bd80 pop {r7, pc}
0800a0c2 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a0c2: b580 push {r7, lr}
800a0c4: b084 sub sp, #16
800a0c6: af00 add r7, sp, #0
800a0c8: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800a0ca: 2301 movs r3, #1
800a0cc: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800a0ce: 687b ldr r3, [r7, #4]
800a0d0: 689b ldr r3, [r3, #8]
800a0d2: 2b02 cmp r3, #2
800a0d4: d001 beq.n 800a0da <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800a0d6: f7f6 faa5 bl 8000624 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800a0da: 687b ldr r3, [r7, #4]
800a0dc: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
800a0e0: 7bfa ldrb r2, [r7, #15]
800a0e2: 4611 mov r1, r2
800a0e4: 4618 mov r0, r3
800a0e6: f7fe ff61 bl 8008fac <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800a0ea: 687b ldr r3, [r7, #4]
800a0ec: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
800a0f0: 4618 mov r0, r3
800a0f2: f7fe ff1a bl 8008f2a <USBD_LL_Reset>
}
800a0f6: bf00 nop
800a0f8: 3710 adds r7, #16
800a0fa: 46bd mov sp, r7
800a0fc: bd80 pop {r7, pc}
...
0800a100 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a100: b580 push {r7, lr}
800a102: b082 sub sp, #8
800a104: af00 add r7, sp, #0
800a106: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800a108: 687b ldr r3, [r7, #4]
800a10a: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
800a10e: 4618 mov r0, r3
800a110: f7fe ff5b bl 8008fca <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800a114: 687b ldr r3, [r7, #4]
800a116: 699b ldr r3, [r3, #24]
800a118: 2b00 cmp r3, #0
800a11a: d005 beq.n 800a128 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800a11c: 4b04 ldr r3, [pc, #16] ; (800a130 <HAL_PCD_SuspendCallback+0x30>)
800a11e: 691b ldr r3, [r3, #16]
800a120: 4a03 ldr r2, [pc, #12] ; (800a130 <HAL_PCD_SuspendCallback+0x30>)
800a122: f043 0306 orr.w r3, r3, #6
800a126: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800a128: bf00 nop
800a12a: 3708 adds r7, #8
800a12c: 46bd mov sp, r7
800a12e: bd80 pop {r7, pc}
800a130: e000ed00 .word 0xe000ed00
0800a134 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a134: b580 push {r7, lr}
800a136: b082 sub sp, #8
800a138: af00 add r7, sp, #0
800a13a: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800a13c: 687b ldr r3, [r7, #4]
800a13e: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
800a142: 4618 mov r0, r3
800a144: f7fe ff55 bl 8008ff2 <USBD_LL_Resume>
}
800a148: bf00 nop
800a14a: 3708 adds r7, #8
800a14c: 46bd mov sp, r7
800a14e: bd80 pop {r7, pc}
0800a150 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800a150: b580 push {r7, lr}
800a152: b082 sub sp, #8
800a154: af00 add r7, sp, #0
800a156: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800a158: 4a23 ldr r2, [pc, #140] ; (800a1e8 <USBD_LL_Init+0x98>)
800a15a: 687b ldr r3, [r7, #4]
800a15c: f8c2 32e8 str.w r3, [r2, #744] ; 0x2e8
pdev->pData = &hpcd_USB_FS;
800a160: 687b ldr r3, [r7, #4]
800a162: 4a21 ldr r2, [pc, #132] ; (800a1e8 <USBD_LL_Init+0x98>)
800a164: f8c3 22c0 str.w r2, [r3, #704] ; 0x2c0
hpcd_USB_FS.Instance = USB;
800a168: 4b1f ldr r3, [pc, #124] ; (800a1e8 <USBD_LL_Init+0x98>)
800a16a: 4a20 ldr r2, [pc, #128] ; (800a1ec <USBD_LL_Init+0x9c>)
800a16c: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800a16e: 4b1e ldr r3, [pc, #120] ; (800a1e8 <USBD_LL_Init+0x98>)
800a170: 2208 movs r2, #8
800a172: 605a str r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800a174: 4b1c ldr r3, [pc, #112] ; (800a1e8 <USBD_LL_Init+0x98>)
800a176: 2202 movs r2, #2
800a178: 609a str r2, [r3, #8]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800a17a: 4b1b ldr r3, [pc, #108] ; (800a1e8 <USBD_LL_Init+0x98>)
800a17c: 2200 movs r2, #0
800a17e: 619a str r2, [r3, #24]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800a180: 4b19 ldr r3, [pc, #100] ; (800a1e8 <USBD_LL_Init+0x98>)
800a182: 2200 movs r2, #0
800a184: 61da str r2, [r3, #28]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800a186: 4b18 ldr r3, [pc, #96] ; (800a1e8 <USBD_LL_Init+0x98>)
800a188: 2200 movs r2, #0
800a18a: 621a str r2, [r3, #32]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800a18c: 4816 ldr r0, [pc, #88] ; (800a1e8 <USBD_LL_Init+0x98>)
800a18e: f7f7 fad3 bl 8001738 <HAL_PCD_Init>
800a192: 4603 mov r3, r0
800a194: 2b00 cmp r3, #0
800a196: d001 beq.n 800a19c <USBD_LL_Init+0x4c>
{
Error_Handler( );
800a198: f7f6 fa44 bl 8000624 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800a19c: 687b ldr r3, [r7, #4]
800a19e: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
800a1a2: 2318 movs r3, #24
800a1a4: 2200 movs r2, #0
800a1a6: 2100 movs r1, #0
800a1a8: f7f8 fe34 bl 8002e14 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800a1ac: 687b ldr r3, [r7, #4]
800a1ae: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
800a1b2: 2358 movs r3, #88 ; 0x58
800a1b4: 2200 movs r2, #0
800a1b6: 2180 movs r1, #128 ; 0x80
800a1b8: f7f8 fe2c bl 8002e14 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_MSC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0x98);
800a1bc: 687b ldr r3, [r7, #4]
800a1be: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
800a1c2: 2398 movs r3, #152 ; 0x98
800a1c4: 2200 movs r2, #0
800a1c6: 2181 movs r1, #129 ; 0x81
800a1c8: f7f8 fe24 bl 8002e14 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0xD8);
800a1cc: 687b ldr r3, [r7, #4]
800a1ce: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
800a1d2: 23d8 movs r3, #216 ; 0xd8
800a1d4: 2200 movs r2, #0
800a1d6: 2101 movs r1, #1
800a1d8: f7f8 fe1c bl 8002e14 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_MSC */
return USBD_OK;
800a1dc: 2300 movs r3, #0
}
800a1de: 4618 mov r0, r3
800a1e0: 3708 adds r7, #8
800a1e2: 46bd mov sp, r7
800a1e4: bd80 pop {r7, pc}
800a1e6: bf00 nop
800a1e8: 20000974 .word 0x20000974
800a1ec: 40005c00 .word 0x40005c00
0800a1f0 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800a1f0: b580 push {r7, lr}
800a1f2: b084 sub sp, #16
800a1f4: af00 add r7, sp, #0
800a1f6: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800a1f8: 2300 movs r3, #0
800a1fa: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a1fc: 2300 movs r3, #0
800a1fe: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800a200: 687b ldr r3, [r7, #4]
800a202: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a206: 4618 mov r0, r3
800a208: f7f7 fba1 bl 800194e <HAL_PCD_Start>
800a20c: 4603 mov r3, r0
800a20e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a210: 7bfb ldrb r3, [r7, #15]
800a212: 4618 mov r0, r3
800a214: f000 f96e bl 800a4f4 <USBD_Get_USB_Status>
800a218: 4603 mov r3, r0
800a21a: 73bb strb r3, [r7, #14]
return usb_status;
800a21c: 7bbb ldrb r3, [r7, #14]
}
800a21e: 4618 mov r0, r3
800a220: 3710 adds r7, #16
800a222: 46bd mov sp, r7
800a224: bd80 pop {r7, pc}
0800a226 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800a226: b580 push {r7, lr}
800a228: b084 sub sp, #16
800a22a: af00 add r7, sp, #0
800a22c: 6078 str r0, [r7, #4]
800a22e: 4608 mov r0, r1
800a230: 4611 mov r1, r2
800a232: 461a mov r2, r3
800a234: 4603 mov r3, r0
800a236: 70fb strb r3, [r7, #3]
800a238: 460b mov r3, r1
800a23a: 70bb strb r3, [r7, #2]
800a23c: 4613 mov r3, r2
800a23e: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800a240: 2300 movs r3, #0
800a242: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a244: 2300 movs r3, #0
800a246: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800a248: 687b ldr r3, [r7, #4]
800a24a: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
800a24e: 78bb ldrb r3, [r7, #2]
800a250: 883a ldrh r2, [r7, #0]
800a252: 78f9 ldrb r1, [r7, #3]
800a254: f7f7 fd1b bl 8001c8e <HAL_PCD_EP_Open>
800a258: 4603 mov r3, r0
800a25a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a25c: 7bfb ldrb r3, [r7, #15]
800a25e: 4618 mov r0, r3
800a260: f000 f948 bl 800a4f4 <USBD_Get_USB_Status>
800a264: 4603 mov r3, r0
800a266: 73bb strb r3, [r7, #14]
return usb_status;
800a268: 7bbb ldrb r3, [r7, #14]
}
800a26a: 4618 mov r0, r3
800a26c: 3710 adds r7, #16
800a26e: 46bd mov sp, r7
800a270: bd80 pop {r7, pc}
0800a272 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a272: b580 push {r7, lr}
800a274: b084 sub sp, #16
800a276: af00 add r7, sp, #0
800a278: 6078 str r0, [r7, #4]
800a27a: 460b mov r3, r1
800a27c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a27e: 2300 movs r3, #0
800a280: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a282: 2300 movs r3, #0
800a284: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800a286: 687b ldr r3, [r7, #4]
800a288: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a28c: 78fa ldrb r2, [r7, #3]
800a28e: 4611 mov r1, r2
800a290: 4618 mov r0, r3
800a292: f7f7 fd62 bl 8001d5a <HAL_PCD_EP_Close>
800a296: 4603 mov r3, r0
800a298: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a29a: 7bfb ldrb r3, [r7, #15]
800a29c: 4618 mov r0, r3
800a29e: f000 f929 bl 800a4f4 <USBD_Get_USB_Status>
800a2a2: 4603 mov r3, r0
800a2a4: 73bb strb r3, [r7, #14]
return usb_status;
800a2a6: 7bbb ldrb r3, [r7, #14]
}
800a2a8: 4618 mov r0, r3
800a2aa: 3710 adds r7, #16
800a2ac: 46bd mov sp, r7
800a2ae: bd80 pop {r7, pc}
0800a2b0 <USBD_LL_FlushEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a2b0: b580 push {r7, lr}
800a2b2: b084 sub sp, #16
800a2b4: af00 add r7, sp, #0
800a2b6: 6078 str r0, [r7, #4]
800a2b8: 460b mov r3, r1
800a2ba: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a2bc: 2300 movs r3, #0
800a2be: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a2c0: 2300 movs r3, #0
800a2c2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
800a2c4: 687b ldr r3, [r7, #4]
800a2c6: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a2ca: 78fa ldrb r2, [r7, #3]
800a2cc: 4611 mov r1, r2
800a2ce: 4618 mov r0, r3
800a2d0: f7f7 fed6 bl 8002080 <HAL_PCD_EP_Flush>
800a2d4: 4603 mov r3, r0
800a2d6: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a2d8: 7bfb ldrb r3, [r7, #15]
800a2da: 4618 mov r0, r3
800a2dc: f000 f90a bl 800a4f4 <USBD_Get_USB_Status>
800a2e0: 4603 mov r3, r0
800a2e2: 73bb strb r3, [r7, #14]
return usb_status;
800a2e4: 7bbb ldrb r3, [r7, #14]
}
800a2e6: 4618 mov r0, r3
800a2e8: 3710 adds r7, #16
800a2ea: 46bd mov sp, r7
800a2ec: bd80 pop {r7, pc}
0800a2ee <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a2ee: b580 push {r7, lr}
800a2f0: b084 sub sp, #16
800a2f2: af00 add r7, sp, #0
800a2f4: 6078 str r0, [r7, #4]
800a2f6: 460b mov r3, r1
800a2f8: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a2fa: 2300 movs r3, #0
800a2fc: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a2fe: 2300 movs r3, #0
800a300: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800a302: 687b ldr r3, [r7, #4]
800a304: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a308: 78fa ldrb r2, [r7, #3]
800a30a: 4611 mov r1, r2
800a30c: 4618 mov r0, r3
800a30e: f7f7 fe03 bl 8001f18 <HAL_PCD_EP_SetStall>
800a312: 4603 mov r3, r0
800a314: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a316: 7bfb ldrb r3, [r7, #15]
800a318: 4618 mov r0, r3
800a31a: f000 f8eb bl 800a4f4 <USBD_Get_USB_Status>
800a31e: 4603 mov r3, r0
800a320: 73bb strb r3, [r7, #14]
return usb_status;
800a322: 7bbb ldrb r3, [r7, #14]
}
800a324: 4618 mov r0, r3
800a326: 3710 adds r7, #16
800a328: 46bd mov sp, r7
800a32a: bd80 pop {r7, pc}
0800a32c <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a32c: b580 push {r7, lr}
800a32e: b084 sub sp, #16
800a330: af00 add r7, sp, #0
800a332: 6078 str r0, [r7, #4]
800a334: 460b mov r3, r1
800a336: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a338: 2300 movs r3, #0
800a33a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a33c: 2300 movs r3, #0
800a33e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800a340: 687b ldr r3, [r7, #4]
800a342: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a346: 78fa ldrb r2, [r7, #3]
800a348: 4611 mov r1, r2
800a34a: 4618 mov r0, r3
800a34c: f7f7 fe44 bl 8001fd8 <HAL_PCD_EP_ClrStall>
800a350: 4603 mov r3, r0
800a352: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a354: 7bfb ldrb r3, [r7, #15]
800a356: 4618 mov r0, r3
800a358: f000 f8cc bl 800a4f4 <USBD_Get_USB_Status>
800a35c: 4603 mov r3, r0
800a35e: 73bb strb r3, [r7, #14]
return usb_status;
800a360: 7bbb ldrb r3, [r7, #14]
}
800a362: 4618 mov r0, r3
800a364: 3710 adds r7, #16
800a366: 46bd mov sp, r7
800a368: bd80 pop {r7, pc}
0800a36a <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a36a: b480 push {r7}
800a36c: b085 sub sp, #20
800a36e: af00 add r7, sp, #0
800a370: 6078 str r0, [r7, #4]
800a372: 460b mov r3, r1
800a374: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800a376: 687b ldr r3, [r7, #4]
800a378: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a37c: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800a37e: f997 3003 ldrsb.w r3, [r7, #3]
800a382: 2b00 cmp r3, #0
800a384: da0c bge.n 800a3a0 <USBD_LL_IsStallEP+0x36>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800a386: 78fb ldrb r3, [r7, #3]
800a388: f003 037f and.w r3, r3, #127 ; 0x7f
800a38c: 68f9 ldr r1, [r7, #12]
800a38e: 1c5a adds r2, r3, #1
800a390: 4613 mov r3, r2
800a392: 009b lsls r3, r3, #2
800a394: 4413 add r3, r2
800a396: 00db lsls r3, r3, #3
800a398: 440b add r3, r1
800a39a: 3302 adds r3, #2
800a39c: 781b ldrb r3, [r3, #0]
800a39e: e00b b.n 800a3b8 <USBD_LL_IsStallEP+0x4e>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800a3a0: 78fb ldrb r3, [r7, #3]
800a3a2: f003 027f and.w r2, r3, #127 ; 0x7f
800a3a6: 68f9 ldr r1, [r7, #12]
800a3a8: 4613 mov r3, r2
800a3aa: 009b lsls r3, r3, #2
800a3ac: 4413 add r3, r2
800a3ae: 00db lsls r3, r3, #3
800a3b0: 440b add r3, r1
800a3b2: f503 73b5 add.w r3, r3, #362 ; 0x16a
800a3b6: 781b ldrb r3, [r3, #0]
}
}
800a3b8: 4618 mov r0, r3
800a3ba: 3714 adds r7, #20
800a3bc: 46bd mov sp, r7
800a3be: bc80 pop {r7}
800a3c0: 4770 bx lr
0800a3c2 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800a3c2: b580 push {r7, lr}
800a3c4: b084 sub sp, #16
800a3c6: af00 add r7, sp, #0
800a3c8: 6078 str r0, [r7, #4]
800a3ca: 460b mov r3, r1
800a3cc: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a3ce: 2300 movs r3, #0
800a3d0: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a3d2: 2300 movs r3, #0
800a3d4: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800a3d6: 687b ldr r3, [r7, #4]
800a3d8: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a3dc: 78fa ldrb r2, [r7, #3]
800a3de: 4611 mov r1, r2
800a3e0: 4618 mov r0, r3
800a3e2: f7f7 fc2f bl 8001c44 <HAL_PCD_SetAddress>
800a3e6: 4603 mov r3, r0
800a3e8: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a3ea: 7bfb ldrb r3, [r7, #15]
800a3ec: 4618 mov r0, r3
800a3ee: f000 f881 bl 800a4f4 <USBD_Get_USB_Status>
800a3f2: 4603 mov r3, r0
800a3f4: 73bb strb r3, [r7, #14]
return usb_status;
800a3f6: 7bbb ldrb r3, [r7, #14]
}
800a3f8: 4618 mov r0, r3
800a3fa: 3710 adds r7, #16
800a3fc: 46bd mov sp, r7
800a3fe: bd80 pop {r7, pc}
0800a400 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800a400: b580 push {r7, lr}
800a402: b086 sub sp, #24
800a404: af00 add r7, sp, #0
800a406: 60f8 str r0, [r7, #12]
800a408: 607a str r2, [r7, #4]
800a40a: 461a mov r2, r3
800a40c: 460b mov r3, r1
800a40e: 72fb strb r3, [r7, #11]
800a410: 4613 mov r3, r2
800a412: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800a414: 2300 movs r3, #0
800a416: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800a418: 2300 movs r3, #0
800a41a: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800a41c: 68fb ldr r3, [r7, #12]
800a41e: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
800a422: 893b ldrh r3, [r7, #8]
800a424: 7af9 ldrb r1, [r7, #11]
800a426: 687a ldr r2, [r7, #4]
800a428: f7f7 fd33 bl 8001e92 <HAL_PCD_EP_Transmit>
800a42c: 4603 mov r3, r0
800a42e: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800a430: 7dfb ldrb r3, [r7, #23]
800a432: 4618 mov r0, r3
800a434: f000 f85e bl 800a4f4 <USBD_Get_USB_Status>
800a438: 4603 mov r3, r0
800a43a: 75bb strb r3, [r7, #22]
return usb_status;
800a43c: 7dbb ldrb r3, [r7, #22]
}
800a43e: 4618 mov r0, r3
800a440: 3718 adds r7, #24
800a442: 46bd mov sp, r7
800a444: bd80 pop {r7, pc}
0800a446 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800a446: b580 push {r7, lr}
800a448: b086 sub sp, #24
800a44a: af00 add r7, sp, #0
800a44c: 60f8 str r0, [r7, #12]
800a44e: 607a str r2, [r7, #4]
800a450: 461a mov r2, r3
800a452: 460b mov r3, r1
800a454: 72fb strb r3, [r7, #11]
800a456: 4613 mov r3, r2
800a458: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800a45a: 2300 movs r3, #0
800a45c: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800a45e: 2300 movs r3, #0
800a460: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800a462: 68fb ldr r3, [r7, #12]
800a464: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
800a468: 893b ldrh r3, [r7, #8]
800a46a: 7af9 ldrb r1, [r7, #11]
800a46c: 687a ldr r2, [r7, #4]
800a46e: f7f7 fcbc bl 8001dea <HAL_PCD_EP_Receive>
800a472: 4603 mov r3, r0
800a474: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800a476: 7dfb ldrb r3, [r7, #23]
800a478: 4618 mov r0, r3
800a47a: f000 f83b bl 800a4f4 <USBD_Get_USB_Status>
800a47e: 4603 mov r3, r0
800a480: 75bb strb r3, [r7, #22]
return usb_status;
800a482: 7dbb ldrb r3, [r7, #22]
}
800a484: 4618 mov r0, r3
800a486: 3718 adds r7, #24
800a488: 46bd mov sp, r7
800a48a: bd80 pop {r7, pc}
0800a48c <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Recived Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a48c: b580 push {r7, lr}
800a48e: b082 sub sp, #8
800a490: af00 add r7, sp, #0
800a492: 6078 str r0, [r7, #4]
800a494: 460b mov r3, r1
800a496: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800a498: 687b ldr r3, [r7, #4]
800a49a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
800a49e: 78fa ldrb r2, [r7, #3]
800a4a0: 4611 mov r1, r2
800a4a2: 4618 mov r0, r3
800a4a4: f7f7 fcde bl 8001e64 <HAL_PCD_EP_GetRxCount>
800a4a8: 4603 mov r3, r0
}
800a4aa: 4618 mov r0, r3
800a4ac: 3708 adds r7, #8
800a4ae: 46bd mov sp, r7
800a4b0: bd80 pop {r7, pc}
...
0800a4b4 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800a4b4: b480 push {r7}
800a4b6: b083 sub sp, #12
800a4b8: af00 add r7, sp, #0
800a4ba: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_MSC_BOT_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800a4bc: 4b02 ldr r3, [pc, #8] ; (800a4c8 <USBD_static_malloc+0x14>)
}
800a4be: 4618 mov r0, r3
800a4c0: 370c adds r7, #12
800a4c2: 46bd mov sp, r7
800a4c4: bc80 pop {r7}
800a4c6: 4770 bx lr
800a4c8: 20000144 .word 0x20000144
0800a4cc <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800a4cc: b480 push {r7}
800a4ce: b083 sub sp, #12
800a4d0: af00 add r7, sp, #0
800a4d2: 6078 str r0, [r7, #4]
}
800a4d4: bf00 nop
800a4d6: 370c adds r7, #12
800a4d8: 46bd mov sp, r7
800a4da: bc80 pop {r7}
800a4dc: 4770 bx lr
0800a4de <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a4de: b480 push {r7}
800a4e0: b083 sub sp, #12
800a4e2: af00 add r7, sp, #0
800a4e4: 6078 str r0, [r7, #4]
800a4e6: 460b mov r3, r1
800a4e8: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800a4ea: bf00 nop
800a4ec: 370c adds r7, #12
800a4ee: 46bd mov sp, r7
800a4f0: bc80 pop {r7}
800a4f2: 4770 bx lr
0800a4f4 <USBD_Get_USB_Status>:
* @brief Retuns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800a4f4: b480 push {r7}
800a4f6: b085 sub sp, #20
800a4f8: af00 add r7, sp, #0
800a4fa: 4603 mov r3, r0
800a4fc: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800a4fe: 2300 movs r3, #0
800a500: 73fb strb r3, [r7, #15]
switch (hal_status)
800a502: 79fb ldrb r3, [r7, #7]
800a504: 2b03 cmp r3, #3
800a506: d817 bhi.n 800a538 <USBD_Get_USB_Status+0x44>
800a508: a201 add r2, pc, #4 ; (adr r2, 800a510 <USBD_Get_USB_Status+0x1c>)
800a50a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800a50e: bf00 nop
800a510: 0800a521 .word 0x0800a521
800a514: 0800a527 .word 0x0800a527
800a518: 0800a52d .word 0x0800a52d
800a51c: 0800a533 .word 0x0800a533
{
case HAL_OK :
usb_status = USBD_OK;
800a520: 2300 movs r3, #0
800a522: 73fb strb r3, [r7, #15]
break;
800a524: e00b b.n 800a53e <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800a526: 2302 movs r3, #2
800a528: 73fb strb r3, [r7, #15]
break;
800a52a: e008 b.n 800a53e <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800a52c: 2301 movs r3, #1
800a52e: 73fb strb r3, [r7, #15]
break;
800a530: e005 b.n 800a53e <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800a532: 2302 movs r3, #2
800a534: 73fb strb r3, [r7, #15]
break;
800a536: e002 b.n 800a53e <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800a538: 2302 movs r3, #2
800a53a: 73fb strb r3, [r7, #15]
break;
800a53c: bf00 nop
}
return usb_status;
800a53e: 7bfb ldrb r3, [r7, #15]
}
800a540: 4618 mov r0, r3
800a542: 3714 adds r7, #20
800a544: 46bd mov sp, r7
800a546: bc80 pop {r7}
800a548: 4770 bx lr
800a54a: bf00 nop
0800a54c <__libc_init_array>:
800a54c: b570 push {r4, r5, r6, lr}
800a54e: 2500 movs r5, #0
800a550: 4e0c ldr r6, [pc, #48] ; (800a584 <__libc_init_array+0x38>)
800a552: 4c0d ldr r4, [pc, #52] ; (800a588 <__libc_init_array+0x3c>)
800a554: 1ba4 subs r4, r4, r6
800a556: 10a4 asrs r4, r4, #2
800a558: 42a5 cmp r5, r4
800a55a: d109 bne.n 800a570 <__libc_init_array+0x24>
800a55c: f000 f822 bl 800a5a4 <_init>
800a560: 2500 movs r5, #0
800a562: 4e0a ldr r6, [pc, #40] ; (800a58c <__libc_init_array+0x40>)
800a564: 4c0a ldr r4, [pc, #40] ; (800a590 <__libc_init_array+0x44>)
800a566: 1ba4 subs r4, r4, r6
800a568: 10a4 asrs r4, r4, #2
800a56a: 42a5 cmp r5, r4
800a56c: d105 bne.n 800a57a <__libc_init_array+0x2e>
800a56e: bd70 pop {r4, r5, r6, pc}
800a570: f856 3025 ldr.w r3, [r6, r5, lsl #2]
800a574: 4798 blx r3
800a576: 3501 adds r5, #1
800a578: e7ee b.n 800a558 <__libc_init_array+0xc>
800a57a: f856 3025 ldr.w r3, [r6, r5, lsl #2]
800a57e: 4798 blx r3
800a580: 3501 adds r5, #1
800a582: e7f2 b.n 800a56a <__libc_init_array+0x1e>
800a584: 0800a668 .word 0x0800a668
800a588: 0800a668 .word 0x0800a668
800a58c: 0800a668 .word 0x0800a668
800a590: 0800a66c .word 0x0800a66c
0800a594 <memset>:
800a594: 4603 mov r3, r0
800a596: 4402 add r2, r0
800a598: 4293 cmp r3, r2
800a59a: d100 bne.n 800a59e <memset+0xa>
800a59c: 4770 bx lr
800a59e: f803 1b01 strb.w r1, [r3], #1
800a5a2: e7f9 b.n 800a598 <memset+0x4>
0800a5a4 <_init>:
800a5a4: b5f8 push {r3, r4, r5, r6, r7, lr}
800a5a6: bf00 nop
800a5a8: bcf8 pop {r3, r4, r5, r6, r7}
800a5aa: bc08 pop {r3}
800a5ac: 469e mov lr, r3
800a5ae: 4770 bx lr
0800a5b0 <_fini>:
800a5b0: b5f8 push {r3, r4, r5, r6, r7, lr}
800a5b2: bf00 nop
800a5b4: bcf8 pop {r3, r4, r5, r6, r7}
800a5b6: bc08 pop {r3}
800a5b8: 469e mov lr, r3
800a5ba: 4770 bx lr
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