Wyon Bi 230f7f0610 drm/bridge: Add support for Lontium LT8912 ...

The Lontium LT8912 MIPI-DSI to LVDS and HDMI/MHL bridge features a
single-channel MIPI D-PHY receiver front-end configuration with 4 data
lanes per channel operating at 1.5Gbps per data lane and a maximum
input bandwidth of 6Gbps.

Change-Id: I7733ea5f33094151bb62e62406561cc0025cf900
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

2018-05-10 18:24:26 +08:00

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arm

MALI: rockchip: Ensure that set voltage when update devfreq for the first time

2018-05-09 09:25:07 +08:00

drm

drm/bridge: Add support for Lontium LT8912

2018-05-10 18:24:26 +08:00

host1x

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ipu-v3

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rogue

rk: add SPDX license identifier to files with no license

2018-01-31 20:56:06 +08:00

rogue_m

rk: add SPDX license identifier to files with no license

2018-01-31 20:56:06 +08:00

vga

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Makefile

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