It is not safe to call set_cpus_allowed() in interrupt
context and disabling the apics is complicated code.
So unconditionally skip machine_shutdown in machine_emergency_reboot
on x86_64.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
set_cpus_allowed is not safe in interrupt context
and disabling apics is complicated code so don't
call machine_shutdown on i386 from emergency_restart().
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
When the kernel is working well and we want to restart cleanly
kernel_restart is the function to use. But in many instances
the kernel wants to reboot when thing are expected to be working
very badly such as from panic or a software watchdog handler.
This patch adds the function emergency_restart() so that
callers can be clear what semantics they expect when calling
restart. emergency_restart() is expected to be callable
from interrupt context and possibly reliable in even more
trying circumstances.
This is an initial generic implementation for all architectures.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Because the factors of sys_reboot don't exist people calling
into the reboot path duplicate the code badly, leading to
inconsistent expectations of code in the reboot path.
This patch should is just code motion.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Convert explicit gcc asm-based memory barriers into smp_mb() calls.
These change between barrier() and the ARMv6 data memory barrier
instruction depending on whether ARMv6 SMP is enabled.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Dimitry Andric
- Change S3C2440_IISCON_MPLL to S3C2440_IISMOD_MPLL:
The S3C2440 IISCON register doesn\'t control the master clock selection, this is done with the IISMOD register.
- Correct S3C2410_IISMOD_256FS and S3C2410_IISMOD_384FS:
This is set via bit 2 of IISMOD, not bit 1.
- Add S3C2410_IISCON_PSCEN (prescaler enable), for completeness\' sake.
Signed-off-by: Dimitry Andric <dimitry.andric@tomtom.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
These two bits were accesses non-atomically from assembler
code. So, in order to eliminate any potential races resulting
from that, move these pieces of state into two bytes elsewhere
in struct thread_info.
Signed-off-by: David S. Miller <davem@davemloft.net>
It is only used by some localized code in irq.c, and also
delete enable_prom_timer() as that is totally unused.
Signed-off-by: David S. Miller <davem@davemloft.net>
rwsem_atomic_update and rwsem_atomic_add can be implemented
straightly using atomic_*() routines.
Also, rwsem_cmpxchgw() is totally unused, kill it.
Signed-off-by: David S. Miller <davem@davemloft.net>
Noticed this while comparing sparc64's bitops.h to ppc64's.
We can cast the volatile memory argument to be non-volatile.
While we're here, __inline__ --> inline.
Signed-off-by: David S. Miller <davem@davemloft.net>
This one ends up using an inline asm format that claims to read memory
and then clobber it (rather than just write it directly), which made it
easier to use the existing "alternative_input()" infrastructure support.
Now the fxsave code matches the fxrstor.
More unusable TCF_META_* match types that need to get eliminated
before 2.6.13 goes out the door.
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Thomas Graf <tgraf@suug.ch>
