Commit Graph

1107 Commits

Author SHA1 Message Date
Linus Torvalds
b53343fc6c Merge tag 'edac_urgent_for_4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC fix from Borislav Petkov:
 "A build fix for octeon_edac from Aaro Koskinen"

* tag 'edac_urgent_for_4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC, octeon: Fix broken build due to model helper renames
2015-07-03 12:10:12 -07:00
Aaro Koskinen
75a15a7864 EDAC, octeon: Fix broken build due to model helper renames
Commit

  debe6a623d ("MIPS: OCTEON: Update octeon-model.h code for new SoCs.")

renamed some SoC model helper functions, but forgot to update the EDAC
drivers resulting in build failures. Fix that.

Cc: stable@vger.kernel.org # v4.0+
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1435747132-10954-1-git-send-email-aaro.koskinen@nokia.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-07-02 10:46:28 +02:00
Linus Torvalds
8d7804a2f0 Merge tag 'driver-core-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core updates from Greg KH:
 "Here is the driver core / firmware changes for 4.2-rc1.

  A number of small changes all over the place in the driver core, and
  in the firmware subsystem.  Nothing really major, full details in the
  shortlog.  Some of it is a bit of churn, given that the platform
  driver probing changes was found to not work well, so they were
  reverted.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'driver-core-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (31 commits)
  Revert "base/platform: Only insert MEM and IO resources"
  Revert "base/platform: Continue on insert_resource() error"
  Revert "of/platform: Use platform_device interface"
  Revert "base/platform: Remove code duplication"
  firmware: add missing kfree for work on async call
  fs: sysfs: don't pass count == 0 to bin file readers
  base:dd - Fix for typo in comment to function driver_deferred_probe_trigger().
  base/platform: Remove code duplication
  of/platform: Use platform_device interface
  base/platform: Continue on insert_resource() error
  base/platform: Only insert MEM and IO resources
  firmware: use const for remaining firmware names
  firmware: fix possible use after free on name on asynchronous request
  firmware: check for file truncation on direct firmware loading
  firmware: fix __getname() missing failure check
  drivers: of/base: move of_init to driver_init
  drivers/base: cacheinfo: fix annoying typo when DT nodes are absent
  sysfs: disambiguate between "error code" and "failure" in comments
  driver-core: fix build for !CONFIG_MODULES
  driver-core: make __device_attach() static
  ...
2015-06-26 15:07:37 -07:00
Linus Torvalds
da996f7310 Merge tag 'edac/v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac
Pull edac updates from Mauro Carvalho Chehab:
 "Some fixes and additions to the EDAC driver used on modern Intel x86
  CPUs.  It includes support for Broadwell EP/EX platforms and fixes for
  motherboards with more than 2 CPU sockets"

* tag 'edac/v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac:
  sb_edac: support for Broadwell -EP and -EX
  sb_edac: Fix support for systems with two home agents per socket
  sb_edac: Fix a typo and a thinko in address handling for Haswell
  EDAC: Remove arbitrary limit on number of channels
2015-06-25 18:22:20 -07:00
Borislav Petkov
cda9459da7 EDAC, mce_amd_inj: Set MISCV on injection
When during injection we populate MCi_MISC by writing into misc, we need
to set the MiscV bit in the corresponding MCi_STATUS register which
denotes that there's valid info in the MCi_MISC register.

Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:17:38 +02:00
Borislav Petkov
6d1e9bf5b0 EDAC, mce_amd_inj: Move bit preparations before the injection
We do get_online_cpus() and then start noodling with the bits. Do that
*before* we grab the hotplug lock.

Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:17:37 +02:00
Borislav Petkov
f2f3dca1b7 EDAC, mce_amd_inj: Cleanup and simplify README
Save us an indentation level, widen to 80 cols, make the text more
succinct and slender. Use i as the bank variable, same as what the
documentation uses.

Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:17:34 +02:00
Alan Tull
6f2b6422d4 EDAC, altera: Do not allow suspend when EDAC is enabled
Suspend-to-RAM and EDAC support are mutually exclusive on SOCFPGA. If
EDAC is enabled, it will prevent the platform from going into suspend.

The reason is that the IRQ vectors for OCRAM reside on DDR and in
Suspend-to-RAM mode we're executing out of OCRAM. If an ECC error
occurs, we can't handle it so it was decided to make them mutually
exclusive.

Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: dinh.linux@gmail.com
Cc: dougthompson@xmission.com
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@osg.samsung.com
Cc: tthayer@opensource.altera.com
Link: http://lkml.kernel.org/r/1433512155-9906-1-git-send-email-dinguyen@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:16:12 +02:00
kbuild test robot
de2776787f EDAC, mce_amd_inj: Make inj_type static
It is used there only anyway.

Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Cc: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: Mauro Carvalho Chehab <m.chehab@samsung.com>
Cc: kbuild-all@01.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20150605112426.GA97073@lkp-sb04
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:16:11 +02:00
Thor Thayer
73bcc942f4 EDAC, altera: Add Arria10 EDAC support
The Arria10 SDRAM and ECC system differs significantly from the
Cyclone5 and Arria5 SoCs. This patch adds support for the Arria10
SoC.
1) IRQ handler needs to support SHARED IRQ
2) Support sberr and dberr address reporting.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-4-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:16:09 +02:00
Thor Thayer
143f4a5ac5 EDAC, altera: Refactor for Altera CycloneV SoC
The Arria10 SoC uses a completely different SDRAM controller from the
earlier CycloneV and ArriaV SoCs. This patch abstracts the SDRAM bits
for the CycloneV/ArriaV SoCs in preparation for the Arria10 support.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:16:08 +02:00
Thor Thayer
f9ae487e04 EDAC, altera: Generalize driver to use DT Memory size
The Arria10 SOC uses a completely different SDRAM controller from the
earlier CycloneV and ArriaV SoCs. The memory size is calculated in the
bootloader and passed via the device tree. Using this device tree size
is more generic than using the register fields to calculate the memory
size for different SDRAM controllers.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:16:07 +02:00
Aravind Gopalakrishnan
99e21fea47 EDAC, mce_amd_inj: Add README file
Provide information about each injection file and its usage for ease of
use and in-band documentation. This is a good idea adapted from ftrace.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@osg.samsung.com
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1433277362-10911-7-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 18:15:51 +02:00
Aravind Gopalakrishnan
4c6034e8e1 EDAC, mce_amd_inj: Add individual permissions field to dfs_node
Add per-file permissions to the dfs_fls[] array.

In a later patch, we will add a README file that needs different
permissions. Hence the move here to add a perm field.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@osg.samsung.com
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1433277362-10911-6-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-24 15:17:18 +02:00
Aravind Gopalakrishnan
0451d14d05 EDAC, mce_amd_inj: Modify flags attribute to use string arguments
Use strings such as "hw" or "sw" to indicate the type of error injection
to be performed.

Current flags attribute derives the meanings of values that can be
programmed into it from asm/mce.h. Moving to defined strings for the
attribute allows this module to be self-sufficient and removes the
dependency. Also, we can introduce new flags as and when needed without
having to worry about conflicting with the flags already defined in
asm/mce.h.

Also, modify do_inject() to use the newly defined injection_type enum to
figure out the injection mechanism we need to use

Suggested-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@osg.samsung.com
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1433277362-10911-4-git-send-email-Aravind.Gopalakrishnan@amd.com
[ Use strstrip() return value. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-03 16:47:51 +02:00
Aravind Gopalakrishnan
685d46d72b EDAC, mce_amd_inj: Read out number of MCE banks from the hardware
The number of banks for a given processor is encoded in
MSR_IA32_MCG_CAP[7:0]. So obtain the value from that MSR and use it for
sanity checking in inj_bank_set() instead of doing a family/model check.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@osg.samsung.com
Link: http://lkml.kernel.org/r/1432753418-2985-3-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-03 16:18:22 +02:00
Aravind Gopalakrishnan
e7f2ea1dbe EDAC, mce_amd_inj: Use MCE_INJECT_GET macro for bank node too
inj_bank_get() is generic enough that we can use the MCE_INJECT_GET
macro instead.

No functionality change.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@osg.samsung.com
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1433277362-10911-2-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-03 16:16:21 +02:00
Tony Luck
fa2ce64f85 sb_edac: support for Broadwell -EP and -EX
Basic support for the single socket Broadwell-DE processor
was added back in commit 1f39581a9a
   sb_edac: Add support for Broadwell-DE processor
This patch extends Broadwell support to cover the two
socket "-EP" and four socket "-EX" versions of Broadwell.
Only tested on the 2 socket - but this code is largely
cloned from the Haswell path.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-06-03 10:10:59 -03:00
Tony Luck
7d375bffa5 sb_edac: Fix support for systems with two home agents per socket
First noticed a problem on a 4 socket machine where EDAC only reported
half the DIMMS.  Tracked this down to the code that assumes that systems
with two home agents only have two memory channels on each agent. This
is true on 2 sockect ("-EP") machines. But four socket ("-EX") machines
have four memory channels on each home agent.

The old code would have had problems on two socket systems as it did
a shuffling trick to make the internals of the code think that the
channels from the first agent were '0' and '1', with the second agent
providing '2' and '3'. But the code didn't uniformly convert from
{ha,channel} tuples to this internal representation.

New code always considers up to eight channels.
On a machine with a single home agent these map easily to edac channels
0, 1, 2, 3. On machines with two home agents we map using:
  edac_channel = 4*ha# + channel
So on a -EP machine where each home agent supports only two channels
we'll fill in channels 0, 1, 4, 5, and on a -EX machine we use all of 0,
1, 2, 3, 4, 5, 6, 7.

[mchehab@osg.samsung.com: fold a fixup patch as per Tony's request and fixed
 a few CodingStyle issues]
Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Aristeu Rozanski <aris@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-06-03 10:10:52 -03:00
Tony Luck
bb89e7141a sb_edac: Fix a typo and a thinko in address handling for Haswell
typo: "a7mode" chooses whether to use bits {8, 7, 9} or {8, 7, 6}
in the algorithm to spread access between memory resources. But
the non-a7mode path was incorrectly using GET_BITFIELD(addr, 7, 9)
and so picking bits {9, 8, 7}

thinko: BIT(1) of the dram_rule registers chooses whether to just
use the {8, 7, 6} (or {8, 7, 9}) bits mentioned above as they are,
or to XOR them with bits {18, 17, 16} but the code inverted the
test. We need the additional XOR when dram_rule{1} == 0.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Aristeu Rozanski <aris@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-06-03 10:10:47 -03:00
Tony Luck
c44696fff0 EDAC: Remove arbitrary limit on number of channels
Currently set to "6", but the reset of the code will dynamically
allocate as needed.  We need to go to "8" today, but drop the check
completely to save doing this again when we need even larger numbers.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Aristeu Rozanski <aris@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-06-03 10:10:22 -03:00
Arnd Bergmann
451bb7fbcc EDAC, xgene: Fix cpuid abuse
The new x-gene EDAC driver incorrectly tried to figure out the version
of one of its IP blocks by looking at the version of the CPU core, which
is only vagely related.

This removes the incorrect code and instead uses the version of the IP
block in the compatible string where it belongs.

Found using build testing on x86, which does not provide the arm64
cpuid interface.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[ Changed subnode to "apm,xgene-edac-pmd-v2", adjusted check. ]
Signed-off-by: Loc Ho <lho@apm.com>
Cc: devicetree@vger.kernel.org
Cc: dougthompson@xmission.com
Cc: ijc+devicetree@hellion.org.uk
Cc: jcm@redhat.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mark.rutland@arm.com
Cc: mchehab@osg.samsung.com
Cc: patches@apm.com
Cc: robh+dt@kernel.org
Link: http://lkml.kernel.org/r/3195065.IK73o60xya@wuerfel
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-02 19:07:50 +02:00
York Sun
2ce39109a5 EDAC, mpc85xx: Extend error address to 64 bit
Extend err_addr to cover 64 bits for DDR errors.

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Johannes Thumshirn <morbidrsa@gmail.com>
Cc: Mingkai.hu@freescale.com
Link: http://lkml.kernel.org/r/1431425022-44766-2-git-send-email-Wenbin.Song@freescale.com
Signed-off-by: songwenbin <wenbin.song@freescale.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-05-31 12:51:08 +02:00
York Sun
74210267a5 EDAC, mpc8xxx: Adapt for FSL SoC
Remove mpc83xx and mpc85xx as dependency.

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Johannes Thumshirn <morbidrsa@gmail.com>
Cc: Mingkai.hu@freescale.com
Link: http://lkml.kernel.org/r/1431425022-44766-1-git-send-email-Wenbin.Song@freescale.com
Signed-off-by: songwenbin <wenbin.song@freescale.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-05-31 12:50:31 +02:00
Borislav Petkov
cc14c5a808 EDAC, edac_stub: Drop arch-specific include
<asm/edac.h> contains only the arch-specific scrubbing function and is
thus not needed in edac_stub.c. Kill it.

Signed-off-by: Borislav Petkov <bp@suse.de>
2015-05-29 22:01:00 +02:00