Commit Graph

10658 Commits

Author SHA1 Message Date
Matthew Wilcox
b0f40ea04a [IA64] Fix DISCONTIGMEM without VIRTUAL_MEM_MAP
make allnoconfig currently fails to build because it selects DISCONTIGMEM
without VIRTUAL_MEM_MAP.  I see no particular reason this combination
ought to fail, so I fixed it by:

 - Including memory_model.h in all circumstances, except when both
   DISCONTIGMEM and VIRTUAL_MEM_MAP are enabled.
 - Defining ia64_pfn_valid() to 1 unless VIRTUAL_MEM_MAP is enabled

Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:24:03 -08:00
Venkatesh Pallipadi
17e77b1cc3 [PATCH] Add support for type argument in PAL_GET_PSTATE
PAL_GET_PSTATE accepts a type argument to return different kinds of
frequency information.
Refer: Intel Itanium®Architecture Software Developer's Manual -
Volume 2: System Architecture, Revision 2.2
(http://developer.intel.com/design/itanium/manuals/245318.htm)

Add the support for type argument and use Instantaneous frequency
in the acpi driver.

Also fix a bug, where in return value of PAL_GET_PSTATE was getting compared
with 'control' bits instead of 'status' bits.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:21:55 -08:00
Chen, Kenneth W
007d77d0c5 [IA64] implement csum_ipv6_magic for ia64.
The asm version is 4.4 times faster than the generic C version and
10X smaller in code size.

Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:17:26 -08:00
Russ Anderson
5b4d5681ff [IA64] More Itanium PAL spec updates
Additional updates to conform with Rev 2.2 of Volume 2 of "Intel
Itanium Architecture Software Developer's Manual" (January 2006).

Add pal_bus_features_s bits 52 & 53 (page 2:347)
Add pal_vm_info_2_s field max_purges (page 2:2:451)
Add PAL_GET_HW_POLICY call (page 2:381)
Add PAL_SET_HW_POLICY call (page 2:439)

Sample output before:
---------------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/vm_info
Physical Address Space         : 50 bits
Virtual Address Space          : 61 bits
Protection Key Registers(PKR)  : 16
Implemented bits in PKR.key    : 24
Hash Tag ID                    : 0x2
Size of RR.rid                 : 24
Supported memory attributes    : WB, UC, UCE, WC, NaTPage
---------------------------------------------------------------------

Sample output after:
---------------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/vm_info
Physical Address Space         : 50 bits
Virtual Address Space          : 61 bits
Protection Key Registers(PKR)  : 16
Implemented bits in PKR.key    : 24
Hash Tag ID                    : 0x2
Max Purges                     : 1
Size of RR.rid                 : 24
Supported memory attributes    : WB, UC, UCE, WC, NaTPage
---------------------------------------------------------------------

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:10:16 -08:00
Russ Anderson
6533bdedac [IA64] Add se bit to Processor State Parameter structure
Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's
Manual" (January 2006) adds a se bit to the Processor State Parameter
fields (pages 2:299).  This patch gets the structs back in sync
with the spec.

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:02:53 -08:00
Russ Anderson
323cbb0991 [IA64] Add dp bit to cache and bus check structs
Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's
Manual" (January 2006) adds a dp bit to the cache_check and bus_check
fields (pages 2:401-2:404).  This patch gets the structs back in sync
with the spec.

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:02:38 -08:00
Zou Nan hai
a79561134f [IA64] IA64 Kexec/kdump
Changes and updates.

1. Remove fake rendz path and related code according to discuss with Khalid Aziz.
2. fc.i offset fix in relocate_kernel.S.
3. iospic shutdown code eoi and mask race fix from Fujitsu.
4. Warm boot hook in machine_kexec to SN SAL code from Jack Steiner.
5. Send slave to SAL slave loop patch from Jay Lan.
6. Kdump on non-recoverable MCA event patch from Jay Lan
7. Use CTL_UNNUMBERED in kdump_on_init sysctl.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 09:51:35 -08:00
Linus Torvalds
3f5e573a08 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Import updates from i386's i8259.c
  [MIPS] *-berr: Header inclusions for DEC bus error handlers
  [MIPS] Compile __do_IRQ() when really needed
  [MIPS] genirq: use name instead of typename
  [MIPS] Do not use handle_level_irq for ioasic_dma_irq_type.
  [MIPS] pte_offset(dir,addr): parenthesis fix
2006-12-06 16:17:37 -08:00
Linus Torvalds
f9e9dcb38f x86[-64]:Remove 'volatile' from atomic_t
Any code that relies on the volatile would be a bug waiting to happen
anyway.

Don't encourage people to think that putting 'volatile' on data
structures somehow fixes problems.  We should always use proper locking
(and other serialization) techniques.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06 14:42:57 -08:00
Art Haas
16afea0255 [PATCH] Remove 'volatile' from spinlock_types
This is a resubmission of patches originally created by Ingo Molnar.
The link below is the initial (?) posting of the patch.

  http://marc.theaimsgroup.com/?l=linux-kernel&m=115217423929806&w=2

Remove 'volatile' from spinlock_types as it causes GCC to generate bad
code (see link) and locking should be used on kernel data.

Signed-off-by: Art Haas <ahaas@airmail.net>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06 14:39:53 -08:00
Atsushi Nemoto
2cafe97846 [MIPS] Import updates from i386's i8259.c
Import many updates from i386's i8259.c, especially genirq transitions.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-06 20:16:09 +00:00
Franck Bui-Huu
5b70a31708 [MIPS] pte_offset(dir,addr): parenthesis fix
This patch adds missing parenthesis around 'dir' argument in pte_offset()
macro definition.

It also removes an extra space in the definition of pte_offset_kernel()
macro.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-06 20:16:08 +00:00
Linus Torvalds
dd6a7c19e4 Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (43 commits)
  sh: sh775x/titan fixes for irq header changes.
  sh: update r7780rp defconfig.
  sh: compile fixes for header cleanup.
  sh: Fixup pte_mkhuge() build failure.
  sh: set KBUILD_IMAGE to something sensible.
  sh: show held locks in stack trace with lockdep.
  sh: platform_pata support for R7780RP
  sh: stacktrace/lockdep/irqflags tracing support.
  sh: Fixup movli.l/movco.l atomic ops for gcc4.
  sh: dyntick infrastructure.
  sh: Clock framework tidying.
  sh: Turn off IRQs around get_timer_offset() calls.
  sh: Get the PGD right in oops case with 64-bit PTEs.
  sh: Fix store queue bitmap end.
  sh: More flexible + SH7780 earlyprintk SCIF support.
  sh: Fixup various PAGE_SIZE == 4096 assumptions.
  sh: Fixup 4K irq stacks.
  sh: dma-api channel capability extensions.
  sh: Drop name overload in dma-sh.
  sh: Make dma-isa depend on ISA_DMA_API.
  ...
2006-12-06 08:10:55 -08:00
Linus Torvalds
dd8856bda5 Merge git://git.infradead.org/users/dhowells/workq-2.6
* git://git.infradead.org/users/dhowells/workq-2.6:
  Actually update the fixed up compile failures.
  WorkQueue: Fix up arch-specific work items where possible
  WorkStruct: make allyesconfig
  WorkStruct: Pass the work_struct pointer instead of context data
  WorkStruct: Merge the pending bit into the wq_data pointer
  WorkStruct: Typedef the work function prototype
  WorkStruct: Separate delayable and non-delayable events.
2006-12-06 08:01:37 -08:00
Gavin Lambert
3363c9b0ed [PATCH] m68knommu: remove FP conditionals in ucontext struct
The first patch is to the 2.6 kernel include file (for m68knommu), to get
rid of the conditional definitions, otherwise the structures have different
sizes depending on whether there's an FPU or not.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06 07:41:26 -08:00
Greg Ungerer
dd93e857fc [PATCH] m68knommu: implement irq_canonicalize()
Add a null definition for irq_canonicalize(). It is used in the gerneric
serial subsystem code, can't compile without it.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06 07:41:26 -08:00
Greg Ungerer
5340be5909 [PATCH] m68knommu: create rtc.h
This adds support for RTCs (through genrtc) for M68KNOMMU.

Board-specific code will have to link the appropriate RTC driver to the
mach_hwclk callback, at minimum.

Signed-off-by: Gavin Lambert <gavinl@compacsort.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06 07:41:26 -08:00
David Howells
06328b4f79 Actually update the fixed up compile failures.
Signed-Off-By: David Howells <dhowells@redhat.com>
2006-12-06 15:02:26 +00:00
David Howells
4796b71fbb Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:

	drivers/pcmcia/ds.c

Fix up merge failures with Linus's head and fix new compile failures.

Signed-Off-By: David Howells <dhowells@redhat.com>
2006-12-06 15:01:18 +00:00
Jamie Lenehan
ea0f8feaa0 sh: sh775x/titan fixes for irq header changes.
The following moves the creation of IPR interupts into setup-7750.c
and updates a few other things to make it all work after the "Drop
CPU subtype IRQ headers" commit. It boots and runs fine on my titan
board.

 - adds an ipr_idx to the ipr_data and uses a function in the subtype
   code to calculate the address of the IPR registers

 - adds a function to enable individual interrupt mode for externals
   in the subtype code and calls that from the titan board code
   instead of doing it directly.

 - I changed the shift in the ipr_data to be the actual # of bits to
   shift, instead of the numnber / 4 - made it easier to match with
   the manual.

Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 12:05:02 +09:00
Paul Mundt
5b67954e80 sh: Fixup pte_mkhuge() build failure.
When hugetlbpage support isn't enabled, this can be bogus.
Wrap it back in _PAGE_FLAGS_HARD to avoid changes to the
base PTE when not aiming for larger sizes.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:20:53 +09:00
Paul Mundt
afbfb52e47 sh: stacktrace/lockdep/irqflags tracing support.
Wire up all of the essentials for lockdep..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
c03c69610b sh: Fixup movli.l/movco.l atomic ops for gcc4.
gcc4 gets a bit pissy about the outputs:

include/asm/atomic.h: In function 'atomic_add':
include/asm/atomic.h:37: error: invalid lvalue in asm statement
include/asm/atomic.h:30: error: invalid lvalue in asm output 1
...

this ended up being a thinko anyways, so just fix it up.

Verified for proper behaviour with the older toolchains, too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
bd156147eb sh: dyntick infrastructure.
This adds basic NO_IDLE_HZ support to the SH timer API so timers
are able to wire it up. Taken from the ARM version, as it fit in
to our API with very few changes needed.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
1d118562c2 sh: Clock framework tidying.
This syncs up the SH clock framework with the linux/clk.h API,
for which there were only some minor changes required, namely
the clk_get() dev_id and subsequent callsites.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00