Commit Graph

290 Commits

Author SHA1 Message Date
Ralf Baechle
fd2a4f1183 [MIPS] Undefine scr_writew and scr_readw in <asm/vga.h>.
This is gluing the build of cirrusfb but really the mess that would need
cleaning and fixing is <video/vga.h> and <linux/vt_buffer.h> ...
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-09 18:05:10 +00:00
Ralf Baechle
778e2ac597 [MIPS] Fix build error on processors that don's support copy-on-write.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-28 17:04:20 +00:00
Ralf Baechle
92f22c183c [MIPS] Fix atomic*_sub_if_positive return value.
Reported and initial fix by Thomas Koeller <thomas.koeller@baslerweb.com>,
rewritten by me.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-27 17:30:36 +00:00
Ralf Baechle
9b6695a8ad [MIPS] SMP: Fix initialization order bug.
A recent change requires cpu_possible_map to be initialized before
smp_sched_init() but most MIPS platforms were initializing their
processors in the prom_prepare_cpus callback of smp_prepare_cpus.  The
simple fix of calling prom_prepare_cpus from one of the earlier SMP
initialization hooks doesn't work well either since IPIs may require
init_IRQ() to have completed, so bit the bullet and split
prom_prepare_cpus into two initialization functions, plat_smp_setup
which is called early from setup_arch and plat_prepare_cpus called where
prom_prepare_cpus used to be called.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-27 17:30:36 +00:00
Ralf Baechle
3e6cb2d38a [MIPS] Use "=R" constraint to avoid compiler errors in cmpxchg().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-27 17:30:35 +00:00
Ralf Baechle
1242737735 [MIPS] Follow Uli's latest *at syscall changes.
(This really is only the half of the patch which was forgotten in
326a625748 ...)
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-21 16:58:23 +00:00
Atsushi Nemoto
8ecbbcaf08 [MIPS] Fixes for uaccess.h with gcc >= 4.0.1
It seems current get_user() incorrectly sign-extend an unsigned int
value on 64bit kernel.  I think this is because '(__typeof__(val))'
cast in final assignment.  I suppose the cast should be
'(__typeof__(*(addr))'.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-21 16:58:22 +00:00
Michael S. Tsirkin
5f6164f309 [PATCH] add asm-generic/mman.h
Make new MADV_REMOVE, MADV_DONTFORK, MADV_DOFORK consistent across all
arches.  The idea is to make it possible to use them portably even before
distros include them in libc headers.

Move common flags to asm-generic/mman.h

Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il>
Cc: Roland Dreier <rolandd@cisco.com>
Cc: Badari Pulavarty <pbadari@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-15 15:32:22 -08:00
Michael S. Tsirkin
f822566165 [PATCH] madvise MADV_DONTFORK/MADV_DOFORK
Currently, copy-on-write may change the physical address of a page even if the
user requested that the page is pinned in memory (either by mlock or by
get_user_pages).  This happens if the process forks meanwhile, and the parent
writes to that page.  As a result, the page is orphaned: in case of
get_user_pages, the application will never see any data hardware DMA's into
this page after the COW.  In case of mlock'd memory, the parent is not getting
the realtime/security benefits of mlock.

In particular, this affects the Infiniband modules which do DMA from and into
user pages all the time.

This patch adds madvise options to control whether memory range is inherited
across fork.  Useful e.g.  for when hardware is doing DMA from/into these
pages.  Could also be useful to an application wanting to speed up its forks
by cutting large areas out of consideration.

Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il>
Acked-by: Hugh Dickins <hugh@veritas.com>
Cc: Michael Kerrisk <mtk-manpages@gmx.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-14 16:09:34 -08:00
Maciej W. Rozycki
9cf8ff9644 [MIPS] Fix CPU type bitmasks for MIPS III, IV and V.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:25 +00:00
Ralf Baechle
fbb6b3a4ac [MIPS] Get rid of kludgery needed to keep stdargs of old compilers working.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:25 +00:00
Ralf Baechle
3218357c94 [MIPS] More uaccess.h fixes with gcc >= 4.0.1.
From Richard Sandiford <richard@codesourcery.com>:
    
This patch caused a miscompilation of the restore_gp_regs() block
in restore_sigcontext().  This was in a 32-bit kernel compiled with
GCC CVS head.
    
restore_gp_regs() copies 64-bit user fields into 32-bit variables,
and in this combination, the new __get_user_asm_ll32() clobbers too
many registers.  It says:
    
/*
 * Get a long long 64 using 32 bit registers.
 */
{									\
	__asm__ __volatile__(						\
	"1:	lw	%1, (%3)				\n"	\
	"2:	lw	%D1, 4(%3)				\n"	\
	"	move	%0, $0					\n"	\
	"3:	.section	.fixup,\"ax\"			\n"	\
	"4:	li	%0, %4					\n"	\
	"	move	%1, $0					\n"	\
	"	move	%D1, $0					\n"	\
	"	j	3b					\n"	\
	"	.previous					\n"	\
	"	.section	__ex_table,\"a\"		\n"	\
	"	" __UA_ADDR "	1b, 4b				\n"	\
	"	" __UA_ADDR "	2b, 4b				\n"	\
	"	.previous					\n"	\
	: "=r" (__gu_err), "=&r" (val)					\
	: "0" (0), "r" (addr), "i" (-EFAULT));				\
}

and this requires val (%1) to be a 64-bit value.  In the case I saw,
gcc was using $3 for the 32-bit val, and wasn't expecting $4 to be
clobbered.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:24 +00:00
Atsushi Nemoto
41700e7399 [MIPS] Add protected_blast_icache_range, blast_icache_range, etc.
Add blast_xxx_range(), protected_blast_xxx_range() etc. for common
use.  They are built by __BUILD_BLAST_CACHE_RANGE().
Use protected_cache_op() macro for various protected_ routines.
Output code should be logically same.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:24 +00:00
Ralf Baechle
359bbd42a5 [MIPS] Fold non-__mips64 case into CONFIG_32BIT case.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:23 +00:00
Ralf Baechle
f32ec77b42 [MIPS] RM200: Give RM200 it's own timex.h.
So we can get rid of config.h and the #ifdef crapola in the generic
timex.h.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:23 +00:00
Linus Torvalds
f564c5fe29 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 2006-02-08 09:58:27 -08:00
Atsushi Nemoto
b887d3f2c6 [MIPS] Add 'const' to readb and friends
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:27 +00:00
Ralf Baechle
72bf891421 [MIPS] Wire up new syscalls.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:25 +00:00
Ralf Baechle
40ac5d479b [MIPS] Make do_signal return void.
It's return value is ignored everywhere.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:25 +00:00
Ralf Baechle
7b3e2fc847 [MIPS] Add support for TIF_RESTORE_SIGMASK.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:24 +00:00
Al Viro
290f10ae42 [PATCH] mips: namespace pollution - mem_... -> __mem_... in io.h
A pile of internal functions use only inside mips io.h has names starting
with mem_... and clashing with names in drivers; renamed to __mem_....

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2006-02-08 01:03:06 -05:00
Al Viro
1b8623545b [PATCH] remove bogus asm/bug.h includes.
A bunch of asm/bug.h includes are both not needed (since it will get
pulled anyway) and bogus (since they are done too early).  Removed.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2006-02-07 20:56:35 -05:00
Sergei Shtylylov
f09678af51 [MIPS] TX49x7: Fix reporting of the CPU name and PCI clock
I've noticed that PCI clock was incorrectly reported as 66 MHz while being
mere 33 MHz on RBTX4937 board -- this was due to the different encoding of
the PCI divisor field in CCFG register between TX4927 and TX4937 chips...
    
Also, RBTX49x7 was printed out as a CPU name (e.g., "CPU is RBTX4937");
and some debug printk() were duplicating each other...
    
Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:26 +00:00
Atsushi Nemoto
c226f2601f [MIPS] TX49 MFC0 bug workaround
If mfc0 $12 follows store and the mfc0 is last instruction of a
page and fetching the next instruction causes TLB miss, the result
of the mfc0 might wrongly contain EXL bit.
    
ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
    
Workaround: mask EXL bit of the result or place a nop before mfc0.  It
doesn't harm to always clear those bits, so we change the code to do so.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:26 +00:00
Ralf Baechle
1e32ceeca2 [MIPS] MIPS R2 optimized endianess swapping.
From Franck Bui-Huu <vagabon.xyz@gmail.com> with modifications by me.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:25 +00:00